lnfineon TLE6228 GP DATA SHEET

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Smart Quad Channel Low-Side Switch

Datasheet TLE 6228 GP

Features
Product Summary

• Shorted Circuit Protection

• Overtemperature Protection

• Overvoltage Protection

• Parallel Control of the Inputs (PWM Applications)

• Seperate Diagnostic Pin for Each Channel

• Power - SO 20 - Package with integrated

cooling area

Supply voltage V
Drain source voltage V
On resistance R

Output current I

4.8 - 32 V

S

DS(AZ)max

ON 1,2

R

ON 3,4

D 1,2 (max)

I

D 3,4 (max)

60 V

0.23 Ω

0.28 Ω
2 x 5 A
2 x 3 A

• Standby mode with low current consumption

• µC compatible Input

• Electrostatic Discharge (ESD) Protection

Application

• All kinds of resistive and inductive loads (relays,electromagnetic valves)

• µC compatible power switch for 12 and 24 V applications

• Solenoid control switch in automotive and industrial control systems

P-DSO-20-12

Ordering Code:
Q67006-A9364

• Robotic Controls

General description

Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate in­puts and four open drain DMOS output stages. The TLE 6228 GP is fully protected by embedded pro­tection functions and designed for automotive and industrial applications. Each channel has its own
status signal for diagnostic feedback. Therefore the TLE 6228 GP is particularly suitable for ABS or
Powertrain Systems.

Block Diagram

GND

IN1

IN2

IN3

IN4

ST1

ST2
ST3

ST4

as Ch. 1

as Ch. 1

as Ch. 1

as ST 1

as ST 1

as ST 1

STBY

VS

LOGIC

1

Gate Control

ENA

normal function

SCB / overload

overtemperature

open load/sh. to gnd

Output Stage

4

4

V

BB

OUT1

OUT4

GND

V3.1 Page 26. Aug. 2002

1

VS

T

Datasheet TLE 6228 GP

Detailed Block Diagram

STBY

ENA

IN1

ST1

IN4

ST4

internal supply

Overtemperature

Channel 4

LOGIC

LOGIC

Overtemperature

Channel 3

Overtemperature

Channel 1

Open Load

Overload

Open Load

Overload

Overtemperature

Channel 2

OUT1

IPD

OU

IPD

IN2

ST2

IN3

ST3

LOGIC

LOGIC

Open Load

Overload

Open Load

Overload

GND

OUT

IPD

OUT

IPD

V3.1 Page 26. Aug. 2002

2

Datasheet TLE 6228 GP

Pin Description Pin Configuration (Top view)

Pin Symbol Function

1 GND Ground
2 OUT1 Power Output channel 1
3 ST1 Status Output channel 1
4 IN4 Control Input channel 4
5 VS Supply Voltage
6 STBY Standby
7 IN3 Control Input channel 3
8 ST2 Status Output channel 2

9 OUT2 Power Output channel 2
10 GND Ground
11 GND Ground
12 OUT3 Power Output channel 3
13 ST3 Status Output channel 3
14 IN2 Control Input channel 2
15 GND Ground Logic
16 ENA Enable Input for all four channels
17 IN1 Control Input channel 1
18 ST4 Status Output channel 4
19 OUT4 Power Output channel 4
20 GND Ground

GND 1

OUT1 2 19 OUT4

ST1 3 18 ST4

IN4 4 17 IN1
VS 5 16 ENA

STBY 6 15 GNDL

IN3 7 14 IN2

ST2 8 13 ST3

OUT2 9 12 OUT3

GND 10 11 GND

P - DSO - 20 - 12

• 20 GND

Heat slug internally connected to ground pins

V3.1 Page 26. Aug. 2002

3

Datasheet TLE 6228 GP

p

Maximum Ratings for Tj = – 40°C to 150°C

The maximum ratings may not be exceeded under any circumstances, not even momentarily and
individually, as permanent damage to the IC will result.

Parameter Symbol Values Unit

Supply voltage V

Continuous drain source voltage (OUT1...OUT4) V

Input voltage IN1 to IN4, ENA V

Input voltage STBY V

Status output voltage V

Load Dump Protection V

1

)

=2 Ω; td=400ms; IN = low or high

R

I

With R
(I

D

= 5 Ω for Ch. 1,2; 10 Ω for Ch. 3,4

L

= 2,7A respectively 1,35A)

Load Dump

= UP+US; UP=13.5 V

Operating temperature range
Storage temperature range

Output current per channel (see page 6) I

Status output current I

Inductive load switch off energy (single pulse) Tj = 25°C E

Electrostatic Discharge Voltage (human body model)

S

DS

, V

IN

STBY

ST

V

Load Dum

T

j

T

stg

D(lim)

ST

AS

V

ESD

ENA

2

)

according to MIL STD 883D, method 3015.7 and EOS/ESD
assn. standard S5.1 - 1993

DIN Humidity Category, DIN 40 040 E

IEC Climatic Category, DIN IEC 68-1 40/150/56

Thermal resistance
junction – case (die soldered on the frame)
junction - ambient @ min. footprint
junction - ambient @ 6 cm

2

cooling area

R

thJC

R

thJA

-0.3 ... + 40 V

45 V

- 0.3 ... + 6 V

- 0.3 ... + 40

- 0.3 ... + 32 V

55 V

- 40 ... + 150

°C

- 55 ... + 150

I

D(lim) min

- 5 ... + 5 mA

50 mJ

2000 V

K/W
2
50
38

A

Minimum footprint

1

)

R

=internal resistance of the load dump test pulse generator LD200

I

2

)

V

LoadDump

V3.1 Page 26. Aug. 2002

is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.

PCB with heat pipes,
backside 6 cm

4

2

cooling area

Datasheet TLE 6228 GP

Electrical Characteristics

Parameter and Conditions Symbol Values Unit

VS = 4.8 to 18 V ; Tj = - 40 °C to + 150 °C
(unless otherwise specified)

1. Power Supply (VS)

min typ max

Supply current (Outputs ON) I

Supply current (Outputs OFF)
V

= L, V

ENA

Standby current V

STBY

= H

STBY

= L I

Operating voltage V

2. Power Outputs

ON state resistance Channel 1,2 Tj = 25 ° C
I

= 1A; VS ≥ 9.5 V Tj = 150°C

D

ON state resistance Channel 3,4 Tj = 25 ° C
I

= 1A; VS ≥ 9.5 V Tj = 150°C

D

Z-Diode clamping voltage (OUT1...4) ID ≥ 100 mA V

Pull down current V

Output leakage current

3

V

= L, 0V ≤ V

STBY

= H, VIN = L I

STBY

≤ 20V I

DS

Output turn on time 4 ID = 1 A
Output turn off time
Output on fall time
Output off rise time
Overload switch-off delay time

4

4

ID = 1 A

4

4

ID = 1 A

ID = 1 A

Output off status delay time 4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time

5

S

I

S

S

S

R

DS(ON)

R

DS(ON)

DS(AZ)

PD

Dlk

t

on

t

off

t

fall

t

rise

t

DSO

t

D

t

D-failure

t

D-IN

t

fOL(off)

8mA

4mA

10 µA

4.8 32 V

0.23 0.26

0.5

0.28 0.4

0.75

45 60 V

10 20 50 µA

5µA

3
3
3
3

20
500
500
500

10

15
20
10

60
1200
1200
1200

30

50
60
30

5

30

100
3000
3000
3000

100

Ω

Ω

µs

3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)

Input low voltage V

Input high voltage V

Input voltage hysteresis

5

Input pull down current VIN = 5 V; VS ≥ 6.5 V I

Enable pull down current V

= 5 V; VS ≥ 6.5 V I

ENA

V

IN

ENA

INL

INH

INHys

- 0.3 1.0 V

2.0 6.0 V

50 200 mV

10 30 60 µA

10 20 40 µA

4. Digital Status Outputs (ST1 - ST4) Open Drain

Output voltage low IST = 2 mA V

Leakage current high I

3

If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA

4

See timing diagram, resistive load condition; VS ≥ 9 V

5

This parameter will not be testet but assured by design

V3.1 Page 26. Aug. 2002

STL

STH

5

0.5 V

2µA

Datasheet TLE 6228 GP

Electrical Characteristics

Parameter and Conditions Symbol Values Unit

VS = 4.8 to 18 V ; Tj = – 40 °C to + 150 °C
(unless otherwise specified)

5. Standby Input (STBY)

Input low voltage V

Input high voltage V

Input current V

= 18 V I

STBY

6. Diagnostic Functions

Open load detection voltage VS ≥ 6.5 V
V

= X, VIN = L

ENA

Open load detection current channel 1,2 VS ≥ 6.5 V
V

= VIN = H

ENA

Open load detection current channel 3,4 VS ≥ 6.5 V
V

= VIN = H

ENA

Overload detection current channel 1,2 VS ≥ 6.5 V I

Overload detection current channel 3,4 VS ≥ 6.5 V I

Overtemperature shutdown threshold

5

Hysteresis

Pulse Width for static diagnostic output t

STBY

STBY

STBY

V

DS(OL)

I

D(OL) 1,2

I

D(OL) 3,4

D(lim) 1,2

D(lim) 3,4

T

th

T

hys

IN

min typ max

01V

3.5 V

S

300 µA

0.3*VS0.33*VS0.36*V

S

100 160 250 mA

100 160 250 mA

57.5 A

35.5 A

170

200 °C

10

500 µs

V

V

K

5

This parameter will not be tested but assured by design

V3.1 Page 26. Aug. 2002

6

Datasheet TLE 6228 GP

Application Description

This IC is especially designed to drive inductive loads (relays, electromagnetic valves).
Integrated clamp-diodes limit the output voltage when inductive loads are discharged.

Four open-drain logic outputs indicate the status of the integrated ciruit. The following conditions are
monitored and signalled:

- overloading of output (also shorted load to supply) in active mode

- open and shorted load to ground in active and inactive mode

- overtemperature

Circuit Description

Input Circuits

The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs
are provided with pull-down current sources. Not connected inputs are interpreted as low and the re­spective output stages are switched off.

In standby mode (STBY = LOW ) the current consumption is greatly reduced.
The circuit is active when STBY = HIGH.
If the standby function is not used, it is allowed to connect the standby pin directly to VS.
Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high
transition.

Output Stages

The four power outputs consist of DMOS-power transistors with open drains. The output stages are
short circuit protected throughout the operating range. Each output has it's own zenerclamp. This
causes a voltage limitation at the power transistor when inductive loads are switched off.
Parallel to the DMOS transistors there are internal pull down current sources. They are provided to
detect an open load condition in the off state. They will be disconnected in the standby mode.
Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active
above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ V

= 40V.

DS

Protective Circuits

6)

The outputs are protected
creases above the overload detection threshold I
creases above T

, then the power transistor is immediately switched off. It remains off until the control

th

against current overload and overtemperature. If the output current in-

for a longer time then t

QO

or the temperature in-

DSO

signal at the input is switched off and on again.

Fault Detection

The status outputs indicate the switching state of the output stage. Under normal conditions is: ST =
low Output off; ST = high Output on. If an error occurs, the logic level of the status output is in­verted, as listed in the diagnostic table.

6)

The integrated protection functions prevent an IC destruction under fault conditions and may not be used in

normal operation or permanently.

V3.1 Page 26. Aug. 2002

7

Datasheet TLE 6228 GP

If current overload or overtemperature occurs for a longer time than t
into an internal register and the output is shutdown. The reset is done by switching off the correspond­ing control input for a time longer than t

Open load is detected for all four channels in on and off mode.

In the on mode the load current is monitored. If it drops below the specified threshold value IQU then
an open load condition is detected.

In the off mode, the output voltage is monitored. An open load condition is detected when the output
voltage of a given channel is below the threshold V
To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection
in off mode uses a filter of typ. 50µs.

Status output at pulse width operation

If the input is operated with a pulsed signal, the status does not follow each single pulse of the input
signal. An internal delay t
the timing diagrams on the following pages for further information.

This internal status delay simplifies diagnostic software for pwm applications.

D of typ. 1.2ms ( min 500 µs) enables a continuous status output signal. See

D-IN

.

, which is typ. 33 % of the supply voltage VS.

DS(OL)

, the fault condition is latched

DSO

Diagnostic Table

In general the status follows the input signal in normal operating conditions.

If any error is detected the status is inverted.

Operating Condition

Standby

Input

Enable

Input

Control

Input

Power

Output

Status

Output

STBY ENA IN Q ST

Standby L X X off H

Normal function H

H
H

Open load or short to ground H

H
H
H

Overload or short to supply

reset latch

2)

1)

H

H

H
H

H
H

H

H

L

L
L

X
L
H

L
H
L
H

H

H → L

off
off
ON

off

off

off
ON

off

off

H

H
H
H

L
L

L

L

L

H

Overtemperature

reset latch

1)

2)

H

H

H

Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time t DSO specified in

2.10 will not be latched and not reported at the status pin.

V3.1 Page 26. Aug. 2002

H

H

L

X

H

H → L

L

8

X

off

off

off

off

L

L

L

L

Datasheet TLE 6228 GP

Note 2) : to reset latched status-output in case of overload/short-to-supply/overtemperature the control
input has to go low and stay low for longer than max. input suppression time t
the characteristics

Failure Situations and Status Report

Logic Block Diagram

Overtemperature

1.....overtemperature

0.....normal cond.

ENA

1....enabled

0... disabled

Input

1....On

0... Off

Delay

60µs

t

DSO

SET

Q

S

Delay D

specified in 2.13 of

D-IN

Gate Driver

1... Output

0....Output

t

IN

OUT

D

1,2ms typ.

Overload

0.....overload

1.....normal cond.

Open load "off"

1.....open load

0.....normal cond.

Open load "on"

0.....open load

1.... normal cond.

Filter
30µs

Filter

t

D

t

when

D-IN

load

HI

t

D-failure

t

D-failure

EN

IN

EN

IN

EN

IN

Delay D

Delay D

Delay D

Q

R

CLR

Delay
60µs

IN

OUT

t

D

60µs typ.

OUT

Status

OUT

0....High

1....Low

OUT

V3.1 Page 26. Aug. 2002

9

Output Slope

V

IN

V

INH

V

INL

VDS

V

S

85%

15%

ST

V

t

on

Datasheet TLE 6228 GP

Timing Diagrams

t

t

off

t

t

f

t

r

Overload Switch OFF Delay

I

D

I

D(lim)

I

D(OL)

V

ST

t

D-failure

t

D

t

Fig. 1

t

S

D

O

t

t

V3.1 Page 26. Aug. 2002

10

Fig. 2

Test Circuit

Datasheet TLE 6228 GP

OUT1

VS

L1

R

L2

R

L3

R

L4

R

ID1

OUT1

IVS

VS

ST1

IST1

OUT2

OUT3

VDS(OUT4) VDS(OUT3) VDS(OUT2) VDS(OUT1)

OUT4

ID2

OUT2

TLE 6228 GP

ST2

ST3

IST2

IST3

ID3

OUT3

TLE

6227

ST4

IN1

IST4

IIN1

ID4

OUT4

GND

IN2

IN3

IN4

ENA

STBY

IIN2

IIN3

IIN4

IENA

VSTBY

ISTBY

VENA

ENA

IN4

VIN4

VIN3

IN3

VIN2

IN2

IN1

VST4

ST4

ST3

ST2

VD = 5V

10k 10k 10k 10k

VST1 VST2 VST3 VIN1

ST1

V3.1 Page 26. Aug. 2002

11

Application Circuit

Datasheet TLE 6228 GP

+12V

L1 L2 L3 L410k 10k 10k 10k

VD = 5V

C

VS

STBY

OUT1

ST1

ST2

ST3

OUT2

TLE

ST4

OUT3

6228

IN1

OUT4

GND

IN2

IN3

IN4

ENA

Output

Status

The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of
battery interruption during OFF-commutation.

V3.1 Page 26. Aug. 2002

12

Inputs

Control

Enable

Input

Datasheet TLE 6228 GP

f

Timing Diagrams of Diagnostic with Pulsed Input Signal

Normal condition, resistive load, pulsed input signal

V

IN

t

IN

I

D

V

ST

t

D

t

D

Current Overload

V

IN

I

D

V

ST

t

DSO

Fig. 3

F

t

INof

t

D-IN

current overload condition

t

DSO

I

D(lim)

t

INoff

< t

: Input suppression time avoids a restart after overtemperature

D-IN

Fig. 4

V3.1 Page 26. Aug. 2002

13

Datasheet TLE 6228 GP

Diagnostic status output at different open load current conditions

V

IN

I

t

D(OL)

D

I

D

t

D-failure

V

ST

Fig. 5

V

IN

I

D

V

ST

t

< tD leads to a static status signal

INOFF

V

IN

I

D

t

INoff

t

D-failure

t

INoff

t

D

I

D(OL)

I

D(OL)

Fig. 6

t

V

ST

t

> tD : Intermittend status signal Fig. 7

INoff

V3.1 Page 26. Aug. 2002

D-failure

14

t

D-failure

t

D-failure

t

D

Datasheet TLE 6228 GP

p

p

Normal operation, followed by open load condition

~ 55V

Open load voltage condition

V

V

I

V

DS

IN

D

ST

12V

t

D-failure

I

D(OL)

t

fOL(off)-

t

D

Overtemperature

33%

t

D-failure

Fig. 8

V

V

I

IN

D

ST

I

D(OL)

t

D-failure

t

DSO

Overtemperature

Reset of overload
Fli

t

INoff

Flo

> t

D-IN

t

D-failure

Fig. 9

V3.1 Page 26. Aug. 2002

15

Typical electrical Characteristics

Drain-Source on-resistance

R

= f (Tj) ; Vs = 9,5V

DS(ON)

Datasheet TLE 6228 GP

Typical Drain- Source ON-Resistance

0,45

0,4

0,35

0,3

0,25

RDS(ON) [Ohm]

0,2

0,15

-50 -25 0 25 50 75 100 125 150 175

Tj[°C]

Channel 1, 2
Channel 3, 4

Figure 6 : Typical ON Resistance versus Junction-Temperature

Channel 1-4

Output Clamping Voltage

V

= f (Tj) ; ID = 100mA

DS(AZ)

Typical Clamping Voltage

55

54

53

52

51

VDS (AZ) [V]

50

49

48

-50 -25 0 25 50 75 100 125 150 175

Tj[°C]

Figure 7 : Typical Clamp Voltage versus Junction-Temperature

Channel 1-4

Channel 1-4

V3.1 Page 26. Aug. 2002

16

Package and ordering code

all dimensions in mm

P - DSO - 20 - 12 Ordering code

TLE 6228 GP

Q67006-A9364

9 x = 11.431.27

1.27

15.74

13.7

-0.2

+/- 0.1

Datasheet TLE 6228 GP

+0.13

0.4

1120

0.25 A

M

110

1 x 45°

PIN 1 INDEX MARKING

A

15.9

+/-0 .15

2.8

0.1

8° 8°

8°

1.2

-0.3

+/-0 .1

+/-0 .1

3.2

5.9

1.3

6.3

+/-0 .15

11

+/-0 .3

14.2

V3.1 Page 26. Aug. 2002

8°

1)

17

Datasheet TLE 6228 GP

Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 76,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.

Attention please!

The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech­nologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are in­tended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.

V3.1 Page 26. Aug. 2002

18