lnfineon TLE 4271-2 User Manual

现货库存、技术资料、百科信息、热点资讯,精彩尽在鼎好!
5-V Low-Drop Fixed Voltage Regulator TLE 4271-2
Features
• Output voltage tolerance
• Low-drop voltage
• Integrated overtemperature protection
• Reverse polarity protection
• Input voltage up to 42 V
• Overvoltage protection up to 65 V (
400 ms)
• Short-circuit proof
• Suitable for use in automotive electronics
• Wide temperature range
• Adjustable reset and watchdog time
Type Ordering Code Package
TLE 4271-2 Q67000-A9446 P-TO220-7-11 TLE 4271-2 S Q67000-A9448 P-TO220-7-12 TLE 4271-2 G Q67006-A9447 P-TO263-7-1
Functional Description
P-TO220-7-11
P-TO263-7-1
The TLE 4271-2 is functional and electrical identical to the TLE 4271.
The device is a 5-V low-drop fixed-voltage regulator. The maximum input voltage i s 42 V (65 V,
400 ms).
P-TO220-7-12
Up to an input voltage of 26 V and for an output current up to 550 mA it regul ates the output voltage within a
2 % accuracy. The short circuit protection limits the output current of more than 650 mA. The IC can be switched off via the inhibit input. An integ rated watchdog monitors the connected controller. The devi ce incorporates overvoltage prot ection and temperature protection that disables the circuit at overtemperature.
Data Sheet Rev. 2.4 1 2001-04-04
AEP01939
GNDINH
Ι
ROWID
Q
17
P-TO220-7-11 P-TO263-7-1P-TO220-7-12
1
TLE 4271-2
17
Q
Ι
7
INHROGND
D
WI
AEP01938
Ι
RO
GNDINH
Q
D
WI
AEP02017
Figure 1 Pin Configuration (top view)
Pin Definitions and Functions Pin Symbol Function
1 I Input; block to ground directly on the IC with ceramic capacitor. 2INH Inhibit 3RO Reset Output; the open collector output is connected to the 5 V output
via an integrated resistor of 30 k
Ω.
4GNDGround 5D Reset Delay; connect a capacitor to ground for delay time adjustment. 6WI Watchdog Input 7Q 5-V Output; block to ground with 22
Data Sheet Rev. 2.4 2 2001-04-04
µF capacitor, ESR < 3 Ω.
TLE 4271-2
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a volt age that is proportion al to the output voltag e and drives the base of a series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor equal greater than the reset threshold condition) a fast discharge of the delay capacitor than
The time for the delay capacitor charge from When the voltage on the delay capacitor has reached
watchdog circuit is enabled and discharges no rising edge observed at the watch dog input, reset output RO will be set to low and
V
V
. The delay capacitor CD is charged with the current ID for output voltages
UD
V
. If the output voltage gets lower than VRT (’reset
RT
V
the reset output RO is set to low-level.
LD
C
will be charged again with the current I
D
reaches VUD and reset will be set high again.
D
C
sets in and as soon as VD gets lower
D
V
to VLD is the reset delay time tD.
UD
V
and reset was set to high, the
UD
C
with the constant current I
D
C
will be discharge down to V
D
C
is greater or
D
. If there is
DWD
LDW
DWC
, then
until
If the watchdog pulse (rising edge at watchdog inp ut WI) occurs during the disch arge
C
period
is charged again and the reset output stays high. After VD has reached VUD,
D
the periodical behavior starts again. Internal protection circuits protect the IC against:
Overload
Overvoltage
Overtemperature
Reverse polarity
Data Sheet Rev. 2.4 3 2001-04-04
TLE 4271-2
1
Ι
Adjustment
Temperature
Sensor
Control
Amplifier
Bandgap
Reference
INH GND
+
-
Buffer
Saturation
Control and
Protection
Circuit
42
Reset
Generator
Watchdog
7
Q
3
RO
5
D
6
WI
AEB01940
Figure 2 Block Diagram
Data Sheet Rev. 2.4 4 2001-04-04
Absolute Maximum Ratings
T
= – 40 to 150 °C
j
Parameter Symbol Limit Values Unit Notes
min. max.
Input
TLE 4271-2
Voltage Voltage Current
Inhibit
Voltage Voltage Current
Reset Output
Voltage Current
Reset Delay
Voltage Current
V V I
V V I
V I
V I
I I
I
INH INH
INH
RO
RO
D
D
42 – –
42 – –
0.3
0.3 5
42 65
42 65
42
7 5
V V mA
V V mA
V mA
V mA
t 400 ms
internally limited
t 400 ms
internally limited
internally limited
– –
Watchdog
Voltage Current
V I
W
W
0.3 5
7 5
V mA
– –
Output
Voltage Current
V I
Q
Q
1.0 5
16
V mA
internally limited
Ground
Current
I
GND
– 0.5 A
Temperatures
Junction temperature Storage temperature
Data Sheet Rev. 2.4 5 2001-04-04
T
j
T
stg
– – 50
150 150
°C °C
– –
Operating Range
Parameter Symbol Limit Values Unit Notes
min. max.
TLE 4271-2
Input voltage Junction temperature
Thermal Resistance
Junction ambient
Junction case
V T
R
R Z
I
j
thja
thjc
thjc
640V
40 150 °C
65
70
– –
3 2
K/W K/W–P-TO263
K/W K/W
t < 1ms
Data Sheet Rev. 2.4 6 2001-04-04
TLE 4271-2
Characteristics
V
= 13.5 V; – 40 °C ≤ Tj= 125 °C; V
I
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
INH
> V
(unless otherwise specified)
U,INH
Output voltage
Output voltage
Output current limiting
Current consumption
I
= I
q
I
Current consumption
I
= I
q
I
Current consumption
I
= II– I
q
Q
Current consumption
I
= II– I
q
Q
V
Q
V
Q
I
Qmax
I
q
I
q
I
q
I
q
4.90 5.00 5.10 V 5 mA I
6 V
VI≤ 26 V
4.90 5.00 5.10 V 26 V V
I
300 mA;
Q
550 mA;
Q
36 V;
I
650 800 mA VQ = 0 V
––6 µA V
800 µA V
= 0 V; IQ = 0 mA
INH
= 5 V; IQ = 0 mA
INH
11.5mAIQ = 5 mA
55 75 mA IQ = 550 mA
Current
I
q
70 90 mA IQ = 550 mA; VI = 5 V
consumption
I
= II– I
q
Drop voltage Load regulation V
Supply voltage regulation
Power supply Ripple rejection
1)
Drop voltage = VI– VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input)
Data Sheet Rev. 2.4 7 2001-04-04
Q
V
dr
V
Q
Q
350 700 mV IQ = 550 mA – 25 50 mV IQ = 5 to 550 mA;
12 25 mV VI = 6 to 26 V
PSRR 54 dB f
V
= 6 V
I
I
= 5 mA
Q
=100Hz;
r
V
=0.5V
r
1)
PP
TLE 4271-2
Characteristics (contd)
V
= 13.5 V; – 40 °C ≤ Tj= 125 °C; V
I
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Reset Generator
INH
> V
(unless otherwise specified)
U,INH
Switching threshold Reset hi gh voltage Saturation voltage
Saturation voltage
Reset pull-up
Lower reset timing threshold
Charge current I Upper timing
threshold Delay time t Reset reaction time
V
RT
V
ROH
V
RO,SAT
V
RO,SAT
R
V
LD
D
V
UD
D
t
RR
4.5 4.65 4.8 V
4.5 ––V – – 60 mV R
1.0 V
=30 kΩ;
intern
VQ ≤ 4.5 V
200 400 mV IR = 3 mA1);
V
= 4.4 V
Q
18 30 46 K internally connected
to Q
0.2 0.45 0.8 V V
Q
< V
RT
81425µA VD = 1.0 V
1.4 1.8 2.3 V
81318msCD = 100 nF ––3 µs CD = 100 nF
Overvoltage Protection
Turn-off voltage
V
I, ov
40 44 46 V
Inhibit
Turn-on voltage Turn-off voltage Inhibit current
1)
Test condition not applicable during delay time for power-on reset .
Data Sheet Rev. 2.4 8 2001-04-04
V V I
INH
U,INH
L,INH
1.0 2.0 3.5 V VQ = high (> 4.5 V)
0.8 1.3 3.3 V VQ = low (< 0.8 V) 81225µA V
INH
= 5 V
TLE 4271-2
Characteristics (contd)
V
= 13.5 V; – 40 °C ≤ Tj= 125 °C; V
I
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Watchdog
INH
> V
(unless otherwise specified)
U,INH
Upper watchdog switching threshold
Lower watchdog switching threshold
Discharge current Charge current Watchdog period Watchdog trigger
time Watchdog pulse
slew rate
V
V
I
DWD
I
DWC
t
WD,P
t
WI,tr
V
UDW
LDW
WI
1.4 1.8 2.3 V
0.2 0.45 0.8 V
1.5 2.7 3.5 µA VD = 1 V 81425µA VD = 1 V 40 55 80 ms CD = 100 nF 30 45 66 ms CD = 100 nF
see diagr am
5 ––V/µs from 20% to 80% V
Q
Data Sheet Rev. 2.4 9 2001-04-04
TLE 4271-2
Ι
Ι
µ
1000 F
V
Ι
Figure 3 Test Circuit
470 nF
V
INH
Ι
17
Q
µ
22 F
TLE 4271-2
Ι
RO
32
V
5
Ι
D
V
D
C
6
V
D
WI
4
Ι
GND
V
Q
RO
AES01941
Input
Input e.g. KL 15
Reset to MC
Watchdog Signal from MC
Figure 4 Circuit
470 nF
1
2
TLE 4271-2
3
4
6
7
5 V-Output
22 F
µ
5
100 nF
AES01942
Data Sheet Rev. 2.4 10 2001-04-04
Application Description
TLE 4271-2
The IC regulates an input voltage in the range of 6 V <
V
< 40 V to V
I
= 5.0 V. Up to
Qnom
26 V it produces a regulated output current of more than 550 mA. Above 26 V the save­operating-area protection allows opera tion up to 36 V with a regulated output current of more than 300 mA. Overvoltage protection limits operation at 42 V. The overvoltage protection hysteresis restores operation if the input voltage has dropped below 36 V. The IC can be switch ed off v ia the inhibit i nput, wh ich caus es the quiescen t current to drop below 50
µA. A reset signal is generated for an output voltage of V
<4.5V. The
Q
watchdog circuit monitors a connected controller. If there is no positive-going edge at the watchdog input within a fixed time, the reset output is set to low. The delay for power-on reset and the maximum pe rmitted watchdog-pulse period can b e set externally with a capacitor.
Design Notes for External Components
An input capacitor
C
is necessary for compensation of lin e influences. The resonant
I
circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1
in series with C
the regulating circuit. Stability is guaranteed at values of
Ω.
<3
. An output capacitor CQ is necessary for the stability of
I
C
22 µF and an ESR of
Q
Reset Circuitry
If the output voltage decreases belo w 4.5 V, an external capacitor discharged by the reset generator. If th e voltage on th is capacito r drops below
C
on pin D will be
D
V
DRL
, a
reset signal is generated on pin RO, i.e. reset output is set low. If the output voltage rises
C
above the reset threshold, reset time the voltage on the capacitor reaches
will be charged with constant current. After the power-on-
D
V
and the reset output will be set high
DU
again. The value of the power-o n-reset t ime can be set wit hin a w ide range depending
C
of the capacitance of
.
D
Reset Timing
The power-on reset delay time is defi ned by the charging time of an external capacito r
C
which can be calculated as follows:
d
t
D
= C
∗∆V/I
D
D
Definitions: CD= delay capacitor
t
= reset delay time
D
I
= charge current , typical 14 µA
D
V = V
V
UD
, typical 1.8 V
UD
= upper delay timing threshold at CD for reset delay time
Data Sheet Rev. 2.4 11 2001-04-04
TLE 4271-2
The reset reaction time trr is the time it takes the voltage regula tor to set the reset out LOW after the output voltage has drop ped bel ow the res et thresh old. It i s typic ally 1 for delay capacitor of 47 nF. For other values for
C
the reaction time can be estimated
d
using the following equation:
t
20 s/F × C
RR
V
Ι
d
µs
V
U, INH
V
L, INH
V
D, SAT
V
INH
t<
V
Q
V
RT
t
V
D
V
UD
V
LD
V
RO
dt
Ι
Vd
D
=
C
D
t
D
RR
RR
t
t
t
t
V
RO, SAT
t
Power Reset Shutdown
Thermal Voltage Drop
at Input
Undervoltage at Output
Secondary
Load Shutdownon
Spike Bounce
AET01985
Figure 5 Time Response
Data Sheet Rev. 2.4 12 2001-04-04
Watchdog Timing
V
WΙ
V
Ι
V
Q
TLE 4271-2
t
+
DWC
WΙ, tr
Ι
DWD
V
D
V
UDW
V
LDW
V
R
t
WΙ, tr
V
V
-
()
UDW
Ι
DWD
LDW
t
C
;
WD, P
D
=
V
-
()()
UDW
=
Ι
V
LDW
.
Ι
DWCΙDWD
Figure 6 Time Response, Watchdog Behavior
t
WD, P
t
WD, L
V
V
-
()
UDW
Ι
DWC
LDW
C
D
AES03078
=
t
C
;
WD, L
D
Data Sheet Rev. 2.4 13 2001-04-04
Typical Performance Characteristics
V
T
Q
j
versus
V
= 13.5 V
I
AED01928
Output Voltage Temperature
5.2 V
V
Q
5.1
Output Voltage VQ versus Input Voltage
12
V
V
Q
10
V
I (VINH
= VI)
TLE 4271-2
AED01929
5.0
4.9
4.8
4.7
4.6
-40 04080120 ˚C 160
T
j
8
6
R
= 25
L
4
2
0
0
2
4
68
10
V
V
Ι
Data Sheet Rev. 2.4 14 2001-04-04
TLE 4271-2
Output Current Limit IQ versus Temperature
1200
mA
I
Q max
1000
800
600
400
200
T
j
0
-40 04080120 ˚C 160
AED01930
T
j
Output Current IQ versus Input Voltage
1.2 A
I
Q
1.0
0.8
0.6
0.4
0.2
0
0 10 20 30 40 V50
V
I
= 125 ˚C
T
j
25 ˚C
AED01931
V
I
Current Consumption I versus Output Current I
6
mA
Ι
q
5
4
3
V
= 13.5 V
Ι
2
1
0
20 40 60 80 120
0
q
Q
AED03076
Current Consumption I versus Output Current I
80
mA
Ι
q
q
Q
AED03077
70
60
50
40
30
= 13.5 V
V
Ι
20
10
0
100 200 300 400 600
mA
Ι
Q
0
mA
Ι
Q
Data Sheet Rev. 2.4 15 2001-04-04
TLE 4271-2
Current Consumption I versus Input Voltage V
120
mA
I
q
100
80
60
40
20
0
0 10 20 30 40 V50
R
R
q
I
L
L
= 10
20
=
50
AED01934
Ω Ω
V
Drop Voltage Vdr versus Output Current
800
mV
V
Dr
700
600
500
400
300
200
100
0
I
I
Q
T
= 125 C
j
2000 400
AED02755
T
= 25 C
j
600 1000
mA
Ι
Q
Inhibit Current I
INH
versus Inhibit Voltage
12
µ
A
Ι
INH
10
Ι
INH, on
8
6
4
2
0
0
Ι
1
INH, off
2
3
V
INH
Ι
INH, high
V
Ι
T
j
AED01944
= 13.5 V = 25 C
4
V
5
INH
Output Voltage V versus Inhibit Voltage V
Q
INH
AED01945
6
V
V
Q
5
V
= 13.5 V
Ι
T
= 25 C
j
4
3
2
1
0
6
V
0
3
21
5
INH
6
V
4
V
Data Sheet Rev. 2.4 16 2001-04-04
TLE 4271-2
Inhibit Current Consumptions I versus Temperature
14
A
µ
Ι
INH
12
10
8
6
4
2
0
-40
0 1208040
T
Ι
Ι
Ι
INH
INH
INH
AED01946
, high
, on
, off
T
j
INH
160
Inhibit Voltages V
INH
versus Temperature T
6
V
V
INH
5
4
3
2
1
V
0
40-40 0
j
INH
, off
80 120
V
INH
AED01947
, on
160
C
T
j
Switching Voltage VUD and V
LDW
T
V
= 13.5 V
Ι
V
UD
40-40 0
80 120
versus Temperature
2.4 V
V
2.0
1.6
1.2
0.8
0.4
V
0
LDW
AED01948
,
V
UDW
C
T
j
160
Data Sheet Rev. 2.4 17 2001-04-04
TLE 4271-2
Charge Current ID, I
I
Current
16
µA
I
14
12
10
versus Temperature T
DWD
I,I
D
DWC
8
V V
6
4
I
DWD
2
0
-40
04080
and Discharge
DWC
= 13.5 V
I
= 1 V
D
120 160˚C
AED01949
T
j
Watchdog Pulse Time Tw
j
versus Temperature
80
ms
T
W
70
60
50
40
30
20
10
0
-40
T
V
= 13.5 V
Ι
C
= 100 nF
D
400
j
AED01950
80
160120
C
T
j
Data Sheet Rev. 2.4 18 2001-04-04
Package Outlines
P-TO220-7-11
(Plastic Transistor Single Outline Package)
±0.2
10
±0.2
9.9
1)
8.5
1)
0...0.3
±0.3
±0.3
17
12.95
15.65
0...0.15 6x
1.27
1)
Typical Metal surface min. X=7.25, Y=12.3
All metal surfaces tin plated, except area of cut.
7x
A
±0.2
2.8
±0.3
8.6
0.6
-0.15
3.7
±0.3
10.2
±0.1
TLE 4271-2
4.4
±0.1
1.27
0.05
C
±0.3
3.7
2.4
M
A0.25
C
8.4
±0.4
±0.2
9.25
0.5
3.9
±0.3
1.6
±0.1
±0.4
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our Data Book Package Information”.
Dimensions in mm
Data Sheet Rev. 2.4 19 2001-04-04
GPT09083
P-TO220-7-12
(Plastic Transistor Single Outline Package)
±0.2
±0.3
17
1)
±0.3
12.95
15.65
0...0.3
C
10
9.9
8.5
±0.2
1)
A
±0.2
2.8
±0.5
11
-0.15
3.7
±0.5
13
1.27
0.05
B
±0.1
2.4
TLE 4271-2
4.4
±0.2
9.25
0...0.15
0.6
±0.1
7x
1.27
1)
Typical
6x
M
BA0.25
C
Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut.
2.4
0.5
±0.1
GPT09084
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our Data Book Package Information”.
Dimensions in mm
Data Sheet Rev. 2.4 20 2001-04-04
P-TO263-7-1
(Plastic Transistor Single Outline Package)
±0.2
10
0...0.3
1)
8.5
±0.3
1
±0.2
9.25
(15)
7x0.6
±0.1
1.27
6x
1)
Typical Metal surface min. X=7.25, Y=6.9
All metal surfaces tin plated, except area of cut.
A
1)
7.55
0...0.15
TLE 4271-2
4.4
±0.1
1.27 B
0.05
2.4
0.1
±0.3
±0.5
2.7
4.7
0.5
±0.1
M
BA0.25
8˚ max.
0.1
B
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our Data Book Package Information”.
SMD = Surface Mounted Device
GPT09114
Dimensions in mm
Data Sheet Rev. 2.4 21 2001-04-04
TLE 4271-2
Data Sheet Rev. 2.4 22 2001-04-04
Edition 2001-04-04 Published by Infineon Technologies AG,
St.-Martin-Strasse 53, D-81541 München, Germany
© Infineon Technologies AG 2001.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be consid­ered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non­infringement, regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
TLE 4271-2
Information
For further information on technology, deliv­ery terms and conditions and prices please contact your nearest Infineon Tec hnologies Office in Germany or our Infineon Technolo­gies Representatives worldwide (see ad­dress list).
Warnings
Due to technical requirements components may contain dangerous substances. For in­formation on the types in question please contact your nearest Infineon Tec hnologies Office.
Infineon T echnologies Components may only be used in life-support devices or systems with the express written approval of Infineon T echnologies, if a f ailure of such components can reasonably be expected to cause the fail­ure of that life-support device or system, or to affect the safety or effectiveness of that de­vice or system. Life support devices or sys­tems are intended to be implanted in the hu­man body, or t o support and/or maintain and sustain and/or protect human life. If they fa il, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet Rev. 2.4 23 2001-04-04
Loading...