lnfineon BTS 840 S2 User Manual

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PROFET

®

BTS 840 S2

Smart High-Side Power Switch

Two Channels: 2 x 30mΩ

Current Sense

Product Summary Package

Operating Voltage V

Active channels: one two parallel On-state Resistance RON Load Current (ISO) I Current Limitation I

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input,

diagnostic feedback and proportional load current sense monolithically integrated in Smart SIPMOS technology.

• Providing embedded protective functions

5.0...34V

bb(on)

30mΩ 15mΩ

12A 24A

L(ISO)

24A 24A

L(SCr)

P-DSO-20-12 (Power SO 20)



Applications

• µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads

• All types of resistive, inductive and capacitve loads

• Most suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• CMOS compatible input

• Undervoltage and overvoltage shutdown with auto-restart and hysteresis

• Fast demagnetization of inductive loads

• Logic ground independent from load ground

Protection Functions

• Short circuit protection

• Overload protection

• Current limitation

Vbb

• Thermal shutdown

• Overvoltage protection (including load dump) with external

resistor

• Reverse battery protection with external resistor

• Loss of ground and loss of V

protection

bb

IN1 ST1 IS1

Logic

Channel

1

OUT 1

• Electrostatic discharge protection (ESD)

Diagnostic Functions

• Proportinal load current sense

• Diagnostic feedback with open drain output

• Open load detection in OFF-state with external resistor

IN2 ST2 IS2

Logic

Channel

2

PROFET

GND

OUT 2

Load 2

• Feedback of thermal shutdown in ON-state

Load 1

Infineon technologies 1 of 15 2003-Oct-01

BTS 840 S2

p

g

Functional diagram

overvoltage

rotection

internal

e supply

volta

IN1

ST1

ESD

IS1

GND1

IN2

ST2

IS2

GND2

Pin Definitions and Functions

Pin Symbol Function

1,10, 11,12,

3 IN1 7 IN2 16,17, 18,19 12,13, 14,15

4 ST1 8 ST2 2 GND1 6 GND2 5 IS1 9 IS2

Heatslug Vbb Positiv powersupply voltage. Good way to

Vbb Positive power supply voltage. For high

current applications the heat slug should be used as Vbb connection.

Input 1,2, activates channel 1,2 in case of

logic high signal

OUT1

Output 1,2, protected high-side power output

of channel 1,2. All pins of each output have to

OUT2

be connected in parallel for operation according ths spec (e.g. k wiring for the max. short circuit current

Diagnostic feedback 1,2 of channel 1,2

open drain, invers to input level

Ground 1,2 of chip channel 1,2

Sense current output 1,2; proportional to the

load current, zero in the case of current limitation of the load current

design a very low thermal resistance.

logic

gate

control

+

charge

pump

temperature

sensor

Open load

detection

Current

sense

Control and protection circuit

of

channel 2

). Design the

ilis

current limit

clamp for

inductive load

Heat slug

VBB

OUT1

R

LOAD

GND1

Channel 1

OUT2

PROFET

Pin configuration

(top view)

V

1 • 20 V

bb

GND1 2 19 OUT1

IN1 3 18 OUT1

ST1 4 17 OUT1

IS1 5 16 OUT1

GND2 6 Vbb 15 OUT2

IN2 7 14 OUT2

ST2 8 13 OUT2

IS2 9 12 OUT2 Vbb 10 11 Vbb

bb

Infineon technologies 2 2003-Oct-01

BTS 840 S2

Maximum Ratings at T

= 25°C unless otherwise specified

j

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 5) Vbb 43 V Supply voltage for full short circuit protection

T

= -40 ...+150°C

j,start

Vbb 34 V

Load current (Short-circuit current, see page 5) IL self-limited A

3

Load dump protection1) V

2)

R

= 2 Ω, td = 200 ms; IN = low or high,

I

LoadDump

= VA + Vs, VA = 13.5 V

V

Load dump

)

60 V

each channel loaded with RL = 1.0 Ω, Operating temperature range

Storage temperature range Power dissipation (DC)4) Ta = 25°C:

(all channels active) Ta = 85°C: Maximal switchable inductance, single pulse

V

= 12V, T

bb

j,start

= 150°C4),

IL = 4 A, EAS = 1.13J, 0 Ω one channel: IL = 12 A, EAS = 430mJ, 0 Ω one channel: IL = 24 A, E

= 800mJ, 0 Ω two parallel channels:

AS

T

j

T

stg

P

3.8

tot

-40 ...+150

-55 ...+150

ZL

2.0

100

4.4

2.0

°C

W

mH

see diagrams on page 10 Electrostatic discharge capability (ESD) IN:

(Human Body Model) ST, IS: out to all other pins shorted:

V

1.0

ESD

kV

4.0

8.0

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC) VIN -10 ... +16 V Current through input pin (DC)

Current through status pin (DC) Current through current sense pin (DC)

I

IN

IST IIS

±2.0 ±5.0

±14

mA

see internal circuit diagram page 9

1)

Supply voltages higher than V

resistor for the GND connection is recommended.

2)

RI = internal resistance of the load dump test pulse generator

3)

V

Load dump

4)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air.

is set up without the DUT connected to the generator per ISO 7637-1 and DIN 40839

require an external current limit for the GND and status pins a 150Ω

bb(AZ)

2

(one layer, 70µm thick) copper area for Vbb

Infineon technologies 3 2003-Oct-01

BTS 840 S2

Thermal Characteristics

Parameter and Conditions Symbol Values Unit

Thermal resistance junction -case each channel: R

junction - ambient4) one channel active: all channels active:

min typ max

R

thjs thja

-- -- 1

--

37 30

--

K/W

Electrical Characteristics

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

min typ max

On-state resistance (Vbb to OUT); I

= 5 A

L

each channel, Tj = 25°C:

T

= 150°C:

j

two parallel channels, Tj = 25°C: Output voltage drop limitation at small load

currents, see page 14 I

= 0.5 A Tj =-40...+150°C:

L

Nominal load current, ISO Norm

one channel active: two parallel channels active:

ISO 10483-1, 6.7: Von =0.5V T Output current while GND disconnected or pulled up

V

= 30 V, V

bb

see diagram page 10

IN

= 0,

Turn-on time6) IN

Turn-off time IN

= 12 Ω

R

L

= 85°C

c

to 90% V

to 10% V

5)

OUT

Slew rate on 6) 10 to 30% V

OUT

, R

= 12 Ω:

L

Slew rate off 6) 70 to 40% V

, RL = 12 Ω:

OUT

:

;

RON

V

I

t t

ON(NL)

L(NOM)

L(GNDhigh)

on off

-- -- 8 mA

--

11 22

25 25

27 54

14

50 -- mV

12 24

70 80

30 60

15

-- A

150

200

dV/dton 0.1 -- 1 V/µs

-dV/dt

0.1 -- 1 V/µs

off

mΩ

µs

5)

not subject to production test, specified by design

6)

See timing diagram on page 11.

Infineon technologies 4 2003-Oct-01

BTS 840 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

min typ max

Operating Parameters Operating voltage7) V

Undervoltage shutdown V Undervoltage restart Tj =-40...+25°C:

V

5.0 -- 34 V

bb(on) bb(under) bb(u rst)

3.2 -- 5.0 V

-- 4.5 5.5

Tj =+150°C: Undervoltage restart of charge pump

see diagram page 13 Tj =-40...+25°C:

T

=150°C:

j

Undervoltage hysteresis

∆V

bb(under)

= V

bb(u rst)

- V

bb(under)

Overvoltage shutdown V Overvoltage restart V Overvoltage hysteresis ∆V Overvoltage protection

I

=40 mA T

bb

Standby current V

= 0 T

IN

)

9

Leakage output current (included in I Operating current

I

= I

GND

two channels on:

GND1

+ I

GND2

8)

Tj =-40:

=+25...+150°C:

j

Tj =-40°C...25°C:

=150°C:

j

);

10)

, V

= 5V,

IN

bb(off)

VIN = 0

, one channel on:

V ∆V

V I

bb(off)

I

L(off)

bb(ucp)

bb(under)

34 -- 43 V

bb(over)

33 -- -- V

bb(o rst)

-- 1 -- V

bb(over)

41

bb(AZ)

--

-- -- 20 µA

I

GND

V

6.0

--

4.7

--

6.5

V

7.0

-- 0.5 -- V

43

--

47

8

24

1.2

2.4

--

52 30

50

36mA

V

µA

Protection Functions

11)

Current limit, (see timing diagrams, page 12)

=-40°C:

Tj

=25°C:

T

j

=+150°C:

j

T

48

I

L(lim)

40 31

56 50 37

65 58 45

Repetitive short circuit current limit, Tj = Tjt each channel two parallel channels

(see timing diagrams, page 12)

Initial short circuit shutdown time T

j,start

=25°C:

I

--

L(SCr)

t

-- 4.0 -- ms

off(SC)

--

24 24

--

(see timing diagrams on page 12)

7)

At supply voltage increase up to Vbb= 4.7 V typ without charge pump, V

8)

Supply voltages higher than V resistor in the GND connection is recommended). See also V circuit diagram page 9.

9)

Measured with load; for the whole device; all channels off

10)

Add I

11)

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.

, if IST > 0

ST

require an external current limit for the GND and status pins (a 150 Ω

bb(AZ)

in table of protection functions and

ON(CL)

≈Vbb - 2 V

OUT

A

Infineon technologies 5 2003-Oct-01

BTS 840 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

min typ max

Output clamp (inductive load switch off)

at V

ON(CL)

= Vbb - V

, IL= 40 mA

OUT

Tj

Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis

Reverse Battery

Reverse battery voltage Drain-source diode voltage (V

= - 4.0 A, Tj = +150°C

IL

13)

-Vbb -- -- 32 V

> V

out

Diagnostic Characteristics

bb(on)

14)

, static on-condition,

15)

= 6.5

...27V,

Tj= -40°C, IL= 0.5 A:

Current sense ratio

VIS = 0...5 V, V k

= IL / I

ILIS

Tj= 25...+150°C, IL= 5 A:

Tj = -40°C, IL = 5 A:

IS

Tj= 25...+150°C, IL = 0.5 A:

12)

=-40°C:

Tj

=25°C...150°C:

)

bb

V

∆

ON(CL)

Tjt -- 10 -- K

41 43

--

47

--

V

52

-VON -- 600 -- mV

k

ILIS

4350

4800 5800

3100 4800 7800 4350

3800

4800 4800

5350 6300

Current sense output voltage limitation

Tj = -40 ...+150°C IIS = 0, IL = 5 A:

Current sense leakage/offset current

T

= -40 ...+150°C V

j

=0, VIS = 0, IL = 0:

IN VIN=5 V, VIS = 0, IL = 0: VIN=5 V, VIS = 0, V Current sense settling time to I

positive input slope

12)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest

V

ON(CL)

13)

Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source

diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 9).

14)

This range for the current sense ratio refers to all devices. The accuracy of the k

a factor of two by matching the value of k In the case of current limitation the sense current I

High. See figure 2c, page 12.

15)

Valid if V

16)

not subject to production test, specified by design

bb(u rst)

16)

, I

= 0 5 A

L

was exceeded before.

= 0 (short circuit)

OUT

IS static

±10% after

for every single device.

ILIS

is zero and the diagnostic feedback potential VST is

IS

V

IS(lim)

I

IS(LL)

0 -- 15

I

IS(LH)

16

I

IS(SH)

)

0 -- 10

t

son(IS)

5.4

0

--

can be raised at least by

ILIS

6.1 6.9 V

-- 1

-- 300

µA

µs

Infineon technologies 6 2003-Oct-01

BTS 840 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

min typ max

Current sense settling time to 10% of IIS static after

negative input slope

17)

, I

= 5 0 A

L

Current sense rise time (60% to 90%) after change

of load current

Open load detection voltage

17)

, I

= 2.5 5 A

L

18)

(off-condition) V

Internal output pull down

pin 16,17,18,19 to 2 resp. 12,13,14,15 to 6), V

(

Input and Status Feedback

19)

OUT

=5 V

t

soff(IS)

t

slc(IS)

OUT(OL)

RO

2 3 4V

--

5

30 100

10 --

15 40 kΩ

µs

Input resistance

(see circuit page 9) Input turn-on threshold voltage V Input turn-off threshold voltage V Input threshold hysteresis ∆ V Off state input current VIN = 0.4 V: I On state input current VIN = 5 V: I Delay time for status with open load

RI 3.0 4.5 7.0 kΩ

-- -- 3.5 V

IN(T+)

1.5 -- -- V

IN(T-)

-- 0.5 -- V

IN(T)

1 -- 50 µA

IN(off)

20 50 90 µA

IN(on)

t

d(ST OL3)

-- 400 -- µs

after Input neg. slope (see diagram page 14)

17)

t

don(ST)

t

doff(ST)

--

13 --

1 --

µs

Status delay after positive input slope

Status delay after negative input slope

Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: ST low voltage T

T

Status leakage current, V

=-40...+25°C, IST = +1.6 mA:

j

= +150°C, IST = +1.6 mA:

j

= 5 V, Tj=25 ... +150°C: I

ST

V

ST(high)

V

ST(low)

ST(high)

5.4

--

6.1

--

6.9

0.4

0.7

-- -- 2 µA

V

17)

not subject to production test, specified by design

18)

External pull up resistor required for open load detection in off state.

19)

If ground resistors R

are used, add the voltage drop across these resistors.

GND

Infineon technologies 7 2003-Oct-01

BTS 840 S2 Truth Table

Normal operation Currentlimitation Short circuit to GND

Overtemperature Short circuit to V

bb

Open load L

Undervoltage L H L

Overvoltage L H L

Negative output

Input 1 Output 1 Status 1

Input 2 Output 2 Status 2

level level I

level

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

20

)

L

L H H

23

)

L

H

L

H (L

H

L H H H H

H H

21)

L

24)

)

H

L

L H

L

L L H 0

voltage clamp

L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 13) Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. The current sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.

<nominal

Current Sense 1

Current Sense 2

IS 0

nominal

0 0 0 0

0 0 0

0 0

0 0 0 0

22)

Terms

I

V

bb

I

IN1

I

V

ST1

IN1

V

ST1

I

IS1

Leadframe

3

IN1

ST1

4

IS1

5

R

GND1

V

bb

PROFET

Chip 1

GND1

2

OUT1

I

GND1

17,18

V

ON1

I

L1

V

OUT1

ST2

I

IS2

Leadframe

7

IN2

ST2

8

IS2

9

R

GND2

V

bb

PROFET

Chip 2

GND2

6

I

GND2

OUT2

I

IN2

I

V

ST2

IN2

V

13,14

V

I

L2

V

ON2

OUT2

Leadframe (V External R

) is connected to pin 1,10,11,20

bb

optional; two resistors R

GND

GND1

, R

= 150 Ω or a single resistor R

GND2

= 75 Ω for reverse

GND

battery protection up to the max. operating voltage.

20)

The voltage drop over the power transistor is V

bb-VOUT

> 3V typ. Under this condition the sense current IIS is

zero

21)

An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R is used, an offset voltage at the GND and ST pins will occur and the V

22)

Low ohmic short to

23)

Power Transistor off, high impedance

24)

with external resistor between V

V

may reduce the output current IL and therefore also the sense current IIS.

bb

and OUT

BB

signal may be errorious.

ST low

GND

Infineon technologies 8 2003-Oct-01

BTS 840 S2

Input circuit (ESD protection), IN1 or IN2

R

IN

I

ESD-ZD

I

GND

I

The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Status output, ST1 or ST2

R

ST(ON)

GND

ESD-Zener diode: 6.1 V typ., max 5.0 mA; R at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Current sense output, IS1 or IS2

I

IS

ESD-ZD

GND

ESD-Zener diode: 6.1 V typ., max 14 mA;

= 1 kΩ nominal

R

IS

ESD-

ZD

IS

+5V

ST

ST(ON)

R

IS

< 375 Ω

V

IS

Inductive and overvoltage output clamp,

OUT1 or OUT2

+V

bb

V

Z

V

ON

OUT

VON clamped to V

ON(CL)

= 47 V typ.

Power GND

Overvoltage and reverse batt. Protection

For each channel

R

+ 5V

ST

V

IS

V

R

I

IN

ST

IS

V

Z1

Logic

Signal GND

R

GND

Z2

PRO FET

GND

OUT

R

Load GND

+ V

Load

bb

= 6.1 V typ., VZ2 = 47 V typ., R

V

Z1

R

=15kΩ, RI=4.5kΩ typ., RIS=1kΩ, RV=15kΩ,

ST

GND

= 150 Ω,

In case of reverse battery the current has to be limited by the load. Temperature protection is not active

Open-load detection

OFF-state diagnostic condition:

V

> 3 V typ.; IN low

OUT

OUT1 or OUT2

V

bb

R

EXT

OFF

V

Out

ST

Logic

R

O

Signal GND

OUT

Infineon technologies 9 2003-Oct-01

BTS 840 S2

GND disconnect, each channel

V

IN

ST

VbbV

IN

V

ST

Any kind of load. In case of IN = high is V Due to V

> 0, no V

GND

ST

bb

V

GND

OUT

≈ V

PROFET

GND

= low signal available.

GND disconnect with GND pull up

each channel

V

IN

ST

bb

PROFET

GND

OUT

IN

- V

IN(T+)

Inductive load switch-off energy dissipation, each channel

E

bb

E

AS

V

E

L

bb

PROFET

GND

1

/

=

·L·I

2

OUT(CL)

OUT

2 L

ON(CL)·iL

|) ln (1+

Z

Ω:

|V

L

IN

=

ST

.

Energy stored in load inductance:

While demagnetizing load inductance, the energy dissipated in PROFET is

= Ebb + EL - ER= V

E

AS

with an approximate solution for RL > 0

· L

I

AS

=

L

(V

+ |V

bb

·R

2

L

E

L

{

R

L

(t) dt,

·R

I

L

OUT(CL)

E

)

|

E

Load

L

R

V

bb

V

IN

Any kind of load. If V Due to V

> 0, no VST = low signal available.

GND

ST

GND

> V

IN

V

- V

GND

device stays off

IN(T+)

Vbb disconnect with energized inductive load, each channel

high

V

bb

IN

ST

For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb.

Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection.

V

bb

PROFET

GND

OUT

Maximum allowable load inductance for a single switch off (one channel)

L = f (I

L

); T

j,start

ZL [mH]

100

10

1

0.1

4 6 8101214 1618 202224

I

150°C, V

=

bb

4)

= 12 V, RL = 0 Ω

[A]

L

Infineon technologies 10 2003-Oct-01

BTS 840 S2

Timing diagrams

Both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2

Figure 1a: Switching a resistive load, change of load current in on-condition:

Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition:

IN

ST

V

OUT

I

L

I

IS

The sense signal is not val i d during settling time after turn or change of load current.

t

don(ST)

t

on

tt

Load 1

t

son(IS)

Load 2

t

doff(ST)

t

soff(IS)

t

off

slc(IS)slc(IS)

Figure 1b: V

turn on:

bb

IN1

IN

V

OUT

90%

t

on

dV/dton

10%

I

L

t

Figure 2b: Switching a lamp:

IN

dV/dtoff

t

off

t

IN2

ST

V

bb

V

OUT1

V

OUT2

ST1 open drain

ST2 open drain

proper turn on under all conditions

t

V

OUT

I

L

The initial peak current should be l i m i ted by the lamp and not by the current limit of the device.

t

Infineon technologies 11 2003-Oct-01

BTS 840 S2

Figure 2c: Switching a lamp with current limit:

Figure 3a: Turn on into short circuit:

shut down by overtemperature, restart by cooling

IN

ST

V

OUT

I

L

I

IS

Figure 2d: Switching an inductive load

IN1

I

L1

ST 1

t

Heating up of the chip may require several millisec onds , depending on external conditions

other channel: normal operation

I

L(lim)

t

off(SC)

IS 1 = 0

I

L(SCr)

t

IN

ST

V

OUT

I

L

I

L(OL)

*) if the time constant of load is too large, open-load-status may occur

Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2)

IN1/2

I + I

L1 L2

2xI

L(lim)

t

off(SC)

t

S 1= IS 2 = 0

T 1/2

I

L(SCr)

t

ST1 and ST2 have to be configured as a ' Wi red OR' function ST1/2 with a single pull-up res i stor.

Infineon technologies 12 2003-Oct-01

BTS 840 S2

Figure 4a: Overtemperature:

Reset if T

<Tjt

j

IN

Figure 6a: Undervoltage:

IN

ST

I

L

I

IS

T

J

Figure 5a: Open load: detection (with R turn on/off to open load

EXT

),

ST

V

I

L

IS

bb

V

bb(under)

not defined

V

bb(u cp)

V

bb(u rst)

t

Figure 6b: Undervoltage restart of charge pump

V

on

ON(CL)

IN

t

d(ST OL3)

ST

offstate

V

OUT

V

I

L

open load

I

IS

t

V

bb(under)

charge pump starts at V

bb(u rst)

V

on-state

bb(u cp)

=4.7 V typ.

bb(ucp)

V

bb(over)

V

bb(o rst)

offstate

V

bb

Infineon technologies 13 2003-Oct-01

BTS 840 S2

Figure 7a: Overvoltage:

IN

ST

Figure 8b: Current sense ratio:

15000

k

ILIS

V

bb

I

L

I

IS

V

ON(CL)

V

bb(over)

V

Figure 8a: Current sense versus load current

1.3

[mA] I

1.2

IS

1.1

1

bb(o rst)

25

::

10000

5000

t

0

012345678910111213

Figure 9a: Output voltage drop versus load current:

V

[V]

ON

[A]

I

L

0.9

0.8

0.2 R

ON

0.7

0.6

0.5

0.4

0.3

0.1

0.2

0.1

0

0123456

25

This range for the current sense ratio refers to all

devices. The accuracy of the k

can be raised at

ILIS

least by a factor of two by matching the value of

k

for every single device.

ILIS

[A]

I

L

V

ON(NL)

I

L

0.0

012345678

[A]

Infineon technologies 14 2003-Oct-01

BTS 840 S2

Package and Ordering Code

Standard: P-DSO-20-12 (Power SO 20)

Sales Code BTS 840

Ordering Code Q67060-S7013

All dimensions in millimetres

Attention please!

The information herein is given t o describe certain components and shall not be considered as a guarantee of characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement , regarding circuits, descriptions and charts stated herein.

Infineon Technologies is an approv ed CECC manufacturer.

Information

For further information on technology, delivery terms and conditi ons and prices please contact your nearest Infineon Technologies Offi ce in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For inform at i on on the types in question please cont act your nearest Infineon Technologies Office.

Infineon Technologies Components m ay only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the fai l ure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maint ai n and sustain and/or protect human life. If t hey fail, it is reasonable to as sume that the health of the user or other persons may be endangered.

Infineon technologies 15 2003-Oct-01

lnfineon BTS 840 S2 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual