Datasheet BTS 740 S2 Datasheet (lnfineon)

现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!

PROFET

®

BTS 740 S2

Smart High-Side Power Switch

Two Channels: 2 x 30mΩ

Current Sense

Product Summary Package

Operating Voltage V

Active channels one two parallel On-state Resistance R Nominal load current I Current limitation I

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input,

diagnostic feedback and proportional load current sense monolithically integrated in Smart SIPMOS technology.

• Providing embedded protective functions

5.0...34V

bb(on)

30mΩ 15mΩ

ON

5.5A 8.5A

L(NOM)

24A 24A

L(SCr)

P-DSO-20-9



Applications

• µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads

• All types of resistive, inductive and capacitve loads

• Most suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• CMOS compatible input

• Undervoltage and overvoltage shutdown with auto-restart and hysteresis

• Fast demagnetization of inductive loads

• Logic ground independent from load ground

Protection Functions

• Short circuit protection

• Overload protection

• Current limitation

Vbb

• Thermal shutdown

• Overvoltage protection (including load dump) with external

resistor

• Reverse battery protection with external resistor

• Loss of ground and loss of V

protection

bb

IN1 ST1 IS1

Logic

Channel

1

OUT 1

• Electrostatic discharge protection (ESD)

Diagnostic Functions

• Proportinal load current sense

• Diagnostic feedback with open drain output

• Open load detection in OFF-state with external resistor

IN2 ST2 IS2

Logic

Channel

2

PROFET

GND

OUT 2

Load 2

• Feedback of thermal shutdown in ON-state

Load 1

Semiconductor Group 1 of 15 2003-Oct-01

PROFET

p

g

Functional diagram

overvoltage

rotection

internal

e supply

volta

IN1

ST1

ESD

IS1

GND1

IN2

ST2

IS2

GND2

Pin Definitions and Functions

Pin Symbol Function

1,10, 11,12, 15,16, 19,20 3 IN1 Input 1,2, activates channel 1,2 in case of 7 IN2 logic high signal 17,18 OUT1 Output 1,2, protected high-side power output 13,14 OUT2 of channel 1,2. Both pins of each output have

4 ST1 Diagnostic feedback 1,2 of channel 1,2, 8 ST2 open drain, invers to input level 2 GND1 Ground 1 of chip 1 (channel 1) 6 GND2 Ground 2 of chip 2 (channel 2) 5 IS1 9 IS2

V

Positive power supply voltage. Design the

bb

wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance

to be connected in parallel for operation according ths spec (e.g. k for the max. short circuit current

Sense current output 1,2; proportional to the

load current, zero in the case of current limitation of the load current

logic

gate

control

+

charge

pump

temperature

sensor

Open load

detection

Current

sense

Control and protection circuit

of

channel 2

). Design the wiring

ilis

current limit

clamp for

inductive load

GND1

Channel 1

PROFET

Pin configuration

(top view)

V

1 • 20 V

bb

GND1 2 19 Vbb

IN1 3 18 OUT1

ST1 4 17 OUT1

IS1 5 16 Vbb

GND2 6 15 Vbb

IN2 7 14 OUT2

ST2 8 13 OUT2

IS2 9 12 Vbb Vbb 10 11 Vbb

®

BTS 740 S2

VBB

OUT1

R

LOAD

OUT2

bb

Semiconductor Group 2 2003-Oct-01

PROFET

Maximum Ratings at T

= 25°C unless otherwise specified

j

®

BTS 740 S2

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 5) Vbb 43 V Supply voltage for full short circuit protection

T

= -40 ...+150°C

j,start

Vbb 34 V

Load current (Short-circuit current, see page 5) IL self-limited A

3

Load dump protection1) V

2)

R

= 2 Ω, td = 200 ms; IN = low or high,

I

LoadDump

= VA + Vs, VA = 13.5 V

V

Load dump

)

60 V

each channel loaded with RL = 7.0 Ω, Operating temperature range

Storage temperature range Power dissipation (DC)4) Ta = 25°C:

(all channels active) Ta = 85°C: Maximal switchable inductance, single pulse

V

= 12V, T

bb

j,start

= 150°C4),

IL = 5.5 A, EAS = 370 mJ, 0 Ω one channel: IL = 8.5 A, E

= 790 mJ, 0 Ω two parallel channels:

AS

T

j

T

stg

P

3.8

tot

-40 ...+150

-55 ...+150

ZL

°C

W

2.0

1816mH

see diagrams on page 10 Electrostatic discharge capability (ESD) IN:

(Human Body Model) ST, IS: out to all other pins shorted:

V

1.0

ESD

kV

4.0

8.0

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC) VIN -10 ... +16 V Current through input pin (DC)

Current through status pin (DC) Current through current sense pin (DC)

see internal circuit diagram page 9

I

IN

IST I

IS

±2.0 ±5.0

±14

mA

Thermal Characteristics

Parameter and Conditions Symbol Values Unit

Thermal resistance junction - soldering point

4),5)

each channel: R

junction - ambient4) one channel active: all channels active:

1)

Supply voltages higher than V

resistor for the GND connection is recommended.

2)

RI = internal resistance of the load dump test pulse generator

3)

V

Load dump

4)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air. See page 15

5)

Soldering point: upper side of solder edge of device pin 15. See page 15

is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839

require an external current limit for the GND and status pins (a 150Ω

bb(AZ)

Semiconductor Group 3 2003-Oct-01

min typ Max

thjs

R

thja

2

(one layer, 70µm thick) copper area for Vbb

-- -- 12

--

40 33

--

K/W

PROFET

®

BTS 740 S2

Electrical Characteristics

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

min typ max

On-state resistance (Vbb to OUT); I

= 5 A

L

each channel, Tj = 25°C:

T

= 150°C:

j

two parallel channels, Tj = 25°C: Output voltage drop limitation at small load

currents, see page 14 I

= 0.5 A Tj =-40...+150°C:

L

Nominal load current one channel active:

two parallel channels active:

6)

Device on PCB Output current while GND disconnected or pulled up

V

= 30 V, V

bb

Turn-on time8) IN

Turn-off time IN

, Ta = 85°C, Tj ≤ 150°C

= 0, see diagram page 10

IN

to 90% V

to 10% V

7)

OUT

RL = 12 Ω Slew rate on 8) 10 to 30% V

OUT

, R

= 12 Ω:

L

Slew rate off 8) 70 to 40% V

, RL = 12 Ω:

OUT

:

;

RON

V I

I

ton t

ON(NL)

4.9

L(NOM)

L(GNDhigh)

off

-- -- 8 mA

--

7.8

25 25

27 54

14

50 -- mV

5.5

8.5

70 80

30 60

15

-- A

150

200

dV/dton 0.1 -- 1 V/µs

-dV/dt

0.1 -- 1 V/µs

off

mΩ

µs

Operating Parameters Operating voltage9) V

Undervoltage shutdown V Undervoltage restart Tj =-40...+25°C:

V

Tj =+150°C: Undervoltage restart of charge pump

see diagram page 13 Tj =-40...+25°C:

T

=150°C:

j

Undervoltage hysteresis

∆V

bb(under)

= V

bb(u rst)

- V

bb(under)

V ∆V

Overvoltage shutdown V Overvoltage restart V

6)

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm

connection. PCB is vertical without blown air. See page 15

7)

not subject to production test, specified by design

8)

See timing diagram on page 11.

9)

At supply voltage increase up to Vbb= 4.7 V typ without charge pump, V

2

(one layer, 70µm thick) copper area for Vbb

5.0 -- 34 V

bb(on) bb(under) bb(u rst)

bb(ucp)

bb(over) bb(o rst)

3.2 -- 5.0 V

-- 4.5 5.5

bb(under)

--

-- 0.5 -- V

4.7

--

34 -- 43 V 33 -- -- V

≈Vbb - 2 V

OUT

6.0

6.5

7.0

V

Semiconductor Group 4 2003-Oct-01

PROFET

®

BTS 740 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Overvoltage hysteresis ∆V Overvoltage protection

I

=40 mA T

bb

Standby current V

= 0; T

IN

11

Leakage output current (included in I

VIN = 0

Operating current I

= I

GND

two channels on:

GND1

+ I

GND2

10)

Tj =-40:

=+25...+150°C:

)

Tj =-40°C...25°C:

12)

, V

= 5V,

IN

j

bb(off)

=150°C:

j

)

, one channel on:

V I

bb(off)

I

L(off)

I

GND

min typ max

-- 1 -- V

bb(over)

41

bb(AZ)

43

--

47

8

24

-- -- 20 µA

--

1.2

2.4

--

52 30

50

36mA

V

µA

Protection Functions

13)

Current limit, (see timing diagrams, page 12)

=-40°C:

Tj

=25°C:

Tj

=+150°C:

Tj

I

48

L(lim)

40 31

56 50 37

65 58 45

Repetitive short circuit current limit, Tj = Tjt each channel two parallel channels

(see timing diagrams, page 12)

Initial short circuit shutdown time T

j,start

=25°C:

I

--

L(SCr)

t

-- 2.0 -- ms

off(SC)

--

24 24

--

(see timing diagrams on page 12)

Output clamp (inductive load switch off)

at V

ON(CL)

= Vbb - V

, IL= 40 mA

OUT

T

14)

=-40°C:

Tj

=25°C...150°C:

j

V

ON(CL)

41 43

--

47

--

52 Thermal overload trip temperature Tjt 150 -- -- °C Thermal hysteresis

∆

Tjt -- 10 -- K

A

V

10)

Supply voltages higher than V resistor in the GND connection is recommended). See also V circuit diagram page 9.

11)

Measured with load; for the whole device; all channels off

12)

Add I

13

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.

14)

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest

V

ST

ON(CL)

, if IST > 0

require an external current limit for the GND and status pins (a 150 Ω

bb(AZ)

in table of protection functions and

ON(CL)

Semiconductor Group 5 2003-Oct-01

PROFET

®

BTS 740 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

min typ max

Reverse Battery

Reverse battery voltage Drain-source diode voltage (V

= - 4.0 A, Tj = +150°C

IL

15)

-Vbb -- -- 32 V

out

> V

bb

)

-VON -- 600 -- mV

Diagnostic Characteristics

bb(on)

16)

, static on-condition,

17)

= 6.5

...27V,

Tj= -40°C, IL= 0.5 A:

k

ILIS

4350

4800 5800

3100 4800 7800 4350

3800

4800 4800

5350 6300

Current sense ratio

VIS = 0...5 V, V k

= IL / I

ILIS

Tj= 25...+150°C, IL= 5 A:

Tj = -40°C, IL = 5 A:

IS

Tj= 25...+150°C, IL = 0.5 A:

Current sense output voltage limitation

Tj = -40 ...+150°C IIS = 0, IL = 5 A:

Current sense leakage/offset current

T

= -40 ...+150°C V

j

=0, VIS = 0, IL = 0:

IN VIN=5 V, VIS = 0, IL = 0: VIN=5 V, VIS = 0, V Current sense settling time to I

positive input slope

18)

, I

= 0 5 A

L

= 0 (short circuit)

OUT

IS static

±10% after

Current sense settling time to 10% of IIS static after

18)

, I

negative input slope

= 5 0 A

L

Current sense rise time (60% to 90%) after change

18)

I

of load current

Open load detection voltage

= 2.5 5 A

L

19)

(off-condition) V

Internal output pull down

(pin 17,18 to 2 resp. 13,14 to 6), V

15)

Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source

diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 9).

16)

This range for the current sense ratio refers to all devices. The accuracy of the k

a factor of two by matching the value of k In the case of current limitation the sense current I

High. See figure 2c, page 12.

17)

Valid if V

18)

not subject to production test, specified by design

19)

External pull up resistor required for open load detection in off state.

bb(u rst)

was exceeded before.

OUT

=5 V

for every single device.

ILIS

is zero and the diagnostic feedback potential VST is

IS

V

IS(lim)

I

IS(LL)

I

0 -- 15

IS(LH)

18

I

IS(SH)

)

0 -- 10

t

son(IS)

t

soff(IS)

t

slc(IS)

OUT(OL)

2 3 4V

RO

5.4

0

--

5

can be raised at least by

ILIS

6.1 6.9 V

-- 1

-- 300

30 100

10 --

15 40 kΩ

µA

µs

Semiconductor Group 6 2003-Oct-01

PROFET

®

BTS 740 S2

Parameter and Conditions, each of the two channels Symbol Values Unit

at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified

Input and Status Feedback

20)

min typ max

Input resistance

(see circuit page 9) Input turn-on threshold voltage V Input turn-off threshold voltage V Input threshold hysteresis ∆ V Off state input current VIN = 0.4 V: I On state input current VIN = 5 V: I Delay time for status with open load

RI 3.0 4.5 7.0 kΩ

-- -- 3.5 V

IN(T+)

1.5 -- -- V

IN(T-)

-- 0.5 -- V

IN(T)

1 -- 50 µA

IN(off)

20 50 90 µA

IN(on)

t

d(ST OL3)

-- 400 -- µs

after Input neg. slope (see diagram page 13) Status delay after positive input slope

(not subject to production test, specified by design)

Status delay after negative input slope

(not subject to production test, specified by design)

t

don(ST)

t

doff(ST)

--

13 --

1 --

µs

Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: ST low voltage Tj =-40...+25°C, IST = +1.6 mA:

T

Status leakage current, V

= +150°C, IST = +1.6 mA:

j

= 5 V, Tj=25 ... +150°C: I

ST

V

ST(high)

V

ST(low)

ST(high)

5.4

--

6.1

--

6.9

0.4

0.7

-- -- 2 µA

V

20)

If ground resistors R

are used, add the voltage drop across these resistors.

GND

Semiconductor Group 7 2003-Oct-01

PROFET

®

BTS 740 S2

Truth Table

Normal operation Currentlimitation Short circuit to GND

Overtemperature Short circuit to V

bb

Open load L

Undervoltage L H L

Overvoltage L H L

Negative output

Input 1 Output 1 Status 1

Input 2 Output 2 Status 2

level level I

level

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

21

)

L

L H H

24

)

L

H

L

H (L

H

L H H H H

H H

22)

L

25)

)

H

L

L H

L

L L H 0

voltage clamp

L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 13) Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. The current sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.

<nominal

Current Sense 1

Current Sense 2

IS 0

nominal

0 0 0 0

0 0 0

0 0

0 0 0 0

23)

Terms

I

V

bb

I

IN1

V

ST1

IN1

V

I

ST1

I

IS1

3

IN1

ST1

4

IS1

5

Leadframe

PROFET

R

GND1

V

bb

Chip 1

GND1

2

I

GND1

OUT1

17,18

V

I

L1

V

OUT1

ON1

I

ST2

I

IS2

Leadframe

7

IN2

ST2

8

IS2

9

R

GND2

V

bb

PROFET

Chip 2

GND2

6

OUT2

I

GND2

I

IN2

V

ST2

IN2

V

13,14

V

I

L2

V

OUT2

ON2

Leadframe (V External R

) is connected to pin 1,10,11,12,15,16,19,20

bb

optional; two resistors R

GND

GND1

, R

GND2

= 150 Ω or a single resistor R

= 75 Ω for reverse

GND

battery protection up to the max. operating voltage.

21)

The voltage drop over the power transistor is V

bb-VOUT

> 3V typ. Under this condition the sense current IIS is

zero

22)

An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R is used, an offset voltage at the GND and ST pins will occur and the V

23)

Low ohmic short to

24)

Power Transistor off, high impedance

25)

with external resistor between V

V

may reduce the output current IL and therefore also the sense current IIS.

bb

and OUT

BB

signal may be errorious.

ST low

GND

Semiconductor Group 8 2003-Oct-01

PROFET

®

BTS 740 S2

Input circuit (ESD protection), IN1 or IN2

R

IN

I

ESD-ZD

I

GND

I

The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Status output, ST1 or ST2

R

ST(ON)

GND

ESD-Zener diode: 6.1 V typ., max 5.0 mA; R at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Current sense output

I

IS

ESD-ZD

GND

ESD-Zener diode: 6.1 V typ., max 14 mA;

= 1 kΩ nominal

R

IS

ESD-

ZD

IS

+5V

ST

ST(ON)

R

IS

< 375 Ω

V

IS

Inductive and overvoltage output clamp,

OUT1 or OUT2

+V

bb

V

Z

V

ON

OUT

VON clamped to V

ON(CL)

= 47 V typ.

Power GND

Overvoltage and reverse batt. protection

+ 5V

R

ST

R

I

IN

ST

IS

R

V

R

IS

= 6.1 V typ., VZ2 = 47 V typ., R

V

Z1

R

=15kΩ, RI=4.5kΩ typ., RIS=1kΩ, RV=15kΩ,

ST

V

Z1

Logic

R

Signal GND

GND

V

Z2

PRO FET

GND

In case of reverse battery the current has to be limited by the load. Temperature protection is not active

+ V

OUT

R

Load

Load GND

= 150 Ω,

bb

Open-load detection OUT1 or OUT2

OFF-state diagnostic condition:

V

> 3 V typ.; IN low

OUT

V

bb

R

EXT

OFF

V

Out

ST

Logic

R

O

Signal GND

OUT

Semiconductor Group 9 2003-Oct-01

PROFET

®

BTS 740 S2

GND disconnect

V

IN

ST

VbbV

IN

V

ST

Any kind of load. In case of IN = high is V Due to V

GND disconnect with GND pull up

Any kind of load. If V Due to V

V

> 0, no V

GND

bb

> 0, no VST = low signal available.

GND

ST

IN

ST

V

ST

IN

GND

bb

V

GND

OUT

≈ V

PROFET

GND

= low signal available.

V

bb

V

- V

OUT

GND

device stays off

IN(T+)

PROFET

GND

> V

IN

- V

IN(T+)

Vbb disconnect with energized inductive load

Inductive load switch-off energy dissipation

E

bb

E

AS

V

IN

=

ST

.

Energy stored in load inductance:

While demagnetizing load inductance, the energy dissipated in PROFET is

E

= Ebb + EL - ER= V

AS

with an approximate solution for RL > 0

· L

I

AS

=

L

(V

+ |V

bb

·R

2

L

E

Maximum allowable load inductance for a single switch off

L = f (I

L

); T

j,start

150°C, V

=

ZL [mH]

1000

bb

PROFET

GND

1

/

=

L

OUT(CL)

·L·I

2

|) ln (1+

E

(one channel)4)

bb

OUT

Z

L

{

2 L

ON(CL)·iL

(t) dt,

Ω:

|V

= 12 V, RL = 0 Ω

L

R

L

·R

I

L

OUT(CL)

E

)

|

E

Load

L

R

high

IN

V

bb

100

PROFET

ST

GND

V

bb

OUT

10

For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page

10) each switch is

protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb dis-

connection with energized inductive load all the load current flows through the GND connection.

1

23456789101112

I

L

[A]

Semiconductor Group 10 2003-Oct-01

PROFET

®

BTS 740 S2

Timing diagrams

Both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2

Figure 1a: Switching a resistive load, change of load current in on-condition:

Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition:

IN

ST

V

I

L

I

IS

The sense signal is not val i d during settling time after turn or change of load current.

OUT

t

don(ST)

t

on

tt

Load 1

t

son(IS)

Load 2

t

doff(ST)

soff(IS)

t

off

slc(IS)slc(IS)

Figure 1b: V

turn on:

bb

IN1

IN

V

OUT

90%

t

dV/dton

10%

I

L

t

Figure 2b: Switching a lamp:

IN

on

dV/dtoff

t

off

t

IN2

V

bb

ST

V

OUT1

V

OUT

V

OUT2

I

ST1 open drain

ST2 open drain

L

t

proper turn on under all conditions

Semiconductor Group 11 2003-Oct-01

PROFET

®

BTS 740 S2

Figure 2c: Switching a lamp with current limit:

IN

ST

V

OUT

I

L

I

IS

Figure 2d: Switching an inductive load

IN

ST

Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling

IN1

I

L1

ST 1

t

other channel: normal operation

I

L(lim)

t

off(SC)

IS 1 = 0

I

L(SCr)

t

Heating up of the chip may require several millisec onds , depending on external conditions

Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2)

IN1/2

V

OUT

I

L

I

L(OL)

*) if the time constant of load is too large, open-load-status may occur

I + I

L1 L2

2xI

L(lim)

I

L(SCr)

t

off(SC)

S 1= IS 2 = 0

T 1/2

t

ST1 and ST2 have to be configured as a ' Wi red OR' function ST1/2 with a single pull-up res i stor.

Semiconductor Group 12 2003-Oct-01

PROFET

®

BTS 740 S2

Figure 4a: Overtemperature:

Reset if T

<Tjt

j

IN

ST

I

L

I

IS

T

J

Figure 6a: Undervoltage:

IN

ST

V

bb

I

L

I

IS

t

V

bb(under)

not defined

V

bb(u cp)

V

bb(u rst)

t

Figure 5a: Open load: detection (with R turn on/off to open load

IN

ST

V

OUT

I

L

open load

I

IS

),

EXT

t

d(ST OL3)

Figure 6b: Undervoltage restart of charge pump

V

on

offstate

V

bb(u rst)

on-state

V

bb(o rst)

ON(CL)

offstate

bb(over)

V

bb(u cp)

V

bb(under)

V

t

bb

charge pump starts at V

bb(ucp)

=4.7 V typ.

Semiconductor Group 13 2003-Oct-01

PROFET

®

BTS 740 S2

Figure 7a: Overvoltage:

IN

ST

V

bb

I

L

I

IS

V

ON(CL)

V

bb(over)

V

bb(o rst)

Figure 8b: Current sense ratio:

15000

k

ILIS

10000

5000

0

t

012345678910111213

[A]

I

L

26

Figure 8a: Current sense versus load current

::

1.3

[mA] I

1.2

1.1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

IS

1

0

0123456

[A]

26

This range for the current sense ratio refers to all

devices. The accuracy of the k

can be raised at

ILIS

least by a factor of two by matching the value of

k

for every single device.

ILIS

Figure 9a: Output voltage drop versus load current:

V

[V]

ON

0.2 R

ON

0.1

V

ON(NL)

I

L

I

L

0.0

012345678

[A]

Semiconductor Group 14 2003-Oct-01

PROFET

Package and Ordering Code

®

BTS 740 S2

Standard: P-DSO-20-9

Sales Code BTS 740 L2

Ordering Code Q67060-S7012-A2

All dimensions in millimetres

Definition of soldering point with temperature T upper side of solder edge of device pin 15.

Pin 15

Printed circuit board (FR4, 1.5mm thick, one layer 70µm, 6cm max. power dissipation P I

L(NOM)

2

active heatsink area) as a reference for

, nominal load current

and thermal resistance R

tot

thja

:

s

Attention please!

The information herein is given t o describe certain components and shall not be considered as a guarantee of characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement , regarding circuits, descriptions and charts stated herein.

Infineon Technologies is an approv ed CECC manufacturer.

Information

For further information on technology, delivery terms and conditi ons and prices please contact your nearest Infineon Technologies Offi ce in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For inform at i on on the types in question please cont act your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used i n life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the fai lure of t hat l ife-s upport dev ic e or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human lif e. If they fail, it is reasonable to ass ume that the health of the user or other persons may be endangered.

Semiconductor Group 15 2003-Oct-01

Datasheet BTS 740 S2 Datasheet (lnfineon)

Specifications and Main Features

Frequently Asked Questions

User Manual