wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
Input 1,2,3,4 activates channel 1,2,3,4 in case
of logic high signal
Output 1,2,3,4 protected high-side power output
of channel 1,2,3,4. Design the wiring for the
max. short circuit current
Pin configuration
(top view)
V
1 • 20 V
bb
GND1/2 2 19 Vbb
IN1 3 18 OUT1
ST1/2 4 17 OUT2
IN2 5 16 Vbb
GND3/4 6 15 Vbb
IN3 7 14 OUT3
ST3/4 8 13 OUT4
IN4 9 12 Vbb
Vbb 10 11 Vbb
bb
Infineon Technologies AG 3 of 14 2003-Oct-01
BTS 724G
Maximum Ratings at T
= 25°C unless otherwise specified
j
Parameter Symbol Values Unit
Supply voltage (overvoltage protection see page 6) Vbb 43V
Supply voltage for full short circuit protection
T
=-40 ...+150°C
j,start
Vbb 36V
Load current (Short-circuit current, see page 6) IL self-limitedA
3
Load dump protection1)V
2)
R
= 2Ω, td = 400ms; IN= low or high,
I
LoadDump
= VA + Vs, VA = 13.5 V
V
Loaddump
)
60V
each channel loaded with RL =13.5 Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)4) Ta = 25°C:
(all channels active)
T
= 85°C:
a
Maximal switchable inductance, single pulse
V
=12V, T
bb
=150°C4), see diagrams on page 10
j,start
IL =3.3A, EAS =120 mJ, 0Ω one channel:
IL =4.7A, E
IL =7.3A, E
=140 mJ, 0Ω two parallel channels:
AS
=160 mJ, 0Ω four parallel channels:
AS
Electrostatic discharge capability (ESD) IN:
Tj
T
stg
P
3.6
tot
ZL
V
1.0
ESD
(Human Body Model) ST:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
Input voltage (DC) see internal circuit diagram page 9VIN -10 ... +16V
Current through input pin (DC)
Pulsed current through input pin
Current through status pin (DC)
5)
I
I
I
IN
INp
ST
-40 ...+150
°C
-55 ...+150
W
1.9
16,5
mH
19
18
kV
4.0
8.0
±0.3
mA
±5.0
±5.0
1)
Supply voltages higher than V
resistor for the GND connection is recommended.
2)
RI = internal resistance of the load dump test pulse generator
3)
V
Load dump
4)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
connection. PCB is vertical without blown air. See page 14
5)
only for testing
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
require an external current limit for the GND and status pins (a 150Ω
bb(AZ)
2
(one layer, 70µm thick) copper area for Vbb
Infineon Technologies AG 4 of 14 2003-Oct-01
BTS 724G
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
Thermal resistance
junction - soldering point
6)7)
each channel: R
junction – ambient6)
@ 6 cm2 cooling area one channel active:
all channels active:
min typ max
R
thjs
thja
-- -- 15
--
--
42
34
--
--
K/W
Electrical Characteristics
Parameter and Conditions, each of the four channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified
Load Switching Capabilities and Characteristics
min typ max
On-state resistance (Vbb to OUT); I
= 2 A
L
each channel, Tj = 25°C:
T
= 150°C:
j
two parallel channels, Tj = 25°C:
four parallel channels, Tj = 25°C:
see diagram, page 11
Nominal load currentone channel active:
two parallel channels active:four parallel channels active:
Device on PCB
Output current while GND disconnected or pulledup
V
= 32 V, V
bb
see diagram page 9
Turn-on time9)IN to 90% V
Turn-off time IN to 10% V
6)
, Ta = 85°C, Tj ≤ 150°C
= 0,
IN
8)
OUT
OUT
RL =12Ω
Slew rate on9)10 to 30% V
Slew rate off9)70 to 40% V
, R
OUT
OUT
=12Ω: dV/dton 0.2 -- 1.0V/µs
L
, RL=12Ω: -dV/dt
:
:
;
RON
I
I
ton
t
3.0
L(NOM)
L(GNDhigh)
off
-- -- 2mA
0.2 -- 1.1V/µs
off
--
--
--
--
4.3
6.5
--
--
70
140
35
17.5
3.3
4.7
7.3
100
100
90
mΩ
180
45
22.5
--
A
--
--
250
µs
270
6)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
connection. PCB is vertical without blown air. See page 14
7)
Soldering point: upper side of solder edge of device pin 15. See page 14
8)
not subject to production test, specified by design
9)
See timing diagram on page 12.
2
(one layer, 70µm thick) copper area for Vbb
Infineon Technologies AG 5 of 14 2003-Oct-01
BTS 724G
Parameter and Conditions, each of the four channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified
Operating Parameters
min typ max
Operating voltage V
Undervoltage switch off
10)
Tj =-40°C...25°C: V
Tj =125°C: -- -- 4.5
Overvoltage protection
I
=40 mA
bb
Standby current
V
=0; see diagram page 11 T
IN
13)
12)
Tj =-40°C...25°C:
=150°C:
j
V
I
Tj =125°C: -- -- 20
Off-State output current (included in I
V
=0; each channel
IN
Operating current
I
= I
GND
all channels on:
GND1
Protection Functions
Current limit, V
14)
, V
=5V,
IN
+ I
, one channel on:
GND2
15)
= 0V, (see timing diagrams, page 12)
out
)
bb(off)
=-40°C:
Tj
=25°C:
Tj
=+150°C:
Tj
I
I
I
5.5 -- 40V
bb(on)
-- -- 4.5V
bb(u so)
11)
41 4752V
bb(AZ)
--
bb(off)
--
-- 1 5µA
L(off)
GND
--
--
--
L(lim)
-9
9
--
0.6
2.4
--
15
--
20
30
11)
1.2
4.8
23
µA
mA
A
--
--
Repetitive short circuit current limit,
Tj = Tjt each channeltwo,three or four parallel channels
(see timing diagrams, page 12)
Initial short circuit shutdown time T
V
= 0V (see timing diagrams on page 12)
out
Output clamp (inductive load switch off)
at V
ON(CL)
= Vbb - V
, IL= 40 mA
OUT
j,start
16)
=25°C:
I
--
L(SCr)
t
V
-- 2 --ms
off(SC)
41 47 52V
ON(CL)
--
12
12
--
A
--
Thermal overload trip temperature Tjt 150 -- --°C
Thermal hysteresis
∆
Tjt -- 10 --K
10)
is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage
falling below the lower limit of Vbb(on)
11)
not subject to production test, specified by design
12)
Supply voltages higher than V
resistor for the GND connection is recommended). See also V
circuit diagram on page 9.
13)
Measured with load; for the whole device; all channels off
14)
Add I
15)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
16)
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ST
ON(CL)
, if IST > 0
require an external current limit for the GND and status pins (a 150Ω
bb(AZ)
in table of protection functions and
ON(CL)
Infineon Technologies AG 6 of 14 2003-Oct-01
BTS 724G
Parameter and Conditions, each of the four channels Symbol Values Unit
at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified
Reverse Battery
Reverse battery voltage
Drain-source diode voltage (V
=-2.0A, Tj =+150°C
IL
17)
-Vbb -- -- 32V
)
> V
out
bb
Diagnostic Characteristics
min typ max
-VON -- 600 --mV
Open load detection voltage V
Input and Status Feedback
18)
Input resistance
(see circuit page 9)
Input turn-on threshold voltage V
Input turn-off threshold voltage V
OUT(OL)1
RI 2.54.0 6.0kΩ
IN(T+)
IN(T-)
Input threshold hysteresis ∆ V
Status change after positive input slope
19)
t
d(STon)
1.7 2.8 4.0V
-- -- 2.5V
1.0 -- --V
-- 0.2 --V
IN(T)
-- 10 20µs
with open load
Status change after positive input slope
19)
t
d(STon)
30 -- --µs
with overload
Status change after negative input slope
t
d(SToff)
-- -- 500µs
with open load
Status change after negative input slope
19)
t
-- -- 20µs
d(SToff)
with overtemperature
Off state input current VIN = 0.4 V: I
On state input current VIN = 5 V: I
5-- 20µA
IN(off)
10 35 60µA
IN(on)
Status output (open drain)Zener limit voltageIST = +1.6 mA:
ST low voltageIST = +1.6 mA:
V
ST(high)
V
ST(low)
5.4
--
--
--
0.6
--
V
17)
Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and
circuit page 9).
18)
If ground resistors R
19)
not subject to production test, specified by design
are used, add the voltage drop across these resistors.
GND
Infineon Technologies AG 7 of 14 2003-Oct-01
BTS 724G
Truth Table
Channel 1 and 2 Chip 1
Channel 3 and 4
Chip 2
(equivalent to channel 1 and 2)
Normal operation
Open loadChannel 1 (3)L
Overtemperatureboth channelL
Channel 2 (4)X
Channel 1 (3)L
Channel 2 (4)X
L = "Low" Level X = don't care Z = high impedance, potential depends on external circuit
H = "High" Level Status signal valid after the time delay shown in the timing diagrams
IN1IN2OUT1OUT2ST1/2
IN3IN4OUT3OUT4ST3/4
L
L
H
H
H
X
X
H
H
X
L
H
L
H
X
X
L
H
L
H
X
X
X
L
H
L
L
H
H
Z
H
X
X
L
L
L
L
L
X
X
L
H
L
H
X
X
Z
H
L
L
L
X
X
L
L
H
H
H
H
20)
L
H
15)
L
H
H
L
L
H
L
H
L
Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
I
bb
V
bb
I
V
V
IN2
V
IN1
Leadframe (V
External R
I
IN1
3
I
ST1/2
ST1/2
GND
IN1
IN2
5
IN2
4
ST1/2
R
GND1/2
) is connected to pin 1,10,11,12,15,16,19,20
bb
optional; two resistors R
V
PROFET
Chip 1
GND1/2
2
Leadframe
bb
I
GND1/2
OUT1
OUT2
battery protection up to the max. operating voltage.
18
17
V
ON2
I
I
V
V
OUT2
GND1
V
ON1
L1
L2
OUT1
, R
I
IN3
7
I
IN4
9
I
ST3/4
V
V
IN3
IN4
=150 Ω or a single resistor R
GND2
V
ST3/4
8
IN3
IN4
ST3/4
R
GND3/4
V
PROFET
Chip 2
GND3/4
6
Leadframe
bb
I
GND3/4
V
ON4
I
14
OUT3
I
13
OUT4
V
V
OUT4
=75 Ω for reverse
GND
V
ON3
L3
L4
OUT3
20)
L, if potential at the Output exceeds the OpenLoad detection voltage
Infineon Technologies AG 8 of 14 2003-Oct-01
BTS 724G
Input circuit (ESD protection), IN1 to IN4
R
IN
I
ESD-ZD
I
GND
I
I
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
Status output, ST1/2 or ST3/4
R
ST(ON)
GND
ESD-Zener diode: 6.1V typ., max 0.3 mA; R
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
ESDZD
+5V
ST
ST(ON)
< 375 Ω
Overvolt. and reverse batt. protection
+ 5V
R
ST
R
I
IN
Logic
ST
R
ST
V
Z1
= 6.1 V typ., VZ2 = 47 V typ., R
V
Z1
R
= 15 kΩ, RI= 3.5 kΩ typ.
ST
R
Signal GND
GND
V
Z2
GND
GND
In case of reverse battery the load current has to be
limited by the load. Temperature protection is not
active
+ V
bb
OUT
R
Load
Load GND
= 150 Ω,
Open-load detection, OUT1...4
OFF-state diagnostic condition:
Open Load, if V
> 3 V typ.; IN low
OUT
V
bb
Inductive and overvoltage output clamp,
OUT1...4
VON clamped to V
V
ON(CL)
Z
= 47 V typ.
Power GND
+V
V
bb
ON
OUT
OFF
Logic
unit
GND disconnect
Open load
detection
IN
ST
VbbV
IN
V
ST
Signal GND
V
bb
PROFET
GND
V
GND
OUT
R
EXT
V
OUT
Any kind of load. In case of IN=high is V
Due to V
GND
>0, no V
= low signal available.
ST
OUT
≈ V
IN
-V
IN(T+)
Infineon Technologies AG 9 of 14 2003-Oct-01
.
BTS 724G
GND disconnect with GND pull up
V
PROFET
GND
> V
IN
bb
V
- V
OUT
GND
device stays off
IN(T+)
V
V
bb
V
IN
Any kind of load. If V
Due to V
>0, no VST = low signal available.
GND
IN
ST
ST
GND
Vbb disconnect with energized inductive
load
high
V
bb
IN
ST
For inductive load currents up to the limits defined by ZL
(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current
flows through the GND connection.
V
bb
PROFET
GND
OUT
Inductive load switch-off energy
dissipation
E
bb
E
AS
E
V
IN
=
ST
bb
PROFET
GND
OUT
L
Z
L
{
R
E
E
L
Energy stored in load inductance:
·L·I
2
2
L
1
/
=
E
L
While demagnetizing load inductance, the energy
dissipated in PROFET is
= Ebb + EL - ER= V
E
AS
ON(CL)·iL
with an approximate solution for RL > 0
·L
I
AS
=
L
(V
+|V
OUT(CL)
bb
·R
2
L
|) ln(1+
E
Ω:
|V
(t) dt,
·R
I
L
L
OUT(CL)
)
|
Maximum allowable load inductance for
a single switch off (one channel)
L = f (I
L
ZL [mH]
1000
); T
j,start
150°C, V
=
bb
4)
=12V, RL =0Ω
Load
L
R
100
10
1
1234567891011
I
L
[A]
Infineon Technologies AG 10 of 14 2003-Oct-01
BTS 724G
Typ. on-state resistance
R
= f (Vbb,T
ON
R
[mOhm]
ON
); IL =2A, IN = high
j
160
Tj = 150°C
120
80
25°C
-40°C
40
0
5 7 9 113040
V
bb
[V]
Typ. standby current
I
= f (T
bb(off)
[µA]
I
bb(off)
45
j
); V
= 9...34 V, IN1,2,3,4 = low
bb
40
35
30
25
20
15
10
5
0
-50050100150200
T
[°C]
j
Infineon Technologies AG 11 of 14 2003-Oct-01
BTS 724G
Timing diagrams
All channels are symmetric and consequently the diagrams are valid for channel 1 to
channel 4
Figure 1a: Vbb turn on:
IN1
IN2
Figure 2b: Switching a lamp:
IN
V
bb
V
OUT1
V
OUT2
ST1 open drain
ST2 open drain
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
IN
ST
V
OUT
I
L
t
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
IN1
other channel: normal operation
t
V
OUT
I
90%
t
on
dV/dton
dV/dtoff
t
off
L1
I
L(lim)
I
L(SCr)
10%
t
I
L
ST
off(SC)
t
t
Heating up of the chip may require several millisec onds, depending
on external conditions
Infineon Technologies AG 12 of 14 2003-Oct-01
BTS 724G
IN1
Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
IN1/2
I + I
L1 L2
2xI
L(lim)
I
L(SCr)
t
off(SC)
ST1/2
ST1 and ST2 have to be configured as a ' Wi red OR' function
ST1/2 with a single pull-up res i stor.
Figure 4a: Overtemperature:
Reset if T
<Tjt
j
Figure 5a: Open load: detection in OFF-state, turn
on/off to open load
Open load of channel 1; other channels normal
operation
IN1
V
OUT1
I
L1
ST
10µs
t
500µs
Figure 6a: Status change after, turn on/off to
overtemperature
Overtemperature of channel 1; other channels normal
operation
IN
ST
ST
30µs20µs
V
OUT
T
J
t
Infineon Technologies AG 13 of 14 2003-Oct-01
BTS 724G
Package and Ordering Code
Standard: P-DSO-20-15
Sales Code BTS 724G
Ordering Code Q67060-S7026
All dimensions in millimetres
Definition of soldering point with temperature T
upper side of solder edge of device pin 15.
Pin 15
Printed circuit board (FR4, 1.5mm thick, one layer
70µm, 6cm
max. power dissipation P
I
The information herein is given t o describe certain components and
shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement , regardi ng circuits, descripti ons
and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technol ogy, delivery terms and conditi ons
and prices please contact your nearest Infineon Technologies Offi ce
in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Warnings
Due to technical requirements components may contain dangerous
substances. For inform ation on the types in question please contact
your nearest Infineon Technologies Office.
Infineon Technologies Components m ay only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the f ai l ure of that life-support device or system, or
to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons m ay be endangered.
Infineon Technologies AG 14 of 14 2003-Oct-01
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