1. Audio circuit (Circuit diagrams Main PWB 1/1 JACK PWB 1/1)
1.1Audio input
The audio signal input received from the audio input terminal (JK011) is applied to the pre-amplifier I006 of 2
(L-CH) and 3 (R-CH) through the low-pass filter consisting of R047, R049, R048, R050, C013 and C014.
In this pre-amplifier, controls of Volume, Balance, Bass, and Treble are conducted. The audio signal controlled
at the pre-amplifier is entered in and amplified at the AMF I007 of 2 (L-CH) and 1 (R-CH). Since then, the signal
is output to the jack board through a cable.
1.2Audio output
The audio signal is output from the head-phone output terminal (JK001) of the jack board to the speaker system
or the head-phone.
When the stereo mini-plug is inserted in the head-phone output terminal, output from the speaker is suspended,
but the audio signal attenuated by resistors R001 and R002 is output to the stereo mini-plug side.
2. Power supply (Circuit daigrams MAIN PWB 7/8)
1.I314:DC-DC converter
A 5V power supply for LCD module, CPU, and logic is generated from the 12V source.
2.I315:3-terminal regulator
A 3.3V power supply for LCD module is generated from the 5V source.
3.I315:3-terminal regulator
A 3.3V power supply for I317 analog is generated from the 5V source.
4.I315:3-terminal regulator
A 3.3V power supply for I317 digital is generated from the 5V source.
Q303, I312 ON/OFF control for LCD Module
ON/OFF control is performed for power ON/OFF and also for the power saving sequence.
3. On-screen circuit (Circuit diagrams Main PWB 3/8)
I310 (MTV130P-30) is an OSD IC.
The HREF Signal, the OSDVS signal (horizontal / vertical sync signal in negative polarity), and the OSDTCLK
signal (dot clock for OSD display) are received from I317 (Circuit diagram MAIN PWB 3/8 gmZAN1), and the
OSD functions controlled by IIC interface (pin 7, pin 8).
Using these data, and On-screen menu screen is established and the resultant data are output to I317 (Circuit
diagram MAIN PWB 3/8, gmZAN1).
4. Video input circuit (Circuit diagram MAIN PWB 4/8)
The AC-coupled video signal is used to clamp the black level at 0V).
5. Definition converter LSI peripheral circuit (Circuit diagram MAIN PWB)
I317 gmZAN1 is the definition converter LSI.
The analog R, G, B signal input entered from the video input circuit is converted into the digital data of video
signal through the incorporated A/D converter. Based on this conversion, this device performs interpolation
during pixel extension. The source voltage for this device is 3.3V and the system clock frequency is 50MHz.
The withstand voltage level for the input signal voltage if I317 is 3.3V and 5V.
Page 1Circuit Description
EC-150ATA
6. System reset, LED control circuit (Circuit diagram MAIN PWB 2/8, 3/8)
6.1System reset
System reset is performed by detecting the rising and falling of the 5V source voltage at I301.
6.2LED control circuit
Green / amber is lit with the control signal of the LED GREEN and LED AMBER signal pin 15, 12 from I307
(Circuit diagram MAIN PWB 2/8).
7. E2PROM for PnP (Circuit diagram MAIN PWB 2/8)
8. E2PROM (Circuit diagram MAIN PWB 2/8)
Data transfer between I305 (AT24 C16) and CPU (Circuit diagram MAIN PWB 2/8 (I302) is effected through
the IIC bus SCL (pin 15) and SDA (pin 16) of I302. The data to be transferred to each device are stored in I305.
l I317 control data.
l OSD related setting data.
l Other control data for service menu.
9. CPU circuit (Circuit diagram MAIN PWB 2/8)
I302 (80C51RA2) functions as the CPU.
The source voltage for the device is 5.0V and the system clock frequency is 20MHz.
9.1Detection of POWER switch status
The CPU identifies the ON status of the two power supplies. The identification is made when the power supply
is turned off. For example, if the power supply is turned off with the POWER switch, the POWER switch must be
turned on when activating the power supply again. If the power supply is turned off by pulling out the power
cord, then this power supply can be turned on by connecting the power cord, without pressing the POWER
switch.
9.2Display mode identification
9.2.1 Functions
(1) Display mode identification
l The display mode of input signal is identified based on Table 1, and according to the frequency and polarity
(HPOL, VPOL) of horizontal or vertical sync signal, presence of the horizontal or vertical sync signal, and the
discrimination signal (HSYNC_DETECT, VSYNC_DETECT).
l In MOD [3] [4], inappropriate polarity, composite sync, and sync ON green are indentified as MOD [4].
l When the mode has been identified through the measurement of horizontal and vertical frequencies, the total
number of lines is determined with a formula of Horizontal frequency / Vertical frequency = Total number
of lines. Final identification can be made by examining the coincidence of the obtained figure with the
number of lines for the mode identified from the frequency. The boundary number of lines in each mode is
shown in Table 2.
l When the detected frequency if the sync signal has changed, the total number of lines should be counted even
through it is rge identified frequency in the same mode. Then, it is necessary to examine whether the preset
value for the vertical display position of Item 4-3 has exceeded the total number of lines. If exceeded, a
maximum value should be set up, which does not exceed the vertical display position of Item 4-3.
(2) Power save mode.
This power save mode is assumed when the frequency of the horizontal / vertical signal is as specified below.
l Vertical frequency : Below 24 KHz
l Horizontal frequency : 75 KHz or above,
l VTOTAL : 1027 or more.
Page 2Circuit Description
EC-150ATA
q
y
y
y
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
(3) Asset management
As an action for asset management, the potential at the WRITE PROTECT pin is turned to be H if there is a
vertical input of vertical frequency (42 Hz +/- 1 Hz),
For more detailed setting method, refer to 4-6-5-14 (8). During this operation, this system stays in the Out-OfRange mode.
(4) Power save mode.
The power save mode is assumed when the horizontal / vertical signals are as specified below.
l If there is no horizontal sync signal input.
l If there is no vertical sync signal input.
l If the horizontal sync signal is outside the measuring range of gmZAN1.
l If the vertical sync signal is outside the measuring range of gmZAN1.
Table 1
Signal
Preset ModeHSYNC: FrequencyVSYNC:
No.
1640 x 400 (56)24 KHz < fH < 30.8 KHz21.05324.83056.432
9.3.2 Functions
Control is effected for the push-switches to be used when the user changes the parameters, in order to modify the
respective setting values. Whether the switch has been pressed is identified with the switch input level that is
turned L.
Each switch input port is pulled up at outside of ASIC.
Each parameter is stored in the EEPROM, the contents of which are updated as required.
9.4Control of definition converter LSI I317
9.4.1 Ports related to control
Pin No.I/OSignal nameFunction
101IIRQgmZan1 interrupt signal
103OHCLKgmZan1 serial clock
99I/OHDATAgmZan1 serial data
98OHFSgmZan1 serial select
9.4.2 Functions
Major function of I317 are as follows:
(1) Expansion of the display screen.
(2) Timing control for various signal types.
(3) Power-supply sequence (LCD panel).
9.5I2C bus control
9.5.1 Related ports of I201
PortPin No.I/OSignal name Function
P3.315IIICCLKIIC bus clock
P3.416I/OIICDATAIIC bus data
9.5.2 I2C-controlled functions
The following functional controls are effected by I2C.
(1) Control of EEPROM I305f for parameter setting.
(2) Control of audio preamplifier.
Page 5Circuit Description
EC-150ATA
9.6Power ON sequence
When the POWER switch is pressed, the POWER OFF signal is turned H. When this H potential is detected,
the CPU begins to establish the respective power supplies according to the sequence shown below.
POWER
PPWR
DOTCLK
USBSW
UCPB IAS
LVC C
LED
DATA
Page 6Circuit Description
EC-150ATA
9.7Power OFF sequence
When the POWER switch is pressed while the power supply is ON, the POWER ON signal is turned H. When
this H potential is detected, the CPU begins to turn off the respective power supplies according to the sequence
shown below.
POWER
PPWR
DOTCLK
USBSW
UCPB IAS
LVC C
LED
DATA
Page 7Circuit Description
9.8 List of CPU Pin Assignments
g
)
PortPin No. Signal NameInitial SettingFunctionRemark
EC-150ATA
~
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.9
~
P3.0
~
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
~
~
~
~
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
~
~
~
~
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
~
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
D4(LEDAMBER
40
41
42
43
44
NC~~
HDATA0~gmZAN1 4bit interface data
HDATA1~gmZAN1 4bit interface data
HDATA2~gmZAN1 4bit interface data
HDATA3~gmZAN1 4bit interface data
10. Inverter Protective curcuit for back light and power source circuity (Circuit diagram MAIN
PWB 8/10)
This unit operates on an output voltage of 12V from AC adapter. When an AC adapter with an output voltahe
over 12V higher is connected, the control signal from I101 is forcibly connected to the LOW level through D101
(RLZ18B), Q101 (SST33904), and R101, R102. In order to protect the inverter for back light. By this treatment,
oscillation is suspended in the inverter circuit. It must be noted that the back light it unlit as a result of the
stoppage of inverter oscillation.
11. USB circuit
11.1 3.3V cutoff circuit for USB identification (Circuit diagram USB PWB 1/4)
Q905 is a composite transistor where one PNP and one NPN are incorporated in a package.
A signal at pin 1 (5V) of USB (B) connector CN901 passes through R975 (33 ohm) and enters pin 4 (TR2B) of
Q905. Pin 4 is an NPN type base of the internal transistor in Q905. the collector (pin 3) is connected to a 3.3V
circuit through R974 (10 ohm) and R972 (10 ohm) connected in series. The emitter (pin 2) is connected to GND.
For the PNP transistor, on the other hand, a voltage-divided power from the 3.3V circuit is fed to the base (pin 5)
and the collector (pin 1) is connected to UD+ of the USB data line through R901 (1.5 ohm). The emitter (pin 6)
is connected to the 3.3V circuit.
When the USB connector is connected and voltage at pin 1 of CN901 attains 5V, the NPN transistor of Q905 is
turned ON. This also turns on the PNP transistor whose base is connected to the collector of the NPN transistor
through R974 (10 ohm). As a result, the DC+ power supply is fed from the 3.3V circuit that is connected to the
emitter of the PNP transistor, through R901 (1.5 ohm) that is connected to the collector.
When the USB connector is pulled out the host computer is turned off, the base voltage of the NPN transistor at
Q905 is turned to be at the GND level, and therefore the transistor is turned off. As a result, a voltage of 3.3V is
applied to the base of the PNP transistor and this causes the PNP transistor to be turned off also. Finally, a voltage
supply of 3.3V is suspended toward UD+.
IC905 is a step-down type series regulator that generates 3.3V from a 5.2V source.
11.2 USB hub control circuit (Circuit diagram USB PWB 2/4)
IC909 is a reset IC, and IC910 is a USB hub control IC made by NEC.
When the monitor power circuit is turned on, a 3.3V power is fed to IC909. Upon the detection of about 2.75V,
IC909 begins to generate a reset signal of 150msec.
IC910 enables communication with a higher port when UD+ and UD- from the USB connector (Circuit diagram
USB PWB 1/4) are applied to pin 7 and pin 8, respectively. Pin 9, 10, 12, 13, 14, 15, 18 and 19 are connected to
the USB connector (Circuit diagran USB PWB 3/4) of the lower port. They function as a communication interface between lower and higher ports. If an overcurrent is generated in the lower port, it is transferred to the higher
port.
X901 is a crystal oscillator that supplies a 4MHz clock signal to the USB hub control IC (IC910).
11.3 Lower port circuit (Circuit diagram USB PWB 3/4)
CN904 and 905 are the USB lower-port connector.
The 5.2V output from the DC/DC converter passes through the poly-switches of F901, 902, 903 and 904, and is
led to the power supply pins (pin 1 and pin 5 of each connector) of the USB lower-port connector.
An overcurrent signal is given from the poly-switch - USB lower-port connector line to IC910 (Circuit diagram
overcurrent has been generated in the lower port.
11.4 DC/DC converter circuit (Circuit diagram USB PWB 4/4)
IC906 is a DC/DC converter IC, D903 is a rectifier diode, and L910 is a smoothing coil. Pin 5 (ON / OFF) of
IC906 is connected to pin 5 (S/SW) of the USBDC connector CN903 through transistors Q901 and Q902.
When the potential at pin 5 of CN903 is maintained at the GND level, pin 5 of IC906 is aldo at the gnd level and
IC906 stops generation of its output. When pin 5 of CN903 is at the high level, pin 5 of IC906 then stays in the
OPEN state, this causing IC906 to generate a 5.2V output.
Page 9Circuit Description
EC-150ATA
Table of Contents
1.No display of screen (Screen is black, color of LED is amber) ----------------------------------------------------- 1
2.Nothing displays on screen (Screen is black, color of LED is green) ---------------------------------------------- 2
3.Checking the back light unit --------------------------------------------------------------------------------------------- 5