µModule
controller, power switches, inductor, and all support
components. Operating over an input voltage range of 3V
to 36V, the L
0.8V to 5V, set by a single resistor. Only an output and
bulk input capacitor are needed to finish the design.
The low profile package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high den
sity point of load regulation. A built-in soft-start timer is
adjustable with just a resistor and capacitor.
The L
compact (11.25mm × 6.25mm) and low profile (2.82mm)
overmolded land grid array (LGA) package suitable
for automated assembly by standard surface mount
equipment. The LTM8021 is RoHS compliant.
L, LT, LTC, LTM, µModule, PolyPhase, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
. Included in the package are the switching
TM8021 supports an output voltage range of
TM8021 is packaged in a thermally enhanced,
-
Typical applicaTion
7VIN to 36VIN, 5V/500mA µModule Regulator
VIN*
7V TO
36V
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
IN
RUN/SS
1µF
LTM8021
OUT
BIAS
GNDADJ
19.1k
8021 TA01a
V
OUT
5V AT 500mA
2.2µF
Efficiency and Power Loss
80
EFFICIENCY
70
60
50
40
30
1.00
10.00100.00
LOAD CURRENT (mA)
POWER
LOSS
1000.00
8021 TA01b
450
400
350
POWER LOSS (mW)
300
250
200
150
100
50
0
8021fd
For more information www.linear.com/LTM8021
1
Page 2
LTM8021
TOP VIEW
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
VIN, RUN/SS Voltage ................................................. 40V
RUN/SS Above V
ADJ Voltage ................................................................5V
BIAS Voltage ...............................................................7V
Voltage ............................................................. 10V
V
OUT
Internal Operating Temperature
Range (Note 2) .......................................–40°C to 125°C
Maximum Solder Temperature .............................. 260°C
Storage Temperature Range .................. – 55°C to 125°C
LTM8021EV#PBFAu (RoHS)LTM8021Ve4LGA3–40°C to 125°C
LTM8021IV#PBFAu (RoHS)LTM8021Ve4LGA3–40°C to 125°C
MSL
RATING
TEMPERATURE RANGE
(Note 2)
V
OUT
BANK 2
BIAS
GND
BANK 3
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking:
www.linear.com/leadfree
The l denotes the specifications which apply over the full operating
elecTrical characTerisTics
temperature range, otherwise specifications are at TA = 25°C, VIN = 10V, V
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings:
.linear.com/packaging
www
RUN/SS
= 10V, V
BIAS
= 3V, R
= 31.6k.
ADJ
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
V
IN
V
OUT
R
ADJ(MIN)
I
LK
I
OUT
I
Q(VIN)
I
Q(BIAS)
∆V
OUT/VOUT
∆V
OUT/VOUT
Input DC VoltageV
Output DC Voltage0 < I
Minimum Allowable R
ADJ
Leakage from IN to OUTRUN/SS = V
Continuous Output DC Current5V ≤ VIN ≤ 36V, V
Quiescent Current into V
IN
Quiescent Current into BIASNot Switching0.15µA
Line Regulation5V ≤ VIN ≤ 36V, I
Load RegulationVIN = 24V, 0 ≤ I
= 5V, R
RUN/SS
< 500mA; R
OUT
0 < I
< 500mA; R
OUT
Note 3
BIAS
RUN/SS = 0.2V, V
Not Switching
R
= Open
ADJ
OUT
= Open336V
ADJ
Open
ADJ
= 19.1k, 0.1%
ADJ
= 0V, R
ADJ
= V
BIAS
, R
BIAS
= 500mA
OUT
≤ 500mA, V
Open2.76µA
OUT
Open
ADJ
= V
BIAS
OUT
0.8
5
18
0500mA
0.1
1.5
0.5%
0.35%
1
2.5
kW
µA
mA
V
V
2
8021fd
For more information www.linear.com/LTM8021
Page 3
LTM8021
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 10V, V
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
V
OUT(DC)
V
OUT(AC_RMS)
f
SW
I
OSC
I
ISC
DC Output Voltage
Output Voltage Ripple (RMS)VIN = 24V, I
Switching FrequencyI
Short-Circuit Output CurrentVIN = 36V, V
Short-Circuit Input CurrentVIN = 36V, V
ADJVoltage at ADJ PinR
V
BIAS(MIN)
Minimum BIAS Voltage for Proper
VIN = 24V, 0 ≤ I
R
= 31.6k, 0.1%
ADJ
C
= 2.2µF, V
OUT
= 500mA0.91.11.3MHz
OUT
Open
ADJ
I
= 500mA2.23V
OUT
Operation
I
ADJ
I
RUN/SS
V
IH(RUN/SS)
V
IL(RUN/SS)
R
FB
Current Out of ADJ PinV
RUN/SS Pin CurrentV
RUN/SS Input High VoltageR
RUN/SS Input Low VoltageR
Internal Feedback ResistorRUN/SS = V
= 5V, V
OUT
RUN/SS
Open, I
ADJ
Open, I
ADJ
= 2.5V, R
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8021E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to 125°C
internal operating temperature range are assured by design,
≤ 500mA
OUT
= 250mA
OUT
= V
BIAS
= V
BIAS
OUT
= V
BIAS
OUT
= 0V, RUN/SS = 0V50µA
ADJ
Open23µA
ADJ
= 500mA1.6V
OUT
= 500mA0.5V
OUT
= V
BIAS
ADJ
characterization and correlation with statistical process controls. The
LTM8021I is guaranteed to meet specifications over the full – 40°C to
125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 3: Guaranteed by design.
RUN/SS
= 10V, V
BIAS
= 3V, R
= 31.6k.
ADJ
3.3
1mV
OUT
= 0V900mA
= 0V25mA
l
0.790.800.83V
= 0V100
kW
V
For more information www.linear.com/LTM8021
8021fd
3
Page 4
LTM8021
EFFICIENCY (%)
90
EFFICIENCY (%)
90
EFFICIENCY (%)
90
90
BIAS CURRENT (mA)
BIAS CURRENT (mA)
10
Typical perForMance characTerisTics
Efficiency vs Load Current
V
= 1.8V
OUT
85
80
75
70
65
60
55
50
45
40
0
100
50
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
200
150
LOAD CURRENT (mA)
Efficiency vs Load Current
V
= 5V
OUT
85
80
75
EFFICIENCY (%)
70
65
60
0
50
VIN = 12V
VIN = 24V
VIN = 36V
200
150
100
LOAD CURRENT (mA)
250
250
300
300
350
350
400
400
450
8021 G01
450
8021 G04
500
500
Efficiency vs Load Current
V
= 2.5V
OUT
85
80
75
70
65
60
55
50
0
100
50
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
200
150
250
LOAD CURRENT (mA)
vs Load Current
I
BIAS
6
V
= 0.8V
OUT
5
4
3
2
BIAS CURRENT (mA)
1
0
100
0
300400500
200
LOAD CURRENT (mA)
300
350
VIN = 3.4V
VIN = 5V
VIN = 12V
VIN = 24V
= 25°C, unless otherwise noted
T
A
Efficiency vs Load Current
V
OUT
85
80
75
70
65
60
400
450
8021 G02
500
55
0
50
I
BIAS
9
V
OUT
8
7
6
5
4
3
2
1
0
600
8021 G05
0
= 3.3V
100
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
200
150
250
LOAD CURRENT (mA)
vs Load Current
= 1.8V
100
200
LOAD CURRENT (mA)
VIN = 3.4V
300400500
300
350
VIN = 5V
VIN = 12V
VIN = 24V
400
450
8021 G03
8021 G06
500
600
4
I
vs Load Current
BIAS
8
V
= 2.5V
OUT
7
6
5
4
3
BIAS CURRENT (mA)
2
1
0
0
100
VIN = 5V
VIN = 12V
VIN = 24V
300400500
200
LOAD CURRENT (mA)
I
BIAS
V
OUT
9
8
7
6
5
4
3
2
1
0
600
8021 G07
For more information www.linear.com/LTM8021
0
vs Load Current
= 3.3V
100
300400500
200
LOAD CURRENT (mA)
VIN = 5V
VIN = 12V
VIN = 24V
600
8021 G08
8021fd
Page 5
LTM8021
INPUT CURRENT (mA)
400
INPUT CURRENT (mA)
INPUT CURRENT (mA)
140
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
900
Typical perForMance characTerisTics
Input Current vs Output Current
350
300
250
200
150
100
50
0
VIN = 5V
0
50
V
= 2.5V
OUT
200
150
100
OUTPUT CURRENT (mA)
250
300
V
350
Input Quiescent Current
vs Input Voltage
3000
VO = 3.3V
2500
2000
1500
1000
500
INPUT QUIESCENT CURRENT (µA)
OUT
V
= 3.3V
OUT
400
= 1.8V
450
8021 G09
500
Input Current vs Output Current
300
VIN = 12V
250
200
150
100
50
0
100
0
50
OUTPUT CURRENT (mA)
V
150
OUT
= 2.5V
200
250
V
= 3.3V
OUT
300
350
V
V
OUT
TA = 25°C, unless otherwise noted
Input Current vs Output Current
VIN = 24V
120
100
80
60
40
20
0
0
100
50
OUTPUT CURRENT (mA)
OUT
= 1.8V
400
= 5V
450
8021 G10
500
Minimum Input Running Voltage
vs Output Voltage
7
I
= 500mA
OUT
6
5
4
3
2
1
V
150
OUT
= 2.5V
200
V
250
OUT
= 3.3V
300
350
V
= 5V
OUT
V
= 1.8V
OUT
500
450
400
8021 G11
0
0
10
5
20
15
INPUT VOLTAGE (V)
25
Output Short-Circuit Current
vs Input Voltage
V
= 3.3V
OUT
880
860
840
820
800
780
760
740
720
4
1220
8
16243628
INPUT VOLTAGE (V)
30
35
8021 G12
32
8021 G14
40
For more information www.linear.com/LTM8021
0
1
0
2
OUTPUT VOLTAGE (V)
Radiated Emissions
90
36V
IN
80
5V
OUT
FULL LOAD
70
60
50
40
30
20
EMISSIONS LEVEL (dBµV/m)
10
0
–10
200
0
400
FREQUENCY (MHz)
345
CISPR22
CLASS B LIMIT
600
800
6
8021 G13
1000
8021 G15
8021fd
5
Page 6
LTM8021
pin FuncTions
VIN (Bank 1): The VIN pin supplies current to the LTM8021’s
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 1µF.
(Bank 2): Power Output Pins. An external capacitor is
V
OUT
connected from V
to GND in most applications. Apply
OUT
output load between these pins and GND pins.
BIAS (Pin H3): The BIAS pin connects to the internal
boost Schottky diode and to the internal regulator. Tie to
V
OUT
when V
> 3V or to another DC voltage greater
OUT
than 3V otherwise. When BIAS > 3V the internal circuitry
will be powered from this pin to improve efficiency. Main
regulator power will still come from VIN.
RUN/SS (Pin A1): Tie RUN/SS pin to ground to shut down
the LTM8021. Tie to 1.6V or more for normal operation.
block DiagraM
If the shutdown feature is not used, tie this pin to the V
IN
pin. The RUN/SS also provides soft-start and frequency
foldback. To use the soft-start function, connect a resistor
and capacitor to this pin. Do not allow the RUN/SS pin to
rise above V
. See the Applications Information section.
IN
GND (Bank 3): The GND connections serve as the main
signal return and the primary heat sink for the LTM8021. Tie
the GND pins to a local ground plane below the LTM8021
and the circuit components. Return the feedback divider
to this signal.
ADJ (Pin A2): The LTM8021 regulates its ADJ pin to
0.8V. Connect the adjust resistor from this pin to ground.
The value of R
(V
– 0.8), where R
OUT
is given by the equation, R
ADJ
is in k.
ADJ
ADJ
= 80/
V
IN
RUN/SS
0.1µF
CURRENT MODE
CONTROLLER
10µH
V
OUT
100k
1%
ADJGND
10µF15pF
BIAS
8021 BD
6
8021fd
For more information www.linear.com/LTM8021
Page 7
operaTion
LTM8021
The LTM8021 is a standalone nonisolated step-down
switching DC/DC power supply. It can deliver up to
500mA of DC output current with only bulk external input
and output capacitors. This module provides a precisely
regulated output voltage programmable via one external
resistor from 0.8V
to 5VDC. The input voltage range is 3V
DC
to 36V. Given that the LTM8021 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current. Please refer
to the simplified Block Diagram.
The LTM8021 contains a current mode controller, power
switching element, power inductor, power Schottky diode
and a modest amount of input and output capacitance.
With its high performance current mode controller and
internal feedback loop compensation, the LTM8021 module
applicaTions inForMaTion
For most applications, the design process is straight
forward, summarized as follows:
1. Refer to Table 1 for the row that has the desired input
range and output voltage.
, C
2. Apply the recommended C
IN
OUT
and R
3. Connect BIAS as indicated.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
If the desired output voltage is not listed in Table 1, set the
output by applying an R
by the equation, R
in k and V
OUT
ADJ
is in volts. Verify the LTM8021’s operation
resistor whose value is given
ADJ
= 80/(V
– 0.80), where R
OUT
over the system’s intended line, load and environmental
conditions.
ADJ
values.
ADJ
is
has sufficient stability margin and good transient perfor
mance under a wide range of operating conditions with a
wide range of output capacitors, even all ceramic ones (X5R
or X7R). Current mode control provides cycle-by-cycle
fast current limit, and automatic current limiting protects
the module in the event of a short cir
cuit or overload fault.
The LTM8021 is based upon a 1.1MHz fixed frequency
PWM current mode controller, equipped with cycle skip
capability for low voltage outputs or light loads. A frequency
foldback scheme helps to protect internal components from
overstress under heavy and short-circuit output loads.
The drive circuit for the internal power switching element
is powered through the BIAS pin. Power this pin with at
least 3V.
Minimum Duty Cycle
The LTM8021 has a fixed 1.1MHz switching frequency. For
any given output voltage, the duty cycle falls as the input
voltage rises. At very large V
IN
to V
ratios, the duty
OUT
cycle can be very small. Because the LTM8021’s internal
controller IC has a minimum on-time, the regulator will
skip cycles in order to maintain output voltage regulation.
This will result in a larger output voltage ripple and possible
disturbances during recovery from a transient load step.
The component values provided in Table 1 allow for skip
cycle operation, but hold the resultant output ripple to
around 50mV, or less. If even less ripple is desired, then
more output capacitance may be necessary. Adding a feed
forward capacitor has been empirically shown to modestly
extend the input voltage range to where the LTM8021 does
not
skip cycles. Apply the feedforward capacitor between
the V
pins and ADJ. This injects perturbations into the
OUT
control loop, therefore, values larger than 50pF are not
recommended. A good value to start with is 12pF.
For more information www.linear.com/LTM8021
8021fd
7
Page 8
LTM8021
applicaTions inForMaTion
Table 1. Recommended Component Values and Configuration
VIN RANGEV
3.4V to 36V0.8V4.7µF100µF 12108.2M3V to 7V
3.4V to 36V1.2V4.7µF100µF 1210200k3V to 7V
3.4V to 36V1.5V4.7µF100µF 1210115k3V to 7V
3.4V to 36V1.8V2.2µF100µF 121078.7k3V to 7V
3.5V to 36V2V2.2µF100µF 121066.5k3V to 7V
4V to 36V2.2V1µF22µF 120657.6k3V to 7V
4V to 36V2.5V1µF10µF 080547.5k3V to 7V
5V to 36V3.3V1µF4.7µF 080532.4kV
7V to 36V5V1µF2.2µF 080519.1kV
3.5V to 32V–3.3V1µF4.7µF 080532.4kGND
3.75V to 31V–5V1µF4.7µF 080519.1kGND
3.4V to 15V0.8V4.7µF100µF 12108.2M3V to 7V
3.4V to 15V1.2V4.7µF100µF 1210200k3V to 7V
3.4V to 15V1.5V4.7µF47µF 1206115k3V to 7V
3.4V to 15V1.8V2.2µF47µF 120678.7k3V to 7V
3.5V to 15V2V2.2µF22µF 120666.5k3V to 7V
4V to 15V2.2V1µF22µF 120657.6k3V to 7V
4V to 15V2.5V1µF10µF 080547.5k3V to 7V
5V to 15V3.3V1µF2.2µF 080532.4kV
7V to 15V5V1µF1µF 080519.1kV
OUT
C
IN
C
OUT
R
ADJ
BIAS
OUT
OUT
OUT
OUT
9V to 24V0.8V1µF100µF 1210Open3V to 7V
9V to 24V1.2V1µF100µF 1210200k3V to 7V
9V to 24V1.5V1µF47µF 1206115k3V to 7V
9V to 24V1.8V1µF47µF 120678.7k3V to 7V
9V to 24V2V1µF22µF 120666.5k3V to 7V
9V to 24V2.2V1µF22µF 120657.6k3V to 7V
9V to 24V2.5V1µF10µF 080547.5k3V to 7V
9V to 24V3.3V1µF2.2µF 080532.4kV
9V to 24V5V1µF1µF 080519.1kV
18V to 36V0.8V1uF100µF 1210Open3V to 7V
18V to 36V1.2V1uF100µF 1210200k3V to 7V
18V to 36V1.5V1uF100µF 1210115k3V to 7V
18V to 36V1.8V1uF100µF 121078.7k3V to 7V
18V to 36V2V1uF100µF 121066.5k3V to 7V
18V to 36V2.2V1uF22µF 120657.6k3V to 7V
18V to 36V2.5V1uF10µF 080547.5k3V to 7V
18V to 36V3.3V1uF4.7µF 080532.4kV
18V to 36V5V1uF2.2µF 080519.1kV
OUT
OUT
OUT
OUT
8021fd
8
For more information www.linear.com/LTM8021
Page 9
applicaTions inForMaTion
8
LTM8021
Capacitor Selection Considerations
The CIN and C
capacitor values in Table 1 are the
OUT
minimum recommended values for the associated operating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response or
fault recovery, if it is necessary. Again, it is incumbent
upon the user to verify proper operation over the intended
system’s line, load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal
capacitance resulting in much higher output voltage ripple
than expected.
Ceramic capacitors are also piezoelectric. At light loads,
the LTM8021 skips switching cycles in order to maintain
regulation. The resulting bursts of current can excite
a ceramic capacitor at audio frequencies, generating
audible noise.
If this audible noise is unacceptable, use a high performance
electrolytic capacitor at the output. This output capacitor
can be a parallel combination of a 1µF ceramic capacitor
and a low cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8021.
A ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the L
TM8021 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Minimum Input Voltage
The LTM8021 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. For most applications at full load, the input
must be about 1.5V above the desired output. In addition,
it takes more input voltage to turn on than is required for
continuous operation. This is shown in Figure 1.
6.0
V
0.001
= 3.3V
OUT
RUN/SS
ENABLED
TO START
TO RUN
0.010.1
LOAD CURRENT (A)
1
8021 F01
V
= 5V
OUT
7
RUN/SS
6
ENABLED
5
4
INPUT VOLTAGE (V)
3
2
0.001
TO START
TO RUN
0.010.1
LOAD CURRENT (A)
1
5.5
5.0
4.5
4.0
3.5
INPUT VOLTAGE (V)
3.0
2.5
2.0
Figure 1. The LTM8021 Requires More Voltage to Start Than to Run
8021fd
For more information www.linear.com/LTM8021
9
Page 10
LTM8021
8021 F04
RUN
applicaTions inForMaTion
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8021,
reducing the maximum input current during start-up.
The RUN/SS pin is driven through an external RC filter
to create a voltage ramp at this pin. Figure 2 shows the
soft-start circuit. By choosing a large RC time constant,
the peak start-up current can be reduced to the current
that is required to regulate the output, with no overshoot.
Choose the value of the resistor so that it can supply 80µA
when the RUN/SS pin reaches 2V.
15k
0.22µF
RUN/SS
GND
8021 F02
Figure 2. To Soft-Start the LTM8021, Add a
Resistor and Capacitor to the RUN/SS Pin
Shorted Input Protection
Care needs to be taken in systems where the output will
be held high when the input to the LTM8021 is absent.
This may occur in battery charging applications or in
battery backup systems where a battery or some other
supply is diode ORed with the LTM8021’s output. If the
pin is allowed to float and the RUN/SS pin is held high
V
IN
(either by a logic signal or because it is tied to V
), then
IN
the LTM8021’s internal circuitry will pull its quiescent
current through its internal power switch. This is fine if
your system can tolerate a few milliamps in this state. If
the RUN/SS pin is grounded, the internal power switch
current will drop to essentially zero. However, if the V
IN
pin
is grounded while the output is held high, then parasitic
diodes inside the LTM8021 can pull large currents from
the output through the internal power switch and the V
IN
pin. Figure 3 shows a circuit that will run only when the
input voltage is present and that protects against a shorted
or reversed input.
PCB Layout
Most of the problems associated with the PCB layout
have been alleviated or eliminated by the high level of
integration of the LTM8021. The LTM8021 is nevertheless
a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, one may fail to achieve a specified
operation with a haphazard or poor layout. See Figure 4
for a suggested layout.
Ensure that the grounding and heatsinking are acceptable.
A few rules to keep in mind are:
1.
Place the C
capacitor as close as possible to the VIN
IN
and GND connection of the LTM8021.
Place the C
2.
and GND connection of the LTM8021.
V
OUT
3. Place the C
capacitor as close as possible to the
OUT
and C
IN
capacitors such that their ground
OUT
currents flow directly adjacent to, or underneath the
LTM8021.
LTM8021
RT
V
OUT
BIAS
R
ADJ
8021 F03
V
OUT
C
OUT
V
4V TO 36V
V
C
IN
IN
RUN/SS
GND
IN
Figure 3. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8021 Runs Only When
the Input is Present
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
+
22µF
AI.EI.
V
IN
V
IN
LTM8021
4.7µF
20V/DIV
10A/DIV
I
IN
DANGER
RINGING V
ABSOLUTE MAXIMUM RATING
20µs/DIV
MAY EXCEED
IN
(5a)
V
LTM8021
4.7µF
(5b)
20V/DIV
10A/DIV
IN
I
IN
20µs/DIV
0.7Ω
LTM8021
+
4.7µF0.1µF
(5c)
Figure 5. Ensures Reliable Operation When the LTM8021 is Connected to a Live Supply
4. Connect all of the GND connections to as large a
copper pour or plane area as possible on the top layer.
Avoid breaking the ground connection between the
external components and the LTM8021.
Hot-Plugging Safely
small size, robustness and low impedance of ceramic
The
capacitors make them an attractive option for the input
bypass capacitor of LTM8021. However, these capacitors
can cause problems if the LTM8021 is plugged into a live
supply (see the Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
V
IN
20V/DIV
I
IN
10A/DIV
20µs/DIV
8021 F05
source forms an under damped tank circuit, and the voltage at the VIN pin of the LTM8021 can ring to twice the
nominal input voltage, possibly exceeding the LTM8021’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LTM8021 into
an energized supply, the input network should be designed
to prevent this overshoot. Figure 5 shows the waveforms
that result when an LTM8021 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The first
plot is the response with a 2.2µF ceramic capacitor at the
input. The input voltage rings as high as 35V and the input
current peaks at 20A. One method of damping the tank
circuit is to add another capacitor with a series resistor to
8021fd
For more information www.linear.com/LTM8021
11
Page 12
LTM8021
applicaTions inForMaTion
the circuit. In Figure 5b an aluminum electrolytic capacitor
has been added. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of the
circuit, though it is likely to be the largest component in the
circuit. An alternative solution is shown in Figure 5c. A 0.7W
resistor is added in series with the input to eliminate the
voltage overshoot (it also reduces the peak input current).
A 0.1µF capacitor improves high frequency filtering. This
solution is smaller and less expensive than the electrolytic
capacitor. For high input voltages its impact on efficiency
is minor, reducing efficiency less than one-half percent for
a 5V output at full load operating from 24V.
Thermal Considerations
The LTM8021 output current may need to be derated if it
is required to operate in a high ambient temperature or
deliver a large amount of continuous power. The amount
of current derating is dependent upon the input voltage,
output power and ambient temperature. The temperature
rise curves given in the Typical Performance Charac
teristics section can be used as a guide. These curves
were generated by a LTM8021 mounted to a 40.3cm
2
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
The thermal resistance numbers listed in Page 2 of the
data sheet are based on modeling the µModule package
mounted on a test board specified per JESD51-9 (Test
Boards for Area Array Surface Mount Package Thermal
Measurements). The thermal coefficients provided in this
page are based on JESD 51-12 (Guidelines for Reporting
and Using Electronic Package Thermal Information).
For increased accuracy and fidelity to the actual application,
many designers use FEA to predict thermal performance.
To that end, Page 2 of the data sheet typically gives four
thermal coefcients:
– Thermal resistance from junction to ambient.
θ
JA
θ
JCbottom
– Thermal resistance from junction to the bottom
of the product case.
– Thermal resistance from junction to top of the
θ
JCtop
product case.
– Thermal resistance from junction to the printed
θ
JB
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
is the natural convection junction-to-ambient air
θ
JA
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
still air although natural convection causes the air to move.
This value is determined with the part mounted to a JESD
51-9 defined test board, which does not reflect an actual
application or viable operating condition.
θ
JCbottom
is the thermal resistance between the junction
and bottom of the package with all of the component power
dissipation flowing through the bottom of the package. In
the typical µModule converter, the bulk of the heat flows
out the bottom of the package, but there is always heat
flow out into the ambient environment. As a result, this
thermal resistance value may be useful for comparing
packages but the test conditions don’t generally match
the user’s application.
is determined with nearly all of the component power
θ
JCtop
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule converter are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc
tion to the top of the part. As in the case of θ
JCbottom
-
, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
12
8021fd
For more information www.linear.com/LTM8021
Page 13
applicaTions inForMaTion
LTM8021
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θ
JCbottom
and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 6.
The blue resistances are contained within the µModule
converter, and the green are outside.
The die temperature of the LTM8021 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8021. The bulk of the heat flow out of the LTM8021
is through the bottom of the μModule converter and the
LGA pads into the printed circuit board. Consequently a
poor printed circuit board design can cause excessive
heating, resulting in impaired performance or reliability.
Please refer to the PCB Layout section for printed circuit
board design suggestions.
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTIONAMBIENT
µMODULE DEVICE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
Figure 6. Thermal Model of µModule Regulator
CASE (BOTTOM)-TO-BOARD
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
8021 F06
For more information www.linear.com/LTM8021
8021fd
13
Page 14
LTM8021
I
(mA)
600
Typical applicaTions
0.8V Step-Down Converter
VIN*
3.4V TO 36V
5V
1µF
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
LTM8021
V
IN
BIAS
RUN/SS
GNDADJ
V
OUT
100µF
VIN*
7V TO 36V
V
OUT
0.8V AT 500mA
8021 TA02
5V Step-Down Converter
LTM8021
V
IN
RUN/SS
GNDADJ
1µF
1.8V Step-Down Converter
VIN*
3.4V TO 36V
5V
1µF
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
V
V
OUT
BIAS
19.1k
OUT
5V AT 500mA
2.2µF
LTM8021
V
IN
BIAS
RUN/SS
GNDADJ
V
OUT
100µF
78.7k
V
OUT
1.8V AT 500mA
8021 TA03
–5V Positive-to-Negative ConverterLoad Current vs Input Voltage
VIN*
3.75V TO 31V
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
1µF
LTM8021
V
IN
RUN/SS
GNDADJ
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
V
OUT
BIAS
4.7µF
19.1k
OPTIONAL
SCHOTTKY
CLAMP
–5V
8021 TA05
LOAD
500
400
300
200
100
8021 TA04
0
0
1020
5
1525
VIN (V)
8021 TA05b
14
8021fd
For more information www.linear.com/LTM8021
Page 15
package DescripTion
LGA 35 0113 REV B
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LGA Package
35-Lead (11.25mm × 6.25mm × 2.82mm)
(Reference LTC DWG # 05-08-1805 Rev B)
aaa Z
11.250
BSC
X
Y
2.72 – 2.92
LTM8021
2.540
1.270
0.0000
0.9525
1.270
1.5875
2.540
PAD 1
CORNER
4
4.445
3.175
1.905
SUGGESTED PCB LAYOUT
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
3
LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020
4
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR A
MARKED FEATURE
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 35
7PACKAGE ROW AND COLUMN LABELING MAY VARY
!
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
SYMBOL
aaa
bbb
TOLERANCE
0.15
0.10
PACKAGE TOP VIEW
0.0000
0.635
0.635
0.635
0.9525
0.3175
TOP VIEW
1.905
3.175
4.445
SEE NOTES
0.605 – 0.665
5.080
BSC
PADS
3
1.270
BSC
COMPONENT
PIN “A1”
TRAY PIN 1
6.250
BSC
aaa Z
DETAIL A
PACKAGE SIDE VIEW
0.605 – 0.665
G
HBADC
LTMXXXXXX
BEVEL
PACKAGE IN TRAY LOADING ORIENTATION
EF
PACKAGE BOTTOM VIEW
µModule
2.40 – 2.60
8.890
BSC
MOLD
DETAIL A
bbb Z
CAP
SUBSTRATE
0.27 – 0.37
Z
5
4
3
2
1
PAD 1
C (0.30)
SEE NOTES
7
For more information www.linear.com/LTM8021
8021fd
15
Page 16
LTM8021
package DescripTion
LTM8021 Pinout (Sorted by Pin Number)
PINSIGNAL DESCRIPTION
A1RUN/SS
A2ADJ
A4V
A5V
B1GND
B2GND
B4V
B5V
C1GND
C2GND
D1GND
D2GND
D3GND
D4GND
D5GND
E1GND
E2GND
E3GND
E4GND
E5GND
F1GND
F2GND
F3V
F4V
F5V
G1GND
G2GND
G3V
G4V
G5V
H1GND
H2GND
H3BIAS
H4V
H5V
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
16
8021fd
For more information www.linear.com/LTM8021
Page 17
LTM8021
revision hisTory
REVDATEDESCRIPTIONPAGE NUMBER
D3/14Updated thermal resistance values
Updated Order Information table
Updated Thermal Considerations section
(Revision history begins at Rev D)
2
2
12, 13
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Formoreinformationwww.linear.com/LTM8021
8021fd
17
Page 18
LTM8021
package phoTo
Typical applicaTion
3.3V Step-Down Converter
VIN*
5.5V TO 36V
1µF4.7µF
*RUNNING VOLTAGE RANGE. PLEASE REFER TO THE
APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS.
LTM8021
V
IN
RUN/SS
GNDADJ
V
OUT
BIAS
32.4k
V
OUT
3.3V AT 500mA
8021 TA06
relaTeD parTs
PART NUMBERDESCRIPTIONCOMMENTS
LTM460010A DC/DC µModule
LTM4600HVMPVMilitary Plastic 10A DC/DC µModule
LTM4601/
LTM4601A
12A DC/DC µModule with PLL, Output Tracking/Margining
and Remote Sensing
LTM46026A DC/DC µModulePin-Compatible with the LTM4600
LTM46036A DC/DC µModule with PLL and Output Tracking/
Margining and Remote Sensing
LTM46044A Low V
DC/DC µModule
IN
LTM46055A to 12A Buck-Boost µModuleHigh Efficiency, Adjustable Frequency, 4.5V ≤ V
LTM46075A to 12A Buck-Boost µModuleHigh Efficiency, Adjustable Frequency, 4.5V ≤ V
LTM46088A Low V
DC/DC µModule
IN
LTM802036V, 200mA DC/DC µModule
LTM80221A, 36V DC/DC µModule
LTM80232A, 36V DC/DC µModule
Basic 10A DC/DC µModule, 15mm × 15mm × 2.8mm LGA
–55°C to 125°C Operation, 15mm × 15mm × 2.8mm LGA
®
Synchronizable, PolyPhase
Operation, LTM4601-1 Version Has No
Remote Sensing
Synchronizable, PolyPhase Operation, LTM4603-1 Version Has No
Remote Sensing, Pin-Compatible with the LTM4601
2.375V ≤ V
≤ 5V, 0.8V ≤ V
IN
≤ 5V, 9mm × 15mm × 2.3mm LGA
OUT
16V, 15mm × 15mm × 2.8mm
25V, 15mm × 15mm × 2.8mm
2.375V ≤ V
4V ≤ V
Adjustable Frequency, 0.8V ≤ V
≤ 5V, 0.8V ≤ V
IN
≤ 36V, 1.25V ≤ V
IN
≤ 5V, 9mm × 15mm × 2.8mm LGA
OUT
≤ 5V, 6.25mm × 6.25mm × 2.3mm LGA
OUT
≤ 5V, 11.25mm × 9mm × 2.82mm,
OUT
Pin-Compatible to the LTM8023
Adjustable Frequency, 0.8V ≤ V
≤ 5V, 11.25mm × 9mm × 2.82mm,
OUT
Pin-Compatible to the LTM8022
≤ 20V, 0.8V ≤ V
IN
≤ 36V, 0.8V ≤ V
IN
OUT
OUT
≤
≤
18
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
Formoreinformationwww.linear.com/LTM8021
●
www.linear.com/LTM8021
8021fd
LT 0314 REV D • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2008
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