LINEAR TECHNOLOGY LTM4602 Technical data

LTM4602

6A High Effi ciency

DC/DC µModule

FEATURES

n

Complete Switch Mode Power Supply

n

Wide Input Voltage Range: 4.5V to 20V

n

6A DC, 8A Peak Output Current

n

0.6V to 5V Output Voltage

n

1.5% Output Voltage Regulation

n

Ultrafast Transient Response

n

Current Mode Control

n

Pb-Free (e4) RoHS Compliant Package with Gold-

Pad Finish

n

Pin Compatible with the LTM4600

n

Up to 92% Effi ciency

n

Programmable Soft-Start

n

Output Overvoltage Protection

n

Optional Short-Circuit Shutdown Timer

n

See the LTM4602HV for Operation Up to 28VIN

n

Small Footprint, Low Profi le (15mm × 15mm ×

2.8mm) Surface Mount LGA Package

APPLICATIONS

n

Telecom and Networking Equipment

n

Servers

n

Industrial Equipment

n

Point of Load Regulation

DESCRIPTION

The LTM®4602 is a complete 6A DC/DC step down power
supply. Included in the package are the switching control­ler, power FETs, inductor, and all support components.
Operating over an input voltage range of 4.5V to 20V, the
LTM4602 supports an output voltage range of 0.6V to 5V,
set by a single resistor. This high effi ciency design delivers
6A continuous current (8A peak), needing no heat sinks or
airfl ow to meet power specifi cations. Only bulk input and
output capacitors are needed to fi nish the design.

The low profi le package (2.8mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation. High switching frequency and an
adaptive on-time current mode architecture enables a very
fast transient response to line and load changes without
sacrifi cing stability. Fault protection features include
integrated overvoltage and short circuit protection with
a defeatable shutdown timer. A built-in soft-start timer is
adjustable with a small capacitor.

The LTM4602 is packaged in a thermally enhanced, compact
(15mm × 15mm) and low profi le (2.8mm) over-molded
Land Grid Array (LGA) package suitable for automated as­sembly by standard surface mount equipment. For the 4.5V
to 28V input range version, refer to the LTM4602HV.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
μModule is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners. Protected by U.S. Patents including 5481178, 6100678, 6580258,
5847554, 6304066.

TYPICAL APPLICATION

6A μModuleTM Power Supply with 4.5V to 20V Input

V

4.5V TO 20V

IN

V

C

IN

V

IN

LTM4602

V

OSET

PGND SGND

OUT

C

OUT

R

SET

66.5k

4602 TA01a

V

OUT

1.5V
6A

Effi ciency vs Load Current

with 12V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

0

*950kHz INSTEAD OF 1.3MHz
INCREASES 3.3V EFFICIENCY 2%

2

LOAD CURRENT (A)

(FCB = 0)

IN

0.8V

1.2V

1.5V

1.8V

2.5V

3.3V

3.3V

4

OUT
OUT
OUT
OUT
OUT
OUT
OUT

6

(950kHz)*

8

4602 TA01b

4602fa

1

LTM4602

(

)

(Note 1)

FCB, EXTVCC, PGOOD, RUN/SS, V

, SVIN, f

V

IN

, COMP ............................................. –0.3V to 2.7V

V

OSET

............................................ –0.3V to 20V

ADJ

Operating Temperature Range (Note 2).... –40°C to 85°C

Junction Temperature ........................................... 125°C

Storage Temperature Range ................... –55°C to 125°C

.......... –0.3V to 6V

OUT

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS

TOP VIEW

IN

ADJ

f

V

IN

PGND

V

OUT

LGA PACKAGE

104-LEAD

T

JMAX

DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS

θ

JA

15mm × 15mm × 2.8mm

= 125°C, θJA = 15°C/W, θJC = 6°C/W,

WEIGHT = 1.7g

OSET

EXTVCCV

SV

COMP
SGND
RUN/SS
FCB

PGOOD

ORDER INFORMATION

LEAD FREE FINISH PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTM4602EV#PBF LTM4602V 104-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 85°C

LTM4602IV#PBF LTM4602V 104-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 85°C

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/

The

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifi cations are at TA = 25°C, VIN = 12V. External CIN = 120μF, C
application (front page) confi guration.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IN(DC)

V

OUT(DC)

Input Specifi cations

V

IN(UVLO)

I

INRUSH(VIN)

I

Q(VIN)

Input DC Voltage

Output Voltage FCB = 0V

Under Voltage Lockout Threshold I

Input Inrush Current at Startup I

Input Supply Bias Current I

l denotes the specifi cations which apply over the –40°C to 85°C

= 200μF/Ceramic per typical

OUT

l

4.5 20 V

V

= 5V or 12V, V

IN

= 0A 3.4 4 V

OUT

= 0A. V

OUT

V

IN

V

IN

= 0A, EXTVCC Open

OUT

V

IN

V

IN

V

IN

V

IN

OUT

= 5V
= 12V

= 12V, V
= 12V, V
= 5V, V
= 5V, V

= 1.5V, FCB = 0

OUT

OUT
OUT
OUT

Shutdown, RUN = 0.8V, V

= 1.5V, I

OUT

= 1.5V, FCB = 5V

= 1.5V, FCB = 0V
= 1.5V, FCB = 5V
= 1.5V, FCB = 0V

= 12V

IN

OUT

= 0A

1.478

l

1.470

1.50

1.50

1.522

1.530

0.6

0.7

1.2
42

1.0
52
50 100

mA
mA
mA
mA

μA

V

A
A

2

4602fa

LTM4602

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the –40°C to 85°C
temperature range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

I

S(VIN)

Output Specifi cations

I

OUTDC

ΔV

OUT(LINE)

V

OUT

ΔV

OUT(LOAD)

V

OUT

V

OUT(AC)

fs Output Ripple Voltage Frequency V

t

START

ΔV

OUTLS

t

SETTLE

I

OUTPK

Control Stage

V

OSET

V

RUN/SS

I

RUN(C)/SS

I

RUN(D)/SS

– SV

V

IN

IN

I

EXTVCC

R

FBHI

V

FCB

I

FCB

PGOOD Output

ΔV

OSETH

ΔV

OSETL

ΔV

OSET(HYS)

V

PGL

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Input Supply Current VIN = 12V, V

Output Continuous Current Range
(See Output Current Derating Curves for
Different V

, V

and TA)

IN

OUT

Line Regulation Accuracy V

Load Regulation Accuracy V

Output Ripple Voltage VIN = 12V, V

Turn-On Time V

Voltage Drop for Dynamic Load Step V

Settling Time for Dynamic Load Step Load: 10% to 50% to 10% of Full Load 25 μs

Output Current Limit Output Voltage in Foldback

Voltage at V

Pin I

OSET

RUN ON/OFF Threshold 0.8 1.5 2 V

Soft-Start Charging Current V

Soft-Start Discharging Current V

Current into EXTVCC Pin EXTVCC = 5V, FCB = 0V, V

Resistor Between V

OUT

and V

OSET

Forced Continuous Threshold 0.57 0.6 0.63 V

Forced Continuous Pin Current V

PGOOD Upper Threshold V

PGOOD Lower Threshold V

PGOOD Hysteresis V

PGOOD Low Voltage I

= 25°C, VIN = 12V. Per typical application (front page) confi guration.

A

= 1.5V, I

V

IN

V

IN

V

IN

OUT

V

IN

OUT

V

IN

OUT

OUT

V
V

OUT

C

OUT

OUT

= 12V, V
= 5V, V

= 12V, V

= 1.5V, I

= 3.3V, I

OUT

= 1.5V, I

OUT

= 1.5V 0 6 A

OUT

= 0A, FCB = 0V,

OUT

= 4.5V to 20V

= 1.5V, I

= 0A to 6A, FCB = 0V,

OUT

= 5V, VIN = 12V (Note 3)

= 1.5V, I

OUT

= 1.5V, I

= 1.5V, I

= 12V

IN

= 5V

IN

= 6A, FCB = 0V 850 kHz

OUT

= 1A

OUT

= 1.5V, Load Step: 0A/μs to 3A/μs
= 22μF 6.3V, 330μF 4V POSCAP,

= 6A

OUT

= 6A

OUT

= 6 A

OUT

l

l

= 0A, FCB = 0V 10 15 mV

OUT

0.88

1.80

2.08

0.15 0.3 %

±0.25
±0.15

±0.5
±1.0

0.5

0.7

30 mV

P-P

ms
ms

See Table 2

V

= 12V, V

IN

V

= 5V, V

IN

= 0A, V

OUT

= 0V –0.5 –1.2 –3 μA

RUN/SS

= 4V 0.8 1.8 3 μA

RUN/SS

OUT

OUT

= 1.5V

OUT

= 1.5V

= 1.5V

9
9

l

0.591 0.6 0.609 V

EXTVCC = 0V, FCB = 0V 100 mV

I

OUT

= 0A

OUT

= 1.5V,

16 mA

Pins 100 kΩ

= 0.6V –1 –2 μA

FCB

Rising 7.5 10 12.5 %

OSET

Falling –7.5 –10 –12.5 %

OSET

Returning 2 %

OSET

= 5mA 0.15 0.4 V

PGOOD

Note 2: The LTM4602E is guaranteed to meet performance specifi cations
from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTM4602I is guaranteed over the
–40°C to 85°C temperature range.

Note 3: Test assumes current derating versus temperature.

4602fa

A
A
A

%
%

A
A

3

LTM4602

w

)

p

Light Load Effi ci

TYPICAL PERFORMANCE CHARACTERISTICS

Effi ciency vs Load Current

ith 5V

100

90

80

70

60

EFFICIENCY (%)

50

40

30

0

(FCB = 0)

IN

*FOR 5V TO 3.3V CONVERSION,
SEE FREQUENCY ADJUSTMENT
IN APPLICATIONS INFORMATION

2

LOAD CURRENT (A)

ency vs
Load Current with 12V
(FCB > 0.7V, <5V)

100

0.8V

OUT

1.2V

OUT

1.5V

OUT

1.8V

OUT

2.5V

OUT

3.3V

*

OUT

4

6

8

4602 G01

IN

Effi ciency vs Load Current
with 12V(FCB = 0

100

90

80

70

60

EFFICIENCY (%)

50

40

30

0

*950kHz INSTEAD OF 1.3MHz
INCREASES 3.3V EFFICIENCY 2%

2

LOAD CURRENT (A)

0.8V

OUT

1.2V

OUT

1.5V

OUT

1.8V

OUT

2.5V

OUT

3.3V

OUT

3.3V

OUT

4

1.2V Transient Response 1.5V Transient Response

(See Figure 21 for all curves)

Effi ciency vs Load Current
with 20V

100

90

80

70

60

EFFICIENCY (%)

50

(950kHz)*

6

8

4602 G02

40

30

0

(FCB = 0)

IN

2

4

LOAD CURRENT (A)

1.2V

OUT

1.5V

OUT

1.8V

OUT

2.5V

OUT

3.3V

OUT

6

8

4602 G03

90

80

70

60

EFFICIENCY (%)

50

40

30

0

1.8V Transient Res

V

OUT

50mV/DIV

I

OUT

2A/DIV

1.8V AT 3A/μs LOAD STEP
C
330μF, 4V SANYO POSCAP

0.20.1

0.40.3

0.5

LOAD CURRENT (A)

20μs/DIV

= 1 × 22μF, 6.3V CERAMICS

OUT

V

OUT

50mV/DIV

I

OUT

2A/DIV

1.5V AT 3A/μs LOAD STEP
= 1 × 22μF, 6.3V CERAMICS

C

OUT

330μF, 4V SANYO POSCAP

20μs/DIV

1.2V

1.5V

1.8V

2.5V

3.3V

0.6 0.7 0.9

0.8

OUT
OUT
OUT
OUT
OUT

4602 G04

1

V

OUT

50mV/DIV

I

OUT

2A/DIV

1.2V AT 3A/μs LOAD STEP
C

= 1 × 22μF, 6.3V CERAMICS

OUT

330μF, 4V SANYO POSCAP

20μs/DIV

4602 G05

onse 2.5V Transient Response 3.3V Transient Response

4602 G07

V

OUT

50mV/DIV

I

OUT

2A/DIV

2.5V AT 3A/μs LOAD STEP
= 1 × 22μF, 6.3V CERAMICS

C

OUT

330μF, 4V SANYO POSCAP

20μs/DIV

4602 G08

V

OUT

50mV/DIV

I

OUT

2A/DIV

3.3V AT 3A/μs LOAD STEP
= 1 × 22μF, 6.3V CERAMICS

C

OUT

330μF, 4V SANYO POSCAP

20μs/DIV

4602 G06

4602 G09

4

4602fa

LTM4602

(

)

TYPICAL PERFORMANCE CHARACTERISTICS

Start-Up, No Load, I

V

OUT

0.5V/DIV

I

IN

0.5A/DIV

VIN = 12V

= 1.5V

V

OUT

C

= 1 × 22μF, 6.3V X5R

OUT

330μF, 4V SANYO POSCAP
NO EXTERNAL SOFT-START CAPACITOR

V

OUT

0.5V/DIV

I

0.5A/DIV

= 0A

OUT

200μs/DIV

4602 G10

Short-Circuit Protection,
I

= 6A

IN

VIN = 12V

= 1.5V

V

OUT

= 1 × 22μF, 6.3V X5R

C

OUT

330μF, 4V SANYO POSCAP
NO EXTERNAL SOFT-START CAPACITOR

20μs/DIV

Start-Up, I

Resistive Load

V

OUT

0.5V/DIV

I

IN

0.5A/DIV

VIN = 12V

= 1.5V

V

OUT

= 1 × 22μF, 6.3V X5R

C

OUT

330μF, 4V SANYO POSCAP
NO EXTERNAL SOFT-START CAPACITOR

4602 G13

OUT

= 6A

500μs/DIV

(V)

OUT

V

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

0

(See Figure 21 for all curves)

Short-Circuit Protection,

= 0A

I

V

OUT

0.5V/DIV

I

IN

0.5A/DIV

4602 G11

VIN to V

f

ADJ

SEE FREQUENCY ADJUSTMENT DISCUSSION
FOR 12VIN TO 5V
CONVERSION

Step-Down Ratio

OUT

= OPEN

0.6V

515

OUT

VIN = 12V

= 1.5V

V

OUT

= 1 × 22μF, 6.3V X5R

C

OUT

330μF, 4V SANYO POSCAP
NO EXTERNAL SOFT-START CAPACITOR

5V

3.3V

2.5V

1.8V

1.5V

1.2V

10 20

VIN (V)

AND 5VIN TO 3.3V

OUT

4602 G14

20μs/DIV

4602 G12

4602fa

5

LTM4602

PIN FUNCTIONS

(See Package Description for Pin Assignment)

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between VIN pins
and PGND pins.

f

(Pin A15): A 110k resistor from VIN to this pin sets

ADJ

the one-shot timer current, thereby setting the switching
frequency. The LTM4602 switching frequency is typically
850kHz. An external resistor to ground can be selected to
reduce the one-shot timer current, thus lower the switching
frequency to accommodate a higher duty cycle step down
requirement. See the applications section.

SVIN (Pin A17): Supply Pin for Internal PWM Controller. Leave
this pin open or add additional decoupling capacitance.

EXTVCC (Pin A19): External 5V supply pin for controller. If
left open or grounded, the internal 5V linear regulator will
power the controller and MOSFET drivers. For high input
voltage applications, connecting this pin to an external
5V will reduce the power loss in the power module. The
EXTVCC voltage should never be higher than VIN.

V

(Pin A21): The Negative Input of The Error Amplifi er.

OSET

Internally, this pin is connected to V

with a 100k precision

OUT

resistor. Different output voltages can be programmed with
additional resistors between the V

and SGND pins.

OSET

COMP (Pin B23): Current Control Threshold and Error
Amplifi er Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.8V corresponding to zero
sense voltage (zero current).

TOP VIEW

2

1

V

8

IN

BANK 1

PGND

BANK 2

12

25

32

39

40

50

51

62

61

13 14 15

26 27 28 29 30 31

33 34 35 36 37 38

42 43 44 45 46 47

41

52 53 54 55 56 57 58

63 64 65 66 67 68 69

SGND (Pin D23): Signal Ground Pin. All small-signal
components should connect to this ground, which in turn
connects to PGND at one point.

RUN/SS (Pin F23): Run and Soft-Start Control. Forcing
this pin below 0.8V will shut down the power supply.
Inside the power module, there is a 1000pF capacitor
which provides approximately 0.7ms soft-start time with
200μF output capacitance. Additional soft-start time can
be achieved by adding additional capacitance between the
RUN/SS and SGND pins. The internal short-circuit latchoff
can be disabled by adding a resistor between this pin and
the VIN pin. This pullup resistor must supply a minimum
5μA pull up current.

FCB (Pin G23): Forced Continuous Input. Grounding this
pin enables forced continuous mode operation regardless
of load conditions. Tying this pin above 0.63V enables
discontinuous conduction mode to achieve high effi ciency
operation at light loads. There is an internal 4.75k resistor
between the FCB and SGND pins.

PGOOD (Pin J23): Output Voltage Power Good Indicator.
When the output voltage is within 10% of the nominal
voltage, the PGOOD is open drain output. Otherwise, this
pin is pulled to ground.

PGND (Bank 2): Power ground pins for both input and
output returns.

V

(Bank 3): Power Output Pins. Apply output load

OUT

between these pins and PGND pins. Recommend placing
High Frequency output decoupling capacitance directly
between these pins and PGND pins.

IN

ADJ

f

11109

OSET

EXTVCCV

SV

1918171676543

A

20

B

COMP

C

21

D

SGND

E

22

F

RUN/SS

23

G

FCB

H

24

J

PGOOD

48

59

70

K

49

L

60

M

71

N

6

73

74 75 76 77 78 79 80

72

V

OUT

BANK 3

84 85 86 87 88 89 90 91

83

94

95 96 97 98

35

1 23

24

79

68

99 100 101 102 103

11 13

10 12

14 16

15 17

81

92

19 21

18 20 22

82

P

93

R

104

T

4602 PN01

4602fa

SIMPLIFIED BLOCK DIAGRAM

RUN/SS

LTM4602

SV

IN

R

SET

66.5k

PGOOD

COMP

FCB

f

ADJ

SGND

EXTV

V

OSET

1000pF

1.5μF

Q1

INT

COMP

4.75k

10Ω

CC

CONTROLLER

Q2

15μF

6.3V

PGND

100k

0.5%

4602 F01

C

IN

C

OUT

V

IN

4.5V TO 20V

V

OUT

1.5V
6A MAX

Figure 1. Simplifi ed LTM4602 Block Diagram

DECOUPLING REQUIREMENTS

T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

C

IN

C

OUT

External Input Capacitor Requirement
(V

= 4.5V to 20V, V

IN

OUT

= 1.5V)

External Output Capacitor Requirement
(V

= 4.5V to 20V, V

IN

OUT

= 1.5V)

= 25°C, VIN = 12V. Use Figure 1 confi guration.

A

= 6A 20 μF

I

OUT

= 6A, Refer to Table 2 in the

I

OUT

100 200 μF

Applications Information Section

4602fa

7

LTM4602

OPERATION

μModule Description

The LTM4602 is a standalone nonisolated synchronous
switching DC/DC power supply. It can deliver up to 6A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor from

0.6V
The input voltage range is 4.5V to 20V. A simplifi ed block
diagram is shown in Figure 1 and the typical application
schematic is shown in Figure 21.

The LTM4602 contains an integrated LTC constant on-time
current-mode regulator, ultralow R
switching speed and integrated Schottky diode. The typical
switching frequency is 850kHz at full load. With current
mode control and internal feedback loop compensation,
the LTM4602 module has suffi cient stability margins and
good transient performance under a wide range of operat­ing conditions and with a wide range of output capacitors,
even all ceramic output capacitors (X5R or X7R).

Current mode control provides cycle-by-cycle fast current
limit. In addition, foldback current limiting is provided in
an overcurrent condition while V
LTM4602 has defeatable short-circuit latch off. Internal
overvoltage and undervoltage comparators pull the open­drain PGOOD output low if the output feedback voltage exits
a ±10% window around the regulation point. Furthermore,

to 5.0VDC, not to exceed 80% of the input voltage.

DC

FETs with fast

DS(ON)

drops. Also, the

OSET

in an overvoltage condition, internal top FET Q1 is turned
off and bottom FET Q2 is turned on and held on until the
overvoltage condition clears.

Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both Q1 and Q2. Releasing the
pin allows an internal 1.2μA current source to charge up
the soft-start capacitor. When this voltage reaches 1.5V,
the controller turns on and begins switching.

At low load current the module works in continuous cur­rent mode by default to achieve minimum output voltage
ripple. It can be programmed to operate in discontinuous
current mode for improved light load effi ciency when the
FCB pin is pulled up above 0.8V and no higher than 6V.
The FCB pin has a 4.75k resistor to ground, so a resistor

can set the voltage on the FCB pin.

to V

IN

When EXTV
linear regulator powers the controller and MOSFET gate
drivers. If a minimum 4.7V external bias supply is ap­plied on the EXTV
off, and an internal switch connects EXTV
driver voltage. This eliminates the linear regulator power
loss with high input voltage, reducing the thermal stress
on the controller. The maximum voltage on EXTV
6V. The EXTV

voltage. Also EXTVCC must be sequenced after VIN.

V

IN

pin is grounded or open, an integrated 5V

CC

pin, the internal regulator is turned

CC

to the gate

CC

pin is

CC

voltage should never be higher than the

CC

8

4602fa

APPLICATIONS INFORMATION

LTM4602

The typical LTM4602 application circuit is shown in Fig­ure 21. External component selection is primarily deter­mined by the maximum load current and output voltage.

Output Voltage Programming and Margining

The PWM controller of the LTM4602 has an internal

0.6V reference voltage. As shown in the block diagram,
a 100k/0.5% internal feedback resistor connects V
and V

pins. Adding a resistor R

OSET

SET

from V

OSET

OUT

pin to

SGND pin programs the output voltage:

V

= 0.6V •

OUT

Table 1 shows the standard values of 1% R

100k + R

SET

R

SET

resistor

SET

for typical output voltages:

Table 1

R

SET

Open 100 66.5 49.9 43.2 31.6 22.1 13.7

(kΩ)

V

OUT

0.6 1.2 1.5 1.8 2 2.5 3.3 5

(V)

Voltage margining is the dynamic adjustment of the output
voltage to its worst case operating range in production
testing to stress the load circuitry, verify control/protec­tion functionality of the board and improve the system
reliability. Figure 2 shows how to implement margining
function with the LTM4602. In addition to the feedback
resistor R
Turn off both transistor Q
margining. When Q

, several external components are added.

SET

UP

is on and Q

UP

and Q

DOWN

to disable the

DOWN

is off, the output
voltage is margined up. The output voltage is margined
down when Q

LTM4602

PGND SGND

Figure 2. LTM4602 Margining Implementation

is on and Q

DOWN

100k

V

OUT

V

OSET

is off. If the output

UP

R

DOWN

Q

DOWN

2N7002

R

SET

R

UP

2N7002

Q

4602 F02

UP

voltage V
the resistor values of R

needs to be margined up/down by ±M%,

OUT

and R

UP

can be calculated

DOWN

from the following equations:

(R

SETRUP

(R

R

SET•VOUT

R

SET

)•V

OUT

SETRUP

)+ 100k

•(1– M%)

+ (100k R

•(1+ M%)

)

DOWN

= 0.6V

= 0.6V

Input Capacitors

The LTM4602 μModule should be connected to a low
AC-impedance DC source. High frequency, low ESR input
capacitors are required to be placed adjacent to the mod­ule. In Figure 21, the bulk input capacitor C

is selected

IN

for its ability to handle the large RMS current into the
converter. For a buck converter, the switching duty cycle
can be estimated as:

V

OUT

D=

V

IN

Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:

I

OUT(MAX)

=

%

•D•(1 D)

I

CIN(R M S)

In the above equation, η% is the estimated effi ciency of
the power module. C1 can be a switcher-rated electrolytic
aluminum capacitor, OS-CON capacitor or high volume
ceramic capacitors. Note the capacitor ripple current
ratings are often based on only 2000 hours of life. This
makes it advisable to properly derate the input capacitor,
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.

In Figure 21, the input capacitors are used as high frequency
input decoupling capacitors. In a typical 6A output applica­tion, 1-2 pieces of very low ESR X5R or X7R, 10μF ceramic
capacitors are recommended. This decoupling capacitor
should be placed directly adjacent the module input pins
in the PCB layout to minimize the trace inductance and
high frequency AC noise.

4602fa

9

LTM4602

APPLICATIONS INFORMATION

Output Capacitors

The LTM4602 is designed for low output voltage ripple. The
bulk output capacitors C

is chosen with low enough

OUT

effective series resistance (ESR) to meet the output voltage
ripple and transient requirements. C

can be low ESR

OUT

tantalum capacitor, low ESR polymer capacitor or ceramic
capacitor (X5R or X7R). The typical capacitance is 200μF
if all ceramic output capacitors are used. The internally
optimized loop compensation provides suffi cient stability
margin for all ceramic capacitors applications. Additional
output fi ltering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spike is required. Refer to Table 2 for an output capaci­tance matrix for each output voltage droop, peak to peak
deviation and recovery time during a 3A/μs transient with
a specifi c output capacitance.

Fault Conditions: Current Limit and Overcurrent
Foldback

The LTM4602 has a current mode controller, which inher­ently limits the cycle-by-cycle inductor current not only in
steady-state operation, but also in transient.

To further limit current in the event of an over load condi­tion, the LTM4602 provides foldback current limiting. If the
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.

Soft-Start and Latchoff with the RUN/SS pin

The RUN/SS pin provides a means to shut down the
LTM4602 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTM4602 into a low quiescent current shutdown (I

Q

≤
100μA). Releasing the pin allows an internal 1.2μA cur­rent source to charge up the timing capacitor C

. Inside

SS

LTM4602, there is an internal 1000pF capacitor from RUN/
SS pin to ground. If RUN/SS pin has an external capacitor
C

to ground, the delay before starting is about:

SS_EXT

t

DELAY

=

1.2μA

1.5V

•(C

SS_EXT

+ 1000pF)

When the voltage on RUN/SS pin reaches 1.5V, the LTM4602
internal switches are operating with a clamping of the
maximum output inductor current limited by the RUN/SS
pin total soft-start capacitance. As the RUN/SS pin voltage
rises to 3V, the soft-start clamping of the inductor current
is released.

to V

V

IN

There are restrictions in the maximum V

Step-Down Ratios

OUT

IN

to V

OUT

step
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristics curves labeled “V

IN

to V

Step-Down

OUT

Ratio”. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
sections of this data sheet.

10

4602fa

LTM4602

APPLICATIONS INFORMATION

Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 21), 0A to 3A Step (Typical Values)

TYPICAL MEASURED VALUES
C

VENDORS PART NUMBER C

OUT1

TDK C4532X5R0J107MZ (100μF,6.3V) SANYO POSCAP 6TPE330MIL (330μF, 6.3V)
TAIYO YUDEN JMK432BJ107MU-T ( 100μF, 6.3V) SANYO POSCAP 2R5TPE470M9 (470μF, 2.5V)
TAIYO YUDEN JMK316BJ226ML-T501 ( 22μF, 6.3V) SANYO POSCAP 4TPE470MCL (470μF, 4V)

VENDORS PART NUMBER

OUT2

V

OUT

(V)

1.2 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 5 50 60 25 3

1.2 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 5 30 60 20 3

1.2 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 5 25 54 20 3

1.2 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 5 25 55 20 3

1.2 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 12 30 60 25 3

1.2 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 12 25 54 20 3

1.2 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 12 25 50 20 3

1.2 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 12 25 55 20 3

1.5 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 5 25 50 25 3

1.5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 5 25 54 20 3

1.5 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 5 28 59 20 3

1.5 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 5 26 59 20 3

1.5 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 12 25 55 25 3

1.5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 12 25 54 20 3

1.5 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 12 28 59 20 3

1.5 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 12 26 59 20 3

1.8 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 5 25 54 30 3

1.8 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 5 25 50 20 3

1.8 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 5 25 50 20 3

1.8 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 5 29 60 20 3

1.8 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 100pF 12 25 50 30 3

1.8 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 2.5V NONE 100pF 12 25 50 20 3

1.8 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 100pF 12 25 50 20 3

1.8 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 100pF 12 29 60 20 3

2.5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 4V NONE 220pF 5 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 220pF 5 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 220pF 5 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 220pF 5 25 50 25 3

2.5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 4V NONE 220pF 12 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 220pF 12 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 220pF 12 25 50 30 3

2.5 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 220pF 12 27 54 25 3

3.3 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 220pF 7 32 64 30 3

3.3 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 4V NONE 220pF 7 30 60 30 3

3.3 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 220pF 7 30 60 35 3

3.3 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 220pF 7 32 64 25 3

3.3 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V 470μF 4V NONE 220pF 12 38 58 30 3

3.3 2 × 10μF 25V 150μF 35V 3 × 22μF 6.3V 470μF 4V NONE 220pF 12 30 60 35 3

3.3 2 × 10μF 25V 150μF 35V 2 × 100μF 6.3V 330μF 6.3V NONE 220pF 12 30 60 30 3

3.3 2 × 10μF 25V 150μF 35V 4 × 100μF 6.3V NONE NONE 220pF 12 32 64 25 3
5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V NONE NONE 100pF 15 80 160 25 3
5 2 × 10μF 25V 150μF 35V 1 × 100μF 6.3V NONE NONE 100pF 20 80 160 25 3

C

IN

(CERAMIC)

C

IN

(BULK)

C

OUT1

(CERAMIC)

C

OUT2

(BULK)

C

COMP

C3 V

(V)

DROOP

IN

(mV)

PEAK TO PEAK

(mV)

RECOVERY TIME

(μs)

LOAD STEP

(A/μs)

4602fa

11

LTM4602

APPLICATIONS INFORMATION

After the controller has been started and given adequate
time to charge up the output capacitor, C

is used as a

SS

short-circuit timer. After the RUN/SS pin charges above 4V,
if the output voltage falls below 75% of its regulated value,
then a short-circuit fault is assumed. A 1.8μA current then
begins discharging C

. If the fault condition persists until

SS

the RUN/SS pin drops to 3.5V, then the controller turns
off both power MOSFETs, shutting down the converter
permanently. The RUN/SS pin must be actively pulled
down to ground in order to restart operation.

The overcurrent protection timer requires the soft-start
timing capacitor C
that the output regulation by the time C

be made large enough to guarantee

SS

has reached the

SS

4V threshold. In general, this will depend upon the size of
the output capacitance, output voltage and load current
characteristic. A minimum external soft-start capacitor
can be estimated from:

C

SS_EXT

+ 1000pF > C

OUT•VOUT

(10–3[F / VS])

Generally 0.1μF is more than suffi cient.

4V maximum latchoff threshold and overcome the 4μA
maximum discharge current. Figure 3 shows a conceptual
drawing of V

3V

1.5V

SOFT-START

OF I

SWITCHING

STARTS

Figure 3. RUN/SS Pin Voltage During Startup and
Short-Circuit Protection

during start-up and short circuit.

RUN

V

RUN/SS

4V

SHORT-CIRCUIT
LATCH ARMED

CLAMPING

RELEASED

L

V

OUTPUT

OVERLOAD

HAPPENS

OUT

SHORT-CIRCUIT

LATCHOFF

75%V

O

3.5V

t

t

4602 F03

Since the load current is already limited by the current mode
control and current foldback circuitry during a short circuit,
overcurrent latchoff operation is NOT always needed or
desired, especially if the output has large capacitance or
the load draws high current during start up. The latchoff
feature can be overridden by a pull-up current greater than
5μA but less than 80μA to the RUN/SS pin. The additional
current prevents the discharge of C

during a fault and

SS

also shortens the soft-start period. Using a resistor from
RUN/SS pin to V

is a simple solution to defeat latchoff. Any

IN

pull-up network must be able to maintain RUN/SS above

V

IN

R

RUN/SS

RECOMMENDED VALUES FOR R

V

IN

RUN/SS

PGND SGND

V

IN

4.5V TO 5.5V

10.8V TO 13.8V
16V TO 20V

LTM4602

R

RUN/SS

50k
150k
330k

RUN/SS

4602 F04

Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up
Resistor to V

IN

12

4602fa

APPLICATIONS INFORMATION

LTM4602

Enable

The RUN/SS pin can be driven from logic as shown in
Figure 5. This function allows the LTM4602 to be turned
on or off remotely. The ON signal can also control the
sequence of the output voltage.

RUN/SS

ON

2N7002

LTM4602

PGND

SGND

4602 F05

Figure 5. Enable Circuit with External Logic

Output Voltage Tracking

For the applications that require output voltage tracking,
several LTM4602 modules can be programmed by the
power supply tracking controller such as the LTC2923.
Figure 6 shows a typical schematic with LTC2923. Coin­cident, ratiometric and offset tracking for V

rising and

OUT

falling can be implemented with different sets of resistor
values. See the LTC2923 data sheet for more details.

V

GATE

CC

ON

LTC2923

RAMPBUF

TRACK1

TRACK2

Q1

GND

RAMP

FB1

STATUS

SDO

FB2

3.3V

R

SET

49.9k

R

SET

66.5k

4602 F06

LTM4602

V

OSET

LTM4602

V

OSET

V

IN

V

IN

V

1.8V

OUT

V

IN

V

IN

V

1.5V

OUT

V

IN

DC/DC

5V

R

ONB

R

ONA

R

TB1

R

TA1

TB2

R

TA2

R

Figure 6. Output Voltage Tracking with the LTC2923 Controller

EXTV

Connection

CC

An internal low dropout regulator produces an internal 5V
supply that powers the control circuitry and FET drivers.
Therefore, if the system does not have a 5V power rail,
the LTM4602 can be directly powered by V

. The gate

IN

driver current through LDO is about 18mA. The internal
LDO power dissipation can be calculated as:

P

LDO_LOSS

= 18mA • (VIN – 5V)

The LTM4602 also provides an external gate driver volt­age pin EXTV
recommended to connect EXTV
rail. Whenever the EXTV

. If there is a 5V rail in the system, it is

CC

pin to the external 5V

CC

pin is above 4.7V, the inter-

CC

nal 5V LDO is shut off and an internal 50mA P-channel
switch connects the EXTV
supplied from EXTV

CC

not apply more than 6V to the EXTV
EXTV

< VIN. The following list summaries the possible

CC

connections for EXTV

1. EXTV

grounded. Internal 5V LDO is always powered

CC

to internal 5V. Internal 5V is

CC

until this pin drops below 4.5V. Do

pin and ensure that

CC

:

CC

from the internal 5V regulator.

2. EXTV

connected to an external supply. Internal LDO

CC

is shut off. A high effi ciency supply compatible with the
MOSFET gate drive requirements (typically 5V) can im­prove overall effi ciency. With this connection, it is always
required that the EXTV

pin voltage.

V

IN

voltage can not be higher than

CC

Discontinuous Operation and FCB Pin

The FCB pin determines whether the internal bottom
MOSFET remains on when the inductor current reverses.
There is an internal 4.75k pull-down resistor connecting
this pin to ground. The default light load operation mode
is forced continuous (PWM) current mode. This mode
provides minimum output voltage ripple.

In the application where the light load effi ciency is im­portant, tying the FCB pin above 0.6V threshold enables
discontinuous operation where the bottom MOSFET turns
off when inductor current reverses. Therefore, the conduc-

4602fa

13

LTM4602

APPLICATIONS INFORMATION

tion loss is minimized and light load effi ciency is improved.
The penalty is that the controller may skip cycle and the
output voltage ripple increases at light load.

Paralleling Operation with Load Sharing

Two or more LTM4602 modules can be paralleled to provide
higher than 6A output current. Figure 7 shows the neces­sary interconnection between two paralleled modules. The

®

OPTI-LOOP

current mode control ensures good current
sharing among modules to balance the thermal stress.
The new feedback equation for two or more LTM4602s
in parallel is:

100k

+ R

V

OUT

= 0.6V •

N

SET

R

SET

where N is the number of LTM4602s in parallel.

Thermal Considerations and Output Current Derating

The power loss curves in Figures 8 and 13 can be used
in coordination with the load current derating curves
in Figures 9 to 12, and Figures 14 to 15 for calculating

approximate θJA for the module with various heat

an

sinking methods. Thermal models are derived from
several temperature measurements at the bench,
and thermal modeling analysis. Application Note 103
provides a detailed explanation of the analysis for the
thermal models, and the derating curves. Tables 3
and 4 provide a summary of the equivalent θ
noted conditions. These equivalent θ

parameters are

JA

for the

JA

correlated to the measured values, and improve with
air-fl ow. The case temperature is maintained at 100°C
or below for the derating curves. This allows for 4W
maximum power dissipation in the total module with
top and bottom heat sinking, and 2W power dissipation
through the top of the module with an approximate

between 6°C/W to 9°C/W. This equates to a total

θ

JC

of 124°C at the junction of the device. The θ

values

JA

in Tables 3 and 4 can be used to derive the derating
curves for other output voltages.

Safety Considerations

The LTM4602 modules do not provide isolation from V

. There is no internal fuse. If required, a slow blow fuse

V

OUT

IN

to

with a rating twice the maximum input current should be
provided to protect each unit from catastrophic failure.

OPTI-LOOP is a registered trademark of Linear Technology Corporation.

V

PULLUP

100k

PGOOD

V

IN

Figure 7. Parallel Two μModules with Load Sharing

V

LTM4602

IN

PGND SGNDCOMP V

PGOOD

V

LTM4602

IN

PGND

OSET

OSET

V

OUT

R

SET

SGNDCOMP V

V

OUT

4602 F07

V

OUT

12A MAX

4602fa

14

APPLICATIONS INFORMATION

LTM4602

2.0

1.8

1.6

1.4

1.2

1.0

0.8

POWER LOSS (W)

0.6

0.4

0.2

0

0.6

1.0

12V TO 1.5V

LOSS

2.1
CURRENT (A)

5V TO 1.5V
LOSS

3.1 4.1

5.1

6.1

4602 F08

Figure 8. 1.5V Power Loss vs Load Current

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

0LFM
200LFM
400LFM

90

4602 F11

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

Figure 9. 5V to 1.5V, No Heat Sink

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

0LFM
200LFM
400LFM

90

0LFM
200LFM
400LFM

90

4602 F09

4602 F09

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

90

Figure 10. 5V to 1.5V, BGA Heat Sink

4.0

3.5

3.0

2.5

2.0

1.5

POWER LOSS (W)

1.0

0.5

5V TO 3.3V LOSS
12V TO 3.3V LOSS
12V TO 3.3V (950kHz) LOSS

0

1.0 2.1 4.1

0.5

3.1

CURRENT (A)

0LFM
200LFM
400LFM

4602 F10

5.1

4601 F13

6.1

Figure 11. 12V to 1.5V, No Heat Sink Figure 12. 12v to 1.5V, BGA Heat Sink Figure 13. 3.3V Power Loss

vs Load Current

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

Figure 14. 5V to 3.3V, No Heat Sink

0LFM
200LFM
400LFM

90

4602 F14

7

6

5

4

3

CURRENT (A)

2

1

0

60 70 80 100

50

TEMPERATURE (°C)

Figure 15. 5V to 3.3V, BGA Heat Sink

0LFM
200LFM
400LFM

90

4602 F15

15

4602fa

LTM4602

APPLICATIONS INFORMATION

7

7

6

5

4

3

CURRENT (A)

2

0LFM

1

200LFM
400LFM

0

60 70 80 100

50

TEMPERATURE (°C)

Figure 16. 12V to 3.3V, No Heat Sink

Table 3. 1.5V Output

AIR FLOW (LFM) HEAT SINK θ

0 None 15.2

200 None 14

400 None 12

0 BGA Heat Sink 13.9

200 BGA Heat Sink 11.3

400 BGA Heat Sink 10.25

6

5

4

3

CURRENT (A)

2

0LFM

1

200LFM
400LFM

90

4602 F16

0

60 70 80 100

50

TEMPERATURE (°C)

90

4602 F16

Figure 17. 12V to 3.3V, BGA Heat Sink

Table 4. 3.3V Output

(°C/W)

JA

AIR FLOW (LFM) HEAT SINK θ

0 None 15.2

200 None 14.6

400 None 13.4

0 BGA Heat Sink 13.9

200 BGA Heat Sink 11.1

400 BGA Heat Sink 10.5

(°C/W)

JA

Layout Checklist/Example

The high integration of the LTM4602 makes the PCB board
layout very simple and easy. However, to optimize its electri­cal and thermal performance, some layout considerations
are still necessary.

• Use large PCB copper areas for high current path,
including V

, PGND and V

IN

. It helps to minimize the

OUT

PCB conduction loss and thermal stress.

• Place high frequency ceramic input and output capaci­tors next to the V

, PGND and V

IN

pins to minimize

OUT

high frequency noise.

• Place a dedicated power ground layer underneath
the unit.

• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.

• Do not put vias directly on pads unless they are capped.

• Use a separated SGND ground copper area for com­ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.

Figure 18 gives a good example of the recommended
layout.

LTM4602 Frequency Adjustment

The LTM4602 is designed to typically operate at 850kHz
across most input and output conditions. The control ar­chitecture is constant on time valley mode current control.
The f

pin is typically left open or decoupled with an

ADJ

optional 1000pF capacitor. The switching frequency has
been optimized to maintain constant output ripple over the
operating conditions. The equations for setting the operat­ing frequency are set around a programmable constant on
time. This on time is developed by a programmable current
into an on board 10pF capacitor that establishes a ramp
that is compared to a voltage threshold equal to the output
voltage up to a 2.4V clamp. This I

= (VIN – 0.7V)/110k, with the 110k onboard resistor

I

ON

current is equal to:

ON

4602fa

16

APPLICATIONS INFORMATION

LTM4602

V

IN

C

IN

PGND

V

OUT

LOAD

TOP LAYER

Figure 18. Recommended PCB Layout

from VIN to f

• 10pF and t
= DC/t

. The ION current is proportional to VIN, and the

ON

. The on time is equal to tON = (V

ADJ

= ts – tON. The frequency is equal to: Freq.

OFF

regulator duty cycle is inversely proportional to V

4600 F16

OUT/ION

, there-

IN

)

fore the step-down regulator will remain relatively constant
frequency as the duty cycle adjustment takes place with
lowering V

. The on time is proportional to V

IN

OUT

up to a

2.4V clamp. This will hold frequency relatively constant
with different output voltages up to 2.4V. The regulator
switching period is comprised of the on time and off time
as depicted in Figure 19.

t

(DC) DUTY CYCLE =

t

OFF

PERIOD t

Figure 19. LTM4602 Switching Period

ON

t

s

t

ON

s

t

DC = =

FREQ =

4602 F19

V

ON

OUT

t

V

s

IN

DC
t

ON

The LTM4602 has a minimum (tON) on time of 100 nanosec­onds and a minimum (t

) off time of 400 nanoseconds.

OFF

The 2.4V clamp on the ramp threshold as a function of

will cause the switching frequency to increase by the

V

OUT

ratio of V
the fact the on time will not increase as V

/2.4V for 3.3V and 5V outputs. This is due to

OUT

increases

OUT

past 2.4V. Therefore, if the nominal switching frequency
is 850kHz, then the switching frequency will increase

to ~1.2MHz for 3.3V, and ~1.7MHz for 5V outputs due
to Frequency = (DC/t
increases to 1.2MHz, then the time period t

) When the switching frequency

ON

is reduced

S

to ~833 nanoseconds and at 1.7MHz the switching period
reduces to ~588 nanoseconds. When higher duty cycle
conversions like 5V to 3.3V and 12V to 5V need to be
accommodated, then the switching frequency can be
lowered to alleviate the violation of the 400ns minimum
off time. Since the total switching period is t

will be below the 400ns minimum off time. A resistor

t

OFF

from the f

pin to ground can shunt current away from

ADJ

= tON + t

S

OFF

,

the on time generator, thus allowing for a longer on time
and a lower switching frequency. 12V to 5V and 5V to

3.3V derivations are explained in the data sheet to lower

switching frequency and accommodate these step-down
conversions.

Equations for setting frequency for 12V to 5V:

= (VIN – 0.7V)/110k; ION = 103μA

I

ON

frequency = (I

DC = duty cycle, duty cycle is (V

= tON + t

t

S

switching period; t

must be greater than 400ns, or tS – tON > 400ns.

t

OFF

= DC • t

t

ON

/[2.4V • 10pF]) • DC = 1.79MHz;

ON

)

= off-time of the

, tON = on-time, t

OFF

= 1/frequency

S

S

OUT/VIN

OFF

1MHz frequency or 1μs period is chosen for 12V to 5V.

= 0.41 • 1μs ≅ 410ns

t

ON

= 1μs – 410ns ≅ 590ns

t

OFF

t

ON

and t

are above the minimums with adequate guard

OFF

band.

Using the frequency = (I

= (1MHz • 2.4V • 10pF) • (1/0.41) ≅ 58μA. ION current

I

ON

/[2.4V • 10pF]) • DC, solve for

ON

calculated from 12V input was 103μA, so a resistor from

to ground = (0.7V/15k) = 46μA. 103μA – 46μA =

f

ADJ

57μA, sets the adequate I

current for proper frequency

ON

range for the higher duty cycle conversion of 12V to
5V. Input voltage range is limited to 9V to 16V. Higher
input voltages can be used without the 15k on f

ADJ

. The
inductor ripple current gets too high above 16V, and the
400ns minimum off-time is limited below 9V.

4602fa

17

LTM4602

APPLICATIONS INFORMATION

Equations for setting frequency for 5V to 3.3V:

= (VIN – 0.7V)/110k; ION = 39μA

I

ON

frequency = (I

DC = duty cycle, duty cycle is (V

= tON + t

t

S

switching period; t

must be greater than 400ns, or tS – tON > 400ns.

t

OFF

= DC • t

t

ON

/[2.4V • 10pF]) • DC = 1.07MHz;

ON

)

= off-time of the

, tON = on-time, t

OFF

= 1/frequency

S

S

OUT/VIN

OFF

~450kHz frequency or 2.22μs period is chosen for 5V to

3.3V. Frequency range is about 450kHz to 650kHz from

4.5V to 7V input.

= 0.66 • 2.22μs ≅ 1.46μs

t

ON

= 2.22μs – 1.46μs ≅ 760ns

t

OFF

t

ON

and t

are above the minimums with adequate guard

OFF

band.

Using the frequency = (I

= (450kHz • 2.4V • 10pF) • (1/0.66) ≅ 16μA. ION current

I

ON

calculated from 5V input was 39μA, so a resistor from f

/[2.4V • 10pF]) • DC, solve for

ON

ADJ

to ground = (0.7V/30.1k) = 23μA. 39μA – 23μA = 16μA,
sets the adequate I

current for proper frequency range

ON

for the higher duty cycle conversion of 5V to 3.3V. Input
voltage range is limited to 4.5V to 7V. Higher input voltages
can be used without the 30.1k on f

. The inductor ripple

ADJ

current gets too high above 7V, and the 400ns minimum
off-time is limited below 4.5V.

In 12V to 3.3V applications, if a 35k resistor is added from
the f

pin to ground, then a 2% effi ciency gain will be

ADJ

achieved as shown in the 12V effi ciency graph in the Typi­cal Performance Characteristics. This is due to the lower
transition losses in the power MOSFETs after lowering the
switching frequency down from 1.3MHz to 950kHz.

18

4602fa

APPLICATIONS INFORMATION

LTM4602

5V to 3.3V at 5A

V

IN

4.5V TO 7V

C3
10μF
25V

C1
10μF
25V

V

IN

7V TO 20V

C1
10μF
25V

C3
10μF
25V

RUN/SOFT-START

5V TO 3.3V AT 5A WITH f

RUN/SOFT-START

R1

30.1k

C5

f

V

IN

ADJ

EXTV

CC

FCB

LTM4602

RUN/SS

COMP

= 30.1k C1, C3: TDK C3216X5R1E106MT

ADJ

V

OUT

V

OSET

SV

IN

PGOOD

PGNDSGND

4602 F20a

C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POSCAP, 6TPE330MIL

100pF

OPEN DRAIN

12V to 5V at 5A

R1

15k

C5
100pF

OPEN DRAIN

EXTV

FCB

RUN/SS

COMP

CC

V

IN

LTM4602

f

ADJ

V

OUT

V

OSET

SV

IN

PGOOD

PGNDSGND

4602 F20b

V

OUT

3.3V AT 5A

R

SET

22.1k
1%

V

OUT

5V AT 5A

R

SET

13.7k
1%

EFFICIENCY = 94%
AT 5A LOAD

+

C2
22μF

C2
22μF

C4
330μF

6.3V

EFFICIENCY = 92.5%
AT 5A LOAD

+

C4
330μF

6.3V

Figure 20. VIN to V

V

IN

5V TO 20V

GND

V

OUT

R

SET

66.5k

REFER TO

TABLE 1

Figure 21. Typical Application, 5V to 20V Input, 0.6V to 5V Output, 6A Max

7V TO 20V AT 5A WITH f

C

+

IN

150μF
BULK

C3

100pF

C4
OPT

= 15k C1, C3: TDK C3216X5R1E106MT

ADJ

Step-Down Ratio for 12VIN to 5V

OUT

C

IN

10μF
×2
CER

EXTV

SV

f

ADJ

V

COMP

FCB

PGOOD

SGND

(MULTIPLE PINS)

CC

IN

OSET

(MULTIPLE PINS)

C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POSCAP, 6TPE330MIL

V

IN

V

(MULTIPLE PINS)

LTM4602

PGND

OUT

RUN/SS

and 5VIN to 3.3V

OUT

C

+

OUT1

REFER TO
TABLE 2

4602 F21

OUT

V

OUT

6A

C

OUT2

REFER TO
TABLE 2

0.6V TO 5V

REFER TO STEP-DOWN
RATIO GRAPH

GND

4602fa

19

LTM4602

TYPICAL APPLICATION

4.5V TO 20V

C7
10μF
25V

RUN/SOFT-START

Parallel Operation and Load Sharing

V

IN

EXTV

FCB

RUN

COMP

V

CC

IN

LTM4602

f

ADJ

V

OUT

V

OSET

SV

IN

PGOOD

PGNDSGND

V

= 0.6V • ([100k/N] + R

OUT

WHERE N = 2

R

SET

15.8k
1%

C9
22μF

SET

)/R

SET

+

C10
330μF
4V

V

OUT

2.5V
12A

C1
10μF
25V

EXTV

FCB

RUN

COMP

V

CC

IN

LTM4602

f

ADJ

V

PGOOD

PGNDSGND

Current Sharing Between Two

LTM4602 Modules

6

12V

IN

2.5V

OUT

12A

MAX

4

I

OUT2

2

INDIVIDUAL SHARE

V

OUT

OSET

SV

4602 TA02

I

OUT1

C4
220pF

+

C2
22μF

IN

C1, C7: TDK C3216X5R1E106MT
C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501
C5, C10: SANYO POSCAP, 4TPE330MI

R1

100k

C5
330μF
4V

20

0

0

6

TOTAL LOAD

12

4602 TA03

4602fa

PACKAGE DESCRIPTION

LTM4602

aaa Z

LGA Package

104-Lead (15mm × 15mm)

(Reference LTM DWG # 05-05-1800)

6.9865

4.4442

1.9042

0.0000

1.9058

4.4458

5.7142

3.1742

0.6342

0.6358

3.1758

5.7158

6.9421

20

19

1817

16

7

6

5

4

3

2

1

21

11

10

9

5.7650

8

Y

X

15

BSC

aaa Z

2.72 – 2.92

22

13 14 15

4.4950

12

23

25

PAD 1

28 29 30 31

27

26

2.3600

CORNER

4

24

38

37

36

35

33 34

32

1.0900

15

BSC

TOP VIEW

0.15

0.10

0.15

TOLERANCE

DETAIL B

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994

0.27 – 0.37

SUBSTRATE

CAP

MOLD

82

71

60

49

81

70

59

48

58

47

68 69

57

46

78 79 80

67

56

45

77

66

55

44

65

54

64

53

42 43

74 75 76

63

52

41

40

51

62

73

39

50

61

72

Z

DETAIL B

bbb Z

2.45 – 2.55

93

92

89 90 91

88

84 85 86 87

83

6.3500

104

99 100 101 102 103

95 96 97 98

94

3.8100

1.2700

0.3175

0.3175

1.2700

3.8100

6.3500

5.0800

2.5400

0.0000

2.5400

SUGGESTED SOLDER PAD LAYOUT

5.0800

PADS

SEE NOTES

BSC

12.70

TOP VIEW

3

T

104

99 100 101 102 103

95 96 97 98

94

DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,

BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.

THE PAD #1 IDENTIFIER IS A MARKED FEATURE OR A

NOTCHED BEVELED PAD

4

3

2. ALL DIMENSIONS ARE IN MILLIMETERS

LAND DESIGNATION PER JESD MO-222, SPP-010

P

R

93

82

92

81

74 75 76 77 78 79 80

73

84 85 86 87 88 89 90 91

72

83

5. PRIMARY DATUM -Z- IS SEATING PLANE

L

M

N

71

60

49

70

59

48

42 43 44 45 46 47

63 64 65 66 67 68 69

52 53 54 55 56 57 58

41

40

51

62

39

50

61

aaa

eee

bbb

SYMBOL

6. THE TOTAL NUMBER OF PADS: 104

K

33 34 35 36 37 38

FGH

J

24

23

22

21

13 14 15

26 27 28 29 30 31

32

8

12

25

YXeee

M

LGA104 0206

ABCDE

20

23

1918171676543

19 21

18 20 22

15 17

11109

1

2

14 16

BSC

13.93

11 13

10 12

79

68

35

24

1

BOTTOM VIEW

6.9888

6.5475

5.2775

4.0075

2.7375

1.4675

0.3175

0.0000

0.3175

1.2700

2.5400

4.4450

5.7150

6.9850

0.11 – 0.27

13.97

BSC

PAD 1

C(0.30)

4602fa

21

LTM4602

PACKAGE DESCRIPTION

PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME

A1 - B1 V
A2 - B2 - C2 - D2 - E2 - F2 - G2 - H2 ­A3 V

B3 - C3 - D3 - E3 - F3 - G3 - H3 -

IN

A4 - B4 - C4 - D4 - E4 - F4 - G4 - H4 ­A5 V

B5 - C5 - D5 - E5 - F5 - G5 - H5 -

IN

A6 - B6 - C6 - D6 - E6 - F6 - G6 - H6 ­A7 V

B7 - C7 - D7 - E7 - F7 - G7 - H7 PGND

IN

A8 - B8 - C8 - D8 - E8 - F8 - G8 - H8 ­A9 V

B9 - C9 - D9 - E9 - F9 - G9 - H9 PGND

IN

A10 - B10 - C10 V
A11 V

B11 - C11 - D11 - E11 - F11 - G11 - H11 PGND

IN

A12 - B12 - C12 V
A13 V

B13 - C13 - D13 - E13 - F13 - G13 - H13 PGND

IN

A14 - B14 - C14 V
A15 f

ADJ

B15 - C15 - D15 - E15 - F15 - G15 - H15 PGND
A16 - B16 - C16 - D16 - E16 - F16 - G16 - H16 ­A17 SV

B17 - C17 - D17 - E17 - F17 - G17 - H17 PGND

IN

A18 - B18 - C18 - D18 - E18 - F18 - G18 - H18 ­A19 EXTVCCB19 - C19 - D19 - E19 - F19 - G19 - H19 ­A20 - B20 - C20 - D20 - E20 - F20 - G20 - H20 ­A21 V

B21 - C21 - D21 - E21 - F21 - G21 - H21 -

OSET

A22 - B22 - C22 - D22 - E22 - F22 - G22 - H22 ­A23 - B23 COMP C23 - D23 SGND E23 - F23 RUN/SS G23 FCB H23 -

C1 - D1 V

IN

Pin Assignment Tables

(Arranged by Pin Number)

IN

D10 - E10 V

IN

D12 - E12 V

IN

D14 - E14 V

IN

E1 - F1 V

F10 - G10 - H10 -

IN

F12 - G12 - H12 -

IN

F14 - G14 - H14 -

IN

G1 PGND H1 -

IN

PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME

J1 PGND K1 - L1 - M1 - N1 - P1 - R1 - T1 ­J2 - K2 - L2 PGND M2 PGND N2 PGND P2 V

OUT

R2 V

OUT

T2 V
J3 - K3 - L3 - M3 - N3 - P3 - R3 - T3 ­J4 - K4 - L4 PGND M4 PGND N4 PGND P4 V

OUT

R4 V

OUT

T4 V
J5 - K5 - L5 - M5 - N5 - P5 - R5 - T5 ­J6 - K6 - L6 PGND M6 PGND N6 PGND P6 V

OUT

R6 V

OUT

T6 V
J7 - K7 PGND L7 - M7 - N7 - P7 - R7 - T7 ­J8 - K8 L8 PGND M8 PGND N8 PGND P8 V

OUT

R8 V

OUT

T8 V
J9 - K9 PGND L9 - M9 - N9 - P9 - R9 - T9 ­J10 - K10 L10 PGND M10 PGND N10 PGND P10 V

OUT

R10 V

OUT

T10 V
J11 - K11 PGND L11 - M11 - N11 - P11 - R11 - T11 ­J12 - K12 - L12 PGND M12 PGND N12 PGND P12 V

OUT

R12 V

OUT

T12 V
J13 - K13 PGND L13 - M13 - N13 - P13 - R13 - T13 ­J14 - K14 - L14 PGND M14 PGND N14 PGND P14 V

OUT

R14 V

OUT

T14 V
J15 - K15 PGND L15 - M15 - N15 - P15 - R15 - T15 ­J16 - K16 - L16 PGND M16 PGND N16 PGND P16 V

OUT

R16 V

OUT

T16 V
J17 - K17 PGND L17 - M17 - N17 - P17 - R17 - T17 ­J18 - K18 - L18 PGND M18 PGND N18 PGND P18 V

OUT

R18 V

OUT

T18 V
J19 - K19 - L19 - M19 - N19 - P19 - R19 - T19 ­J20 - K20 - L20 PGND M20 PGND N20 PGND P20 V

OUT

R20 V

OUT

T20 V
J21 - K21 - L21 - M21 - N21 - P21 - R21 - T21 ­J22 - K22 - L22 PGND M22 PGND N22 PGND P22 V

OUT

R22 V

OUT

T22 V
J23 PGOOD K23 - L23 - M23 - N23 - P23 - R23 - T23 -

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

22

4602fa

PACKAGE DESCRIPTION

LTM4602

Pin Assignment Tables

(Arranged by Pin Number)

PIN NAME

G1 PGND

H7
H9
H11
H13
H15
H17

PGND
PGND
PGND
PGND
PGND
PGND

J1 PGND

K7
K9
K11
K13
K15
K17

L2
L4
L6
L8
L10
L12
L14
L16
L18
L20
L22

M2
M4
M6
M8
M10
M12
M14
M16
M18
M20
M22

N2
N4
N6
N8
N10
N12
N14
N16
N18
N20
N22

PGND
PGND
PGND
PGND
PGND
PGND

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND

P2
P4
P6
P8
P10
P12
P14
P16
P18
P20
P22

R2
R4
R6
R8
R10
R12
R14
R16
R18
R20
R22

T2
T4
T6
T8
T10
T12
T14
T16
T18
T20
T22

PIN NAME

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

PIN NAME

A3
A5
A7
A9
A11
A13

B1 V

C10
C12
C14

D1 V

E10
E12
E14

F1 V

PIN NAME

V

IN

V

IN

V

IN

V

IN

V

IN

V

IN

IN

V

IN

V

IN

V

IN

IN

V

IN

V

IN

V

IN

IN

A15 f

A17 SV

A19 EXTV

A21 V

ADJ

IN

CC

OSET

B23 COMP

D23 SGND

F23 RUN/SS

G23 FCB

J23 PGOOD

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

4602fa

23

LTM4602

1.8V, 6A R

TYPICAL APPLICATION

4.5V TO 20V

C2
10μF
25V

C1
10μF
25V

RELATED PARTS

egulator

V

IN

C5

EXTV

FCB

RUN

COMP

CC

V

IN

LTM4602

f

ADJ

V

OUT

V

OSET

SV

IN

PGOOD

PGNDSGND

4602 TA04

100pF

49.9k

R

V

OUT

1.8V AT 6A

C3

R1

100k

SET

C1, C2: TDK C3216X5R1E106MT
C3: TAIYO YUDEN, JMK316BJ226ML-T501

1%

C4: SANYO POSCAP, 4TPE330MI

22μF

PGOOD

+

C4
330μF
4V

PART NUMBER DESCRIPTION COMMENTS

LTC2900 Quad Supply Monitor with Adjustable Reset Timer Monitors Four Supplies; Adjustable Reset Timer

LTC2923 Power Supply Tracking Controller Tracks Both Up and Down; Power Supply Sequencing

LT3825/LT3837 Synchronous Isolated Flyback Controllers No Optocoupler Required; 3.3V, 12A Output; Simple Design

LTM4600 10A DC/DC μModule 10A Basic DC/DC Module

®

LTM4601 12A DC/DC μModule with PLL, Output Tracking/

Margining and Remote Sensing

LTM4603 6A DC/DC μModule with PLL and Output Tracking/

Margining and Remote Sensing

Synchronizable, PolyPhase
Sensing, Fast Transient Response

Synchronizable, PolyPhase Operation, LTM4603-1 Version has no Remote
Sensing, Fast Transient Response

Operation, LTM4601-1 Version has no Remote

PolyPhase is a registered trademark of Linear Technology Corporation.

24

This product contains technology licensed from Silicon Semiconductor Corporation.

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

®

4602fa

LT 0807 REV A • PRINTED IN USA

© LINEAR TECHNOLOGY CORPORATION 2007