Identifies and Localizes Output Low, Output High
and Open-Circuit Faults
■
Output Voltages from 1.5V to 12V
■
16-Lead Narrow SSOP Package
U
APPLICATIOS
■
Servers and Network Equipment
■
Telecom and Base Station Equipment
■
Distributed Power Systems
U
TYPICAL APPLICATIO
5V Load Share (5A per Module)
+
SENSE
+
OUT
SUD50N03-07
The LTC®4350 is a load share controller that allows
systems to equally load multiple power supplies connected in parallel. The output voltage of each supply is
adjusted using the SENSE+ input until all currents match
the share bus. The LTC4350 also isolates supply failures
by turning off the series pass transistors and identifying
the failed supply. The failed supply can then be removed
and replaced with a new unit without turning off the
system power. The LTC4350 is available in a 16-pin
narrow SSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
0.010Ω
V
OUT
+
SHARE BUS
–
V
OUT
VICOR*
VI-J30-CY
SENSE
SENSE
VICOR*
VI-J30-CY
SENSE
51Ω100Ω
0.1µF
0.1µF
43.2k
274k
12.1k
121k
0.1µF
TRIM
470k
–
–
OUT
+
+
OUT
43.2k
274k
0.1µF
TRIM
470k
–
–
OUT
*LOAD SHARING CIRCUIT WORKS WITH MOST POWER SUPPLIES THAT HAVE A SENSE
12.1k121k
0.1µF
SUD50N03-07
51Ω100Ω
0.1µF
0.1µF
0.1µF
–
34k
34k
R+R
LTC4350
1000pF
0.010Ω
R+R
LTC4350
1000pF
STATUSSTATUS
–
STATUSSTATUS
+
OR FB PIN
GATE
V
CC
UV
OV
TIMER
GAIN COMP1GND COMP2
GATE
V
CC
UV
OV
TIMER
GAIN COMP1GND COMP2
37.4k
FB
I
OUT
SB
R
SET
4.7µF
150Ω
FB
I
OUT
SB
R
SET
4.7µF
150Ω
12.1k
100Ω
37.4k
12.1k
100Ω
4350 TA01
4350fa
1
Note 1: A
LTC4350
WW
W
U
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (VCC) ............................................... 17V
Input Voltage
TIMER .................................................. –0.3V to 1.2V
R+, R– (Note 2) ......................................–0.3V to 17V
FB ........................................................ – 0.3V to 5.3V
OV, UV ....................................................... –0.3V to 17V
Output Voltage
COMP1 ................................................... – 0.3V to 6V
COMP2 ................................................... – 0.3V to 3V
GAIN, SB ............................................. –0.3V to 5.6V
GATE (Note 3) ...........................................– 0.3V to 20V
I
, STATUS ........................................... – 0.3V to 17V
OV Pin ThresholdHigh Going Threshold●1.2031.2201.250V
TIMER Pin Threshold●1.181.221.26V
TIMER Pin CurrentTIMER On, V
GAIN Pin VoltageR
GAIN Pin OffsetR
SB Pin Minimum Voltage28 mV
SB Pin Maximum VoltageVCC = 3.3V●2.42.72.9V
SB Pin Maximum CurrentV
SB Pin Resistor Value●142033kΩ
E/A2 OffsetVSB – V
CC
–40°C to 85°C (LTC4350I)1.1961.2201.244V
COMP1 = 0.64V
Low Going Threshold
Low Going Threshold
= 0V●–1.75– 2–2.3µA
TIMER
TIMER On, V
= 25k, (V
GAIN
= 25k, (V
GAIN
VCC = 12V●5.67.810.5V
= 0V●–8–33–41mA
SB
GAIN
= 0V, VOV > V
TIMER
+
– V
R
+
– V
R
–
R
–
R
OVTH
) = 100mV●2.32.52.7V
) = 0mV●00.020.20V
●1.01.62.0mA
● 0.0030.1%
●1.2051.2201.237V
●1.1801.2051.229V
●– 5.30– 6– 6.7µA
●82550 mV
2
4350fa
LTC4350
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise noted.
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
DC Characteristics
V
RSET(MAX)RSET
V
RSET(MIN)RSET
I
RSET(MAX)RSET
V
RCTH
∆V
GATE
I
GATE
V
SOL
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: R
Pin Maximum VoltageVCC = 3.3V, R
V
Pin Minimum VoltageVCC = 5V, R
V
Pin Maximum CurrentR
Reverse Current ThresholdV
External N-Channel Gate DriveV
GATE Pin CurrentGate On, V
STATUS Pin Output LowI
+
and R– could be at 17V while VCC = 0V.
OUT
= 100Ω●0.9411.03V
– V
SET
= 100Ω●0.9411.03V
SET
= 1000Ω●0.0010.5V
SET
= 100Ω●0.0010.5V
SET
= 1.1V●182021mA
IOUT
+
R
CC
= 0V●–8–10–12µA
GATE
●103040mV
●10.81212.7V
= 12V, R
CC
= 5V, R
CC
= 50Ω, V
SET
+
– V
R
GATE
= 3mA●0.10.31.2V
Note 3: An internal clamp limits the GATE pin to a minimum of 10.8V
above V
. Driving this pin to voltages beyond the clamp may damage the
CC
part.
UW
TYPICAL PERFOR A CE CHARACTERISTICS
3.5
3.0
2.5
(mA)
CC
I
2.0
1.5
ICC vs V
TA = 25°C
CC
ICC vs TemperatureUV Threshold vs V
1.66
1.64
1.62
1.60
(mA)
CC
I
1.58
1.56
VCC = 5V
1.250
TA = 25°C
1.245
1.240
1.235
1.230
UV THRESHOLD (V)
1.225
1.220
CC
1.0
02
4
VCC (V)
10
8
6
12
14
4350 G01
1.54
–50
–250
UV Threshold vs TemperatureOV Threshold vs V
1.255
VCC = 5V
1.250
1.245
1.240
1.235
1.230
UV THRESHOLD (V)
1.225
1.220
1.215
–50
–25
02550
TEMPERATURE (°C)
75100
4350 G04
1.222
TA = 25°C
1.220
1.218
1.216
1.214
1.212
1.210
OV THRESHOLD (V)
1.208
1.206
1.204
1.202
02
2575
TEMPERATURE (°C)
CC
8
6
4
VCC (V)
50100
4350 G02
12
14
4350 G05
10
1.215
02
6
4
VCC (V)
OV Threshold vs Temperature
1.225
VCC = 5V
1.220
1.215
1.210
OV THRESHOLD (V)
1.205
1.200
–50
02550
–25
TEMPERATURE (°C)
8
10
14
12
4350 G03
75100
4350 G06
4350fa
3
LTC4350
VCC (V)
02
2.2
GAIN (V)
2.4
2.7
4
8
10
4350 G09
2.3
2.6
2.5
6
12
14
R
GAIN
= 25k
(V
R
+
– V
R
–
) = 100mV
T
A
= 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
FB vs V
CC
1.230
TA = 25°C
1.225
1.220
FB (V)
1.215
1.210
02
4
VCC (V)
10
8
6
12
14
4350 G07
Gain Pin Voltage vs Temperature∆V
2.7
R
= 25k
GAIN
+
–
– V
) = 100mV
(V
R
R
= 5V
V
CC
2.6
2.5
GAIN (V)
2.4
2.3
FB vs TemperatureGain PIn Voltage vs V
1.230
VCC = 5V
1.225
1.220
FB (V)
1.215
1.210
(V)
GATE
∆V
13
12
11
10
9
8
7
–50
GATE
TA = 25°C
02550
–25
TEMPERATURE (°C)
vs V
CC
75100
4350 G08
(V)
GATE
∆V
13.0
12.5
12.0
11.5
∆V
vs Temperature
GATE
VCC = 5V
CC
2.2
–50
U
02550
–25
TEMPERATURE (°C)
75100
4350 G10
UU
6
0
24
PI FU CTIO S
UV (Pin 1): Undervoltage Pin. The threshold is set at
1.244V with a 24mV hysteresis. When the UV pin is pulled
high, the charge pump ramps the GATE pin. When the UV
pin is pulled low, the GATE pin will be pulled low.
OV (Pin 2): Overvoltage Pin. The threshold is set at 1.220V
with a 15mV hysteresis. When the OV pin is pulled high,
the GATE pin is pulled low. After a timer cycle, the STATUS
pin is pulled low until the OV pin is pulled low.
TIMER (Pin 3): Analog System Timing Generator Pin. This
pin is used to set the delay before the load sharing turns
on after the UV pin goes high. The other use for the TIMER
pin is to delay the indication of a fault on the STATUS pin.
81214
610
VCC (V)
4350 G11
11.0
–50
02550
–25
TEMPERATURE (°C)
75100
4350 G12
When the timer is off, an internal N-channel shorts the
TIMER pin to ground. When the timer is turned on, a 2µA
or 6µA timer current (I
) from VCC is connected to the
TIMER
TIMER pin and the voltage starts to ramp up with a slope
given by: dV/dt = I
TIMER/CT
. When the voltage reaches the
trip point (1.220V), the timer will be reset by pulling the
TIMER pin back to ground. The timer period is given by:
(1.220V • CT)/I
TIMER
.
GAIN (Pin 4): Analog Output Pin. The voltage across the
R+ and R– pins is divided by a 1k resistor and sourced as
a current from the GAIN pin. An external resistor on the
GAIN pin determines the voltage gain from the current
sense resistor to the GAIN pin.
4350fa
4
LTC4350
U
UU
PI FU CTIO S
COMP2 (Pin 5): Analog Output Pin. This pin is the output
of the share bus error amplifier E/A2. (A compensation
capacitor between this pin and ground sets the crossover
frequency for the power supply adjustment loop.) In most
cases, this pin operates between 0.5V to 1.5V and represents a diode voltage up from the voltage at the R
It is clamped at 3V. During start-up, this pin is clamped to
ground. After a timer cycle (and if the GATE pin is high), the
COMP2 pin is released.
COMP1 (Pin 6): Analog Output Pin. This pin is the output
of the voltage regulating error amplifier E/A1. A compensation capacitor between this pin and ground sets the
crossover frequency of the share bus loop. This pin
operates a diode voltage up from the voltage at the SB pin
and is clamped at 8.4V.
SB (Pin 7): Analog Output Pin. This pin drives the share
bus used to communicate the value of shared load current
between several power supplies. There is an amplifier that
drives this pin a diode below the COMP1 pin using an
internal NPN as a pull-up and a 20k resistor as a pull-down.
GND (Pin 8): Chip Ground.
FB (Pin 9): Analog Error Amplifier Input (E/A1). This pin is
used to monitor the output supply voltage with an external
resistive divider. The FB pin voltage is compared to 1.220V
reference. The difference between the FB pin voltage and
the reference is amplified and output on the COMP1 pin.
R
(Pin 10): Analog Output Pin. The I
SET
OUT
converts the voltage at the COMP2 pin (down a diode
voltage) to the R
external resistor (R
ground is (COMP2 – V
pin. Therefore, the current through the
SET
) placed between the R
SET
DIODE
)/R
. This current is used to
SET
SET
adjust the output voltage.
I
(Pin 11): Analog Output Pin. The current flowing into
OUT
the I
pin that was set by the external resistor R
pin is equal to the current flowing out of the R
OUT
. This current
SET
is used to adjust the output supply voltage by modifying
the voltage sensed by the power supply’s internal voltage
feedback circuitry.
pin.
SET
amplifier
pin and
SET
R– (Pin 12): Analog Input Pin. With a sense resistor placed
in the supply path between the R+ and R– pins, the power
supply current is measured as a voltage drop between R
and R–. This voltage is measured by the I
SENSE
block and
+
multiplied at the GAIN pin.
+
(Pin 13): Analog Input Pin. With a sense resistor placed
R
in the supply path between the R
supply current is measured as a voltage drop between R
and R–. This voltage is measured by the I
+
and R– pins, the power
block and
SENSE
+
multiplied at the GAIN pin.
GATE (Pin14): The high side gate drive for the external
N-Channel power FET. An internal charge pump provides
the gate drive necessary to drive the FETs. The slope of the
voltage rise or fall at the GATE is set by an external
capacitor connected between GATE and GND, and the
10µA charge pump output current. When the undervoltage
lockout circuit monitoring V
trips, the OV pin is pulled
CC
high or the UV pin is pulled low, the GATE pin is immediately pulled to GND.
STATUS (Pin 15): Open-Drain Digital Output. The STATUS pin has an open-drain output to GND. This pin is
pulled low to indicate a fault has occurred in the system.
There are three types of faults. The first is a undervoltage
lockout on VCC or the UV pin is low while the output
voltage is active. The second is when the COMP2 pin is
above 1.5V or below 0.5V and the voltage on the GAIN pin
is greater than 100mV. The final failure is when the OV pin
is high. The three faults will activate the pull-down on the
STATUS pin after a timing cycle.
VCC (Pin 16): The Positive Supply Input, Ranging from
3.3V to 12V for Normal Operation. ICC is typically 1.6mA.
An undervoltage lockout circuit disables the chip until the
voltage at VCC is greater than 2.47V. A 0.1µF bypass
capacitor is required on the VCC pin. If the VCC pin is tied
to the same power supply output that is being adjusted,
then a 51Ω decoupling resistor is needed to hold up the
supply during a short to ground on the supply output. V
CC
must be greater than or equal to the supply that is
connected to the R+ and R– pins.
4350fa
5
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