LINEAR TECHNOLOGY LTC4309 Technical data

LTC4309

Level Shifting Low Offset Hot

Swappable 2-Wire Bus Buffer

with Stuck Bus Recovery

FEATURES

n

Bidirectional Buffer Increases Fanout

n

60mV Buffer Offset Independent of Load

n

Optional Disconnect when Bus is Stuck Low

n

Prevents SDA and SCL Corruption During Live

Board Insertion and Removal from Backplane

n

Level Shift 2.5V, 3.3V and 5V Busses

n

Compatible with Non-Compliant VOL I2C Devices

n

±6kV Human Body Model ESD Ruggedness

n

Isolates Input SDA and SCL Lines from Output

n

Compatible with I2C™, I2C Fast-Mode and SMBus

n

READY Open Drain Output

n

FAULT Open Drain Output

n

1V Precharge on All SDA and SCL Lines

n

Optional Rise Time Accelerators

n

High Impedance SDA, SCL Pins for VCC = 0

n

Available in Small 12-Pin DFN (4mm x 3mm) and

16-Lead SSOP Packages

APPLICATIONS

n

Live Board Insertion

n

Servers

n

Capacitance Buffer/Bus Extender

n

RAID Systems

n

ATCA

DESCRIPTION

The LTC®4309 hot swappable 2-wire bus buffer allows
I/O card insertion into a live backplane without corrup­tion of the data and clock busses. The LTC4309 provides
bidirectional buffering, keeping the backplane and card
capacitances isolated. Low offset and high VOL tolerance
allows cascading of multiple devices on the clock and data
busses. If SDAOUT or SCLOUT are low for 30ms, FAULT
will pull low indicating a stuck bus low condition. If DISCEN
is tied high, the LTC4309 will automatically break the bus
connection and generate up to 16 clock pulses and a stop
bit in an attempt to free the bus. A connection will resume
if the stuck bus is cleared. If DISCEN is connected to GND,
the busses will remain connected with no clock or stop
bit generation. ACC input enables rise-time accelerators
for high capacitively loaded busses.

During insertion, the SDA and SCL lines are precharged to
1V to minimize bus disturbances. When driven high, the
ENABLE input allows the LTC4309 to connect after a stop
bit or bus idle. Driving ENABLE low breaks the connection
between SDAIN and SDAOUT, SCLIN and SCLOUT. READY
is an open drain output which indicates that the backplane
and card sides are connected.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
6356140, 6650174, 7032051.

TYPICAL APPLICATION

3.3V

10k 10k

SCL1

SDA1

FAULT FAULT

V

ENABLEEN

SCLIN

SDAIN

3.3V

10k

FAULT

CC2

V

CC

LTC4309

GND

0.01μF

ACC

SCLOUT

SDAOUT

READY

2.7k 2.7k

3.3V

10k

5V

BACKPLANE

CONNECTOR

CARD
CONNECTOR

Rising Edge from Asserted Low

V

CC

V

CC2

ENABLE

100k

SCLIN

SDAIN

5V

DISCENDISCEN

10k

FAULT

LTC4309

GND

ACC

SCLOUT

SDAOUT

READY

10k 10k

5V

10k

0.01μF

SCL2

SDA2

4309 TA01

1000

200mV/DIV

800

600

400

200

0

LOW

OFFSET

0

200 300 400

100

SDAOUT

SDAIN

100ns/DIV

500 600

4309 G01

4309fa

1

LTC4309

T

ABSOLUTE MAXIMUM RATINGS

VCC, V
SDAIN, SCLIN, SDAOUT, SCLOUT,

ENABLE, FAULT, ACC, DISCEN .......................–0.3 to 6V

Maximum Sink Current (SDA, SCL, FAULT, READY)
I

SINK

to GND ............................................–0.3 to 6V

CC2

READY,

......................................................................50mA

PIN CONFIGURATION

TOP VIEW

ENABLE

SCLOUT

EXPOSED PAD (PIN 13) PCB CONNECTION TO GND IS OPTIONAL

1

DISCEN

2

3

SCLIN

4

ACC

5

GND

6

12-LEAD (4mm × 3mm) PLASTIC DFN

DE12 PACKAGE

T

= 125°C, θJA = 43°C/W

JMAX

12

V

CC

V

11

CC2

SDAOUT

10

13

9

8

7

SDAIN

FAULT

READY

(Note 1, 6)

Operating Temperature

LTC4309C ................................................ 0°C to 70°C

LTC4309I.............................................. –40°C to 85°C

Storage Temperature Range (DE)........... –65°C to 125°C

Storage Temperature Range (GN) .......... –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

GN Package ......................................................300°C

TOP VIEW

ENABLE

DISCEN

SCLOUT

1

2

NC

3

4

5

SCLIN

6

ACC

7

NC

8

GND

GN PACKAGE

16-LEAD NARROW PLASTIC SSOP

T

= 150°C, θJA = 110°C/W

JMAX

V

16

CC

NC

15

V

14

CC2

SDAOU

13

SDAIN

12

FAULT

11

NC

10

READY

9

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4309CDE#PBF LTC4309CDE#TRPBF 4309 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C

LTC4309IDE#PBF LTC4309IDE#TRPBF 4309 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C

LTC4309CGN#PBF LTC4309CGN#TRPBF 4309 16-Lead Plastic SSOP 0°C to 70°C

LTC4309IGN#PBF LTC4309IGN#TRPBF 4309I 16-Lead Plastic SSOP –40°C to 85°C

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/

4309fa

2

LTC4309

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

CC

V

CC2

I

CC

I

SD

I

CC2

I

SD2

Propagation Delay and Rise Time Accelerators

t

PHL

t

PLH

t

RISE

t

FALL

I

PULLUPAC

Start-Up Circuitry

V

PRE

t

IDLE

V

THR_EN

V

THR_EN(HYST)

V

THR_CTRL

I

CTRL

t

PLH_EN

t

PHL_EN

t

PLH_READY

t

PHL_READY

V

OL_READY

I

OFF_READY

Timing Characteristics

f

I2C, MAX

t

BUF

t

HD, STA

t

SU, STA

t

SU, STO

t

HD, DATI

t

SU, DAT

Input-Output Connection

V

OS

V

THR

Positive Supply Voltage

Input Side Accelerator Supply Voltage

VCC Input Supply Current Enabled VCC = V

V

Input Supply Current Disabled VCC = V

CC

V

Input Supply Current Enabled VCC = V

CC2

V

Input Supply Current Disabled VCC = V

CC2

SDA/SCL Propagation Delay High to Low C

SDA/SCL Propagation Delay Low to High C

SDA/SCL Rise Time C

SDA/SCL Fall Time C

Transient Boosted Pull-up Current Positive Transition > 0.8V/μS on SDA, SCL, VCC = 3.3V (Note 7) 5 8 mA

Precharge Voltage SDA, SCL Open

Bus Idle Time

ENABLE Threshold Voltage ENABLE Rising Edge

ENABLE Threshold Voltage Hysteresis (Note 3) 100 mV
ACC, DISCEN Threshold Voltage 0.5 0.7 1 V
ENABLE, ACC, DISCEN Input Currents ENABLE, ACC, DISCEN from 0 to V

ENABLE Delay Off-On (Figure 1) 95 μs

ENABLE Delay On-Off (Note 3), (Figure 1) 10 ns

READY Delay On-Off (Note 3), (Figure 1) 10 ns

READY Delay Off-On (Note 3), (Figure 1) 10 ns

READY Output Low Voltage I

READY Off Leakage Current VCC = READY = 5.5V

I2C Maximum Operating Frequency (Note 3) 400 600 kHz

Bus Free Time Between Stop and Start
Condition

Hold Time After (Repeated)
Start Condition

Repeated Start Condition Set-Up Time (Note 3) 0 ns

Stop Condition Set-Up Time (Note 3) 0 ns

Data Hold Time Input (Note 3) 0 ns

Data Set-Up Time (Note 3) 100 ns

Input-Output Offset Voltage 2.7k to V

SDA, SCL Logic Input Threshold Voltage VCC ≥ 2.9V

= 25°C. VCC = 3.3V, V

A

= 5.5V, V

CC2

= 5.5V, SDA = SCL = 5.5V, ENABLE = OV

CC2

= 5.5V, V

CC2

= 5.5V, SDA = SCL = 5.5V, ENABLE = OV

CC2

= 50pF, 2.7k to VCC on SDA, SCL, (Note 3, 4), (Figure 1) 85 ns

LOAD

= 50pF, 2.7k to VCC on SDA, SCL, (Note 3, 4), (Figure 1) 10 ns

LOAD

= 100pF, 10k to VCC on SDA, SCL, VCC = 5V V

LOAD

SDAIN

SDAIN

= 3.3V, unless otherwise noted.

CC2

= V

= V

= 0V (Note 2)

SCLIN

= 0V (Note 2)

SCLIN

CC2

= 5V,

l

2.3 5.5 V

l

1.8 5.5 V

l

l

l

l

711 mA

900 1400 μA

190 250 μA

140 180 μA

30 300 ns

(Note 3, 5), (Figure 1)

= 100pF, 10k to VCC on SDA, SCL, VCC = 5V (Note 3, 5),

LOAD

30 300 ns

(Figure 1)

l

0.8 1.0 1.2 V

l

55 95 175 μs

l

0.8 1.4 2 V

= 3mA, VCC = 2.3V

READY

CC

l

l

l

0.1 ±5 μA

0.4 V

0.1 ±5 μA

(Note 3) 1.3 μs

(Note 3) 100 ns

l

20 60 100 mV

1.4

1.65

1.1

1.35

1.9

1.6

V

CC

< 2.9V

on SDA, SCL, Driven SDA, SCL = 0.2V

CC2

V
V

4309fa

3

LTC4309

The l denotes the specifi cations which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

THR(HYST)

C

IN

I

LEAK

V

OL

V

ILMAX

Bus Stuck Low Timeout

t

TIMEOUT

V

OL_FAULT

I

OFF_FAULT

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: Test performed with connection circuity active.
Note 3: Determined by design, not subject to test.
Note 4: For larger equivalent bus capacitance, the skew increases, and

SDA, SCL Logic Input Threshold Voltage
Hysteresis

Digital Input Capacitance SDAIN,
SDAOUT, SCLIN, SCLOUT

Input Leakage Current SDA, SCL, ACC, DISCEN Pins

Output Low Voltage SDA, SCL Pins, I

Buffer Input Logic Low Voltage

Bus Stuck Low Timer SDAOUT, SCLOUT = OV

FAULT Output Low Voltage I
FAULT Off Leakage Current

= 25°C. VCC = 3.3V, V

A

= 3.3V, unless otherwise noted.

CC2

(Note 3) 50 mV

(Note 3) 10 pF

V

= 2.7V

CC2

2.7k to V
V

= V

CC

= 3mA

FAULT

= 4mA, Driven SDA/SCL = 0.2V, VCC =

SINK

on SDA, SCL, Driven SDA/SCL = 0.1V,

CC

= 3.3V

CC2

l

l

0 0.4 V

l

120 170 205 mV

l

l

25 30 35 ms

l

l

±5 μA

1.2 V

0.4 V

0.1 ±5 μA

setup and hold times must be adjusted accordingly. Please see the
Operation Section of the datasheet.

Note 5: Measure points are 0.3 • V

and 0.7 • VCC.

CC

Note 6: All currents into pins are positive, all voltages are referenced to
GND, unless otherwise specifi ed.

Note 7: I

varies with temperature and VCC voltage as shown in the

PULLUPAC

Typical Performance Characteristics section.

TIMING DIAGRAMS

SDAIN/SCLIN

SDAOUT/SCLOUT

ENABLE and READY Timing

t

PLH_READY

t

PLH_EN

ENABLE

CONNECT

READY

SDA/SCL Propagation Delays, Rise and Fall Times

t

PLH

t

PHLtRISE

Figure 1. Timing Diagrams

t

PHL_EN

t

PHL_READY

4309 TD01

t

RISE

t

FALL

t

FALL

4309 TD02

4

4309fa

LTC4309

TYPICAL PERFORMANCE CHARACTERISTICS

T

= 25°C, VCC = 3.3V, V

A

otherwise noted.

ICC Enabled Current vs
Temperature

8

7.5
VCC = 5.5V

7

6.5

6

ENABLED CURRENT (mA)

CC

I

5.5

5

–50

VCC = 3.3V

VCC = 2.3V

–25 0 50

TEMPERATURE (oC)

I

Disabled Current vs

CC2

Temperature

160

140

130

120

110

SUPPLY CURRENT (MA)

100

90

–50

VCC = 5.5V

VCC = 3.3V

VCC = 2.3V

02550

–25

TEMPERATURE (oC)

100

25

75

4309 G02

75 100

4309 G05

ICC Disabled Current vs
Temperature

20

16

12

(mA)

8

PULLUPAC

I

4

0

–50

–25

VCC = 5.5V

VCC = 3.3V

25 50

0

TEMPERATURE (°C)

Input-Output High to Low
Propagation Delay vs Temperature

140

CIN = C
R

130

120

110

100

90

80

PROPAGATION DELAY (ns)

70

60

–50

= 50pF

OUT

= R

PULLUPIN

VCC= 5.5V

VCC= 2.3V

VCC= 3.3V

–25 0 25 100

TEMPERATURE (°C)

PULLUPOUT

= 2.7kΩ

50 75

220

200

180

160

140

SUPPLY CURRENT (MA)

120

100

75

100

4309 G03

4309 G06

–50

30

25

20

15

10

5

BOOST PULL-UP CURRENT (mA)

0

–50

= 3.3V unless

CC2

I

Enabled Current vs

CC2

Temperature

VCC = 5.5V

VCC = 3.3V

VCC = 2.3V

–25

25 50

0

TEMPERATURE (oC)

Boost Pull-Up Current vs
Temperature

CIN = 50pF
C

= 1nF

OUT

= R

R

PULLUPIN

PULLUPOUT

–25 0 25 100

TEMPERATURE (°C)

= 2.7kΩ

VCC= 3.3V

50 75

75

4309 G04

VCC= 5.5V

VCC= 2.3V

4309 G07

100

Input-Output High to Low Propagation
Delay vs Output Capacitance

160

150

140

VCC= 5.5V

130

120

110

VCC= 2.3V

100

PROPAGATION DELAY (ns)

90

VCC= 3.3V

80

70

200 400 600 800

0

OUTPUT CAPACITANCE (pF)

CIN = 50pF
R

PULLUPIN

R

PULLUPOUT

= 2.7k7

= 2.7k7

4309 G08

1000

Offset Voltage vs Pull-Up
Resistance

70

66

62

58

OFFSET VOLTAGE (mV)

54

50

0

46

2

PULL-UP RESISTANCE (kΩ)

VOL = 0.1V
C

IN = COUT

R

PULLUPIN

= 50pF

= 2.7kΩ

8

4309 G09

10

4309fa

5