LINEAR TECHNOLOGY LTC4263 Technical data
LTC4263
Single IEEE 802.3af
Compliant PSE Controller
with Internal Switch
FEATURES
n
IEEE 802®.3af Compliant
n
Operation from a Single 48V Supply
n
Fully Autonomous Operation without
Microcontroller
n
Internal MOSFET with Thermal Protection
n
Power Management Works Across Multiple Ports
with Simple RC Network
n
Precision Inrush Control with Internal Sense Resistor
n
Powered Device (PD) Detection and Classifi cation
n
AC and DC Disconnect Sensing
n
Robust Short-Circuit Protection
n
Pin-Selectable Detection Backoff for Midspan PSEs
n
Classifi cation Dependent I
n
LED Driver Indicates Port On and Blinks
Current Threshold
CUT
Status Codes
n
Available in 14-Pin SO and 4mm × 3mm DFN
Packages
APPLICATIONS
n
IEEE 802.3af Compliant Endpoint/Midspan PSEs
n
Single-Port or Multi-Port Power Injectors
n
Power Forwarders
n
Low-Port Count PSEs
n
Environment B PSEs
n
Standalone PSEs
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
DESCRIPTION
The LTC®4263 is an autonomous single-channel PSE
controller for use in IEEE 802.3af compliant Power over
Ethernet systems. It includes an onboard power MOSFET,
internal inrush, current limit, and short-circuit control,
IEEE 802.3af compliant PD detection and classifi cation
circuitry, and selectable AC or DC disconnect sensing.
Onboard control algorithms provide complete IEEE 802.3af
compliant operation without the need of a microcontroller.
The LTC4263 simplifi es PSE implementation, needing
only a single 48V supply and a small number of passive
support components.
Programmable onboard power management circuitry
permits multiple LTC4263s to allocate and share power
in multi-port systems, allowing maximum utilization of
the 48V power supply—all without the intervention of a
host processor. The port current limit can be confi gured
to automatically adjust to the detected PD class. Detection backoff timing is confi gurable for either Endpoint or
Midspan operation. Built-in foldback and thermal protection
provide comprehensive fault protection.
An LED pin indicates the state of the port controlled by
the LTC4263. When run from a single 48V supply, the LED
pin can operate as a simple switching current source to
reduce power dissipation in the LED drive circuitry.
The LTC4263 is available in 14-pin 4mm × 3mm DFN and
14-pin SO packages.
TYPICAL APPLICATION
+
ISOLATED
48V SUPPLY
–
Single-Port Fully Autonomous PSE
0.1μF
100V
0.1μF
LED
LEGACY
MIDSPAN
PWRMGT
V
SS
V
SS
OSC
LTC4263
V
DD5
ENFCLS
SD
V
DD48
OUT
OUT
ACOUT
1A
SMAJ58A
0.1μF
100V
TO PORT
MAGNETICS
4263 TA01
4263fd
1
LTC4263
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
V
SS
V
DD5
– V
........................................ V
........................................... 0.3V to –80V
DD48
– 0.3V to V
SS
SS
+ 6V
Pin Voltages and Currents
LEGACY, MIDSPAN, ENFCLS, PWRMGT
SD, OSC .................................. V
LED ....................................... V
– 0.3V to V
SS
– 0.3V to V
SS
SS
SS
+ 6V
+ 80V
OUT, ACOUT ............................................ (See Note 3)
PIN CONFIGURATION
TOP VIEW
LED
1
LEGACY
MIDSPAN
PWRMGT
EXPOSED PAD (PIN 15) IS V
2
3
4
V
5
SS
6
V
SS
7
OSC
14-LEAD (4mm s 3mm) PLASTIC DFN
T
JMAX
DE14 PACKAGE
= 125°C, θJA = 43°C/W, θJC = 4.3°C/W
15
, MUST BE SOLDERED TO PCB
SS
14
13
12
11
10
9
8
V
DD5
ENFCLS
SD
V
DD48
OUT
OUT
ACOUT
(Notes 1, 2)
Operating Ambient Temperature Range
LTC4263C ................................................ 0°C to 70°C
LTC4263I ............................................. –40°C to 85°C
Junction Temperature (Note 4) ............................. 125°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
SO ..................................................................... 300°C
TOP VIEW
1
LED
2
LEGACY
MIDSPAN
PWRMGT
3
4
5
V
SS
6
V
SS
7
OSC
S PACKAGE
14-LEAD PLASTIC SO
T
= 125°C, θJA = 90°C/W, θJC = 37°C/W
JMAX
14
13
12
11
10
9
8
V
DD5
ENFCLS
SD
V
DD48
OUT
OUT
ACOUT
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4263CDE#PBF LTC4263CDE#TRPBF 4263
LTC4263IDE#PBF LTC4263IDE#TRPBF 4263
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
LTC4263CS#PBF LTC4263CS#TRPBF 4263CS 14-Lead Plastic SO 0°C to 70°C
LTC4263IS#PBF LTC4263IS#TRPBF 4263IS 14-Lead Plastic SO –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
ELECTRICAL CHARACTERISTICS
The
temperature range, otherwise specifi cations are at TA = 25°C. V
cations, go to: http://www.linear.com/tapeandreel/
l denotes the specifi cations which apply over the full operating
– VSS = 48V and V
DD48
not driven externally. All voltages are
DD5
relative to VSS unless otherwise noted. (Notes 2, 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supplies
V
SUPPLY
V
UVLO_OFF
V
UVLO_HYS
48V Supply Voltage V
UVLO Turn-Off Voltage V
UVLO Hysteresis
– V
DD48
SS
To Maintain IEEE Compliant Output
– VSS Decreasing
DD48
l
33
l
46
l
29 31 33 V
l
0.1 1 V
0°C to 70°C
–40°C to 85°C
48 66
57
4263fd
V
V
2
LTC4263
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
relative to VSS unless otherwise noted. (Notes 2, 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OVLO_OFF
V
OVLO_HYS
V
DD5
I
DD48
I
DD5
Power MOSFET
R
ON
I
OUT_LEAK
R
PU
Current Control
I
CUT
I
LIM
I
FB
I
MIN
I
FAULT
Detection
I
DET
V
DET
R
DETMIN
R
DETMAX
R
OPEN
Classifi cation
V
CLASS
I
CLASS
I
TCLASS
Power Management
V
PWRMGT
I
PWRMGT
AC Disconnect
R
OSC
I
OSC
f
OSC
OVLO Turn-Off Voltage V
OVLO Hysteresis
V
Supply Voltage Driven Externally
DD5
V
Internal Supply Driven Internally
DD5
V
Supply Current V
DD48
V
Supply Current V
DD5
On-Resistance I = 350mA, Measured From OUT to V
OUT Pin Leakage V
OUT Pin Pull-Up Resistance to V
DD48
Overload Current Threshold Class 0, Class 3, Class 4 (Note 6)
Short-Circuit Current Limit V
Foldback Current Limit V
DC Disconnect Current Threshold
High Speed Fault Current Limit (Note 8)
Detection Current First Point, V
Detection Voltage Compliance V
Minimum Valid Signature Resistance
Maximum Valid Signature Resistance
Open Circuit Threshold
Classifi cation Voltage V
Classifi cation Current Compliance V
Classifi cation Threshold Current Class 0 – 1
Power Management Pin Threshold
Power Management Pin Output Current Class 0, Class 3, Class 4
OSC Pin Input Impedance 2V ≤ (V
OSC Pin Output Current V
OSC Pin Frequency V
= 25°C. V
A
DD48
– VSS Increasing
DD48
– VSS = 5V
DD5
Internal V
– VSS = 5V
DD5
– VSS = V
OUT
0V ≤ (V
Class 2
Class 1
– VSS = 5V
OUT
V
– V
DD48
– V
DD48
V
– V
DD48
Second Point, V
– V
DD48
V
– VSS = 57V
DD48
– V
DD48
= V
OUT
Class 1 – 2
Class 2 – 3 (Note 9)
Class 1
Class 2
– VSS = 2V
OSC
– VSS = 2V
OSC
– VSS = 48V and V
DD5
– VSS = 57V
DD48
– V
DD48
OUT
OUT
OUT
OUT
OUT
DD48
OSC
) ≤ 5V
OUT
= 30V
= 0V (Note 7)
= 10V
– V
DD48
– V
DD48
, Open Port
, 0mA ≤ I
– VSS) ≤ 3V
OUT
OUT
CLASS
= 10V
= 3.5V
≤ 50mA
not driven externally. All voltages are
DD5
l
66 70 74 V
l
0.2 2 V
l
4.5 5 5.5 V
l
4.3 4.4 4.5 V
SS
l
l
l
l
l
l
360 500 640
l
355
l
165
l
95
l
405
l
405
l
30
l
110
l
5.2 7.5 9.8 mA
l
500 650 800 mA
l
235
l
160
l
l
15.5 17 18.5
l
27.5 29.7 32
l
500 2000
l
16.5 20.5 V
l
55 60 75 mA
l
5.5
l
13.5
l
21.5
l
0.98 1 1.02 V
l
–75.6
l
–19.6
l
–34.3
l
175 250 325
l
–140 140 μA
l
103 110 115 Hz
1
2
12mA
1.5 2.4
110 μA
375
175
100
425
425
60
140
255
180
6.5
14.5
23
–72.3
–18.8
–32.8
–17.9
–31.3
2
4
3.0
395
185
105
445
445
120
180
275
200
21 V
7.5
15.5
24.5
–69
4263fd
mA
mA
kΩ
mA
mA
mA
mA
mA
mA
mA
μA
μA
kΩ
kΩ
kΩ
mA
mA
mA
μA
μA
μA
kΩ
Ω
Ω
3
LTC4263
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
= 25°C. V
A
relative to VSS unless otherwise noted. (Notes 2, 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
A
VACD
I
ACDMAX
I
ACDMIN
V
ACDEN
Digital Interface (Note 10)
V
OLED
V
ILD
V
IHD
V
OZ
I
OLEG
I
FLT
Timing Characteristics
t
DET
t
DETDLY
t
PDC
t
PON
t
RISE
t
OVLD
t
ED
t
MPDO
t
MPS
t
DBO
t
DISDLY
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to V
specifi ed.
Note 3: 80mA of current may be pulled from the OUT or ACOUT pin
without damage whether the LTC4263 is powered or not. These pins will
also withstand a positive voltage of V
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
Note 5: The LTC4263 operates with a negative supply voltage. To avoid
confusion, voltages in this data sheet are referred to in terms of absolute
magnitude.
Voltage Gain OSC to ACOUT 2V ≤ (V
AC Disconnect Output Current V
Remain Connected AC Pin Current V
AC Disconnect Enable Signal V
LED Output Low Voltage I
OSC
OSC
OSC
LED
Digital Input Low Voltage MIDSPAN, PWRMGT, ENFCLS, SD LEGACY
Digital Input High Voltage MIDSPAN, PWRMGT, ENFCLS, SD LEGACY
Voltage of Legacy Pin if Left Floating
Current In/Out of Legacy Pin 0V ≤ (V
Maximum Allowed Leakage of External Components
at Legacy Pin in Force Power-On Mode
Detection Time Beginning to End of Detection
Detection Delay PD Insertion to Detection Complete
Classifi cation Duration
Power Turn-On Delay End of Valid Detect to Application of Power
Turn-On Rise Time V
DD48
C
PSE
Overload/Short-Circuit Time Limit
Error Delay I
CUT
Maintain Power Signature (MPS) Disconnect Delay PD Removal to Power Removal
MPS Minimum Pulse Width PD Minimum Current Pulse Width
Required to Stay Connected (Note 11)
Midspan Mode Detection Backoff
R
PORT
Power Removal Detection Delay
unless otherwise
SS
+ 80V.
SS
– VSS = 48V and V
DD48
– VSS) ≤ 3V
OSC
– V
= 2V, 0V ≤ (V
SS
– VSS = 2V
– VSS, Port On
= 10mA
– VSS) ≤ 5V
LEGACY
– V
: 10% to 90%
OUT
= 0.1μF
Fault to Next Detect
= 15.5kΩ
Note 6: If the ENFCLS pin is high, I
classifi cation. If ENFCLS pin is low, I
Note 7: In order to reduce power dissipated in the switch while charging
the PD, the LTC4263 reduces the current limit when V
Refer to the Typical Performance Characteristics for more information.
Note 8: The LTC4263 includes a high speed current limit circuit intended to
protect against faults. The fault protection is activated for port current
in excess of I
circuit current limit (I
levels.
Note 9: Class 4 or higher classifi cation current is treated as Class 3.
Note 10: The LTC4263 digital interface operates with respect to V
logic levels are measured with respect to V
Note 11: The IEEE 802.3af specifi cation allows a PD to present its
Maintain Power Signature (MPS) on an intermittent basis without being
disconnected. In order to stay powered, the PD must present the MPS for
within any t
t
MPS
not driven externally. All voltages are
DD5
l
0.95 1.0 1.05 V/V
– VSS) ≤ 4V
ACOUT
. After the high speed current limit activates, the short-
FAULT
LIM
time window.
MPDO
l
–1 1 mA
l
130 160 190 μA
l
1.5 V
l
l
l
l
2.2
l
2.2
l
1.1 1.25 1.4 V
l
–60 60 μA
l
–10 10 μA
l
270 290 310 ms
l
300 620 ms
l
34 37 39 ms
l
135 145 155 ms
l
40 170 μs
l
52 62 72 ms
l
3.8 4.0 4.2 s
l
320 350 380 ms
l
l
3.0 3.2 3.4 s
l
0.8 0.95 1.1 s
depends on the result of
CUT
reverts to its Class 0 specifi cation.
CUT
1.1 2.2 V
– VSS is large.
OUT
) engages and restricts current to IEEE 802.3af
.
SS
0.8
0.4
20 ms
. All
SS
V
V
V
4
4263fd
TYPICAL PERFORMANCE CHARACTERISTICS
LTC4263
Powering an IEEE 802.3af PD
V
DD48
V
OUT
10V/DIV
V
DETECTION
PHASE 1
SS
DETECTION
PHASE 2
CLASSIFICATION
100ms/DIV
Overload Restart Delay
V
DD48
t
ED
V
OUT
10V/DIV
V
SS
I
PORT
500mA/
DIV
500ms/DIV
POWER
ON
4263 G01
4263 G10
V
DD48
V
OUT
20V/DIV
V
400mA
I
OUT
200mA/DIV
0mA
V
DD48
V
OUT
2V/DIV
Powering a Legacy PD with
220μF Bypass Capacitor
SS
425mA CURRENT LIMIT
CLASSIFICATION
FOLDBACK
25ms/DIV
LOAD
FULLY
CHARGED
4263 G02
V
DD48
V
DD48
20mA/DIV
Classifi cation Transient
Response to 40mA Load Step
V
– VSS = 48V
DD48
T
= 25°C
A
V
OUT
2V/DIV
– 18V
– 19V
40mA
I
OUT
0mA
100μs/DIV
Midspan Backoff with Invalid PD Overcurrent Response Time
V
DD48
V
OUT
20V/DIV
V
400mA
I
OUT
200mA/DIV
0mA
SS
PORT OFF
LOAD
APPLIED
10ms/DIV
t
OVLD
R
PORT
= 15.5kΩ
t
DBO
500ms/DIV
4263 G11
4263 G06
4263 G12
Response to PD Removal with
AC Disconnect Enabled Rapid Response to 1Ω Short
V
DD48
V
OUT
10V/DIV
V
SS
PD REMOVAL
t
MPDO
50ms/DIV
PORT OFF
4263 G13
I
PORT
20A/
DIV
V
DD48
V
OUT
20V/DIV
V
20A
SS
1Ω SHORT
APPLIED
0A
I
= CURRENT IN
PORT
1Ω RESISTOR APPLIED
TO OUTPUT OF CIRCUIT
ON FRONT PAGE
1μs/DIV
4263 G14
V
DD48
V
OUT
20V/DIV
V
800mA
I
PORT
400mA/DIV
0mA
Rapid Response to
Momentary 50Ω Short
SS
50Ω SHORT APPLIED
CURRENT
LIMIT ACTIVE
FOLDBACK CURRENT LIMIT
= CURRENT IN 50Ω RESISTOR APPLIED
I
PORT
TO OUTPUT OF CIRCUIT ON FRONT PAGE
SHORT
REMOVED
100μs/DIV
4263 G15
4263fd
5
LTC4263
TYPICAL PERFORMANCE CHARACTERISTICS
LED Pin Pulldown
Current Limit and Foldback
450
400
350
300
250
(mA)
200
OUT
I
150
100
50
0
5 10152025 50
0
I
DD48
V
– V
DD48
DC Supply Current vs Supply
Voltage with Internal V
2.5
TA = 25°C
2.0
1.5
(mA)
DD48
1.0
I
30 35 40 45
OUT
4263 G03
DD5
25k LOAD WITH
AC ENABLED
NO LOAD
vs Load Current Classifi cation Current Compliance
4
TA = 25°C
INTERNAL V
3
2
PIN PULLDOWN (V)
LED
1
V
0
0
I
DD48
Supply Voltage with V
1.2
TA = 25°C
1.0
0.8
(mA)
0.6
DD48
I
0.4
DD5
10 20 30 40 50
I
LOAD CURRENT (mA)
LED
DC Supply Current vs
= 5.0V
DD5
25k LOAD WITH
AC ENABLED
NO LOAD
4263 G04
80
V
– VSS = 48V
DD48
T
= 25°C
A
70
60
50
(mA)
40
OUT
I
30
20
10
0
04
I
DC Supply Current
DD5
vs Supply Voltage
2
V
= 48V
DD48
1
0
(mA)
DD5
I
–1
8121620
V
– V
DD48
(V)
OUT
25k LOAD WITH
AC ENABLED
NO LOAD
4263 G05
0.5
0
10 20 30 40 50 60
0
V
DD48
(V)
RON vs Temperature Legacy Pin Current vs Voltage
2.0
1.8
1.6
(Ω)
ON
R
1.4
1.2
1.0
–40 –20
4263 G07
40
20
0
TEMPERATURE (°C)
0.2
0
10 20 30 40 50 60
0
80
100
4263 G16
60
V
DD48
(V)
40
20
(μA)
LEGACY
I
–20
–40
4263 G08
0
0
–2
–3
4.0
FORCE POWER ON MODE
COMPLIANT MODE
1
2
V
LEGACY
4.5 5.0 5.5 6.0
V
DD5
LEGACY MODE
3
4
5
(V)
4263 G17
4263 G09
4263fd
6
TEST TIMING
Detect, Class and Turn-On Timing Current Limit Timing
PD
INSERTED
V
DD48
V
OUT
t
DETDLY
DC Disconnect Timing AC Disconnect Timing
t
DET
V
CLASS
t
PON
t
PDC
4263 TT01
PORT
TURN-ON
LTC4263
I
LIM
I
OUT
V
DD48
V
OUT
V
SS
I
CUT
t
OVLD
4263 TT02
I
V
V
OUT
OUT
SS
V
I
MIN
DD48
t
MPS
t
MPDO
V
OSC
V
OUT
I
ACOUT
V
DD48
V
SS
I
ACDMIN
PD REMOVED
t
MPDO
4263 TT04
4263fd
7
LTC4263
PIN FUNCTIONS
(DFN/SO)
LED (Pin 1): Port State LED Drive. This pin is an open drain
output that pulls down when the port is powered. Under port
fault conditions, the LED will fl ash in patterns to indicate
the nature of the port fault. See the Applications Information section for a description of these patterns. When the
LTC4263 is operated from a single 48V supply, this pin is
pulsed low with a 6% duty cycle during the periods when
the LED should be on. This allows use of a simple inductor,
diode, and resistor circuit to avoid excess heating due to
the large voltage drop from V
. See the Applications
DD48
Information section for details on this circuit.
LEGACY (Pin 2): Legacy Detect. This pin controls whether
legacy detect is enabled. If held at V
, legacy detect is
DD5
enabled and testing for a large capacitor is performed to
detect the presence of a legacy PD on the port. See the
Applications Information section for descriptions of legacy
PDs that can be detected. If held at V
, only IEEE 802.3af
SS
compliant PDs are detected. If left fl oating, the LTC4263
enters force-power-on mode and any PD that generates
between 1V and 10V when biased with 270μA of detection
current will be powered as a legacy device. This mode is
useful if the system uses a differential detection scheme
to detect legacy devices. Warning: Legacy modes are not
IEEE 802.3af compliant.
MIDSPAN (Pin 3): Midspan Enable. If this pin is connected
to V
, Midspan backoff is enabled and a 3.2 second
DD5
delay occurs after every failed detect cycle unless the
result is open circuit. If held at V
, no delay occurs after
SS
failed detect cycles.
PWRMGT (Pin 4): Power Management. The LTC4263
sources current at the PWRMGT pin proportional to the
class of the PD that it is powering. The voltage of this pin
is checked before powering the port. The port will not
turn on if this pin is more than 1V above V
. Connect the
SS
PWRMGT pins of multiple LTC4263s together with a resistor
and capacitor to V
power management is not used, tie this pin to V
(Pins 5, 6): Negative 48V Supply. Pins 5 and 6 should
V
SS
to implement power management. If
SS
.
SS
be tied together on the PCB.
OSC (Pin 7) Oscillator for AC Disconnect. If AC disconnect is used, connect a 0.1μF X7R capacitor from OSC to
. Tie OSC to VSS to disable AC disconnect and enable
V
SS
DC disconnect.
ACOUT (Pin 8): AC Disconnect Sense. Senses the port
to determine whether a PD is still connected when in AC
disconnect mode. If port capacitance drops below about
0.15μF for longer than T
the port is turned off. If
MPDO
AC disconnect is used, connect this pin to the port with
a series combination of a 1k resistor and a 0.47μF 100V
X7R capacitor. See the Applications Information section
for more information.
OUT (Pins 9, 10): Port Output. If DC disconnect is used,
these pins are connected to the port. If AC disconnect is
used, these pins are connected to the port through a parallel
combination of a 1A diode and a 500k resistor. Pins 9 and
10 should be tied together on the PCB. See the Applications
Information section for more information.
(Pin 11): 48V Return. Must be bypassed with a
V
DD48
0.1μF capacitor to V
SS
.
SD (Pin 12): Shutdown. If held low, the LTC4263 is pre-
vented from performing detection or powering the port.
Pulling SD low will turn off the port if it is powered. When
released, a 4-second delay will occur before detection is
attempted.
ENFCLS (Pin 13): Enforce Class Current Limits. If held
at V
, the LTC4263 will reduce the I
DD5
class 1 or class 2 PDs. If ENFCLS is held at V
threshold for
CUT
SS
, I
CUT
remains at 375mA (typ) for all classes.
(Pin 14): Logic Power Supply. Apply 5V referenced
V
DD5
, if such a supply is available, or place a 0.1μF
to V
SS
bypass capacitor to V
to enable the internal regulator.
SS
When the internal regulator is used, this pin should only
be connected to the bypass capacitor and to any logic pins
of the LTC4263 that are being held at V
Exposed Pad (Pin 15, DE Package Only): V
connected to V
on the PCB. The Exposed Pad acts as a
SS
DD5
.
. Must be
SS
heatsink for the internal MOSFET.
8
4263fd
Loading...