Linear Technology LTC 4125 User Manual

5W AutoResonant Wireless

+
–

L

Power Transmitter

FeaTures DescripTion

LTC4125

n

Monolithic 5W Wireless Power Transmitter

n

AutoResonantTM Switching Frequency Adjusts to Res­onant Capacitance and Transmit Coil Inductance*

n

Transmit Power Automatically Adjusts to Receiver
Load*

n

Input Voltage Range: 3V to 5.5V

n

Integrated 100mΩ Full Bridge Switches

n

Multiple Foreign Object Detection Methods

n

Programmable Average Input Current Limit and
Monitor

n

NTC Input for System/Component Temperature
Qualified Power Transfer

n

Wide Operating Switching Frequency Range:
50kHz to 250kHz

n

Thermally Enhanced 4mm × 5mm QFN 20-Lead Package

applicaTions

n

Hermetically and/or Electrically Insulated Devices

n

Military Sensors and Devices

n

Medical Equipment

n

Industrial Handhelds

The LT C®4125 is a simple and high performance monolithic
full bridge resonant driver capable of delivering over 5W of
power wirelessly to a properly tuned receiver. The device
controls the current flow in a series connected transmit coil
LC network to create a simple, safe and versatile wireless
power transmitter.

The LTC4125 automatically adjusts its driving frequency
to match the LC network resonant frequency. This
AutoResonant switching allows the device to deliver
maximum power from a low voltage input supply (3V to

5.5V) to a tuned receiver. To optimize system efficiency,
the LTC4125 employs a periodic transmit power search
and adjusts the transmission power based on the receiver
load requirements. The device stops delivering power
during a fault condition, or if a foreign object is detected.

The LTC4125 also includes a programmable maximum
average input current limit and an NTC input as additional
means for foreign object and overload protection. The
LTC4125 is available in a 20-lead low profile (0.75mm)
4mm × 5mm QFN package.

L, LT , LT C , LT M, Linear Technology and the Linear logo are registered trademarks and
AutoResonant is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 9041254.
*The AutoResonant and Auto Load Detect features use patent pending circuits and algorithms.

Typical applicaTion

V

3V TO 5.5V

20mΩ

11.3k

IN

2.21k

V

IN

100k

59.0k

10nF

1µF

IN IN1 IN2

STAT

–

IS

+

IS

EN

FTH

PTHM

IMON CTD CTS GND

348k

LTC4125

470pF10nF

5W Wireless Transmitter

100µF

10k

NTC

SW1

L

100k

5.23k

TX

24µH

4125 TA01

10k

C

TX

100nF

SW2

V

IN

FB

4.7nF

For more information www.linear.com/LTC4125

V

C

FB1

0.1µF

L

L

TX

AIR GAP

RX

COIL

RECEIVER

CIRCUIT

R

4125f

COIL

TRANSMITTER

CIRCUIT

IN

1

LTC4125

(Note 1)

IN, IS–, CTD ............................................. –0.3V to 6V

IN1, IN2, IS

DTH, FTH, PTHM, FB ................... –0.3V to V

NTC, EN, PTH1, PTH2, CTS.......... –0.3V to V

IMON ................ –0.3V to MIN(V

STAT ........................................... –0.3V to V

STAT ......................................................–1mA to 2mA

Operating Junction Temperature Range

(Note 2) ............................................. –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

+

................................. –0.3V to VIN + 0.3V

+ 0.3V

IN

+ 0.3V

IN

, VIS+, VIS–) + 0.3V

IN

+ 0.3V

IN

pin conFiguraTionabsoluTe MaxiMuM raTings

TOP VIEW

IN1

SW1

SW2

IN2

20 19 18 17

PTH2

GND

16

EN

15

CTD

14

FB

13

PTHM

12

11

PTH1

1

IN

CTS

2

–

IS

3

+

4

IS

IMON

5

6

NTC

20-LEAD (4mm × 5mm) PLASTIC QFN

EXPOSED PAD (PIN 21) MUST BE CONNECTED TO GND

T

21

GND

7 8

9 10

FTH

DTH

STAT

UFD20 PACKAGE

=125°C, θJA=43°C/W

JMAX

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4125EUFD#PBF LTC4125EUFD#TRPBF 4125 20-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C

LTC4125IUFD#PBF LTC4125IUFD#TRPBF 4125 20-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with

#TRMPBF suffix.

2

4125f

For more information www.linear.com/LTC4125

LTC4125

elecTrical characTerisTics

The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA=25°C. VIN =V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

=V

Input Supply Operating Range V

Input Supply Quiescent Current
At IN pin
At IN1, IN2 pin

Enable Pin

EN Leakage Current V
EN Falling Threshold V
EN Hysteresis 16 mV

Search Delay Oscillator Pins

I

CTS,PU

I

CTS,PD

CTS Pull-Up Current V

CTS Pull-Down Current V

CTS Pin Frequency C

CTS Threshold for AutoResonant Disable

I

CTD,PU

I

CTD,PD

CTD Pull-Up Current V

CTD Pull-Down Current V

CTD Pin Frequency C

Resonant Driver and Pulse Width Modulator

Operating Frequency Range 50 250 kHz

R

A,B,C,D

Switch On Resistances MOSFETs A, B, C and D (Block Diagram) 150 mΩ

Switch Pins Minimum On Time SW1, SW2 150 ns

Minimum PTH Voltage for Switching 35 mV

PTH Voltage to Pulse Width Gain normalized to
the LC natural frequency (f

)

n

PTH Pull Up Current when Overdriving V

PTH Pull Down Current when Overdriving V

Auto Load Detection

Step Size during Auto Load Detection

V

PTH

Search

Delay Time between Optimum Point Search C

Optimum Point Search Duration C

FB Pin Leakage Current V

FB Over-Range Rising Threshold V

FB Over-Range Threshold Hysteresis 40 mV

PTHM Pin Leakage Current V

PTHM Pin Common Mode Voltage Range 0 5 V

FTH Pin Leakage Current V

FTH Voltage to Frequency Gain 64 kHz/V

DTH Pin Leakage Current V

SW1 and SW2 Open

EN = 5V

SW1 On Time • f
SW2 On Time • f

=V

IN

IN1

IN2

=5V

EN

Falling 1.20 V

EN

=0V –10 µA

CTS

=2V 10 µA

CTS

=4.7nF 1.0 1.7 2.4 kHz

CTS

=0V –10 µA

CTD

=2V 10 µA

CTD

=470pF 10 17 24 kHz

CTD

/ ∆V

n

PTH1

/ ∆V

n

PTH2

=V

=V

=5V

PTH2

PTH2

=0V

=5V

PTH1

PTH1

=470pF 3.7 s

CTD

=470pF (Figure 13) 40 ms

CTS

=5V

FB

Rising

FB

PTHM

=0V

FTH

=0V

DTH

=V

IN1

,

=5V unless otherwise noted (Notes 2, 3).

IN2

l

3 5.5 V

1

50

l

0.2 0.5 1.2 μA

l

1.8 2.3 2.8 V

2

150

0.24 V

l

–20 –10 –5 μA

l

10 20 40 μA

mA

μA

–1

75 mV

l

0.2 0.5 1.2 μA

l

VIN – 0.04 VINVIN + 0.04 V

l

0.2 0.5 1.2 μA

l

–1.2 –0.5 –0.2 μA

l

–1.2 –0.5 –0.2 μA

For more information www.linear.com/LTC4125

4125f

3

LTC4125

elecTrical characTerisTics

The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA=25°C. VIN =V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Current Limit and Monitoring

– Sense Voltage Offset

V

IS+,IS

+

Pin Current VIS+=5V, VIS+

IS

–

Pin Current VIS–=VIS+=5V 15 μA

IS

IMON Pin Leakage Current V

V

ITH

Input Current Comparator Threshold at IMON

IS+,IS

V

IMON

–=–50mV, V

Rising

during Search

V

ILIM

Input Current Limit Comparator Threshold at

V

IMON

Rising

IMON during Delay Time

Input Current Limit Comparator Hysteresis 40 mV

Thermistor Input

NTC Hot Threshold V

NTC Thresholds Hysteresis % of V

NTC Open Circuit Voltage % of V

Falling, % of V

NTC

IN

IN

NTC Open Circuit Input Resistance 300 kΩ

Open Drain Status Pin

STAT Pin Leakage Current V

STAT Pin Output Voltage Low I

=5V –1 1 μA

STAT

=1mA

STAT

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LTC4125 is tested under conditions such that T

≈ TA. The

J

LTC4125E is guaranteed to meet specifications from 0°C to 85°C junction
temperature. Specifications over the -40°C to 125°C operating junction
temperature are assured by design, characterization and correlation
with statistical process controls. The LTC4125I is guaranteed over the
full -40°C to 125°C operating junction temperature range. The junction
temperature (T
in °C) and power dissipation (P

, in °C) is calculated from the ambient temperature (TA,

J

, in Watts) according to the following

D

formula:
TJ=TA + (PD • θJA), where θJA (in °C/W) is the package thermal
impedance.

–=–50mV –100 100 nA

,IS

IMON

IN

Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors. This IC includes over temperature protection
that is intended to protect the device during momentary SW MOSFETs
over current situation. Junction temperature will exceed 125°C when over
temperature protection is active. Continuous operation above the specified
maximum operating junction temperature may impair device reliability.

Note 3: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.

Note 4: This IC includes overtemperature protection that is intended
to protect the device. Junction temperature will exceed 125°C when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature will reduce lifetime.

=V

IN1

=5V unless otherwise noted (Notes 2, 3).

IN2

–500

l

–1.5

500

1.5

µV

mV

=0V – 5V –100 100 nA

l

0.785 0.800 0.815 V

l

1.175 1.200 1.225 V

l

33 35 37 % VIN

5 % V

l

48 50 52 % V

l

0.4 V

IN

IN

4

4125f

For more information www.linear.com/LTC4125

Typical perForMance characTerisTics

=25°C, unless otherwise noted.

T

A

LTC4125

Supply Quiescent Current at IN,
IN1 and IN2 Over Temperature

1.6
VIN = V

= V

= 5V

IN1

SW1 = SW2 = OPEN

1.4

1.2

1.0

0.8

(mA)

IN

I

0.6

0.4

0.2

0.0

–45

IN2

I

IN

I

, I

IN1

IN2

TEMPERATURE (°C)

CTS, CTD Pin Frequency and
Search Delay Time Over
Temperature

22.5
CTD = CTS = 470pF

19.5

F

, F

CTD

(kHz)

16.5

CTS

, F

CTD

F

13.5

CTS

SEARCH DELAY TIME (T3)

EN Threshold
Over Temperature

120.0

105.0

90.0

75.0

60.0

45.0

30.0

15.0

0.0

8030

130555 105–20

4125 G01

1.225

1.220

1.215

1.210

I

IN1

1.205

, I

IN2

1.200

(µA)

1.195

1.190

EN FALLING THRESHOLD (V)

1.185

1.180

1.175
–45

EN FALLING THRESHOLD

HYSTERESIS

8030

TEMPERATURE (°C)

4125 G02

40.0

36.0

32.0

HYSTERESIS (mV)

28.0

24.0

20.0

16.0

12.0

8.0

4.0

0.0

130555 105–20

Switch Resistances Over
Temperature

6.0

T3 – SEARCH DELAY TIME (s)

5.0

4.0

3.0

200

VIN = 5V

160

120

80

RESISTANCE (mΩ)

40

RA, R

D

RB, R

C

10.5
–45

VIS+

,IS

Over Temperature

1.5
V

= 5V

ISN

1

0.5

– (mV)

0

,IS

+

IS

V

–0.5

–1.0

–1.5

–45

TEMPERATURE (°C)

8030

4125 G03

– Sense Amplifier Offset

TEMPERATURE (°C)

8030

4125 G05

For more information www.linear.com/LTC4125

2.0

130555 105–20

0

–45

TEMPERATURE (°C)

8030

130555 105–20

4125 G04

Input Current Threshold and Limit
Over Temperature

1.225

1.220

1.215

1.210

1.205

(V)

1.200

IMON

V

1.195

1.190

1.185

1.180

130555 105–20

1.175

INPUT CURRENT THRESHOLD

INPUT CURRENT LIMIT

–45

TEMPERATURE (°C)

8030

4125 G06

0.815

0.812

0.809

0.806
V

0.803

IMON

0.800

(V)

0.797

0.794

0.791

0.788

0.785

130555 105–20

4125f

5

LTC4125

I

• R

I

R

R

R

V

R

0.80V

R

V

R

1.20V

pin FuncTions

IN (Pin 1): Input Supply Voltage: 3V to 5.5V. Supplies
power to the internal circuitry. A local 1µF bypass capacitor
to GND is recommended on this pin.

CTS (Pin 2): Transmit Power Search Settling Time
Capacitor. Attach a capacitor from the CTS pin to GND
to program the transmit power search settling time.
Recommended settling times are typically between 1ms
and 20ms. See Applications Information for programming
instructions. While not recommended, short to IN to disable
the AutoResonant driver.

–

(Pin 3): Input Current Sense Negative Input. Connect

IS

a current sense resistor (R

–

age and IS

using Kelvin Sense practices to monitor the

input supply current. Tie this pin to the IS

) between the supply volt-

IS

+

pin if no input
current monitoring is desired. Refer to the Applications
Information section for complete details.

+

(Pin 4): Input Current Sense Positive Input. Connect

IS

this pin via an input current sense gain resistor (R
supply voltage connected to the R

sense resistor. This

IS

) to the

IN

pin sinks a current proportional to the voltage across the
sense resistor (R

) which is used to generate the IMON

IS

output (see Block Diagram):

RIS

+

I

=

IS

IS

R

IN

Tie this pin to the IS– pin if no input current monitoring
is desired. Refer to the Applications Information section
for complete details.

IMON (Pin 5): Input Current Monitor. The IMON pin
sources a current that is proportional to the sense volt
age across the sense resistor (R
resistor (R

), the voltage on this pin is expressed as

IMON

). With an output gain

IS

-

follows and corresponds directly to the input current (see
Block Diagram):

•

RIS

V

IIMON

=

IS

•R

R

IN

IMON

Connect an appropriate capacitor in parallel with R

IMON

=

• ΔV

R

IN

RIS

IMON

on
this pin to obtain a time-averaged voltage representation
of the input current (see Applications Information for more
details). If the voltage on this pin reaches 0.80V (V

ITH

, typ)

during a power search, an internal comparator indicates
that the input current threshold has been exceeded, and the
search is paused at this state until the next search interval.
The programmed input current threshold is determined
using the following formula:

R

IN

IMON

ITH=

If the voltage on the IMON pin exceeds 1.20V (V

ITH

•

R

IS

IN

=

R

IMON

•

R

IS

, typ)

ILIM

at any point during the pause/delay time between the
search intervals, an internal comparator indicates that
input current limit has been exceeded, the power delivery
is immediately stopped, and a new search interval is initi

­ated. The programmed input current limit is determined
using the following formula

I

LIM

IN

=

R

IMON

ILIM

•

R

IS

:

IN

=

R

IMON

•

R

IS

Short this pin to GND to disable the input current monitor
feature.

NTC (Pin 6): Thermistor Input. Connect a thermistor
from NTC to GND, and a corresponding resistor from IN
to NTC. The voltage level on this pin determines if the
thermistor temperature is within an acceptable range.
The power delivery is stopped if the thermistor indicates
a temperature that is too hot. This feature may be used
to detect the presence of a foreign metal object or other
transmission fault. Once the temperature returns to the
safe region, power delivery resumes. Refer to the Appli

­cations Information section for suggested usage. Leave
this pin open to disable the temperature qualified power
delivery feature.

DTH (Pin 7): Delta FB Threshold Input. This pin is used
to adjust the minimum detected power step size in the
transmit power search to find the optimum transmitter
power operating point. The default setting (pin shorted to
IN) ensures proper operation in most systems. However,
in very low power or very weakly coupled systems a
smaller step size may be desired. Connect this pin to the
center tap point of a resistor divider between IN and GND.
Please refer to the Operation and Applications Information
sections for more details.

4125f

6

For more information www.linear.com/LTC4125

pin FuncTions

LTC4125

STAT (Pin 8): Open Drain Status Pin. This pin pulls low
when the part is delivering power. When connected to an
LED, this pin provides a visual indicator that the LTC4125 is
delivering power to a valid resonant receiver. The STAT pin
is high-impedance during a fault condition or if no receiver
is detected during the most recent transmit power sweep.

FTH (Pin 9): Frequency Threshold Input. This pin is used
to program the primary foreign object detection method.
Connect this pin to the center tap point of a resistor di
vider between IN and GND to set the maximum expected
transmit LC resonant frequency value (see Applications
Information for programming details). A resonant driving
frequency exceeding the programmed value indicates the
presence of a large conductive object in the field space
generated by the transmit coil. Such a condition reduces
the apparent inductance of the LC tank resulting in a higher
driving frequency. Transmitting into a foreign conductive
object may result in TX power overload and/or exces
sive heating of the foreign object. If a frequency fault is
detected, power delivery will immediately stop until the
next transmit power search.

PTH2 (Pin 10): Pulse Width Threshold Two Pin. The posi
tive pulse width waveform on the SW2 pin is proportional
to the voltage on this pin.

(Pin 11): Pulse Width Threshold One Pin. The posi

PTH1

tive pulse width waveform on the SW1 pin is proportional
to the voltage on this pin.

PTHM (Pin 12): Minimum Driver Pulse Width Input. The
voltage value on this pin determines the minimum driver
pulse width value used in the transmit power search. The
driver pulse width corresponds to transmit power. Shorting
this pin to GND sets the pulse width of the first step in the
search to 1/32 of the natural period of the transmitting LC
tank. A faster transmit power search can be implemented
when it is known that low transmit power (corresponding
to the 1/32 period pulse width) is not sufficient to meet
the requirements of the receiver load. Connect the pin to
the center tap point of a resistor divider between IN and
GND (See Applications Information) to program a larger
minimum pulse width.

FB (Pin 13): Resonance Feedback Voltage. Connect this
pin to the center tap point of a resistor divider between

-

-

-

-

the rectified peak voltage generated in the series LC tank
and GND (see Applications Information). The voltage on
the FB pin is monitored during the transmit power search
to determine when the load requirements of the receiver
have been met or exceeded. Short this pin to GND to dis
able the internal auto load detection feature.

CTD (Pin 14):

Attach a capacitor from the CTD pin to GND to program
the delay time between each cycle of an optimum transmit
power search. Recommended delay times are typically 1s
or greater. See Applications Information for programming
instructions. Short to GND to stop search after the first
cycle or leave open to default to a minimum delay time
(~20ms) between search intervals.

EN (Pin 15): Enable Input Pin. Drive this pin above 1.22V
(typ) to disable the AutoResonant driver. The SW1 and
SW2 pins default low when driver is disabled. Leave the
EN pin open or shorted to GND when disable function is
not used.

GND (Pin 16, Exposed Pad Pin 21): Device Ground.
Connect this ground pin to a suitable PCB copper ground
plane for proper electrical operation and rated thermal
performance.

IN2 (Pin 17): Input Supply Voltage: 3V to 5.5V. Supplies
power to the second half of the full bridge drivers. A local
47µF bypass capacitor to GND is recommended on this pin.

SW2 (Pin 18): Switch 2 Pin. This pin is the center node
of the second half of the full bridge switches. Connect a
series LC network between this pin and the SW1 pin for
full bridge operation.

SW1 (Pin 19): Switch 1 Pin. This pin is the center node of
the first half of the full bridge switches. Connect a series LC
network between this pin and the SW2 pin for full bridge
operation. Connect a series LC network between this
pin and GND when only half bridge operation is desired.
Maximum transmit power available is higher with full
bridge operation.

IN1 (Pin 20): Input Supply Voltage: 3V to 5.5V. Supplies
power to the first half of the full bridge drivers. A local
47µF bypass capacitor to GND is recommended on this pin.

Transmit Power Search Delay Time Capacitor.

-

For more information www.linear.com/LTC4125

4125f

7

LTC4125

FuncTional block DiagraM

C

FB1

C

IMONRIMON

V

IN

V

TANK

D

FB

R

FB1

C

FB2

3V TO 5.5V

R

NTC1

R

NTC2

V

IN

R

FB2

R

R

DTH1

DTH2

V

IN

V

IN

D

C

B

A

10MΩ

IN2

SW2

SW1

IN1

FTH

PTH1

PTH2

17

18

19

20

9

11

10

C

IN2

C

TX

V

TANK

L

TX

V

IN

C

IN1

V

IN

R

FTH1

R

FTH2

I

IN

IMON

5

NTC

6

DTH

7

FB

13

10MΩ

FB

R

4

IS

I

LIMREF

V

IN

MAXREF

R

IS

C

IN

C

IF

3

+

+

–

IS

A1

A2

TS

2

EXT OSC

–

V

IN

INT OSC

A3

+

TOO HOT

–

V

IN

+
–

10MΩ

A5

V

A/D

V

A/D

V

IN

IN

IN

LOGIC

C

TD

CTS14CTD

FREQUENCY
TO VOLTAGE
CONVERTER

STARTUP

BG

I

LIMREF

DIE TEMP

SENSOR

D/A

D/A

V

IN

SW

DRIVER

RESONANT

FEEDBACK

PULSE WIDTH

MODULATOR

C

IN

1

IN

A4

–
+

8

A/D

10MΩ

A6

PTHM

12

R

PTHM1

V

IN

R

PTHM2

EN

15

R

STAT

V

IN

STAT

8

GND

16

4125 BD

4125f

For more information www.linear.com/LTC4125

operaTion

+
–

1

V

R

L

R

LTC4125

INTRODUCTION

A wireless power system is composed of two parts sepa­rated by an air gap: transmit circuitry with a transmit coil,

cuitr

and receive cir

y with a receive coil. The LTC4125 is the
power controller for a simple but versatile wireless power
transmitter. The LTC4125 enhances a basic wireless power
transmitter by providing three key features: an AutoReso

­nant function that maximizes available receiver power, an
Optimum Power Sear
wireless power system efficiency and foreign object detec

ch algorithm that maximizes overall

­tion to ensure safe and reliable operation when working
in the

presence of conductive foreign objects. In order to
understand these features, an overview of wireless power
systems is required.

In a typical wireless power system, an AC magnetic field
is generated by a transmit coil which then induces an
AC current in the receive coil—like a typical transformer
system. The main difference between a transformer sys

-

tem and a wireless power system is that an air gap (or

)

other non-magnetic material gap

separates the primary
(transmitter) and secondary (receiver). Furthermore, the
coupling between the transmit and the receive coils is typi

­cally very low. Whereas a coupling of 0.95 to 1 is common
in a transformer system,

the coupling coefficient in the

wireless power system varies from 0.8 to as low as 0.05.

L

L

TX

RX

COIL

COIL

LTC4125

TRANSMITTER

V

IN

Figure1. Typical Wireless Power System Setup

CIRCUIT

AIR GAP

LOW COUPLING BETWEEN COILS

RECEIVER

CIRCUIT

R

L

4125 F01

There are various ways of producing a large AC current in
an inductor from a DC voltage. The LTC4125 is designed
to employ one of the simplest and most efficient methods
using a series LC resonant circuit.

SERIES RLC

Iasin(ωt + θ)

sinωt V

V

a

Figure2. Simple Series Resonant RLC Circuit

R

+

I

L

L

C

L

–

4125 F2

Figure2 shows a simple series resonant circuit. When
driven with a sinusoid voltage at the resonant frequency
the impedance of the inductor and the capacitor cancels
leaving a pure resistance R. The resonant frequency can
be calculated as:

fn=

2πLC

Therefore at resonance the amplitude of current developed
in the inductor is simply:

a

Ia=

Notice that at resonance, with a low enough R value, a
significant amount of inductor current can be generated.
Furthermore, the inductor voltage is proportional to the
driving voltage:

ω

VL= Ia• ωnL = Va•

n

= QV

a

In order to induce enough AC current in the receive coil
with such low coupling, a strong magnetic field is needed.
Since the magnetic field generated by the transmit coil is
proportional to the current flowing in the coil, a large AC
current needs to be generated in the transmit coil.

where Q is the familiar quality factor of the series tank.

The LTC4125 enables a series LC to be driven at exactly
its resonant frequency with ease. It uses a patent pending
AutoResonant method to automatically detect the resonant
frequency of the series LC connected to its switch pins
and drive it at that frequency.

4125f

For more information www.linear.com/LTC4125

9

LTC4125

operaTion

AUTORESONANT DRIVE

Consider the series resonant structure in Figure2. If a
square wave voltage source is used instead of a sinusoi

­dal voltage source, the analysis for the rest of the circuit
does not change significantly assuming the values of
R, L and C result in a high quality factor (Q greater than

10). The frequency selectivity of a high Q circuit ensures
that primarily the fundamental component of the square
wave affects the voltage and current waveforms across
the inductor and the capacitor (Figure3).

At start up, the LTC4125 will drive the LC tank with a 50%
duty cycle square wave at 2.5kHz. When current is devel

­oped in the LC tank, the LTC4125 detects this condition,
and adjusts the frequency of the drive voltage accordingly.

I

V

Figure3. LC Tank Voltage and Current Waveforms with
Square Wave Input at the Resonant Frequency

L

IN

V

L

4125 F03

AutoResonant Drive ensures that the voltage at each SW
pin is always in phase with the current into the pin (refer
to the Block Diagram: when current is flowing from SW1
to SW2, switch A and C are on while D and B are off; and
vice versa in reverse). Locking the driving frequency cycle
by cycle with this method ensures that LTC4125 always
drives the external LC network at its resonant frequency.
This is true even with continuously changing variables that
affect the resonant frequency of the LC tank such as tem

­perature and the reflected impedance of a nearby receiver.

coupling conditions, such a strong magnetic field will be
inefficient and may damage the receiver. Given dissipative
elements in the transmit circuitry, transmitting any more
power than necessary will result in reduced efficiency.
Therefore it is desirable to adjust the strength of the
magnetic field generated by the transmit coil such that
just enough power is available to support the load at the
receive coil—the optimum transmit power point.

Aside from efficiency, there is also a matter of safety.
When a conductive object is placed in the magnetic field
generated by the transmit coil, eddy current will be gener

­ated in the object. These eddy currents generate heat due
to the object resistance.

This heating is undesirable for

safety reasons, especially in higher power applications.

LTC4125 has features that address these two issues:
improved efficiency across all coupling conditions and
foreign object detection/protection that enhances safe
operations.

OPTIMUM POWER SEARCH OPERATION

The Optimum Power Search takes advantage of the fact that
transmit power can be adjusted by varying the pulse width
of the full bridge driver. AutoResonant Drive continues
to operate as pulse width is varied to control the amount
of transmit coil current. Figure4 shows tank current and
voltage waveforms using a drive pulse width resulting in
a duty cycle less than 50%.

V

IN

I

L

V

L

4125 F04

OPTIMUM POWER SEARCH BACKGROUND

In a wireless power system, the magnetic field at the
transmit coil needs to be strong enough to ensure that
sufficient power can be delivered to the receiver load at
the worst coupling condition. However, under best case

10

For more information www.linear.com/LTC4125

Figure4. LC Tank Voltage and Current Waveforms with Square
Wave Input at Less Than 50% Duty Cycle for a Series RLC Circuit

The drive duty cycle is proportional to pulse width. Figure5
shows how tank current increases as duty cycle is varied
from 0% to 50%. Note that controlling the amplitude of
transmit coil current is equivalent to controlling the volt

­age amplitude across the coil at a particular frequency.

4125f

operaTion

LTC4125

By adjusting the pulse width of the full bridge driver, the
LTC4125 can control both coil current and voltage.

14.0
LTX = 24µH

= 100nF

C

TX

10.0

8.0

6.0

AMPLITUDE (A)

L

4.0

I

2.0

0

0

DUTY CYCLE (%)

VIN = 5V

VIN = 3V

35 4015 20

5025 3010 455

4125 F05

Figure5. Typical Amplitude of Current Generated at the Transmit

Coil versus Duty Cycle with the AutoResonant Method

The Optimum Power Search works by performing a step­wise linear ramp of transmit power at regular intervals
to detect the presence or absence of a valid receiver,

the
presence or absence of a fault condition, and to optimize
the transmit power delivery. The linear ramp of transmit
power is accomplished through pulse width modulation
(PWM) of the full bridge driver one step at a time. Using
the FB pin, the LTC4125 monitors the magnitude of the
transmit LC tank voltage at each step.

reduced to zero: the temperature threshold as determined
by the NTC input, the maximum tank voltage threshold,
the internal die over temperature threshold, or the fre

­quency threshold (foreign object) and the input current
limit (I

). With the pulse width reduced to zero, NO

LIM

power is delivered due to these fault conditions until the
next search interval. When these fault conditions occur,
the STAT pin becomes high impedance to indicate that no
power is being delivered to the RX coil.The only exception
is when the input current exceeds the input current limit

). This particular fault condition does not cause the

(I

LIM

STAT pin to be high impedance.

This description is captured graphically in the flow chart
of Figure6 and Figure13.

START

* FAULT CONDITIONS:

1. V

NTC

2. VFB > V

IN

3. DIE TEMPERATURE

4. FREQUENCY THRESHOLD

5. I

LIM

6. END OF SEARCH RAMP

NO

RST

PULSE WIDTH

AND WAIT (T1)

STEP

PULSE WIDTH

AND WAIT (T2)

To optimize transmit power delivery, the LTC4125 looks
for a large change in peak tank voltage (up or down)
from one step to the next (see Applications Information
section). This indicates that the transmit power required
to satisfy the receiver load has been met or exceeded.
Once the LTC4125 detects a sufficiently large change in
tank voltage the search stops, having found a valid exit
condition. The transmit power is held at this level until the
next search interval.

If the input current exceeds the input current threshold

) during the power search, then the search stops and

(I

TH

the pulse width is held until the next search interval. This
is also a valid exit condition. When any valid exit condition
is found, the STAT pin is pulled low to indicate that power
is being delivered to the RX coil.

If any of the following thresholds are exceeded during
power search, then the search stops and the pulse width is

For more information www.linear.com/LTC4125

NO

FAULT

CONDITION*

EXISTS?

YESYES

RST

PULSE WIDTH

DELAY

(T3)

START DELAY

CONDITION*

NO

EXISTS? OR END

EXIT
CONDITION
SATISFIED?

TIMER (T3)

FAULT

OF DELAY

TIMER?

YES

Figure6. Load Auto Detect Flow Chart

4125 F06

4125f

11

LTC4125

R

V

R

0.80V

operaTion

Exit Conditions

The Optimum Power Search employs many exit conditions
to ensure that the optimum transmit power is found during
a search across many different operating situations. The
primary exit conditions are not user programmable. Under
most operating conditions, these primary exit conditions
will produce the optimum transmit power.

However, two user programmable exit conditions are
provided to enable additional functionality and improved
performance in some scenarios: input current threshold
and differential tank voltage threshold. Input current
threshold is programmable using R

ITH=

R

IN

IMON

ITH

•

R

IS

IN

=

R

IMON

Referring to the Block Diagram, V

•

IMON

IN

R

IS

sion of the differential voltage across R
greater than 0.80V (V

, typ), the input current threshold

ITH

, R

is a gained up ver-

IMON

. When V

IS

and RIS:

IMON

is

is reached. When this occurs during an Optimum Power
Search interval, the search stops and the pulse width is
held until the next search interval.

D

uring

-

The second user programmable exit condition sets a dif
ferential FB pin voltage threshold using the DTH pin.
the Optimum Power Search, this threshold is compared
to the FB pin voltage increase resulting from one pulse
width step to the next. If the threshold is exceeded, the
exit condition is met. As described previously, when an
exit condition is met, the pulse width (i.e. transmit power
level) is held until the next search interval.

The DTH threshold is a useful exit condition when coupling
between the transmit and receive coils is poor. Shorting
the DTH pin to the IN pin will ensure that this exit condi

­tion is ignored. This default setting is sufficient in most
applications.

Please refer to the Applications Information

section for details on how to program this pin.

Fault Conditions

A fault condition will cause the Optimum Power Search
to stop transmitting power immediately by keeping the
pulse width at zero until the next search interval. There
are six fault conditions: frequency (foreign object), NTC
(external temperature), over voltage, end of search ramp,
input current limit and internal (die) over temperature.

The frequency threshold is programmed by the FTH pin. If
the AutoResonant Drive frequency exceeds the frequency
threshold during the power search, then the search stops
and the pulse width is reduced to zero. This condition may
indicate the presence of a conductive foreign object. No
power is delivered until the next search interval.

An external over temperature condition is detected via
the NTC pin. If V
(typically 35% of V

falls below the NTC Hot Threshold

NTC

) during the power search, then

IN

the search stops and the pulse width is reduced to zero.
No power is delivered until the next search interval. The
NTC thermistor can be used to monitor the temperature
of the transmit coil to ensure safe operation of the coil.
Furthermore, the presence of a conductive foreign object
that generates heat when placed in the magnetic field of
the coil can also be sensed with this technique.

Excessive tank voltage is detected via the FB pin voltage. If

exceeds VIN during the power search, then the search

V

FB

stops and the pulse width is reduced to zero. No power is
delivered until the next search interval.

Another fault condition exists when the power search
ramp has reached its maximum pulse width (50% duty
cycle) and no optimum transmit power has been found.
This typically indicates that no receiver is present or that a
conductive foreign object is present between the transmit
and receive coils preventing any significant power from
being delivered to the receiver. Transmit power is reduced
to zero until the next search interval.

4125f

12

For more information www.linear.com/LTC4125

R

V

R

1.20V

operaTion

LTC4125

Input current limit is detected via the IMON pin. If the
voltage on the IMON pin exceeds 1.20V (V

, typ) after

ILIM

a valid exit condition is found, transmit power is reduced
to zero until the next search interval. Input current limit
is programmable using R

I

LIM

IN

=

R

IMON

ILIM

•

R

, R

IN

=

R

IS

Referring to the Block Diagram, V
sion of the differential voltage across R
is greater than 1.20V (V

, typ), the input current limit

ILIM

is reached. Notice that for the same values of R
and R

, this input current limit is 150% (typ) of the input

IS

IMON

IN

IMON

and RIS:

•

R

IS

is a gained up ver-

IMON

. When V

IS

IN

, R

IMON

IMON

current threshold—one of the programmable valid exit
conditions.

The final fault condition used in the algorithm is the die
temperature of the LTC4125. If the internal die temperature
of the LTC4125 ever exceeds 150°C (typ), then transmit
power is immediately reduced to zero until the next search
interval. Unlike other fault conditions, the die temperature
fault is not limited to the duration of the Optimum Power
Search period.

vs I

I

TH

LIM

As noted in the previous two sections, there are two input
current parameters whose values are determined by R

and RIS: ITH (input current threshold) and I

R

IMON

current limit). When the input current exceeds I

LIM
TH

IN

(input

during

,

the optimum power search, the search will stop and the
LTC4125 maintains operation at or slightly above this
input current level. However, if the input current exceeds

at any point during operation, power transmission will

I

LIM

cease immediately until the next search interval. The input
current limit is 150% (typ) of the input current threshold.

V

PTH1/VPTH2

and Pulse Width

The pulse width of each half of the full bridge driver
can be monitored using the PTH1 and PTH2 pins. When
AutoResonant drive is enabled, the pulse width is:

⎛

PW

SWx

(s) =

0.24

⎜
⎝

• V

f

n

PTHx

⎞

+150ns

⎟
⎠

where fn is the full bridge resonant frequency, and 0.24 is
the typical normalized PTH voltage to Pulse Width Gain.
During the Optimum Power Search period, as the pulse
width increases, the voltage on the PTH pins increases as
well. When V

PTH1

or V

exceeds 2.4V, the maximum

PTH2

pulse width is guaranteed to have been reached, and the
end of search ramp fault condition stops power delivery
until the next search interval. Again, this typically indicates
that no receiver is present or that a conductive foreign
object is present.

PTHM

The pulse width of the first step in the Optimum Power
Search can be programmed using the PTHM pin. This fea

­ture helps the Optimum Power Search find the appropriate
pulse width when the minimum transmit power levels of
the full bridge are known. This requires characterization
of the application to know that the optimum operating
point is always above a certain pulse width for all condi

­tions. When PTHM is connected to ground, the first step
defaults to

150ns.

4125f

For more information www.linear.com/LTC4125

13

LTC4125

applicaTions inForMaTion

I

IN

4.5V

5.5V

20mΩ

TO

100k 100k

DTH

FTH

7.87k 59.0k

PTHM

IS

11.3k

10nF

IS

PTH1

PTH2

EN

10nF

V

IN

2.21k

1µF

–

+

IMON CTD CTS GND

348k

D

STAT

STATIN IN1 IN2

LTC4125

470pF

4.7nF

NTC

SW1

SW2

47µF
x 2

R

100nF

FB

L

TX

C

TX

C

FB1

DC1: CDBQR70
D

STAT

D

FB

R

NTCTX

RED INDICATES HIGH VOLTAGE PARTS

10k

AIR GAP

3mm

TO

10mm

L

TX

24µH

NTCTX

C

TX

D

V

IN

DC1

0.1µF

: 760308100110

: C3216C0G2A104J160AC

: GRM188R72A104KA35D

: LTST-C193KGKT-5A

: BAS521-7

: NTHS0603N02N1002J

FB

100k
100V

5.23k

C

FB1

0.1µF

33nF

L

RX

47µH

FAULT
CHRG

PROG GND FREQ INTV

DR1

DFLZ39

DR2

RUN IN DHC

LTC4120-4.2

3.01k

DR1, DR2, DR3: DFLS240L

: BZT52C13

D

C

M1: Si7308DN
QR1: PMBT3904M
R

NTCRX

: PCB COIL AND FERRITE: B67410-A0223-X195

L

RX

OR 760308101303
L1: LPS4018-153ML

10µF

BOOST

SW

CHGSNS

BAT

BATSNS

NTC

CC

2.2µF

R

NTCRX

: NTHS0402N02N1002F

10nF

L1
15µH

10k

24.9k

+

4125 07

47µF

SINGLE
CELL
Li-Ion
BATTERY
PACK

D

C

M1

R

C

1k

QR1

Figure7. LTC4125 Driving a 24μH Transmit Coil at 103kHz, with 1.3A Input Current Threshold, 119kHz Frequency
Limit and 41.5°C Transmit Coil Surface Temperature Limit in a Wireless Power System with LTC4120-4.2 as a
400mA Single Cell Li-Ion Battery Charger at the Receiver

In a typical design with LTC4125 (see Block Diagram
for component labels), the following steps are usually
followed: select a transmit coil (L
capacitor (C

, R

(R

FB1

, RIN, R

(R

IS

tors (R

FTH1

Settling Time (C
Delay Time (C

), determine the feedback voltage divider

TX

), determine the input current monitor resistors

FB2

), determine the frequency threshold resis-

IMON

, R

), determine the Optimum Power Search

FTH2

), determine the Optimum Power Search

TS

), determine the pulse width of the first

TD

step in the Optimum Power Search (R

), select a resonant

TX

PTHM1

, R

PTHM2

), and
finally, determine the differential FB pin voltage threshold
(R

DTH1

, R

DTH2

).

The following discussion elaborates on factors that need
to be considered for each of these steps. For further clar

­ity, an example for each step is discussed in the context
of the application circuit shown in Figure7.

TRANSMIT COIL SELECTION

There are several important parameters to consider when
making the transmit coil/inductor selection: the inductor
physical dimension, the inductance value, the inductor
quality factor (Q

), and the inductor saturation current.

L

All of these affect overall efficiency and power delivery
capability.

The physical dimension of the coil is important as it af

-

fects the overall coupling between the transmit and receive

The ideal size and shape of the transmit coil varies

coils.
depending on the application requirements. To name a
few: the end product size, shape and power requirement,
the freedom of placement desired in the final solution and
cost. As a guideline, many of the readily available wireless
power transmit coils are circular spiral coils with 50mm
diameter (Table 1). These coils are recommended as a
starting point when evaluating a design with LTC4125.

4125f

14

For more information www.linear.com/LTC4125

1

1

1

L

2πfL

applicaTions inForMaTion

LTC4125

Table 1. Recommended Transmit Coils

MANUFACTURER PART NUMBER

Würth 760308110 24 53 x 53 140

Würth 760308100110 24

Würth 760308100111 6.3

Inter Technical L41200T06 5 52 x 52 80

TDK WT505090-

20K2-A10-G

TDK WT505090-

10K2-A11-G

INDUCTANCE

(µH)

24

6.3

SIZE

(mm)

Dia. 50

Dia. 50

Dia. 50

Dia. 50

QUALITY

FACTOR AT

100kHz

140

100

50

100

Another important parameter to consider is the inductance
value of the coil itself. This value needs to be considered in
relation to the receive coil inductance value and the overall
wireless power system coupling between the transmit and
the receive coil. The ratio of the two inductance values
together with the coupling factor determines the voltage
and current possible on the receive coil, and therefore the
power delivery capability of the system.

The quality factor of an inductor at a particular frequency
is defined as follows:

ω

QL=

=

R

R

L

L

where ω is the target frequency in radians, f is the target
frequency in Hz, and R

is the inductor effective series

L

resistance. The higher the Q, the more efficient that par­ticular inductor is in carrying current at that frequency.

typical 24µH

A

transmit coil that is used to deliver power
up to 5W across a 1mm to 15mm distance has a quality
factor of ≈50 to 150 at 100kHz operating frequency.

Many commercially available transmit coils use ferrite
material to help boost the inductance value as well as
shape the magnetic field created by the transmit coil to
increase coupling and power delivery. However, ferrite
material limits the saturation current level. The satura

­tion current level needs to be higher than the maximum
current amplitude generated in the LC resonant structure
to ensure predictable inductance values and prevent po

­tential thermal runaways. The monolithic switches inside
the LTC4125 allow switches RMS current of up to 3.5A

(I

RMS-MAX

) before thermal rise (from 25°C ambient) in the
die causes the internal thermal shutdown to stop power
delivery in the coil.

In the specific application shown in Figure7, a 24μH coil
(760308100110) from Würth is used. It has a 50mm di

­ameter, a Q value of 140 at 100kHz as well as a saturation
current greater than

T

RANSMITTER RESONANT CAPACITOR SELECTION

10A.

The factors to consider when selecting the transmitter
capacitor are similar to the factors discussed previously
when making the inductor choice: the capacitance value,
the capacitor quality factor (Q

), and the voltage rating

C

of the capacitor. The physical dimension of the capacitor
is usually not a big factor since overall application size is
driven mainly by the size of the transmit coil.

First and foremost the parameter to consider is the ca

T

pacitance value itself.

he LTC4125 is designed to work

-

with resonant frequencies between 50kHz and 250kHz.
The AutoResonant feature of the LTC4125 ensures that
the series LC network is driven at the resonant frequency
of the LC network:

fo=

2π LC

Another important factor is the parasitic dissipative com­ponent of the capacitance. As with the inductor, one way
to measure this component is by looking at the quality
factor of

the capacitor. The capacitor quality factor is

described as:

QC=

ωCR

C

=

2πfCR

C

where ω is the target frequency in radians, f is the target
frequency in Hz, and R

is the capacitor effective series

C

resistance. The higher the Q, the more ideal that particular
capacitor is at that frequency.

For a given value of inductance, frequency and current
amplitude, the voltage that is developed across the inductor
and the capacitor is well defined. The capacitor voltage

4125f

For more information www.linear.com/LTC4125

15

LTC4125

( )

ωC

ωC

applicaTions inForMaTion

rating must be able to withstand this voltage. The maximum
voltage the capacitor must withstand is given by:

2

V

CMAX

=

I

LMAX

• I

=

RMS _MAX

where I

is the maximum inductor current during

LMAX

operation in the series LC circuit.

In the specific application shown in Figure7, a 100nF 100V
C0G capacitor (C3216C0G2A104J160AC) is used. The Q
value of the capacitor at 100kHz is not explicitly listed
in the data sheet but based on empirical measurement
it is much higher than the quality factor of the inductor
selected. With an expected maximum RMS current of 3A
(see Figure9 in the Feedback section immediately following
this section), and using the formula for V

CMAX

above, the

maximum voltage developed across the capacitor is 65V.

At 100nF, the resonant frequency that results with the
24µH inductor is 103kHz. Notice that the LC tank on the
receiver is tuned to 127kHz. This intentional difference in
tuning frequency is to ensure that the DHC feature in the
LTC4120 receiver IC functions properly given all the toler

­ances of the passive components—please see LTC4120
data sheet for details.

For all other applications without a
dynamic tuning feature, the transmit LC frequency should
be tuned about 20% lower than the receive LC resonant
frequency.

FEEDBACK

The next step involved in a typical design is determining
the values of the feedback resistors. LTC4125 monitors
the voltage developed on the transmit coil via the feedback
(FB) pin. The Optimum Power Search uses this FB pin
voltage to determine an appropriate transmit power level.
In order to detect the peak of the transmit coil voltage, a
half wave rectifier consisting of a diode and a capacitor
is used as shown in Figure8. For the ensuing discussion,
please refer to Figure 9 and Figure 13 as well.

SW2

C

V

TANK

D

FB

R

FB1

C

FB1

C

Figure8. FB Pin Rectifier and Divider

TX

L

TX

SW1

FB

R

FB2

FB2

RED INDICATES HIGH VOLTAGE

LTC4125

4125 F08

The diode DFB reverse voltage rating needs to withstand
the highest peak-to-peak voltage generated at V

TANK

across
its operating range. From the resonant capacitor section,
the peak-to-peak voltage generated in the tank is twice
the maximum voltage developed across the capacitor.
Therefore in the particular example shown in Figure7,
with an expected maximum RMS current of the LC tank
at 3A, the maximum peak to peak voltage developed in
the tank is 130V.

Aside from its reverse voltage rating, the other param

­eters of the diode are not critical—in most applications,
the smallest packaged diode with the appropriate voltage
rating is selected.

The capacitor C

voltage rating needs to withstand the

FB1

maximum peak voltage generated by the tank, which is
65V for the example shown in Figure7.

The value of C
selected such that the time constant C

is also important. The value needs to be

FB1

FB1(RFB1+RFB2

) is
smaller than twice the time interval T2—the settling time
after each step. This ensures that the voltage developed
at C
sweep. Therefore, the value of C

has enough time to settle at each step during the

FB1

needs to satisfy the

FB1

following criteria:

C

<

FB1

T2

2 R

( )

FB1+RFB2

1.92 • 10

=

R

6

FB1+RFB2

C

TS

= 0.1µF typ

( )

4125f

16

For more information www.linear.com/LTC4125

FB2

IN

( )

( )

applicaTions inForMaTion

LTC4125

The recommended values for R
R

FB1

for C

+ R

FB1

≈ 100k. A typical recommended starting value

FB2

is 0.1µF. Refer to the Timer Capacitor section in

FB1

and R

are such that

FB2

the later part of this Applications Information on details
for setting the value of T2.

The capacitor C

is optional in most applications. It can

FB2

be used to clean up the signal at the FB pin further. This
capacitor voltage rating only needs to be 6V or less, and
its value needs to be selected such that the time constant

(R

//R

C

FB2

FB2

) is again less than twice the time interval

FB1

T2—the wait time after each step. Therefore, the value of

needs to satisfy the following criterion:

C

FB2

6

FB1RFB2

C

TS

C

FB2

A 0.1µF C

<

T2

2 R

FB1RFB2

capacitor is recommended and sufficient for

FB2

1.92 • 10

=

R

most applications.

The ratio of the resistor divider R

FB1

and R

based on the maximum tank voltage (V

TANK

is selected

FB2

). Follow these

steps when determining the maximum tank voltage:

1. Set the distance and orientation of the receiver coil with
respect to the transmit coil for the lowest coupling (this
condition usually requires the highest tank current, and
therefore, the highest tank voltage).

2. Short the two LTC4125 PTH pins together.

3. Sweep V

voltage.

PTH

4. Monitor the following: (see Figure 9)

a. Transmit tank voltage (V

in Figure 8)

TANK

b. Transmit circuit input RMS current

c. Rectified voltage at the receiver

d. Charge current at the receiver

Figure9 shows this sweep for the circuit shown in Figure7.
Note that the LTC4120 is set to charge a single cell Li-Ion
battery in the Constant Current mode at 400mA at the
maximum target separation of 10mm.

4125 F09

5025 3010 455

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0

CURRENT (A)

70.0

60.0

50.0

40.0

30.0

VOLTAGE (V)

20.0

10.0

Figure9. V
LTC4120 at the Receiver in CC Mode at 10mm Spacing

0

0

TANK

V

TANK

I

IN

V

RECT

I

CHG

, IIN, V

DUTY CYCLE (%)

and I

RECT

35 4015 20

vs Duty Cycle with

CHG

In this particular example, the tank voltage generated at
the optimum point is 50V (V

TANK-MAX

), and the maximum
input RMS current is 1.3A. To prevent an FB voltage
overrange fault, the divider needs to ensure that when

=55V, VFB is less than VIN—note 55V is picked

V

TANK

to give ~10% margin above the observed 50V max tank
voltage. Therefore, the resistor divider ratio should be set
according to the following formula:

V

R

R

TANK−MAX

V

FB1

TANK−MAX

>

⎛

R

<

⎜

R

⎝

FB2

V

FB1

+1

– V

⎞
⎟

⎠

D

• V

– 1≈

IN

+ V

55 – 1

D

– 1= 10

5

where VD is the diode drop of the rectification diode
used to rectify the LC tank voltage. Note that for a robust
design, functionality at all operating conditions needs
to be reverified once the feedback resistor dividers and
capacitors are chosen.

4125f

For more information www.linear.com/LTC4125

17

LTC4125

R

V

R

1.20V

R

V

R

0.80V

R

• R

IN

applicaTions inForMaTion

INPUT CURRENT LIMIT SETTING AND MONITORING

R

3V TO 5.5V

IS

LTC4125

IMON

C

R

IMON

IMON

Figure10. Input Current Limit and Monitoring

IS

R

IN

C

IF

+

1V

–

IS

A1

A2

4125 F10

Figure10 shows the architecture employed by the LTC4125
for the input current monitoring. The input current thresh­old, used as one of the exit conditions in the proprietary
Optimum Power Sear
nation of R

, RIN and R

IS

ch algorithm

IMON

, is set using a combi-

resistors according to the

following formula:

IN

=

R

IMON

ITHA

( )

where 0.80V is the typical V

The input current through the sense resistor R

ITH

•

R

IS

IN

=

R

ITH

IMON

.

•

R

IS

is avail-

IS

able for monitoring through the IMON pin. The voltage at
the IMON
resistor (R

V

pin varies with the current through the sense

) as follows:

IS

IMON

IMON

=

IS

• I

R

RIS

One of the fault conditions, the input current limit, is also
detected via the IMON pin. If the input current limit is
reached after a valid exit condition is found, transmit power

is reduced to zero until the next search interval. Input cur­rent limit is also programmable using R

I

LIM

IN

=

R

IMON

where 1.20V is the typical V

ILIM

•

R

IS

IN

=

R

IMON

.

ILIM

IN

•

R

IS

, R

IMON

and RIS:

As mentioned in the Operation section, for the same values
of R

IN

, R

and RIS, this input current limit is 150% of

IMON

the input current threshold.

Notice that the user has the ability to set the input current
threshold and limit by choosing values for three different
components. For most applications, the voltage drop across

at the current limit threshold is recommended to be

R

IS

less than 50mV, and the ratio of R
range of 10-40, with R

in the order of 10kΩ.

IN

to RIN to be in the

IMON

In the Figure7 example, the desired current threshold and
limit are 1.3A and 1.95A respectively. The R

is set to

IS

be 20mΩ to limit the drop across it to 40mV at the input
current limit. With R

set to 11.3kΩ, the R

IN

IMON

value is

348kΩ, yielding the final current threshold and limit of

1.3A and 1.95A respectively.

If the input current is time varying or noisy, as would be
expected of a sinusoidal load of an LC tank, add filtering
capacitors C

and C

IF

to obtain a time average voltage

IMON

at the IMON pin that corresponds to the time average value
of the current through the input current sense resistor.
The value of C

and C

IF

the time constants R

should be selected such that

IMON

INCIF

and R

IMONCIMON

are less than
T2—the settling time interval between each step in the
Optimum Power Search algorithm (Figure6). This is to
ensure that a current threshold exit condition can be de

­tected within a single step in the search. In the example
of Figure7, both C

and C

IF

are set to 10nF.

IMON

FREQUENCY THRESHOLD (FTH PIN)

As discussed in the Operation section, the AutoResonant
Drive used in the LTC4125 drives the external LC tank at
its resonant frequency. The frequency threshold input
(FTH) serves as the primary protection feature against
inadvertently transmitting power into a foreign object.

4125f

18

For more information www.linear.com/LTC4125

V

R

applicaTions inForMaTion

LTC4125

An internal frequency to voltage converter creates a volt­age representation of this AutoResonant Drive frequency

Block Diagram

(

). When a foreign conductive object is
brought close to the transmit coil, the apparent inductance
of the transmit coil is dramatically reduced and the driving
frequency of the LTC4125 adjusts to a higher frequency.

Figure11 shows the contrast between the tank voltage
frequency with and without the presence of a small con
ductive foreign object. The circuit in Figure7 is

-

used to
generate this figure with the two PTH pins shorted together
and driven at 0.5V, and a 15mm × 15mm copper square
plate placed directly on top of the coil as a conductive
foreign object.

50

V

= V

PTH2

= 0.5V

TIME (µs)

35 4015 20

f = 101kHz
f = 301kHz

5025 3010 455

4125 F11

PTH1

40

30

20

10

0

–10

VOLTAGE (V)

–20

–30

–40

–50

0

Figure11. Comparison of the LC Tank Voltage Frequency without
and with the Presence of a Conductive Foreign Object

Figure12 shows the difference in LTC4125 behavior when
a conductive foreign object is placed on the transmit coil,
with or without a frequency limit programmed at the FTH
pin. Again, the same circuit in Figure7 is used.

Note that without the FTH pin programmed (tied to V

IN

),
the LTC4125 does not detect a valid receiver circuit, and
therefore limits the power delivered to a foreign object to
only pulses of power that are generated during a search
interval. Without a valid receiver, the search fails to find
a valid exit condition until it reaches the end of the power
search ramp fault condition, which causes the transmitter
to stop delivering power before the next search interval.

(V)

PTH

V

2.5

2.0

1.5

1.0

0.5

0.0

WITHOUT FTH

0.00

V

FB

WITH

FTH

V

FB

V

PTH

V

PTH

WITHOUT
FTH

WITH FTH

TIME (s)

0.800.40

Figure12. Comparison of the PTH and FB Pins Waveforms
with and without the FTH Pin Programmed to Detect the
Presence of a Conductive Foreign Object

4125 F12

1.0

0.8

0.6

V

FB

(V)

0.4

0.2

0.0

1.000.600.20

The frequency limit is programmed via the FTH pin with
the following formula:

Therefore, without using FTH, these pulses of power will
continue to deliver a limited amount of power to the foreign
object. To eliminate even this small amount of transmitted

f

LIM

FTH

=

• 320kHz =

V

IN

R

FTH1

FTH2

+ R

FTH2

• 320kHz

power, the FTH pin can be programmed to about 10% to
15% higher than the expected resonant frequency (as
determined by the tank inductance and capacitance). If

Note that the internal frequency to voltage converter is
discretized to 7 bits with a full input range between 0kHz
and 320kHz. Therefore, the accuracy of the frequency
threshold input is limited to ±2.5kHz. The total resistance
of R

FTH1

plus R

is recommended to be in the order

FTH2

this frequency limit is exceeded at any point during the
search interval (typically at the first step), the LTC4125 will
cease to deliver any power to the object and the STAT pin
will be set to high impedance to indicate that the transmit
coil is not delivering any power.

of 100kΩ.

In the example shown in Figure7, the tank frequency is
103kHz, and the frequency threshold is set to be 119kHz,
with R

For more information www.linear.com/LTC4125

=59kΩ and R

FTH2

=100kΩ.

FTH1

4125f

19

LTC4125

256

32

T1

10µA

10µA

applicaTions inForMaTion

TIMER CAPACITORS—CTS AND C

TD

The capacitor connected to the CTS pin (CTS) sets the CTS
frequency (f

) which determines the step settling time

CTS

in the Optimum Power Search. This CTS frequency can
be programmed as follows:

f

=

CTS

where 10µA is the typical I

Similarly the capacitor connected to the CTD pin (C

CTS• 1.2V

CTS,PU

and I

CTS,PD

.

) sets

TD

the CTD frequency that can be programmed as follows:

f

=

CTD

where 10µA is the typical I

CTD• 1.2V

CTS,PU

and I

CTD,PD

.

Referring to Figure6 and Figure13, the two timing intervals
that use CTS frequency are T1—the wait time after the
initial reset at the beginning of the search, and T2—the
settling time after each pulse width step. The timing interval
that uses CTD frequency is T3—the delay time from the
end of one search to the beginning of the next search. The
three values are related to the timer frequencies as follows:

T1=

f

CTS

T2 =

f

CTS

=

8

T3 =

65 • 10

f

CTD

3

For the recommended CTS=4.7nF and CTD=470pF, these
timing intervals are T1= 144ms, T2=18ms, and T3= 3.7s.
The values of T1 and T2 need to be large enough such that
the system has time to settle back to its zero value after
reset (T1), and to settle to its new value after each step
(T2). For the recommended resonant frequency range of
50kHz to 250kHz, a starting value for the recommended

capacitor value is 4.7nF.

C

TS

1/V

V

PTH

20

PTH2

V

FB

T1 T 2 T2 T2 T 2 T2 T2 T 2 T2 T 2 T 2T3

OPTIMUM SEARCH DURATION OPTIMUM SEARCH DURATION

Figure13. Timing Diagram of Typical Search Cycles

For more information www.linear.com/LTC4125

T1 T3

4125 F13

4125f

n

IN

n

PTHM1+RPTHM2

⎝

⎠

applicaTions inForMaTion

LTC4125

The value of T3 determines the delay interval time between
each search. A starting value of 470pF for the C

capacitor

TD

sets this delay time between each search to 3.7s.

Figure 14 shows the voltage stepping at FB, PTH1 and
PTH2 for the circuit in Figure7 with C

=4.7nF, showing

TS

a successful sweep in finding an optimum power point.
Note that V
width while V

corresponds to the full bridge pulse

PTHx

corresponds to the transmit tank voltage.

FB

MINIMUM PULSE WIDTH (PTHM PIN)

In a typical search as shown in Figure14, the first pulse
width step is about 150ns. This corresponds to the mini
mum voltage on the PTHx pins (see the earlier V

PTH1/VPTH2

-

and Pulse Width section for more information).

2.5

2.0

1.5

VFB

In some applications users may find that across all operat­ing conditions, the pulse width never falls below a particular
value at the end of a sear

ch cycle. This indicates that the
lowest transmit power levels of the full bridge are not
required. If this is the case, the PTHM pin can be used to
program the size of the first step of the pulse width sweep
in the Optimum Power Search to reduce the search time.
This minimum pulse width value can be set according to
the following formula:

⎛

MINPW =

where 0.576 is the product of 0.24V–1 (the typical normal-

0.576

⎜
⎝

V

•

f

PTHM

V

⎞

+150ns

⎟
⎠

ized PTH voltage to pulse width gain) and 2.4V (the typical
maximum output voltage at the P

Using a resistor divider between V

TH pin).

and GND to set the

IN

voltage at the PTHM pin, the formula is simplified as follows:

MINPW =

⎛

0.576

⎜

R

•

f

PTHM2

R

⎞

+150ns

⎟

1.0

VOLTAGE (V)

V

= V

PTH1

VFB

V

PTH1

0.480.44

= V

PTH2

4125 F14a

PTH2

4125 F14b

0.5

0.0

2.5

2.1

1.7

1.3

VOLTAGE (V)

0.9

0.5

0.00

0.40

0.400.20

TIME (s)

TIME (s)

Figure14. FB, PTH1 and PTH2 Pins Voltage Stepping
During a Sweep with CTS = 4.7nF

where fn is the resonant frequency of the LC tank.

Figure15 contrasts the Optimum Power Search behavior
when using PTHM versus when PTHM is grounded. The
circuit in Figure7 is used to generate Figure15, with PTHM

0.600.300.10 0.50

0.500.460.42

set to 1.6V in one case and grounded in the other. Again,
remember that V
width while V

Figure15. Comparison of the PTH Pins Voltage Steps During a
Sweep with PTHM at GND and Programmed at a Particular Value

(V)

PTH

V

1.0

0.8

0.6

0.4

0.2

0.0

FB

0.0

corresponds to the full bridge pulse

PTHx

corresponds to the transmit tank voltage.

2.5

V

VFB VFB

VFB

V

PTH

TIME (s)

PTH

SEARCH
TIME WITH
PTHM SET

SEARCH
TIME
WITHOUT
PTHM SET

0.40.2

PTHM
LEVEL

4125 F15

2.0

1.5
V

FB

(V)

1.0

0.5

0.0

0.60.30.1 0.5

4125f

For more information www.linear.com/LTC4125

21

LTC4125

R

4125 F16

applicaTions inForMaTion

DELTA THRESHOLD (DTH PIN)

One of the exit conditions in the Optimum Power Search
algorithm is when the increase in the feedback voltage

) at any particular step during the sweep is larger than

(V

FB

. In a typical sweep such as shown by the voltage

V

DTH

steps in Figure14, multiple exit conditions implemented
by the LTC4125 to detect the optimum transmit power are
satisfied. Therefore the DTH programmable exit condition
is not required. However, some situations may benefit
from using DTH.

In the example circuit of Figure7, the V

exit condition

DTH

is useful in order to find the optimum power when the
LTC4120 receiver circuit has the lowest output power at
the highest target separation (lowest coupling). Figure16
shows an example of voltage stepping at the feedback
pin when the LTC4120 is charging a single cell Li-Ion
battery in trickle charge constant current mode at 40mA

=2.7V), at a 10mm distance. The dotted lines show

(V

BAT

the stepping at the FB and PTH pins when DTH is left open,
and the second graph shows the stepping at the same pins
when DTH is programmed appropriately.

In this particular example, the desired optimum power
point corresponds to when I

at the receiver is regu-

CHG

lated at its desired target of 40mA. In this low load, low

coupling condition, this exit point also coincides with a
voltage step at the feedback pin that is larger than all the
earlier voltage steps.

Note that Optimum Power Search only deems this condition

FB

>V

of ∆V
is less than V

immediately preceding the optimum point is 24mV,

∆V

FB

and ∆V

FB

valid when it follows a step where ∆VFB

DTH

/64. In the example shown in Figure16,

IN

at the optimum point is 432mV.

In order to detect the optimum point in this example, the
DTH pin needs to be programmed for a particular threshold
(less than 432mV) to allow the ∆V

FB

>V

exit condition.

DTH

The DTH threshold is programmed with a resistor divider
between V

V

DTH

and GND as follows:

IN

=

DTH2

R

DTH1+RDTH2

• V

IN

The FB pin voltage is sampled with an internal 7-bit A/D,
and the DTH pin comparator is also quantized to 7 bits
with both sharing a full input range of GND to V
fore, the ∆V

FB

>V

exit condition is subject to a 7-bit

DTH

. There-

IN

quantization or rounding error.

In this example, with V
is 39mV. Therefore, 432mV of V

=5V, the LSB of the 7-bit A/D

IN

step gives 11.08 bits.

FB

3.0

2.5

2.0

1.5

VOLTAGE (V)

1.0

0.5

0.0

0.0

Figure16. VFB Voltage Stepping During A Sweep with LTC4120 in
Trickle Charge CC Mode as the Receiver Circuit at 10mm Spacing

22

∆VFB

0.400.20

TIME (s)

For more information www.linear.com/LTC4125

42.0

35.0

28.0

I

CHG

AT RX (mA)

21.0

14.0

7.0

0.0

0.500.300.100.05 0.25 0.350.15 0.45

I

AT RX

CHG

WITH DTH

V

PTH

WITH DTH

V

FB

WITHOUT DTH

V

FB

WITHOUT DTH

V

PTH

4125f

RC

applicaTions inForMaTion

LTC4125

Set the V
desired step the ∆V

=5V, and a recommended R

V

IN

value to 9.4 bits=367mV, such that at this

DTH

FB

>V

condition is satisfied. With

DTH

DTH1

+R

DTH2

value in

the order of 100kΩ, the following values are obtained:

=7.87kΩ and R

R

DTH2

=100kΩ.

DTH1

OVER TEMPERATURE FAULT THRESHOLD

One of the fault conditions used in the Optimum Power
Search is the overtemperature fault. To set this temperature
fault threshold, connect an NTC thermistor R
the NTC pin and the GND pin, and a resistor R

NTC2
NTC1

, between

, from the
IN pin to the NTC pin (Figure17). In a typical application,
the NTC thermistor is thermally coupled to the surface of
the transmitting coil, and the temperature threshold is set
to ensure safe temperature on the coil surface.

In the simplest application, R

is a 1% resistor with a

NTC1

value equal to the value of the chosen NTC thermistor at
25°C (R

at 25°C). In this simple setup, the LTC4125

NTC2

senses a fault condition when the resistance of the NTC
thermistor drops to 0.538 times the value of R
25°C. For a Vishay “Curve 2” thermistor (B

25/B85

at

NTC2

=3486),
this corresponds to approximately 41.5°C. With a Vishay
“Curve 2” thermistor, the LTC4125 has approximately 5°C
of hysteresis to prevent oscillation about the trip point.

IN

R

NTC1

R

NTC2

Figure17. NTC Thermistor Connection

LTC4125

NTC

4125 F17

Consult manufacturer data sheets for other types of NTC
thermistors. The temperature threshold can be adjusted
by changing the value of R

to be equal to R

R

NTC1

NTC2

. Instead of simply setting

NTC1

at 25°C, R

is set according

NTC1

to the following formulas:

R

= 1.857 • R

NTC1

at temperature_threshold

NTC2

As a quick rule of thumb, changing the value of R
be smaller relative to R

at 25°C will move the tem-

NTC2

NTC1

to

perature threshold higher and vice versa. For example,
using a Vishay “

Curve 2” thermistor whose nominal value
at 25°C is 10kΩ, the user can set the temperature to be at
50°C by setting the value of R

NTC1

=7.5kΩ.

Leaving the NTC pin open or connecting it to a capacitor
disables all NTC overtemperature fault functionality.

LTC4120 EFFICIENCY OPTIMIZER USING DHC

When using the LTC4125 in a wireless power system
with the LTC4120, the DHC pin on the LTC4120 can be
configured to further optimize the overall efficiency of the
system (see Figure7—circuit enclosed with dotted lines).
Instead of driving a capacitor, the DHC pin turns on a 15V
clamp circuit (D

, RC, M1) on the rectified input voltage

C

of the receiver circuit. Note that under some worst case
transient conditions, the 15V clamp needs to dissipate
up to 0.8W.

The 15V clamp voltage is selected to provide 1V margin
to the LTC4120 14V DHC pin threshold. The RC network
value connected to the DHC pin is selected to provide
enough delay to allow the input voltage on the LTC4120
to rise to 39V (allowing for optimum power detection on
the LTC4125) before the 15V clamp is activated. The fol

-

lowing criteria should be followed:

> 1.5 • T2

VZH– V

( )

BE

Where T2 is the settling time of the optimum power search
step discussed in the Timer Capacitors section. In Figure7,

=39V, VBE=0.7V and T2 is 18ms. Therefore, the value

V

ZH

of RC needs to be greater than 1s. Note that the resistance
value is chosen such that at the 15V clamp voltage, the
NPN base current supplied through the resistor is greater
than 0.5mA. Therefore, select 24.9k for R and 47µF for C.

The most important criteria for the NPN is that the common­emitter current gain at I

=0.5mA is greater than 50, and

b

its maximum power dissipation capability is greater than

0.5W. A standard 3904 NPN works well.

4125f

For more information www.linear.com/LTC4125

23

LTC4125

IN1

IN2

applicaTions inForMaTion

BOARD LAYOUT CONSIDERATIONS

When using an LTC4125 circuit, care must be taken when
handling the board since high voltage is generated in
the resonant LC tank. Figure18 indicates in red the high
voltage nodes that are present in a typical circuit. With
careful layout the area of these high voltage nodes should
be minimized and isolated for safe and simple operation.

For accurate sensing of the input current, the sense lines
from R

must use proper Kelvin connections all the way

IS

back to the sense resistor terminals as shown in Figure18.
The lines connected to these resistors must be routed close
together (the loop area between the sense traces should be
kept to a minimum) and away from noise sources (such
as the transmit coil) to minimize error. The gain resistor

and filtering capacitor CIF should be placed close to

R

IN

the LTC4125, so that the filtered high impedance lines do

+

and C

and IS– pins.

must be

IN2

not need to travel far before reaching the IS

The decoupling capacitors C

IN

, C

IN1

placed as close to the LTC4125 as possible. This allows
as short a route as possible (minimized inductance) from
these capacitors to the respective IN pins and the GND pins
of the part. Figure18 indicates in blue and green the hot
current loops flowing through C
as well as through C

, IN2, SW2 and GND. The physi-

IN2

, IN1, SW1 and GND;

IN1

cal layout of these hot current loops should be made as
small as possible to minimize parasitic resistance as well

as inductance in the loop.

Although the inductance of the
trace between the LTC4125 and the transmit coil does not
matter, the resistance does. Use a trace that is the shortest,
and has maximum available copper thickness and width.

Last but not least, the amount of current flowing in the
transmit coil can be significant. This current also flows
through the switches in the LTC4125. For an applica

­tion with a high quality factor transmit coil and resonant
capacitor, it is not rare to have current upward of 2.5A
RMS. At 2.5A, the power dissipation in the LTC4125 is
approximately 1.25W (in a full bridge setup, the current
always flows through two switches ~ 0.2Ω). With a θ

JA

of 43°C/W, the LTC4125 part will operate at roughly 55°C
above ambient temperature.

In order to ensure that these quoted thermal resistance
numbers are realized, the following good layout practices
should be followed: use the maximum copper weight in
the board layers as practically and economically possible,
place the recommended number of vias connected to the
exposed pad of the part (refer to LTC Application Notes
for thermal enhanced leaded plastic packages available
at www.linear.com), and use the maximum size of GND
plane connected to these vias. For proper operation of the
LTC4125, ensure that other common good board layout
practices are also followed. These include isolating noisy
power and signal grounds, having a good low impedance

24

R

IS

C

IN

R

IN

C

IF

+

IS

IS–IN IN1 IN2

LTC4125

A B C D

R

FB2

Figure18. High Voltage Nodes (Red), Kelvin Lines and Hot Current Loops in the LTC4125 Circuit

For more information www.linear.com/LTC4125

C

IN1

GND

(PIN 21)

SW1FB SW2

L

TX

R

FB1

C

FB1

C

IN2

C

TX

4125 F18

I

CURRENT LOOP:

IN1

IN1→SW1→ LC→ SW2→ GND→ C
I

CURRENT LOOP:

IN2

IN2→SW2→ LC→ SW1→ GND→ C

4125f

applicaTions inForMaTion

LTC4125

ground plane, shielding whenever necessary, and routing
sensitive signals as short as possible and away from noisy
sections of the board.

LAYER 1

R

IS

C

R

C

R

PTHM1

IMON

IMON

R

D

PTHM2

C1

R

IN

C

IF

LTC4125

TS

C

IN

C

IN1

C

IN2

C

TD

C

FB2

R

FB2

R

R

DTH1

STAT

NTC1RDTH2

R

D

STAT

FTH1

R

R

FTH2

R

0Ω

Figure19 shows an example of a 4-layer board recom
mended layout for the LTC4125

application circuit with

the high voltage nodes and hot current loop highlighted.

L

TX

C

TX

-

GNDLAYER 2 INLAYER 3 GNDLAYER 4

D

FB

R

FB1

C

FB1

4125 F19

Figure19. Example Layout of an LTC4125 Application Circuit on a 4-Layer Board with Red Indicating High Voltage Region

See also Demo Board DC2330A available at www.linear.com

For more information www.linear.com/LTC4125

25

4125f

SYS

4.75V

5.25V

SYSTEM

LTC4125

Typical applicaTions

LTC4125 Driving a 24μH Transmit Coil at 103kHz, 119kHz Frequency Limit and 41.5°C Transmit Coil
Surface Temperature Limit in a Wireless Power System with LT3652HV as a 1A Single Cell LiFePO4

20mΩ

TO

100k 100k

2k

Q

100k

DTH

FTH

PTHM

59.0k3.48k

8.06k

IS

10nF

IS

PTH1

PTH2

V

NTC

I

EN

0.68µF

V

–

+

IMON CTD CTS GND

30.1k

(3.6V Float) Battery Charger at the Receiver

IN

2.2k

1µF

D

STAT

STATIN IN1 IN2

LTC4125

470pF

4.7nF

NTC

SW1

SW2

47µF
x 2

R

NTCTX

C

100nF

V

FB

10k

AIR GAP

V

NTC

L

TX

24µH

TX

IN

DC1

1µF

: PMBT3904M

Q

I

: 760308100110

L

TX

: C4532C0G2E104J320KN

C

TX

C

FB1

DC1: CDBQR70
D

STAT

: BAS521-7

D

FB

R

NTCTX

RED INDICATES HIGH VOLTAGE PARTS

D

100k
200V

3.92k

: GRM31CR72E104KW03

: LTST-C193KGKT-5A

: NTHS0603N02N1002J

4mm

TO

6mm

FB

L
47µH

C

FB1

0.1µF

C

RX

33nF

100k

RX

0.68µF

DR1

D

DR2

178k

SHDN IN

V

IN_REG

FAULT
CHRG

TIMER

GND V

DR1, DR2: CMSH3-100MA
DR3: CMPSH1-4
DR4: CMSH3-40MA

: BZT52C16

D

C

M1: Si7308DN
C

RX

L

RX

OR 760308101303

BOOST

SW

LT3652HV

SENSE

BAT

NTC

FB

B = 3380

221k

332k

: C2012C0G2A333J125AC

: PCB COIL AND FERRITE: B67410-A0223-X195

30.1k

10µF

1µF

15µH
MSS1038-153ML

0.1Ω

10k

C

R

C

1k

V

+

SYS

M1

DR3

DR4

LOAD

SINGLE
LiFePO
CELL

4125 TA02

V

4

26

4125f

For more information www.linear.com/LTC4125

package DescripTion

Please refer to http://www.linear.com/product/LTC4125#packaging for the most recent package drawings.

UFD Package

20-Lead Plastic QFN (4mm × 5mm)

(Reference LTC DWG # 05-08-1711 Rev B)

0.70 ±0.05

LTC4125

4.50 ±0.05

3.10 ±0.05

1.50 REF

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

5.00 ±0.10
(2 SIDES)

2.65 ±0.05

3.65 ±0.05

0.25 ±0.05

0.50 BSC

2.50 REF

4.10 ±0.05

5.50 ±0.05

4.00 ±0.10
(2 SIDES)

PIN 1
TOP MARK
(NOTE 6)

PACKAGE OUTLINE

0.75 ±0.05

2.50 REF

R = 0.05 TYP

1.50 REF

3.65 ±0.10

2.65 ±0.10

PIN 1 NOTCH
R = 0.20 OR
C = 0.35

19 20

0.40 ±0.10

1

2

0.200 REF

0.00 – 0.05

NOTE:

1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LTC4125

R = 0.115

TYP

BOTTOM VIEW—EXPOSED PAD

0.25 ±0.05

0.50 BSC

(UFD20) QFN 0506 REV B

4125f

27

LTC4125

Typical applicaTion

LTC4125 Driving a 24μH Transmit Coil at 103kHz, with 530mA Input Current Threshold, 119kHz

Frequency Limit and 41.5°C Transmit Coil Surface Temperature Limit in a Wireless Power System

with LTC4120 as a 200mA Single Cell Li-Ion Battery Charger at the Receiver

5.5V

33nF

4V

100mΩ

TO

100k 100k

10.2k

100k

DTH

FTH

PTHM

59.0k 8.45k4.32k

IS

10nF

IS

PTH1

PTH2

EN

10nF

V

IN

2.21k

1µF

–

+

IMON CTD CTS GND

150k

D

STAT

STATIN IN1 IN2

LTC4125

470pF

4.7nF

NTC

SW1

SW2

47µF
x 2

R

NTCTX

C

100nF

V

FB

L

C
C

DC1: CDBQR70
D

D

R

RED INDICATES HIGH VOLTAGE PARTS

10k

AIR GAP

3mm

TO

10mm

L

TX

24µH

TX

D

IN

DC1

0.1µF

: WT505090-20K2-A10-G

TX

: C3216C0G2A104J160AC

TX

: HMK107BJ104KA-T

FB1

: LTST-C193KGKT-5A

STAT

: BAS521-7

FB

: NTHS0603N02N1002J

NTCTX

FB

100k
100V

7.68k

C

0.1µF

L
47µH

FB1

RX

DR1

DR2

412k 1.4M

RUN IN

BOOST

LTC4120-4.2

FAULT
CHRG

PROG GND FREQ INTV

6.04k

CHGSNS

BATSNS

DR1, DR2, DR3: DFLS240L

: BZT52C13

D

C

M1: Si7308DN
QR1: PMBT3904M

: NTHS0402N02N1002F

R

NTCRX

: PCB COIL AND FERRITE: B67410-A0223-X195

L

RX

OR 760308101303
L1: LPS4018-153ML

10µF

DHC

SW

BAT

NTC

DFLZ30

10nF

L1
15µH

10k

CC

2.2µF

R

NTCRX

24.9k

47µF

+

4125 TA03

D

C

R

C

1k

SINGLE
CELL
Li-Ion
BATTERY
PACK

M1

QR1

relaTeD parTs

PART NUMBER DESCRIPTION COMMENTS

AN138 Wireless Power User Guide

LTC4120 Wireless Power Receiver and 400mA

Buck Battery Charger

LTC4070 Li-Ion/Polymer Shunt Battery Charger

System

LTC4071 Li-Ion/Polymer Shunt Battery Charger

System with Low Battery Disconnect

LT3652HV Power Tracking 2A Battery Charger Input Supply Voltage Regulation Loop for Peak Power Tracking in (MPPT) Solar Applications

Linear Technology Corporation

28

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone] ● www.linear.com/LTC4125

Wireless 1 to 2 Cell Li-Ion Charger, 400mA Charge Current, Dynamic Harmonization Control,
Wide Input Range: 12.5V to 40V, 3mm × 3mm QFN-16 Package.

Low Operating Current (450nA), 1% Float Voltage Accuracy Over Full Temperature and Shunt
Current Range, 50mA Maximum Internal Shunt Current (500mA with External PFET), Pin
Selectable Float Voltages: 4.0V, 4.1V, 4.2V. Ultralow Power Pulsed NTC Float Conditioning for
Li-Ion/Polymer Protection, 8-Lead (2mm × 3mm) DFN and MSOP.

Integrated Pack Protection, <10nA Low Battery Disconnect Protects Battery from Over­Discharge. Low Operating Current (550nA), 1% Float Voltage Accuracy Over Full Temperature
and Shunt Current Range, 50mA Maximum Internal Shunt Current, Pin Selectable Float
Voltages: 4.0V, 4.1V, 4.2V. Ultralow Power Pulsed NTC Float Conditioning for Li-Ion/Polymer
Protection, 8-Lead (2mm × 3mm) DFN and MSOP.

Standalone, V

: 4.95V to 34V (40V ABSMAX), 1MHz, 2A Charge Current, V

IN

: 3.3V to 18V,

OUT

Timer or C/10 Termination, 12-Lead 3mm x 3mm DFN and MSOP.

LT 1115 • PRINTED IN USA

For more information www.linear.com/LTC4125

 LINEAR TECHNOLOGY CORPORATION 2015

4125f

Mouser Electronics

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