LINEAR TECHNOLOGY LTC4110 Technical data

LTC4110

Battery Backup

System Manager

FEATURES

n

Complete Backup Battery Manager for Li-Ion/

Polymer, Lead Acid, NiMH/NiCd Batteries and
Super Capacitors

n

Charge and Discharge Battery with Voltages Above

and Below the Input Supply Voltage

n

“No Heat” Battery Calibration Discharge Using

System Load

n

Automatic Battery Backup with Input Supply

Removal Using PowerPath™ Control

n

Standalone for Li-Ion/Polymer, SLA, and Supercaps

n

Optional SMBus/I2C Support Allows Battery

Capacity Calibration Operation with Host

n

Over- and Under-Battery Voltage Protection

n

Adjustable Battery Float Voltage

n

Precision Charge Voltage ±0.5%

n

Programmable Charge/Calibration Current Up to

3A with ±3% Accuracy

n

Optional Temperature Qualifi ed Charging

n

Wide Backup Battery Supply Range: 2.7V to 19V

n

Wide Input Supply Range: 4.5V to 19V

n

38-Lead (5mm × 7mm) QFN Package

APPLICATIONS

n

Backup Battery Systems

n

Server Memory Backup

n

Medical Equipment

n

High Reliability Systems

DESCRIPTION

The LTC®4110 is a complete single chip, high effi ciency,
fl yback battery charge and discharge manager with auto­matic switchover between the input supply and the backup
battery or super capacitor. The IC provides four modes of
operation: battery backup, battery charge, battery calibra­tion and shutdown. Battery backup and battery charge are
automatic standalone modes, while the optional calibration
mode requires a CPU host to communicate over an SMBus.
During calibration the fl yback charger is used in reverse
to discharge the battery with a programmable constant
current into the system load eliminating heat generation.
Three status outputs can be individually reconfi gured over
the SMBus to become GPIOs. User programmable over­discharge protection is provided. The SHDN pin isolates
the battery to support shipping the product with a charged
battery installed.

Multiple LTC4110s can be combined to form a redundant
battery backup system or increase the number of battery
packs to achieve longer backup run times.

The LTC4110 is available in a low profi le (0.75mm), 38-pin

5mm × 7mm QFN package. The QFN features an exposed

metal die mount pad for optimum thermal performance.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. PowerPath
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.

TYPICAL APPLICATION

Battery Backup System Manager Server Backup System (In Backup Mode)

SYSTEM LOAD

DCIN

0V

UVLO

SET POINT

BACKUP LOAD (DCOUT)

INID BATID

LTC4110

DCDIV

CURRENT FLOW

ON ONOFF

CHGFET

DCHFET

4110 F01

BATTERY

HOST CPU

LTC4110
BATTERY
BACKUP
SYSTEM

MANAGER

CURRENT FLOW

2

I

C BUS

SYSTEM LOAD

(DC/DC, ETC.)

BACKUP LOAD

(MEMORY, ETC.)

BATTERY

4110 TA01b

4110fa

1

LTC4110

(Note 1)

DCIN, BAT, DCOUT, DCDIV, SHDN

to GND ....................................................... –0.3V to 20V

Input Voltage (CLP, CLN) ...............–0.3V to DCIN + 0.3V

Input Voltage (CSP, CSN) ................–0.3V to BAT + 0.3V

Input Voltage

(GPIO1, GPIO2, GPIO3, SELC, SELA, TYPE, V
THA, THB, I

Input Voltage (V

, ACPDLY, SDA, SCL) .... – 0.3V to 7V

SENSE

, V

CAL

) ....................... – 0.3V to 1.35V

DIS

Output Voltage

(ACPb, GPIO1, GPIO2, GPIO3) ................–0.3V to 7V

CLP-CLN, CSP-CSN ..................................................±1V

Operating Temperature Range (Note 2)....–40°C to 85°C

Junction Temperature (Note 3) ............................. 105°C

Storage Temperature Range

QFN Package ......................................–65°C to 125°C

CHG

,

PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS

TOP VIEW

INID

DCOUTNCBATID

38 37 36 35 34 33 32

1DCIN

CLN

2

CLP

3

ACPDLY

4

DCDIV

5

SHDN

6

SDA

7

SCL

8

GPI01

9

GPI02

10

GPI03

11

SELA

12

13 14 15 16

DIS

V

ACPb

38-LEAD (5mm s 7mm) PLASTIC QFN

EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB

UHF PACKAGE

T

= 100°C, θJA = 34°C/W

JMAX

V

CAL

39

CHG

V

VDDCHGFET

17 18 19

REF

V

TIMER

DCHFET

31

30

29

28

27

26

25

24

23

22

21

20

TYPE

BAT

SELC

I

SENSE

SGND

CSN

CSP

I

TH

I

CHG

I

CAL

I

PCC

THB

THA

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4110EUHF#PBF LTC4110EUHF#TRPBF 4110

38-Lead (5mm × 7mm) Plastic QFN

LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC4110EUHF LTC4110EUHF#TR 4110

38-Lead (5mm × 7mm) Plastic QFN

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/

–40°C to 85°C

–40°C to 85°C

2

4110fa

LTC4110

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
GND = SGND = CLP = CLN = SHDN = 0V and R

VREF

= 25°C. Unless otherwise specifi ed, V

A

= 49.9k. All currents into device pins are positive and all currents out of device pins

are negative. All voltages are referenced to GND, unless otherwise specifi ed.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Power Input

DCIN Operating Voltage Range Charge or Calibration Modes

DCOUT Operating Voltage Range Charge or Calibration Modes

Backup Mode

V

BAT

I

SPLY

I

BIDL

I

BBU

I

BSD

V

UVI

V

UVD

V

UVH

Regulator

V

DD

V

DD

V

DD(MIN)

Charging Performance

V

FTO L

V

FATOL

I

BTOL

I

PTO L

I

SKVA

I

SRCA

I

SKCA

I

VCHG

V

BC

V

BCH

V

AR

V

ARH

Operating Voltage Range Backup Mode

Supply Current (I

DCIN

+ I

) in Idle Mode

DCOUT

(Note 4)

Battery Current in Idle Mode (Notes 4 and 5) 30 45 µA

Battery Current in Backup Mode (Note 5) V

Battery Current in Shutdown (Note 5) V

Undervoltage Lockout Exit Threshold V

Undervoltage Lockout Entry Threshold V

= 0 2 3 mA

DCIN

= V

, V

SHDN

Increasing

DCIN

Decreasing

DCIN

BAT

= 0 20 45 µA

DCIN

Undervoltage Lockout Hysteresis 400 mV

Output Voltage No Load

Output Voltage IDD = –10mA

Charge Float Voltage Accuracy 4.20V for Li-Ion. 2.35V for Lead Acid (Note 8)

V

= GND

CHG

–5°C < T
–40°C < T

< 85°C (Note10)

A

< 85°C

A

Charge Float Voltage Adjust Accuracy 0.3V and –0.3V for Li-Ion Batteries,

0.15V and –0.15V for Lead Acid Batteries
(Note 8)

Bulk Charge Current Accuracy (Note 7) V

Preconditioning and Wake-Up Current
Accuracy (Note 7)

– V

CSP

V

BAT

–40°C < T

V

BAT

=100mV

CSN

≥ 3.1V

< 85°C

A

≥ 3.3V (Note 8), V

CSP

– V

= 10mV;

CSN

Li-Ion and NiMH/NiCd Batteries Only

V

≤ 3.3 (Note 8), V

BAT

CSP

– V

= 10mV;

CSN

Li-Ion and NiMH/NiCd Batteries Only

Voltage Error Amplifi er Sink Current at ITH Pin V

Current Error Amplifi er Source Current at ITH

= 2V 96 µA

ITH

V

= 2V –24 µA

ITH

Pin

Current Error Amplifi er Sink Current at ITH Pin V

V

Pin Bias Current V

CHG

Bulk Charge Threshold Voltage;
V

Increasing (Note 8)

BAT

Bulk Charge Threshold Voltage Hysteresis;
V

Decreasing (Note 8)

BAT

Auto Recharge Threshold Voltage;
V

Decreasing

BAT

Auto Recharge Threshold Hysteresis Voltage;
V

Increasing

BAT

= 2V 24 µA

ITH

= 1.25V –100 100 nA

CHG

CHG

= GND

Li-Ion, V
NiMH/NiCd

CHG

= GND

Li-Ion, V
NiMH/NiCd

Standard Li-Ion Only;
Specifi ed as Percentage of Float Voltage 93 95 97 %

Standard Li-Ion Only; Specifi ed as
Percentage of Float Voltage

DCIN

= V

l

l

l

l

DCOUT

= V

DCDIV

= 12V, V

4.5 19 V

4.5 19 V

2.7 19 V

2.7 19 V

23 mA

l

3.7 4 4.45 V

l

3.4 3.7 4.1 V

l

4.5 4.75 5 V

l

4.25 V

–0.5

–0.8

l

–1

l

–2 2 %

–3

l

–5

0.5

0.8
1

3

5

–30 30 %

–40 40 %

2.80

0.84

3.00

0.90

3.20

0.96

85
40

2%

= 8.4V,

BAT

%

%
%

%

%

mV
mV

4110fa

V
V

3

LTC4110

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
GND = SGND = CLP = CLN = SHDN = 0V and R

VREF

= 25°C. Unless otherwise specifi ed, V

A

= 49.9k. All currents into device pins are positive and all currents out of device pins

are negative. All voltages are referenced to GND, unless otherwise specifi ed.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

BOV

V

BOVH

V

REF

F

TMR

t

TIMEOUT

Calibration Performance

V

CTOL

V

CTOLH

V

CATOL

I

FTO L

I

VCAL

I

BDT

I

BDH

V

OVP

V

OVPH

AC Present and Discharge Cut-Off Comparators

V

AC

V

ACH

I

AC

t

AC

V

DTOL

V

DTOLH

V

DATOL

I

VDIS

Battery Overvoltage Threshold;
V

Increasing

BAT

All Li-Ion, Lead Acid as Percentage of
Float Voltage
NiMH/NiCd (Note 8)

Battery Overvoltage Threshold Hysteresis;
V

Increasing.

BAT

All Li-Ion, Lead Acid as Percentage of
Float Voltage
NiMH/NiCd (Note 8)

Reference Pin Voltage Range

Programmed Timer Accuracy C

TIMER

= 47nF

Time Between Receiving Valid
ChargingCurrent() and ChargingVoltage()
Commands. Wake-Up Timer.

Calibration Cut-Off Default Voltage Accuracy;
V

Decreasing

BAT

Calibration Cut-Off Default Voltage Hysteresis;
V

Increasing. (Note 8)

BAT

2.75V for Li-Ion, 1.93V for Lead Acid,
V

= GND (Note 8), 0.95V for NiMH/NiCd l

CAL

Li-Ion
Lead Acid
NiMH/NiCd

Calibration Cut-Off Voltage Adjust Accuracy ±400mV for Li-Ion, ±300mV for Lead Acid,

±200mV for NiMH/NiCd (Note 8)

Calibration Current Accuracy (Note 7) V

V

Pin Leakage Current V

CAL

Back-Drive Current Limit Threshold V

Back-Drive Current Limit Threshold Hysteresis V

Calibration Mode Input Overvoltage

– V

CSP

CAL

CLP

V

CLN

CLP

V

CLN

V

DCDIV

= –100mV

CSN

= 1.25V –100 100 nA

– V

Decreasing

CLN

= V

DCIN

– V

Increasing

CLN

= V

DCIN

Rising

Comparator DCDIV Pin Threshold

Calibration Mode Input Overvoltage

V

Falling 100 mV

DCDIV

Comparator DCDIV Pin Hysteresis

AC Present Comparator DCDIV Pin Threshold V

AC Present Comparator DCDIV Pin Hysteresis V

AC Present Comparator DCDIV Pin Input Bias

Falling

DCDIV

Rising 50 mV

DCDIV

V

= 1.25V 100 nA

DCDIV

Current

ACPb Pin Externally Programmed Falling Delay C

Discharge Cut-Off Default Voltage Accuracy;
V

Decreasing

BAT

Discharge Cut-Off Default Voltage Hysteresis;
V

Increasing (Note 8)

BAT

= 100nF, R

ACPDLY

V

Stepped From 1.17V to 1.30V 8 10 12 ms

DCDIV

VREF

= 49.9k,

2.75V for Li-Ion, 1.93V for Lead Acid,
V

= GND, 0.95V for NiMH/NiCd

DIS

Li-Ion
Lead acid
NiMH/NiCd

Discharge Cut-Off Voltage Adjust Accuracy ±400mV for Li-Ion, ±300mV for Lead Acid,

±200mV for NiMH/NiCd

V

Pin Bias Current V

DIS

= 1.25V –100 100 nA

DIS

DCIN

= V

l

l

l

l

l

l

DCOUT

105

1.80

= V

DCDIV

107.5

1.85

2

40

= 12V, V

110

1.90

= 8.4V,

BAT

%

%

mV

1.208 1.220 1.232 V

–15 0 15 %

140 175 210 sec

–1.1
–1.3

85
50
40

1.1

1.3

%
%

mV
mV
mV

–1.5 1.5 %

–5 5 %

71013 mV

1mV

l

1.4 1.5 1.6 V

l

1.196 1.22 1.244 V

l

–1.5 1.5 %

85
50
40

l

22%

mV
mV
mV

V

4

4110fa

LTC4110

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
GND = SGND = CLP = CLN = SHDN = 0V and R

VREF

= 25°C. Unless otherwise specifi ed, V

A

= 49.9k. All currents into device pins are positive and all currents out of device pins

are negative. All voltages are referenced to GND, unless otherwise specifi ed.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input and Battery Ideal Diodes and Switches

V

V

V

V

V

FR

REV

GON

GOFF

FO

Forward Regulation Voltage (V
V

BAT-VDCOUT

)

DCIN-VDCOUT

Reverse Voltage Turn-Off Voltage
(V

DCIN-VDCOUT

“ON” Gate Clamping Voltage (V
V

BAT-VBATID

“OFF” Gate Voltage (V

, V

)

BAT-VDCOUT

DCIN-VINID

)

DCIN-VINID

, V

BATID Fast-On Voltage Comparator Threshold I

INID Pin Delay Times

t

IIDON

t

IIDOFF

Turn “ON”
Turn “OFF”

BATID Pin Delay Times

t

BIDON

t

BIDOFF

Turn “ON”
Turn “OFF”

PWM Flyback Converter

V

V

V

OHF

OLF

OLFX

CHGFET, DCHFET High I

CHGFET, DCHFET Low I

CHGFET, DCHFET in Shutdown and Backup
Modes

CHGFET, DCHFET Transition Times

t

R

t

F

F

PWM

Rise Time
Fall Time

PWM Oscillator Switching Frequency

SafetySignal Decoder and Thermistor Interface

SS

OR

SafetySignal Decoder
SafetySignal Trip
(RES_COLD/RES_OR)

SS

CLD

SafetySignal Decoder
SafetySignal Trip
(RES_IDEAL/RES_COLD)

SS

IDL

SafetySignal Decoder
SafetySignal Trip
(RES_HOT/RES_IDEAL)

SS

HOT

SafetySignal Decoder
SafetySignal Trip
(RES_UR/RES_HOT)

V

HOT

V

HOTH

V

REM

THB Pin Hot Threshold Voltage V

THB Pin Hot Threshold Hysteresis Voltage V

THB Pin Battery Removal Threshold Voltage V

,

,

BAT-VBATID

2.7V ≤ V

2.7V ≤ V

I

INID

)I

INID

V

BATID

C

SHDN

INID

≤ 19V

DCIN

≤ 19V

DCIN

, I

= 1μA 7 8.3 9.7 V

BATID

, I

= –10μA

BATID

= 0V and V

(Shutdown)

DCIN

> 500µA 45 100 mV

= 10nF
DCIN is Switched Between 12.2V and 11.8V
From DCOUT – V
From DCOUT – V

C

= 2.5nF

BATID

to DCOUT –6V

GOFF

to DCOUT –1.5V

GON

BAT is Switched Between 12.2V and 11.8V
From DCOUT – V
From DCOUT – V

, I

CHGFET

DCHFET

, I

CHGFET

DCHFET

V

= V

DCIN

Mode), V
I

CHGFET

C
C

R

DCDIV

DCIN

, I

DCHFET

= 1.6nF, 10% to 90%

LOAD

= 1.6nF, 10% to 90%

LOAD

= 1130Ω ±1%, CTH = 1nF (Note 6) R

THA

to DCOUT –6V

GOFF

to DCOUT –1.5V

GON

= –1mA 4.5 4.75 5.25 V

= 1mA 50 mV

= V

= V

= 0V (Shutdown

DCOUT

= 0V (Backup Mode)

DCDIV

= 1µA

= 54.9k ±1%.
Smart Batteries and Li-Ion Only

R

= 1130Ω ±1%, CTH = 1nF (Note 6) R

THA

= 54.9k ±1%
Smart Batteries and Li-Ion Only

R

= 1130Ω ±1%, CTH = 1nF (Note 6) R

THA

= 54.9k ±1%
Smart Batteries and Li-Ion Only

R

= 1130Ω ±1%, CTH = 1nF (Note 6) R

THA

= 54.9k ±1%
Smart Batteries and Li-Ion Only

Decreasing; Lead Acid Only

THB

Increasing; Lead Acid Only 50 mV

THB

Increasing; Lead Acid Only

THB

THB

THB

THB

THB

DCIN

= V

l

l

DCOUT

= V

DCDIV

= 12V, V

10 20 32 mV

–30 –18 –8 mV

0.25 V

450

8

15

8

700

20

60
20

100 mV

35
15

l

255 300 340 kHz

l

95 100 105 k

l

28.5 30 31.5 k

l

2.85 3 3.15 k

l

425 500 575 Ω

l

0.28 •
V

l

0.90 •
V

THA

THA

0.30 •
V

THA

0.94 •
V

THA

65
65

0.36 •
V

THA

0.96 •
V

THA

= 8.4V,

BAT

µs
µs

µs
µs

ns
ns

V

V

4110fa

5

LTC4110

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
GND = SGND = CLP = CLN = SHDN = 0V and R

VREF

= 25°C. Unless otherwise specifi ed, V

A

= 49.9k. All currents into device pins are positive and all currents out of device pins

are negative. All voltages are referenced to GND, unless otherwise specifi ed.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

REMH

Logic and Status Output Levels

V

ILS

V

IHS

V

OLS

V

OLG

I

OHG

V

ILG

V

IHG

V

ILSD

V

IHSD

I

ISD

T

LR

SMBus Timing (Note 9)

t

HIGH

t

LOW

t

TO

t

F

t

SU-STA

t

HD-STA

t

HD-DAT

THB Pin Battery Removal Threshold

V

Decreasing; Lead Acid Only 25 mV

THB

Hysteresis Voltage

SCL/SDA Input Pins Low Voltage

SCL/SDA Input Pins High Voltage

SDA Output Pin Low Voltage I

ACPb, GPIO1,2,3 Output Pins Low Voltage I

PULL-UP

, I

ACPb

= 350µA

, I

GPIO1

GPIO2

, I

= 10mA 1 V

GPIO3

ACPb, GPIO1,2,3 Output Pins Open
Leakage Current Outputs Open, V

ACPb

, V

GPIO1,2,3

= 5V –2 2 µA

GPIO Input Low Voltage

GPIO Input High Voltage

SHDN Input Pin Low Voltage 0.5 V

SHDN Input Pin High Voltage 2.4 V

SHDN Input Pin Pull-Up Current V

Logic Reset Duration After Power-Up
From Zero

SCL Serial Clock High Period I

SCL Serial Clock Low Period I

= 2.4V –3.5 –2 –1 µA

SHDN

V

Transition From 0V to 5V in <1ms;

DCIN

V

= 0

BAT

PULL-UP

R

= 9.31k

PU

PULL-UP

R

= 9.31k

PU

= 350µA, C

= 350µA, C

LOAD

LOAD

= 250pF,

= 250pF,

Timeout Period

SDA/SCL Fall Time C

= 250pF, RPU = 9.31k

LOAD

Start Condition Set-Up Time

Start Condition Hold Time

SDA to SCL Falling-Edge Hold Time,
Slave Clocking in Data

DCIN

= V

l

l

l

l

l

DCOUT

= V

DCDIV

= 12V, V

= 8.4V,

BAT

0.8 V

2.1 V

0.4 V

1V

1.5 V

1s

l

4µs

l

4.7 µs

l

25 ms

l

l

4.7 µs

l

4µs

l

300 ns

300 ns

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Specifi c functionality or parametric performance
of the device beyond the limits expressly given in the Electrical
Characteristics table is not implied by these maximum ratings.

Note 2: The LTC4110E is guaranteed to meet performance specifi cations
from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.

Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions.
Overtemperature protection will become active at a junction temperature
greater than the maximum operating junction temperature. Continuous
operation above the specifi ed maximum operation temperature may result
in device degradation or failure. Operating junction temperature T
°C) is calculated from the ambient temperature T
dissipation P

(in watts) by the formula TJ = TA + θ

D

and the average power

A

• PD.

JA

J

(in

6

Note 4: The LTC4110 is idle with no application load. It is not charging
or calibrating the battery and is not in backup or shutdown mode. The
internal clock is running and the SMBus is functional.

Note 5: Combined current of CSP, CSN and BAT pins set to V

with no

BAT

application load.
Note 6: C

is defi ned as the sum of capacitance on THA, THB

TH

SafetySignal.
Note 7: Does not include tolerance of current sense or current

programming resistors.
Note 8: Given as a per cell voltage referred to the BAT pin (V

/number of

BAT

series cells).
Note 9: Refer to System Management Bus Specifi cation, Revision 1.1,

section 2.1 for Timing Diagrams and section 8.1, for t

LOW

and t

TIMEOUT

requirements.
Note 10: Specifi cations over the –5°C to 85°C operating ambient

temperature range are assured by design, characterization and correlation
with statistical process controls.

4110fa

TYPICAL PERFORMANCE CHARACTERISTICS

Output Charging Characteristics
Typical CHGFET and DCHFET
Waveforms

Showing Constant Current and

Constant Voltage Operation

1200

1000

CC

LTC4110

Supply Current vs DCIN Voltage in
Idle Mode

2.5

2.0

5V/DIV

0V

= 12V

V

IN

= 12V (NiMH)

V

BAT

500ns/DIV

Battery Leakage in Idle
Mode – IBIDL

140

120

100

80

(µA)

60

BAT

I

40

20

0

–20

0 5 10 15 2520

V

BAT

(V)

4110 G01

4110 G04

800

(mA)

600

BAT

I

400

PRE-CHARGE

200

0

042 6 8 101214

Battery Current in Backup

Mode – IBBU

1.8

1.6

1.4

1.2

1.0

(mA)

0.8

BAT

I

0.6

0.4

0.2

0

0 5 10 15 2520

Charging Effi ciency/Power Loss,
12VIN and 12.6V

(Xfmr = BH

OUT

510-1019) Soft-Start Waveform

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

0.05 0.20.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.00

EFFICIENCY

I

POWER LOSS

(A)

LOAD

4110 G07

2.5

2.0

POWER LOSS (W)

1.5

1.0

0.5

0

0.2A/DIV

0A

V

V

BAT

BAT

(V)

(V)

2ms/DIV

CV

4110 G02

4110 G05

4110 G08

1.5

(mA)

DCIN

I

1.0

0.5

0

0 5 10 15 20

DCIN (V)

Battery Leakage in Shutdown
Mode vs Battery Voltage

40

35

30

25

(µA)

20

BAT

I

15

10

5

0

0

15

V

(V)

BAT

Backup Mode On and Off
Waveform

V

BACKUP

2V/DIV

V

BATTERY

3V/DIV

0V

NiMH BATTERY (12V)

= 3A

I

LOAD

= 15V FALLING

V

IN

10ms/DIV

4110 G03

2520105

4110 G06

4110 G09

4110fa

7

LTC4110

PIN FUNCTIONS

DCIN (Pin 1): External DC Power Sense Input. Provides a
control input and supply for the main supply ideal diode
function.

CLN (Pin 2): Current Limit Sense Negative Input. See
CLP pin.

CLP (Pin 3): Current Limit Sense Positive Input. This pin
and the CLN pin form a differential input that senses volt­age on an external resistor for reverse current entering the
power source while in low loss calibration mode. Should
the current approach reversal, this function will terminate
calibration. An RC fi lter may be required to fi lter out system
load noise. Connect both CLP and CLN pins to GND to
disable this function. A differential voltage of >1V between
the CLP and CLN pins may damage the device.

ACPDLY (Pin 4): ACPb Delay Control Pin. A capacitor
connected from ACPDLY to GND and a resistor from

to GND programs delay in the ACPb pin high-to-low

V

REF

transition. Open if minimum delay is desired.

DCDIV (Pin 5): AC Present Detection Input. Backup
operation is invoked when the system power voltage,
divided by an external resistor divider, falls below the
threshold of this pin.

SHDN (Pin 6): Active High Shutdown/Reset Control Logic
Input. Forces micropower shutdown mode if high when
DCIN supply is removed. Forces all registers to reset if high
when DCIN supply is present. Normally tied to ground.
Internal pin pull-up current.

SDA (Pin 7): SMBus Bidirectional Data Signal. Connect

when not in use.

to V

DD

SCL (Pin 8): SMBus Clock Signal Input From SMBus Host.
Connect to V

GPIO1 (Pin 9): General Purpose I/O or Charge Status Pin. A
logic-level I/O bit port that is confi gurable as a host-driven
input/output port or as a battery charge status output (CHGb)
with an open-drain N-MOSFET that is asserted low when any

when not in use.

DD

smart battery or Li-Ion battery is in any phase of charging
or when lead acid battery charge current is >C/x where:

C

x

= •5

I

(See C/x Charge Termination section for more details).
If the No SMBus option is selected with the SELA pin,
the GPIO1 pin defaults as battery charge status. Refer
to Table 5a.

GPIO2 (Pin 10): General Purpose I/O Pin. A logic-level I/O bit
port that is confi gurable as a host-driven input/output port
or as a battery undervoltage status output (BKUP_FLTb)
with an open-drain N-MOSFET that is asserted low only
while in backup mode if the battery’s average cell voltage
drops below voltage programmed by the V
No SMBus option is selected with the SELA pin, then the
GPIO2 pin defaults as battery undervoltage status. Refer
to Table 5c.

GPIO3 (Pin 11): General Purpose I/O Pin. A logic-level I/O
bit port that is confi gurable as a host-driven input/output
port or as a calibration complete status output (CAL_COM­PLETEb) with an open-drain N-MOSFET that is asserted
low when calibration has been completed. If the SELA pin
is programmed for no SMBus use then the status output
is charge fault (CHGFLTb) instead of calibration complete.
Refer to Table 5e.

SELA (Pin 12): SMBus Address Selection Input. Selects
the LTC4110 SMBus address to facilitate redundant backup
systems when standard batteries are used. Connect to
GND for 12h, V
a smart battery is selected by the TYPE pin, the SELA pin
must be connected to GND to select address 12h. If the
SMBus is not used or to force all GPIOs to status mode
upon power-up, connect pin to a typically 0.5 • V
age from V
if used, will be 12h.

CHG

DIS

for 28h and the V

DD

pin resistor divider. The SMBus address,

REF

pin for 20h. When

REF

pin. If the

volt-

REF

8

4110fa

PIN FUNCTIONS

LTC4110

ACPb (Pin 13): AC Present Status Digital Output. Open­Drain N-MOSFET output is asserted low when the main
supply is present as detected by the DCDIV pin and internal
DCIN UVLO.

(Pin 14): Battery Discharge Voltage Limit During

V

DIS

Backup Program Input. Battery threshold voltage at which
backup mode will terminate by turning off the isolation
P-MOSFET with the BATID pin. Adjustable from external
resistor string biased from V

pin. For default threshold

REF

connect to GND pin.

(Pin 15): Battery Voltage Limit During Calibra-

V

CAL

tion Program Input. Battery threshold voltage at which
calibration will terminate. Adjustable from external resistor
string biased from V

pin. For default threshold connect

REF

to GND pin.

(Pin 16): Battery Float Voltage Program Input. Trims

V

CHG

the fl oat voltage during charging. Programmed from
external resistor string biased from V

pin. Connect to

REF

GND for default fl oat voltage.

(Pin 17): Voltage Reference Output and Timing Pro-

V

REF

gramming Input. Provides a typical virtual reference of 1.220V
(V

) for an external resistor divider tied between this pin and

REF

GND that programs the V
Total resistance from V

, V

CAL

and V

CHG

to GND, along with the capacitor

REF

pin functions.

DIS

on the timer pin, programs the charge time. Voltage refer­ence output remains active in all modes except shutdown.
Load current must be between 10µA and 25µA.

TIMER (Pin 18): Charge Timing Input. A capacitor con­nected between TIMER and GND along with the resistance
connected from V

to GND programs the charge time

REF

intervals.

TYPE (Pin 19): Refer to Table 8.

THA (Pin 20): SafetySignal Force/Sense Pin to Smart

Battery and Force Pin to Lead Acid Battery Thermistor.
See description of operation for more detail. The maxi­mum allowed combined capacitance on THA, THB and
SafetySignal is 1nF. For lead acid battery applications the
maximum capacitance on the THA pin is 50pF.

THB (Pin 21): SafetySignal Force/Sense Pin to Smart
Battery and Sense Pin to Lead Acid Battery Thermistor.
See description of operation for more detail. The maxi­mum allowed combined capacitance on THA, THB and
SafetySignal is 1nF.

I

(Pin 22): Battery Preconditioning Charge Current

PCC

Program Input. Programs the battery current during
preconditioning or wakeup charging. Programmed from
external resistor to GND.

(Pin 23): Battery Discharge Current During Calibration

I

CAL

Program Input. Programs the constant discharge current at
the battery during calibration. Programmed from external
resistor to GND.

(Pin 24): Battery Current During Charge Program Input.

I

CHG

Programs the battery current while constant-current bulk
charging. Programmed from external resistor to GND.

(Pin 25): Control Signal of the Current Mode PWM. AC

I

TH

compensates control loop. Higher I

voltage corresponds

TH

to higher charging current.

CSP (Pin 26): Current Sense Positive Input. This pin and
the CSN pin measure voltage across the external current
sense resistor to control battery current during charging
and calibration.

CSN (Pin 27): Current Sense Negative Input. This pin and
the CSP pin measure voltage across the external current
sense resistor to control battery current during charging
and calibration.

SGND (Pin 28): Signal Ground Reference Input. This pin
should be Kelvin connected to the fl yback current sense
resistor and to the battery return.

(Pin 29): Current Sense Input. Senses current in

I

SENSE

the fl yback transformer by monitoring voltage across the
external current sense resistor. This pin should be Kelvin­connected to the resistor.

SELC (Pin 30): Refer to Table 8.

4110fa

9

LTC4110

PIN FUNCTIONS

BAT (Pin 31): Battery Voltage Sense Input. This pin is used
to monitor the battery and control charging voltage through
an internal resistor divider connected to this pin that is
disconnected in shutdown mode. Also provides a control
input for battery ideal diode functions. Pin should be Kelvin­connected to battery to avoid voltage drop errors.

DCHFET (Pin 32): Drives the Gate of an External N-MOSFET.
Used to drive energy into the battery side of the high ef­fi ciency switch mode converter during low loss calibration
discharge of the battery. Provides synchronous rectifi cation
during battery charging.

CHGFET (Pin 33): Drives the Gate of an External N­MOSFET. Used to drive energy into the supply side of
the high effi ciency switch mode converter during battery
charging. Provides synchronous rectifi cation during low
loss calibration mode.

(Pin 34): Bypass Capacitor Connection for Internal

V

DD

VDD Regulator. Bypass at pin with 100nF low ESR capaci­tor to GND.

BATID (Pin 35): Drives the Gate of the Battery P-MOSFET
Ideal Diode. Controls low loss ideal diode between the
battery and backup load when in backup mode. When not
in backup mode, the P-MOSFET is turned off to prevent
battery power from back driving into main power.

NC (Pin 36): No Connect.

DCOUT (Pin 37): System Power Output Voltage Monitor

Input. Provides a control input for supply input ideal diode
and battery ideal diode functions. Also supplies power to the
IC. Bypass at pin with 100nF low ESR capacitor to GND.

INID (Pin 38): Drives the Gate of the Supply Input P-MOSFET
Ideal Diode. Controls low loss ideal diode between the sup­ply input and backup load when not in backup mode.

Exposed Pad (Pin 39): Ground. The Exposed Pad must
be soldered to the PCB.

10

4110fa

BLOCK DIAGRAM

38INID

1DCIN

39GND

34V

DD

3CLP

2CLN

5DCDIV

17V

REF

16V

CHG

15V

CAL

14V

DIS

30SELC

SUPPLY INPUT BATTERY

PowerPath CONTROLLER

V

DD

REGULATOR

VOLTAGE REFERENCE

ANALOG COMPARATORS

AND SWITCHES

OF CELLS

NUMBER

PRECISION

VOLTAGE DIVIDER

–

EA

+

–

÷10

+

PROGRAMMING CURRENT

CURRENT

SELECTION

1.220

CA

CURRENT

SWITCH

PWM

LOGIC

–
+

CHG/DCH

SWITCH

37 DCOUT

36 NC

35 BATID

31 BAT

27 CSN

26 CSP

22 I

PCC

24 I

CHG

23 I

CAL

25 I

TH

33 CHGFET

32 DCHFET

29 I

SENSE

28 SGND

LTC4110

19TYPE

6SHDN

7SDA

8SCL

12SELA

20THA

21THB

SMBus

INTERFACE

AND CONTROL

THERMISTOR

INTERFACE

TIMER/

CONTROLLER

OSC

UVLO

18 TIMER

4 ACPDLY

13 ACPb

9 GPIO1

10 GPIO2

11 GPIO3

4110 BD

4110fa

11

LTC4110

OPERATION

OVERVIEW

In the typical application, the LTC4110 is placed in series
with main power supply that powers all or part of the
system, which must include the device(s) or system that
needs battery backup.

The LTC4110 has four modes of operation:

• Battery Backup Mode

• Battery Charge Mode

• Battery Calibration Mode

• Shutdown Mode

The LTC4110 provides complete PowerPath control for
the battery backed up load switching automatically from
the main power supply to the battery when battery backup
mode is required. Low loss ideal diode FET switches are
used to connect the main supply or the battery to the
backup load which permit multiple LTC4110’s to work
together in a scalable fashion to permit longer backup
times, redundancy and/or higher load currents. In battery
charge mode, power is drawn from the main supply by a
high effi ciency synchronous fl yback charger. The LTC4110
maintains the state of charge (SOC) of the battery at all
times so the battery is ready at all times. Use of a fl yback
converter permits charging of batteries who’s termination
voltage can be greater than the main supply voltage, while
at the same time providing high DC isolation to minimize
parasitic drain on the battery. Testing, maintenance support
and capacity verifi cation of the battery is supported through
the LTC4110’s calibration mode. In calibration mode, the
same synchronous fl yback used to charge the battery is

also used in reverse to allow safe controlled discharge of
the battery back into the main supply eliminating wasted
heat and energy. The product will not need to provide any
additional thermal management to support this mode.
Shutdown mode disconnects the battery from the load to
preserve capacity and permits shipping the product with
an energized battery installed at the factory, eliminating
battery installation at the site. The LTC4110 supports
optional control and monitoring of all activities by a host
including faults over the industry standard SMBus, which

2

is a variation of the I

C bus. However no host is required
as the LTC4110 is fully functional in a standalone mode.
Combining all these functions into a single IC reduces
circuit area compared to presently available solutions.

The LTC4110 is designed to work with both standard
battery and smart battery confi gurations. Smart batteries
are standard batteries with industry standard gas gauge
electronics built in offering accurate SOC information for
the host. Furthermore, being intimate with all aspects of
the battery, it also has the ability to control the charge
process. Smart batteries use the SMBus as the com­munication bus for data exchange and charge control.
For more information about smart batteries, see www.
sbs-forum.org for specifi cations or contact Linear Tech­nology Applications.

It is important to know that the LTC4110 uses the TYPE
pin to learn what type of battery it will be working with.
The TYPE pin setting globally affects all of the operating
modes, options including GPIO and control ranges. Table 1
and Table 2 give you a complete breakdown of all the
battery types supported relative to the TYPE pin settings

Table 1. LTC4110 Battery Pack Charge Mode Capabilities

BATTERY TYPE CHEMISTRY MAXIMUM CHARGE TIME (SLA EXCLUDED)

Li-Ion/Polymer Nickel SLA/Lead Acid

Standard Battery Yes No Yes Adj. Up to 12 Hours

Smart Battery Yes Yes Yes Unlimited

Table 2. LTC4110 Battery Pack Charge Voltage Capabilities

CHEMISTRY V

Lead Acid 2.35V ±0.15V 2, 3, 5 and 6 4, 6, 10 and 12

Li-Ion/Polymer 4.2V ±0.3V 1, 2, 3 and 4 3.6, 7.2, 10.8 and 14.4

NiMH/NiCd N/A N/A 4, 6, 9 and 10 4.8, 7.2, 10.8 and 12

Super Caps 2.5V, 2.7V or 3V Yes 2 to 7 5 to 18

FULL CHARGE V

CELL

ADJ. RANGE SERIES CELL COUNT NOMINAL STACK VOLTAGE (V)

CELL

4110fa

12

OPERATION

LTC4110

and ranges. It should be noted that even if the LTC4110
TYPE pin is not set to a smart battery mode, any SMBus
commands sent by a host or a smart battery are still
acted upon. For SuperCap support, see the Applications
Information section.

BATTERY BACKUP MODE

Figure 1 shows the LTC4110 in backup mode and the
corresponding PowerPath enabled. The LTC4110 use the
DCDIV pin to typically monitor the DCIN voltage through
an external resistor divider. The DCDIV pin sets the backup
mode threshold voltage and senses the need to enter
backup mode. DCDIV can alternately be driven with other
signals such as logic. When the DCDIV pin voltage drops
below the AC present threshold voltage (see V

) backup

AC

mode is entered. Backup mode is also entered whenever
the internal undervoltage lockout, UVLO, senses that DCIN

) or DCOUT has fallen to excessively low voltages.

(V

UVD

In backup mode the battery P-MOSFET ideal diode is
enabled to backup the load from the battery. The supply
input P-MOSFET ideal diode isolates the main supply
input from the load and the fl yback switcher N-MOSFETs
are inhibited from turning on. Also, after the threshold is
passed, hysteresis (V

) is switched in. When the supply

ACH

is returning and the AC present threshold voltage plus the
hysteresis voltage is reached on the DCDIV pin, both of the
battery P-MOSFETs are rapidly switched off (t

dDOFF

) and
the supply input P-MOSFET ideal diode provides the load
current. When forward biased, the ideal diodes regulate
their forward voltage drop to 20mV typical (V

SYSTEM LOAD

DCIN

0V

UVLO

SET POINT

BACKUP LOAD (DCOUT)

CURRENT FLOW

ON ONOFF

INID BATID

DCDIV

LTC4110

Figure 1. Backup Mode Operation

CHGFET

DCHFET

) when the

FR

BATTERY

4110 F01

MOSFET is suffi ciently sized. If the voltage input falls and
results in a forward voltage below 20mV, then the ideal
diode will begin turning off at a slow rate. Should the ideal
diode see a –18mV typical (V
the ideal diode will turn off quickly (t

) or lower reverse voltage,

REV

).

dDOFF

While in backup, the battery’s average cell voltage is moni­tored to protect the battery from excessive discharge. If
the cell voltage drops below the value programmed by the

pin (Li-Ion default = 2.75V/cell, NiMH/NiCd default

V

DIS

= 0.95V/cell, lead acid default = 1.93V/cell), the battery
P-MOSFETs are rapidly turned off and the battery is dis­connected from the load. If DCIN is above UVLO, the load
and the LTC4110 will be powered from the supply input. If
DCIN is below UVLO, the LTC4110 enters the micropower
shutdown mode (see the Shutdown Mode section for more
details). Also, the SMBus accessible BKUP_FLT fault bit
is set and maintained as long as suffi cient battery voltage
is present (V

≥ 2.7V). This fault bit can be read after

BAT

DCIN returns to a voltage level exceeding the internal
UVLO threshold (see V

) and DCOUT has regained suf-

UVI

fi cient voltage (see DCOUT) to provide internal power. If
the GPIO2 port is programmed as the BKUP_FLTb status
output after DCIN returns, it will be forced low to repre­sent an inverted BKUP_FLT bit. When DCIN returns, as
sensed by the UVLO, the shutdown mode is automatically
cancelled and normal operation can resume, however, the
BKUP_FLT bit remains set until either the SHDN pin is set
high (all registers reset) or register bits POR_RESET or
BUFLT_RST are set. See the Shutdown Mode section for
details. During backup, the external thermistor network
is monitored for battery presence.

BATTERY CHARGE MODE

Figure 2 shows the charge path to charge a battery. Cur­rent is pulled from the supply input to charge the battery.
At the same time, the input supply provides power to
both the system load and the backup load. The battery
is isolated from the load at all times so it cannot affect
charger terminations algorithms.

If we ignore battery chemistry for a moment, as far as the
LTC4110 charger is concerned, there are only two basic
charge modes. When the TYPE pin selects a standard bat­tery mode, charge termination is controlled by the LTC4110

4110fa

13

LTC4110

OPERATION

BACKUP LOADSYSTEM LOAD

DCIN

OFF OFFON

CURRENT FLOW

INID BATID

LTC4110

Figure 2. Charge Mode Operation

CHGFET

DCHFET

BATTERY

4110 F02

for the battery chemistry selected. Specifi cally the TIMER
pin becomes active and used to detect faults conditions or
terminate the charge cycle itself as needed. Smart battery
SMBus charge control commands are still honored if any
are sent at any time. A smart battery can safely function
in a standard battery mode if identical in chemistry and
voltage confi guration as the standard battery. When the
TYPE pin selects a smart battery mode, this simply disables
the TIMER pin and its function in charge termination. The
smart battery is able to restart or terminate a charge cycle
at any time using charge commands over the SMBus. This
mode also enables smart battery wake-up and watchdog
functions based on t

TIMEOUT

per the smart battery stan­dards. However it is not recommended to use a standard
battery with a LTC4110 confi gured for smart battery mode
operation. You can shorten battery life, damage or destroy
the battery. In the extreme case this can cause an explosion
since no charge termination mechanisms are active.

The following sections explain detailed operation for each
charge mode as selected by the TYPE pin.

STANDARD LI-ION/POLYMER BATTERY CHARGE MODE

The charger is programmed for standard Li-Ion batteries by
connecting the TYPE pin to GND. During Li-Ion charging,
the LTC4110 operates as a high effi ciency, synchronous,
PWM fl yback battery charger with constant-current and
constant fl oat voltage regions of operation. The constant­charge current is programmed by the combination of a
resistor (R

) from the I

CHG

pin to ground, a battery

CHG

current sense resistor (R

SNS(BAT)

) and CSP/CSN pin resis­tors. The constant voltage (fl oat voltage) is programmed
to one of four values (4.2V, 8.4V, 12.6V, 16.8V) depending
on the number of series cells using the SELC pin and can
be adjusted ±0.3V/cell with the V

pin. If adjusted, the

CHG

auto recharge threshold and overvoltage threshold will
track proportionally.

The charge cycle begins when the supply input is present
as sensed by the DCDIV pin and DCIN above UVLO, the
battery cell voltage is below the auto recharge threshold
(95% of the programmed fl oat voltage; see V

), thermis-

AR

tor temperature is within ideal limits, COLD, under range
(see SafetySignal Decoder section) or is optioned out and
the register bit CHARGE_INHIBIT is cleared (see Tables 6
and 7 for register details).

Soft-start ramps the charge current at a rate set by the
capacitor on the I

pin. When charging begins, the pro-

TH

grammable timer initiates timing and the CHGb (GPIO1
pin) status output is pulled LOW. An external capacitor
on the TIMER pin, along with the current set by the total
series resistance connected to the V

pin, sets the total

REF

charge time.

If the battery voltage is less than the 3.0V/cell bulk charge
threshold (V

), the charger will begin with a precondition-

BC

ing trickle charge current. The trickle current is programmed
by the resistor (R

) from the I

PCC

pin to ground. During

PCC

preconditioning trickle charging, if the battery voltage
stays below the bulk charge threshold (V

) 25% of the

BC

programmed bulk charge time, the battery may be defective
and the charge sequence will be terminated immediately.
To indicate this fault, the CHGb (GPIO1 pin) becomes high
impedance, the CHG_STATE_0 and CHG_STATE_1 register
bits will be set low and CHG_FLT register bit will be set
high. Charge is terminated and the timer reset until the
fault is cleared by the RESET_TO_ZERO or POR_RESET
SMBus write commands, SHDN pin toggle or the battery
removed and replaced. Removing the supply input will
not clear the fault if the battery is present.

If the battery voltage exceeds 107.5% (V

) of the

BOV

programmed fl oat voltage during any stage of charge,
the charger pauses until the voltage drops below the
hysteresis (V

). The timer is not stopped and no fault

BOVH

is indicated.

4110fa

14

OPERATION

LTC4110

14

ANY

CHARGE

STAT E

8

PWM

STOPPED

(BATTERY OVP)

STOP

CHARGE

(OVERTEMPERATURE)

RESUME

CHARGE

STAT E

RESET

15

9

1

PRE-CONDITIONING

CHARGE

5 (PRE-CONDITIONING FAULT)

23

ANY

CHARGE

STAT E

11 (BATTERY NEEDS RECHARGE)

6 (BULK TIME FAULT)

BULK

CHARGE

Figure 3. Standard Li-Ion Charge State Diagram (Does Not Include Calibration)

# Logic Event (T = True, F = False) [Notes] Notes and/or Actions (T = True, F = False)

I

1

RES_OR = F & DCDIV pin = T & SHDN pin = F &
CHARGE_INHIBITED = F & CHG_FLT = F & V

Or

RES_OR = F & DCDIV pin = T & SHDN pin = F &

BAT

< V

BC

CHARGE_INHIBITED = F & CHG_FLT=F &
ChargingVoltage() ≠ 0 & ChargingCurrent() ≠ 0

2V

BAT

> V

BC

3 C/5 = T Timer(Bulk) = Stopped & Timer/4(Top Off) = Started

4 Timer/4(Top Off = done [Battery is full] I

5 Timer/4(PreCond) = done before V

BAT

> V

BC

6 Timer(Bulk) = done before C/5 = T I

7

RESET_TO_ZERO = T [See ChargeMode()]

Or

CHARGE_INHIBIT=T [See ChargeMode()]

8 RES_HOT = T & RES_UR = F [See ChargeStatus()] I

9 RES_HOT = F [See ChargeStatus()] I

10

11

12

DCDIV pin = F

Or

RES_OR = T [Bat Removed, See ChargeStatus()]

Or

SHDN pin = T

Or

V

= T

UVD

Or

POR_RESET = T [See ChargeMode()]

V

= T [AutoRestart]

AR

Or

ChargingVoltage() & ChargingCurrent() ≠ 0

AlarmWarning() command is sent by Smart Battery over
SMBus with any of the following bits set to True:
OVER_CHARGED_ALARM
TERMINATE_CHARGE_ALARM

Or

Reserved ALARM

Or

OVER_TEMPERATURE_ALARM

Or

13 ChargingVoltage() or ChargingCurrent() = 0 sent I

14 V

15 V

Note: For all charge states, V

= T [Battery Overvoltage] PWM stopped. Timers remain running.

BOV

= F PWM restarted.

BOV

is always active.

CHG

& Timer/4(PreCond) = Started & CHG = T & ALARM_INHIBITED = F

PPC

(RES_OR = F = Bat Inserted -> See ChargeStatus() )
(POR_RESET -> See ChargeMode()

I

= Off & I

PPC

= Off & CHG = F (Typical Full State)

CHG

I

= Off & CHG_FLT = T & CHG = F

PPC

= Off & CHG_FLT = T & CHG = F

CHG

or IPPC = Off & All Timers = Reset & CHG_FLT = F & CHG = F

I

CHG

or I

CHG

or I

CHG

or I

I

CHG

= On & Timer/4(PreCond) = Stopped & Timer(Bulk) = Started.

CHG

= Off & CHG_FLT = T, Timers paused.

PPC

= On & CHG_FLT = F, Timers resume.

PPC

= Off & All Timers = Reset & ALARM_INHIBITED = F & CHG_FLT =

PPC

F & CHG = F & CHARGE_INHIBITED = F

(The battery needs another charge cycle or Smart Battery has requested to
start another cycle.)

I

or I

CHG

= Off & All Timers = Reset & CHG = F & ALARM_INHIBITED = T

PPC

(ALARM_INHIBITED bit is found in ChargeStatus())

or I

CHG

= Off & CHG = F

PPC

7, 12, 1310

STOP

CHARGE

4 (BATTERY FULL)

TOP-OFF

CHARGE

4110 F03

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15

LTC4110

OPERATION

When the battery voltage exceeds the bulk charge threshold

), the charger begins the bulk charge portion of the

(V

BC

charge cycle. As the battery accepts charge, the voltage
increases. Constant-current charge continues until the
battery approaches the constant voltage. At this time, the
charge current will begin to drop, signaling the beginning
of the constant-voltage portion of the charge cycle.

The charger will maintain the constant voltage across the bat­tery until either C/x is reached or 100% of the programmed
bulk charge time has elapsed during bulk charge. When
the current drops to approximately 20% of the full-scale
charge current, an internal C/x comparator will initiate the
start of the top-off stage. The top-off stage charges for
25% of the total programmed bulk charge time. When the
time elapses, charge is terminated and CHGb (GPIO1 pin)
is forced to a high impedance state and CHG_STATE_0 and
CHG_STATE_1 register bits will be set low. Should the total
bulk charge time elapse before C/x is reached, charge is
terminated and a CHG_FLT fault is indicated until cleared
by the RESET_TO_ZERO or POR_RESET SMBus write
commands, SHDN pin toggle or the battery removed and
replaced. Fault conditions are not cleared when the supply
input is removed if the battery has suffi cient voltage.

An optional external thermistor network is sampled at
regular intervals to monitor battery temperature and to
detect battery presence. If the thermistor temperature is
hot (see the SafetySignal Decoder section), the charge
timer is paused, charge current is halted, CHG_FLTb (GPIO3
pin) is forced low and the CHG_FLT bit will be set high.
CHGb (GPIO1 pin) , CHG_STATE_0 and CHG_STATE_1
register bits will not be affected. When the thermistor
value returns to an acceptable value, charging resumes,
CHG_FLTb (GPIO3 pin) returns to high impedance and the
CHG_FLT bit will be reset low. An open thermistor indicates
absence of a battery. To defeat the temperature monitoring
function, replace the thermistor with a resistor to indicate
ideal battery temperature. When a thermistor is not used,
the resistor circuit must be routed through the battery
connector if battery presence detection is required.

After a charge cycle has ended without fault, the charge
cycle is automatically restarted if the average battery cell
voltage falls below the auto recharge threshold. At any

time charging can be forced to stop by pulling the SHDN
pin high or setting the CHARGE_INHIBIT bit high through
the SMBus.

SMART BATTERY CHARGE MODE

This section explains operation for smart batteries with a
SMBus interface. Smart Li-Ion is selected by connecting
the TYPE pin to the V
is selected by connecting the TYPE pin to the V
The LTC4110 only implements a subset of smart battery
charger commands; the actual charging algorithm is
determined by LTC4110 through external resistors even
if the battery is “smart.”

The LTC4110 operates as a high effi ciency, synchronous,
PWM fl yback battery charger with constant current and
constant fl oat voltage regions of operation. The constant­charge current is programmed by the combination of a
resistor (R
current sense resistor (R
resistors. For Li-Ion the constant voltage (fl oat voltage)
is programmed to one of four values (4.2V, 8.4V, 12.6V,

16.8V) depending on the number of series cells using the
SELC pin and can be adjusted ±0.3V/cell with the V
pin. For nickel batteries the constant-voltage function is
not used, however, a non-zero value is still required to be
written to the ChargingVoltage() register. The internal auto
recharge function is inhibited for smart batteries.

If the battery voltage exceeds 107.5% (V
programmed fl oat voltage during any stage of charge,
the charger pauses until the voltage drops below the
hysteresis (V
is indicated. This function is disabled when nickel based
smart batteries are used.

There are four states associated with smart battery charge
mode, namely:

• SMBus Wake-Up Charge State

• SMBus Preconditioning Charge State

• SMBus Bulk Charge State

• SMBus OFF State
These states are explained in the following four sections.

) from the I

CHG

BOVH

pin and smart Nickel (NiMH/NiCd)

DD

pin.

REF

pin to ground, a battery

CHG

SNS(BAT)

). The timer is not stopped and no fault

) and CSP/CSN pin

CHG

) of the

BOV

16

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