LINEAR TECHNOLOGY LTC3831 Technical data
FEATURES
LTC3831
High Power Synchronous
Switching Regulator Controller
for DDR Memory Termination
U
DESCRIPTIO
■
High Power Switching Regulator Controller
for DDR Memory Termination
■
V
Tracks 1/2 of VIN or External V
OUT
■
No Current Sense Resistor Required
■
Low Input Supply Voltage Range: 3V to 8V
■
Maximum Duty Cycle >91% Over Temperature
■
Drives All N-Channel External MOSFETs
■
High Efficiency: Over 95% Possible
■
Programmable Fixed Frequency Operation:
REF
100kHz to 500kHz
■
External Clock Synchronization Operation
■
Programmable Soft-Start
■
Low Shutdown Current: <10µA
■
Overtemperature Protection
■
Available in 16-Pin Narrow SSOP Package
U
APPLICATIO S
■
DDR SDRAM Termination
■
SSTL_2 Interface
■
SSTL_3 Interface
The LTC®3831 is a high power, high efficiency switching
regulator controller designed for DDR memory termination. The LTC3831 generates an output voltage equal to
1/2 of an external supply or reference voltage. The LTC3831
uses a synchronous switching architecture with N-channel MOSFETs. Additionally, the chip senses output current through the drain-source resistance of the upper
N-channel FET, providing an adjustable current limit
without a current sense resistor.
The LTC3831 operates with input supply voltage as low as
3V and with a maximum duty cycle of >91%. It includes a
fixed frequency PWM oscillator for low output ripple
operation. The 200kHz free-running clock frequency can
be externally adjusted or synchronized with an external
signal from 100kHz to above 500kHz. In shutdown mode,
the LTC3831 supply current drops to <10µA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
5V
MBR0530T1
1µF
0.1µF
+
4.7µF
SHDN
C1
33pF
R
15k
PV
PV
CC2
CC1
0.01µF
130k
C
C
C
1500pF
V
CC
SS
FREQSET
SHDN
COMP
LTC3831
–
R
I
MAX
PGND
GND
TG
I
FB
BG
+
R
FB
Figure 1. Typical DDR Memory Termination Application
U
0.1µF
10k
1k
C
: SANYO POSCAP 6TPB330M
IN
: SANYO POSCAP 4TPB470M
C
OUT
Q1, Q2: SILICONIX Si4410DY
V
DDQ
2.5V
Q1 MBRS340T3
0.1µF
Q2
L
O
1.2µH
MBRS340T3
Efficiency vs Load Current
+
C
IN
330µF
×2
V
TT
1.25V
±6A
+
C
OUT
470µF
×3
3831 F01
100
90
80
70
60
50
40
EFFICIENCY (%)
30
TA = 25°C
20
= 2.5V
V
IN
10
V
OUT
0
0
= 1.25V
1
2
LOAD CURRENT (A)
34
5
6
2831 G01
3831f
1
LTC3831
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
TG
PV
CC1
PGND
GND
R
–
FB
R
+
SHDN
BG
PV
CC2
V
CC
I
FB
I
MAX
FREQSET
COMP
SS
WWWU
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
UU
W
(Note 1)
Supply Voltage
VCC....................................................................... 9V
PV
................................................................ 14V
CC1,2
Input Voltage
IFB, I
............................................... –0.3V to 14V
MAX
ORDER PART
NUMBER
LTC3831EGN
R+, R–, FB, SHDN, FREQSET ..... –0.3V to VCC + 0.3V
Junction Temperature (Note 9)............................. 125°C
Operating Temperature Range (Note 4) .. – 40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
GN PART MARKING
3831
Lead Temperature (Soldering, 10 sec)..................300°C
T
= 125°C, θJA = 130°C/W
JMAX
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are at TA = 25°C. VCC, PV
The ● denotes specifications that apply over the full operating temperature
, PV
CC1
= 5V, VR+ = 2.5V, VR– = GND, unless otherwise noted. (Note 2)
CC2
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
PV
CC
V
UVLO
V
FB
∆V
OUT
I
VCC
I
PVCC
∆f
OSC
V
SAWL
V
SAWH
V
COMPMAX
∆f
OSC
A
V
g
m
I
COMP
I
MAX
/∆I
FREQSET
Supply Voltage ● 358 V
PV
, PV
CC1
Voltage (Note 7) ● 3 13.2 V
CC2
Undervoltage Lockout Voltage 2.4 2.9 V
Feedback Voltage VR+ = 2.5V, VR– = 0V, V
Output Load Regulation I
Output Line Regulation V
Supply Current Figure 2, V
PVCC Supply Current Figure 2, V
= 0A to 10A (Note 6) 2 mV
OUT
= 4.75V to 5.25V 0.1 mV
CC
= V
SHDN
V
= 0V ● 110 µA
SHDN
V
= 0V ● 0.1 10 µA
SHDN
CC
= VCC (Note 3) ● 14 20 mA
SHDN
= 1.25V ● 1.231 1.25 1.269 V
COMP
● 0.7 1.6 mA
Internal Oscillator Frequency FREQSET Floating ● 160 200 240 kHz
V
at Minimum Duty Cycle 1.2 V
COMP
V
at Maximum Duty Cycle 2.2 V
COMP
Maximum V
COMP
VFB = 0V, PV
= 8V 2.85 V
CC1
Frequency Adjustment 10 kHz/µA
Error Amplifier Open-Loop DC Gain ● 46 55 dB
Error Amplifier Transconductance ● 520 650 780 µmho
Error Amplifier Output Sink/Source Current 100 µA
I
Sink Current V
MAX
I
Sink Current Tempco V
MAX
= V
IMAX
CC
= VCC (Note 6) 3300 ppm/°C
IMAX
91215 µA
● 41220 µA
3831f
2
LTC3831
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are at TA = 25°C. VCC, PV
The ● denotes specifications that apply over the full operating temperature
, PV
CC1
= 5V, VR+ = 2.5V, VR– = GND, unless otherwise noted. (Note 2)
CC2
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
V
IL
I
IN
I
SS
I
SSIL
+
R
tr, t
f
t
NOV
DC
MAX
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This will vary with
the LTC3831 operating frequency, operating voltage and the external FETs
used.
Note 4: The LTC3831EGN is guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
SHDN Input High Voltage ● 2.4 V
SHDN Input Low Voltage ● 0.8 V
SHDN Input Current V
Soft-Start Source Current VSS = 0V, V
Maximum Soft-Start Sink Current V
Undercurrent Limit PV
SHDN
IMAX
CC1
= V
CC
IMAX
= VCC, V
= 8V
● 0.1 1 µA
= 0V, V
= 0V, VSS = VCC (Note 8), 1.6 mA
IFB
IFB
= V
CC
● –8 –12 –16 µA
R+ Input Resistance 49.5 kΩ
Driver Rise/Fall Time Figure 2, PV
Driver Nonoverlap Time Figure 2, PV
Maximum TG Duty Cycle Figure 2, VFB = 0V (Note 5), PV
CC1
CC1
= PV
= 5V (Note 5) ● 80 250 ns
CC2
= PV
= 5V (Note 5) ● 25 120 250 ns
CC2
= 8V ● 91 95 %
CC1
Note 5: Rise and fall times are measured using 10% and 90% levels. Duty
cycle and nonoverlap times are measured using 50% levels.
Note 6: Guaranteed by design, not subject to test.
Note 7: PV
must be higher than VCC by at least 2.5V for TG to operate
CC1
at 95% maximum duty cycle and for the current limit protection circuit to
be active.
Note 8: The current limiting amplifier can sink but cannot source current.
Under normal (not current limited) operation, the output current will be
zero.
Note 9: This IC includes overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperature will
exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair
device reliability.
3831f
3
LTC3831
TEMPERATURE (˚C)
–50
ERROR AMPLIFIER TRANSCONDUCTANCE (µmho)
700
750
800
25 75
3831 G05
650
600
–25 0
50 100 125
550
500
TEMPERATURE (°C)
–50
40
ERROR AMPLIFIER OPEN-LOOP GAIN (dB)
45
50
55
60
–25 0 25 50
3831 G07
75 100 125
EXTERNAL SYNC FREQUENCY (kHz)
100
0.5
V
SAWH
– V
SAWL
(V)
0.6
0.8
0.9
1.0
1.5
1.2
200
300
3831 G10
0.7
1.3
1.4
1.1
400
500
TA = 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Load Regulation Line Regulation
1.270
TA = 25°C
REFER TO FIGURE 1
1.265
NEGATIVE OUTPUT CURRENT
INDICATES CURRENT SINKING
1.260
1.255
(V)
1.250
OUT
V
1.245
1.240
1.235
1.230
–4 –2 2
–6
0
OUTPUT CURRENT (A)
46
3831 G02
1.260
1.258
1.256
1.254
1.252
(V)
1.250
FB
V
1.248
1.246
1.244
1.242
1.240
TA = 25°C
3
4
5
SUPPLY VOLTAGE (V)
6
7
3831 G03
Error Amplifier Transconductance
vs Temperature
10
8
6
4
∆V
2
FB
(mV)
0
–2
–4
–6
–8
–10
8
Output Temperature Drift
1.270
REFER TO FIGURE 1
OUTPUT = NO LOAD
1.265
1.260
1.255
(V)
1.250
OUT
V
1.245
1.240
1.235
1.230
–25 0 50
–50
TEMPERATURE (°C)
Oscillator Frequency
vs Temperature
250
FREQSET FLOATING
240
230
220
210
200
190
180
OSCILLATOR FREQUENCY (kHz)
170
160
–50
4
0
–25
TEMPERATURE (°C)
25
25 125
50
75 100
3831 G04
75 100
3831 G08
Error Amplifier Sink/Source
Current vs Temperature
∆V
OUT
(mV)
200
180
160
140
120
100
80
60
40
ERROR AMPLIFIER SINK/SOURCE CURRENT (µA)
–50
20
15
10
5
0
–5
–10
–15
–20
Oscillator Frequency
vs FREQSET Input Current
600
500
400
300
200
OSCILLATOR FREQUENCY (kHz)
100
0
–40
–25 0 50
–30
FREQSET INPUT CURRENT (µA)
25
TEMPERATURE (°C)
–20 –10 0
75 100 125
3831 G06
TA = 25°C
10 20
3831 G09
Error Amplifier Open-Loop Gain
vs Temperature
Oscillator (V
SAWH
– V
SAWL
)
vs External Sync Frequency
3831f
UW
OUTPUT CURRENT (A)
0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
610
3831 G13
24
8
OUTPUT VOLTAGE (V)
TA = 25°C
REFER TO FIGURE 1
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3831
Maximum TG Duty Cycle
vs Temperature
100
VFB = 0V
REFER TO FIGURE 3
99
98
97
96
95
94
93
MAXIMUM G1 DUTY CYCLE (%)
92
91
–50
0
–25
TEMPERATURE (°C)
25 125
50
Output Current Limit Threshold
vs Temperature
10
REFER TO FIGURE 1
9
8
7
6
5
4
3
OUTPUT CURRENT LIMIT (A)
2
1
0
–50
–25
0
TEMPERATURE (°C)
50
25
75 100
75
100
3831 G11
3831 G14
125
I
Sink Current
MAX
vs Temperature Output Overcurrent Protection
20
18
16
14
12
10
SINK CURRENT (µA)
MAX
8
I
6
4
–25 0 50
–50
25
TEMPERATURE (°C)
Soft-Start Source Current
vs Temperature
–8
–9
–10
–11
–12
–13
–14
–15
SOFT-START SOURCE CURRENT (µA)
–16
–25 0 50
–50
25
TEMPERATURE (°C)
75 100 125
3831 G12
75 100 125
3831 G15
Soft-Start Sink Current
vs (V
– V
IFB
2.00
TA = 25°C
1.75
1.50
1.25
1.00
0.75
0.50
SOFT-START SINK CURRENT (mA)
0.25
0
–125 –100 –50
–150
IMAX
V
IFB
– V
)
–75
IMAX
(mV)
–25
0
3831 G16
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
–50
UNDERVOLTAGE LOCKOUT THRESHOLD VOLTAGE (V)
Undervoltage Lockout Threshold
Voltage vs Temperature
50
25
0
–25
TEMPERATURE (°C)
75
100
3831 G17
125
VCC Operating Supply Current
vs Temperature
1.6
FREQSET FLOATING
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
OPERATING SUPPLY CURRENT (mA)
CC
0.5
V
0.4
–50
0
–25
TEMPERATURE (°C)
50
25
PVCC Supply Current
vs Oscillator Frequency
90
TA = 25°C
80
70
60
50
TG AND BG
40
WITH 1000pF,
PV
30
SUPPLY CURRENT (mA)
CC
20
PV
10
100
125
3831 G18
75
0
0
TG AND BG LOADED
WITH 6800pF,
= 12V
PV
CC1,2
TG AND BG
LOADED
= 5V
CC1,2
100 300
200
OSCILLATOR FREQUENCY (kHz)
LOADED
WITH 6800pF,
PV
CC1,2
400
= 5V
500
3831 G19
3831f
5
LTC3831
UW
TYPICAL PERFOR A CE CHARACTERISTICS
PVCC Supply Current
vs Gate Capacitance
50
TA = 25°C
40
30
20
SUPPLY CURRENT (mA)
CC
10
PV
0
123
0
GATE CAPACITANCE AT TG AND BG (nF)
45
U
PV
= 12V
CC1,2
PV
= 5V
CC1,2
67 9
8
3831 G20
UU
10
TG Rise/Fall Time
vs Gate Capacitance Transient Response
200
TA = 25°C
180
160
140
120
100
80
60
TG RISE/FALL TIME (ns)
40
20
0
0
tf AT PV
AT PV
t
r
CC1,2
21
GATE CAPACITANCE AT TG AND BG (nF)
PI FU CTIO S
TG ( Pin 1): Top Driver Output. Connect this pin to the gate
of the upper N-channel MOSFET, Q1. This output swings
from PGND to PV
shutdown mode.
PV
(Pin 2): Power Supply Input for TG. Connect this pin
CC1
to a potential of at least VIN + V
can be generated using an external supply or a simple
charge pump connected to the switching node between
the upper MOSFET and the lower MOSFET.
PGND (Pin 3): Power Ground. Both drivers return to this
pin. Connect this pin to a low impedance ground in close
proximity to the source of Q2. Refer to the Layout Consideration section for more details on PCB layout techniques.
GND (Pin 4): Signal Ground. All low power internal circuitry returns to this pin. To minimize regulation errors
due to ground currents, connect GND to PGND right at the
LTC3831.
R–, R+ (Pins 5, 7): These two pins connect to the internal
resistor divider that generate the internal ratiometric reference for the error amplifier. The reference voltage is set
at 0.5 • (VR+ – VR–).
FB (Pin 6): Feedback Voltage. FB senses the regulated
output voltage either directly or through an external resistor divider. The FB pin is servoed to the ratiometric
. It remains low if BG is high or during
CC1
GS(ON)(Q1)
. This potential
V
OUT
50mV/DIV
= 5V
43
CC1,2
= 5V
AT PV
t
r
5
tf AT PV
67 9
CC1,2
CC1,2
= 12V
= 12V
8
10
3831 G21
I
LOAD
2A/DIV
50µs/DIV
3831 G22.tif
reference under closed-loop conditions. The LTC3831 can
operate with a minimum VFB of 1.1V and maximum VFB of
(VCC – 1.75V).
SHDN (Pin 8): Shutdown. A TTL compatible low level at
SHDN for longer than 100µs puts the LTC3831 into
shutdown mode. In shutdown, TG and BG go low, all
internal circuits are disabled and the quiescent current
drops to 10µA max. A TTL compatible high level at SHDN
allows the part to operate normally. This pin also double as
an external clock input to synchronize the internal oscillator with an external clock.
SS (Pin 9): Soft-Start. Connect this pin to an external
capacitor, CSS, to implement a soft-start function. If the
LTC3831 goes into current limit, CSS is discharged to
reduce the duty cycle. CSS must be selected such that
during power-up, the current through Q1 will not exceed
the current limit level.
COMP (Pin 10): External Compensation. This pin internally connects to the output of the error amplifier and input
of the PWM comparator. Use a RC + C network at this pin
to compensate the feedback loop to provide optimum
transient response.
3831f
6
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