LINEAR TECHNOLOGY LTC3733, LTC3733-1 Technical data

FEATURES

LTC3733/LTC3733-1

3-Phase, Buck

Controllers for AMD CPUs

U

DESCRIPTIO

■

3-Phase Controller with Onboard MOSFET Drivers

■

Current Mode Control Ensures Current Sharing

■

Differential Amplifier Accurately Senses V

■

±5% Output Current Matching Optimizes Thermal

OUT

Performance and Size of Inductors and MOSFETs

■

Reduced Input and Output Capacitance

■

Supports Active Voltage Positioning

■

VID Programmable Output Voltage from 0.8V to 1.55V
(AMD OpteronTM CPU)

■

6-Phase, 90A to 120A Operation

■

Output Power Good Indicator with Adaptive Blanking

■

210kHz to 530kHz Per Phase, PLL, Fixed Frequency

■

Synchronizable (LTC3733-1)

■

PWM, Stage Shedding or Burst Mode® Operation

■

OPTI-LOOP® Compensation Minimizes C

■

Adjustable Soft-Start Current Ramping

■

Short-Circuit Shutdown Timer with Defeat Option

■

No_CPU Detection

■

36-Lead 0.209" SSOP and 38-Lead (5mm × 7mm) QFN

OUT

U

APPLICATIO S

■

High Performance Notebook Computers

■

Servers, Desktop Computers and Workstations

The LTC®3733 family are PolyPhase® synchronous step­down switching regulator controllers that drive all
N-channel external power MOSFET stages in a phase­lockable, fixed frequency architecture. The 3-phase con­troller drives its output stages with 120° phase separation
at frequencies of up to 530kHz per phase to minimize the
RMS current dissipated by the ESR of both the input and
output filter capacitors. The 3-phase technique effectively
triples the fundamental frequency, improving transient
response while operating each phase at an optimal fre­quency for efficiency and ease of thermal design. Light
load efficiency is optimized by using a choice of output
stage shedding or Burst Mode technology.

A differential amplifier provides true remote sensing of both
the high and low sides of the output voltage at load points.

Soft-start and a defeatable, timed short-circuit shutdown
protect the MOSFETs and the load. A foldback current
circuit also provides protection for the external MOSFETs
under short-circuit or overload conditions. An all-“1” VID
detector turns off the regulator after 1µs timeout.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode, OPTI-LOOP and PolyPhase are registered trademarks of Linear Technology
Corporation. AMD Opteron is a trademark of Advanced Micro Devices, Inc.

TYPICAL APPLICATIO

5V

POWER GOOD INDICATOR

OPTIONAL SYN IN

U

CC

10µF

0.1µF

SW3 SW2 SW1

5 VID BITS

ON/OFF

5k

680pF

0.1µF

100pF

LTC3733-1

BOOST1
BOOST2
BOOST3

PGOOD
PLLIN

PLLFLTR

VID0-VID4
RUN

I

TH

SS
SGND

EAIN

–

IN

+

IN

Figure 1. High Current Triple Phase Step-Down Converter

SW1

SENSE1
SENSE1

SW2

PGND

SENSE2
SENSE2

SW3

SENSE3
SENSE3

TG1V

BG1

TG2

BG2

TG3

BG3

L1 0.8µH

+
–

V

IN

L2 0.8µH

+
–

V

IN

L3 0.8µH

+
–

0.002Ω

D1

0.002Ω

D2

0.002Ω

D3

+

+

22µF
35V
×2

V

OUT

0.8V TO 1.55V
65A

C

OUT

470µF
4V
×4

3733 F01

V

IN

5V TO 28V

3733f

1

LTC3733/LTC3733-1

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

Topside Driver Voltages (BOOSTN)............38V to –0.3V

Switch Voltage (SWN)...................................32V to –5V

Boosted Driver Voltage (BOOSTN – SWN)....7V to –0.3V

Peak Output Current <1ms (TGN, BGN) ..................... 5A

Supply Voltage (VCC), PGOOD

Pin Voltages ................................................7V to –0.3V

PLLIN, RUN, SS,

PLLFLTR, FCB Voltages ............................. VCC to –0.3V

UU

W

PACKAGE/ORDER I FOR ATIO

VID1

RUN

PLLFLTR

FCB

DIFFOUT

EAIN

SGND
SENSE1
SENSE1

SENSE2
SENSE2
SENSE3
SENSE3

VID2

TOP VIEW

1
2
3
4

+

5

IN

–

6

IN

7
8
9

+

10

–

11

+

12

–

13

–

14

+

15
16

SS

17

I

TH

18

G PACKAGE

36-LEAD PLASTIC SSOP

T

= 125°C, θJA = 95°C/W

JMAX

36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19

VID0
PGOOD
BOOST1
TG1
SW1
BOOST2
TG2
SW2
V

CC

BG1
PGND
BG2
BG3
SW3
TG3
BOOST3
VID4
VID3

ORDER PART

NUMBER

LTC3733CG

ITH Voltage................................................2.4V to –0.3V

Operating Ambient Temperature Range....... 0°C to 70°C

Junction Temperature (Note 2).............................125°C

Storage Temperature Range

LTC3733CG .......................................–65°C to 150°C

LTC3733CUHF-1 ...............................–65°C to 125°C

Lead Temperature (LTC3733CG)

(Soldering, 10 sec) ...............................................300°C

TOP VIEW

ORDER PART

NUMBER

PLLIN

RUN

VID1

VID0

PGOOD

BOOST1

TG1

38 37 36 35 34 33 32

SW1

VID4

31
30
29
28
27
26
25
24
23
22
21
20

BOOST3

BOOST2
TG2
SW2
V

CC

DRV
BG1
PGND
BG2
BG3
SW3
TG3

1PLLFLTR

FCB

2

+

IN

3

–

IN

4

DIFFOUT

SENSE1
SENSE1

SENSE2
SENSE2
SENSE3

EXPOSED PAD IS SGND (PIN 39) MUST BE SOLDERED TO PCB

5

EAIN

6

SGND

7

+

8

–

9

+

10

–

11

–

12

13 14 15 16

+

TH

SS

I

SENSE3

38-LEAD (7mm × 5mm) PLASTIC QFN

UHF PACKAGE

T

= 125°C, θJA = 34°C/W

JMAX

39

VID2

17 18 19

VID3

LTC3733CUHF-1

CC

UHF PART

MARKING

37331

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= VSS = 5V unless otherwise noted.

RUN

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop

V

REGULATED

V

SENSEMAX

I

MATCH

Regulated Voltage at IN

Maximum Current Sense Threshold V

Current Match Worst-Case Error at V

+

(Note 3); VID Code = 10011, V

= 0.5V, V

EAIN

V

SENSE1–, VSENSE2–, VSENSE3–

Open, 65 75 85 mV

ITH

SENSE(MAX)

= 1.2V 1.067 1.075 1.083 V

ITH

● 1.064 1.075 1.086 V

= 0.8V, 1.55V ● 62 75 88 mV

–5 5 %

3733f

2

LTC3733/LTC3733-1

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= VSS = 5V unless otherwise noted.

RUN

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

LOADREG

V

REFLNREG

g

m

g

mOL

V

FCB

I

FCB

V

BINHIBIT

Output Voltage Load Regulation (Note 3)

Measured in Servo Loop, ∆I
Measured in Servo Loop, ∆I

Voltage = 1.2V to 0.7V ● 0.1 0.5 %

TH

Voltage = 1.2V to 2V ● –0.1 –0.5 %

TH

Output Voltage Line Regulation VCC = 4.5V to 7V 0.03 %/V
Transconductance Amplifier g

m

ITH = 1.2V, Sink/Source 25µA (Note 3) 2.5 3.05 3.6 mmho

Transconductance Amplifier GBW ITH = 1.2V, (gm • ZL, ZL = Series 1k-100kΩ-1nF) 1.5 MHz
Forced Continuous Threshold ● 0.58 0.60 0.62 V
FCB Bias Current V
Burst Inhibit Threshold Measured at FCB pin VCC – 1.5 V

= 0.65V 0.2 0.7 µA

FCB

– 0.7 V

CC

– 0.3 V

CC

UVR Undervoltage SS Reset VCC Lowered Until the SS Pin is Pulled Low 3.3 3.8 4.5 V
I

Q

V

RUN

I

SS

V

SSARM

Input DC Supply Current (Note 4)
Normal Mode V
Shutdown V

RUN Pin ON Threshold V
Soft-Start Charge Current V

= 5V 2.5 mA

CC

= 0V, VID0 to VID4 Open 20 100 µA

RUN

, Ramping Positive 1 1.5 1.9 V

RUN

= 1.9V –0.8 –1.5 –2.5 µA

SS

SS Pin Arming Threshold VSS, Ramping Positive Until Short-Circuit 3.8 4.5 V

Latch-Off is Armed

V

SSLO

I

SCL

I

SDLHO

I

SENSE

SS Pin Latch-Off Threshold VSS, Ramping Negative 3.3 V
SS Discharge Current Soft-Short Condition V
Shutdown Latch Disable Current V

= 0.375V, VSS = 4.5V 1.5 5 µA

EAIN

= 0.375V, V

EAIN

= 4.5V –5 –1.5 µA

SS

SENSE Pins Source Current SENSE1+, SENSE1–, SENSE2+, SENSE2–,1320µA

SENSE3+, SENSE3– All Equal 1.2V; Current at Each Pin

DF

MAX

TG tR,t

BG t

R, tF

TG/BG t

F

Maximum Duty Factor In Dropout 95 98.5 %
Top Gate Rise Time C

Top Gate Fall Time C
Bottom Gate Rise Time C

Bottom Gate Fall Time C
Top Gate Off to Bottom Gate On Delay All Controllers, C

1D

= 3300pF 30 90 ns

LOAD

= 3300pF 40 90 ns

LOAD

= 3300pF 30 90 ns

LOAD

= 3300pF 20 90 ns

LOAD

= 3300pF Each Driver 60 ns

LOAD

Synchronous Switch-On Delay Time

BG/TG t

Bottom Gate Off to Top Gate On Delay All Controllers, C

2D

= 3300pF Each Driver 60 ns

LOAD

Top Switch-On Delay Time

t

ON(MIN)

Minimum On-Time Tested with a Square Wave (Note 5) 120 ns

VID Parameters

VID
VID
VID

IL

IH

PULLUP

Maximum Low Level Input Voltage 0.8 V
Minimum High Level Input Voltage 2 V
VID0 to VID4 Internal Pull-Up 150 kΩ

Resistance

ATTEN

ERR

VID0 to VID4 (Note 6) ● –0.25 0.25 %

Power Good Output Indication

V

PGL

I

PGOOD

V

PGTHNEG

V

PGTHPOS

t

PGBLNK

PGOOD Voltage Output Low I
PGOOD Output Leakage V
PGOOD Trip Thesholds V

V

Ramping Negative VID Code = 10011 –7 –10 –14 %

DIFFOUT

V

Ramping Positive PGOOD Goes Low After V

DIFFOUT

= 2mA 0.1 0.3 V

PGOOD

= 5V ±1 µA

PGOOD

with Respect to Set Output Voltage,

DIFFOUT

Delay 7 10 14 %

UVDLY

Power Good Blanking After VID Changes Outside PGOOD Window 120 µs

3733f

3

LTC3733/LTC3733-1

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= VSS = 5V unless otherwise noted.

RUN

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Oscillator and Phase-Locked Loop

f

NOM

f

LOW

f

HIGH

R

PLLTH

R

PLL IN

I

PLL LPF

R

RELPHS

Nominal Frequency V
Lowest Frequency V
Highest Frequency V

= 1.2V 310 350 400 kHz

PLLFLTR

= 0V 190 210 250 kHz

PLLFLTR

= 2.4V 470 530 620 kHz

PLLFLTR

PLLIN Input Threshold LTC3733-1 Only 1 V
PLLIN Input Resistance LTC3733-1 Only 50 kΩ
Phase Detector Output Current LTC3733-1 Only

Sinking Capability f
Sourcing Capability f

PLLIN
PLLIN

< f
> f

OSC
OSC

20 µA
20 µA

Controller 2-Controller 1 Phase 120 Deg
Controller 3-Controller 1 Phase 240 Deg

No_CPU Detection

t

NOCPU

No-CPU Shutdown Latency After All VID Bits = “1” 0.5 1 µs

Differential Amplifier

A

V

V

OS

Differential Gain 0.995 1.000 1.005 V/V
Input Offset Voltage IN+ = IN

–

= 1.2V, I

= 1mA, 0.5 5 mV

OUT

Input Referred; Gain = 1

CM Common Mode Input Voltage Range 0 5 V

+

CMRR Common Mode Rejection Ratio 0V < IN
I

CL

Output Current 10 40 mA

= IN

–

< 5V, I

= 1mA, Input Referred 50 70 dB

OUT

GBP Gain Bandwidth Product 2 MHz
SR Slew Rate RL = 2k 5 V/µs
V

O(MAX)

R

IN

Maximum High Output Voltage I

= 1mA V

OUT

– 1.2 V

CC

–␣ 0.8 V

CC

Input Resistance Measured at IN+ Pin 80 kΩ

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: T
dissipation P

is calculated from the ambient temperature TA and power

J

according to the following formula:

D

LTC3733CG: TJ = TA + (PD × 95°C/W)
LTC3733CUHF-1: T

= TA + (PD × 34°C/W)

J

Note 3: The IC is tested in a feedback loop that includes the differential
amplifier in a unity-gain configuration loaded with 100µA to ground driving
the VID DAC into the error amplifier and servoing the resultant voltage to
the midrange point for the error amplifier (V

ITH

= 1.2V).

Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.

Note 5: The minimum on-time condition corresponds to an inductor peak­to-peak ripple current of ≥40% of I

(see minimum on-time

MAX

considerations in the Applications Information Section).
Note 6: ATTEN

specification is in addition to the output voltage

ERR

accuracy specified at VID code 10011.
Note 7: This IC includes overtemperature protection that is intended to protect

the device during momentary overload conditions. Junction temperature will
exceed 125°C when overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.

3733f

4

UW

FREQUENCY (kHz)

200

85

EFFICIENCY (%)

100

450

3733 G03

91

88

97

94

250

550350

300

400 500

VIN = 5V

VIN = 12V

VIN = 20V

V

OUT

= 1.5V

I

LOAD

= 20A

VIN = 8V

TEMPERATURE (°C)

–45

65

MAXIMUM I

SENSE

THRESHOLD (mV)

85

45

3733 G06

70

80

75

–30

900

–15

15 7530 60

VO = 1.55V

VO = 0.8V

TEMPERATURE (°C)

–45

3.0

UNDERVOLTAGE RESET (V)

5.0

45

3733 G09

3.5

4.5

4.0

–30

900

–15

15 7530 60

TYPICAL PERFOR A CE CHARACTERISTICS

LTC3733/LTC3733-1

Efficiency vs I

100

V

= OPEN

FCB

90
80
70

60

50
40

EFFICIENCY (%)

30
20
10

0

0.1

V

FCB

INDUCTOR CURRENT (A)

Reference Voltage vs
Temperature

610

605

600

OUT

V

= 5V

FCB

= 0V

VIN = 8V
V

= 1.5V

OUT

1

10

100

3733 G01

Efficiency vs V

100

V

= 1.5V

OUT

f = 210kHz

95

90

85

EFFICIENCY (%)

80

75

70

0

IN

IL = 20A

IL = 50A

5

15

VIN (V)

2510 20

3733 G02

Error Amplifier gm vs
Temperature

4.0

3.5

(mmho)

m

3.0

Efficiency vs Frequency

Maximum I

Threshold vs

SENSE

Temperature

595

REFERENCE VOLTAGE (mV)

590

–45

Oscillator Frequency vs
Temperature

600
550
500
450
400
350
300

FREQUENCY (kHz)

250
200
150
100

–45

–15

–30

TEMPERATURE (°C)

V

= 2.4V

PLLFLTR

V

= 1.2V

PLLFLTR

V

= 0V

PLLFLTR

–30

–15

TEMPERATURE (°C)

15 7530 60

45

V

PLLFLTR

15 7530 60

45

3733 G04

= 5V

3733 G07

2.5

ERROR AMPLIFIER g

900

2.0
–45

–30

–15

15 7530 60

TEMPERATURE (°C)

45

900

3733 G05

Undervoltage Reset Voltage vs

Oscillator Frequency vs V

550

500

450

400

350

FREQUENCY (kHz)

300

250

900

200

0

0.4

1.2 2.0

V

PLLFLTR

(V)

1.6

PLLFLTR

2.40.8

3733 G08

Temperature

3733f

5

LTC3733/LTC3733-1

TEMPERATURE (°C)

–45

0

5

15

SHUTDOWN CURRENT (µA)

40

45

3733 G12

25

35

10

20

30

–30

900

–15

15 7530 60

V

ITH

(V)

0

–20

–10

0

I

SENSE

VOLTAGE THRESHOLD (mV)

10

30

40

50

90

70

1.6

3733 G15

20

80

60

0.8

2.41.2

0.4

2.0

V

OUT

(V)

0

–60

–50

–40

–30

–20

–10

I

SENSE

PIN CURRENT (µA)

0

1.2

3733 G18

0.2

1.60.6

0.4

0.8 1.0 1.4

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Short-Circuit Arming and Latchoff
vs Temperature

5.0

4.5

4.0

3.5

3.0

SS PIN VOLTAGE (V)

2.5

2.0
–45

–30

ARMING

LATCHOFF

–15

15 7530 60

TEMPERATURE (°C)

45

SS Pull-Up Current vs
Temperature

2.5

2.0

1.5

3733 G10

Shutdown Current vs

Supply Current vs Temperature

3.0

2.6

2.2

1.8

SUPPLY CURRENT (mA)

1.4

900

1.0
–45

–30

–15

TEMPERATURE (°C)

45

15 7530 60

900

3733 G11

Temperature

Maximum Current Sense
Threshold vs Duty Factor Peak Current Threshold vs V

75

50

ITH

1.0

SS PULL-UP CURRENT (µA)

0.5

0

–45

–30

Percentage of Nominal Output vs
Peak I

80

70

60

50

40

VOLTAGE (mV)

30

SENSE

20

PEAK I

10

0

0

10

PERCENTAGE OF NOMINAL OUTPUT VOLTAGE (%)

6

–15

TEMPERATURE (°C)

(Foldback)

SENSE

40 80

20

30

45

15 7530 60

70

3733 G13

9060

3733 G16

VOLTAGE (mV)

25

SENSE

I

900

0

0

20

DUTY FACTOR (%)

60

10040 80

3733 G14

Maximum Duty Factors vs
Temperature I

100

V

98

96

94

92

MAXIMUM DUTY FACTOR (%)

10050

90

–45

–15

–30

TEMPERATURE (°C)

= 0V

PLLFLTR

45

15 7530 60

900

3733 G17

Pin Current vs V

SENSE

OUT

3733f

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LTC3733/LTC3733-1

Maximum Current Threshold
Mismatch vs Temperature

3.0

2.5

2.0

1.5

1.0

0.5

0

MAXIMUM CURRENT THRESHOLD MISMATCH (mV)

–45

–15

–30

15 7530 60

TEMPERATURE (°C)

45

3733 G19

Continuous Mode at 1Amp,
Light Load Current

V

AC, 20mV/DIV

OUT

V

SW1

5V/DIV

AC, 20mV/DIV

900

Shed Mode at 1Amp,
Light Load Current

V

OUT

V

SW1

10V/DIV

V

SW2

10V/DIV

V

SW3

10V/DIV

= 12V

V

IN

= 1.5V

V

OUT

V

= V

FCB

CC

FREQUENCY = 210kHz 3733 G20

4µs/DIV

V

OUT

AC, 50mV/DIV

Burst Mode at 1Amp,
Light Load Current

V

AC, 20mV/DIV

OUT

V

SW1

10V/DIV

V

SW2

10V/DIV

V

SW3

10V/DIV

V
V
V
FREQUENCY = 210kHz

= 12V

IN
OUT
FCB

= 1.5V

= OPEN

Transient Load Current
Response: 0Amp to 50Amp

20µs/DIV

3733 G21

V

SW2

5V/DIV

V

SW3

5V/DIV

V

IN

V

OUT

V

FCB

FREQUENCY = 210kHz

= 12V

= 1.5V

= 0V

4µs/DIV

3733 G22

20A/DIV

I

L

= 12V

V

IN

= 1.5V

V

OUT

V

= 0V

FCB

FREQUENCY = 210kHz

20µs/DIV

3733 G23

3733f

7

LTC3733/LTC3733-1

U

PI FU CTIO S

VID0 to VID4 (Pins 36, 1, 18, 19, 20/Pins 35, 36, 16, 17,

18): Output Voltage Programming Input Pins. A 150k

internal pull-up resistor is provided on each input pin. See
Table 1 for details. Do not apply voltage to these pins prior
to the application of voltage on the VCC pin.

RUN (Pin 2/Pin 37): ON/OFF Control of the LTC3733.
PLLFLTR (Pin 3/Pin 1): The phase-locked loop’s lowpass

filter is tied to this pin. Alternatively, this pin can be driven
with an AC or DC voltage source to vary the frequency of
the internal oscillator. (Do not apply voltage to this pin
prior to the application of voltage on the VCC pin.)

FCB (Pin 4/Pin 2): Forced Continuous Control Input. The
voltage applied to this pin sets the operating mode of the
controller. The forced continuous current mode is active
when the applied voltage is less than 0.6V. Burst Mode
operation will be active when the pin is allowed to float and
a stage shedding mode will be active if the pin is tied to the
VCC pin. (Do not apply voltage to this pin prior to the
application of voltage on the VCC pin.)

IN+, IN– (Pins 5, 6/Pins 3, 4): Inputs to a precision, unity­gain differential amplifier with internal precision resistors.
This provides true remote sensing of both the positive and
negative load terminals for precise output voltage control.

DIFFOUT (Pin 7/Pin 5): Output of the Remote Output
Voltage Sensing Differential Amplifier.

EAIN (Pin 8/Pin 6): This is the input to the error amplifier
which compares the VID divided, feedback voltage to the
internal 0.6V reference voltage.

SGND (Pin 9/Pin 7, 39): Signal Ground. This pin must be
routed separately under the IC to the PGND pin and then
to the main ground plane. The exposed pad (QFN) must be
soldered to the PCB for optimal thermal performance.

UU

(G36/QFN)

SENSE1+, SENSE2+, SENSE3+, SENSE1–, SENSE2–,
SENSE3– (Pins 10 to 15/Pins 8 to 13): The Inputs to Each

Differential Current Comparator. The ITH pin voltage and
built-in offsets between SENSE– and SENSE+ pins, in con­junction with R

SS (Pin 16/Pin 14): Combination of Soft-Start and Short­Circuit Detection Timer. A capacitor to ground at this pin
sets the ramp time to full current output as well as the time
delay prior to an output voltage short-circuit shutdown. A
minimum value of 0.01µF is recommended on this pin.

I

(Pin 17/Pin 15): Error Amplifier Output and Switching

TH

Regulator Compensation Point. All three current
comparator’s thresholds increase with this control voltage.

PGND (Pin 26/Pin 24): Driver Power Ground. This pin
connects to the sources of the bottom N-channel external
MOSFETs and the (–) terminals of CIN.

BG1 to BG3 (Pins 27, 25, 24/Pins 25, 23, 22): High
Current Gate Drives for Bottom N-Channel MOSFETs.
Voltage swing at these pins is from ground to VCC.

DRV

External MOSFET Gates in QFN Package. This pin needs to
be closely decoupled to the IC’s PGND pin.

V

the controller circuit power. In the G36 package, it is also
the high power supply to drive the external MOSFET gates
and this pin needs to be closely decoupled to the IC’s
PGND pin.

SW1 to SW3 (Pins 32, 29, 23/Pins 31, 28, 21): Switch
Node Connections to Inductors. Voltage swing at these
pins is from a Schottky diode (external) voltage drop
below ground to VIN (where V
supply rail).

(NA/Pin 26): High Power Supply to Drive the

CC

(Pin 28/Pin 27): Main Supply Pin. This pin supplies

CC

, set the current trip threshold level.

SENSE

is the external MOSFET

IN

8

3733f

LTC3733/LTC3733-1

U

PI FU CTIO S

TG1 to TG3 (Pins 33, 30, 22/Pins 32, 29, 20): High
Current Gate Drives for Top N-channel MOSFETs. These
are the outputs of floating drivers with a voltage swing
equal to the boost voltage source superimposed on the
switch node voltage SW.

BOOST1 to BOOST3 (Pins 34, 31, 21/Pins 33, 30, 19):

Positive Supply Pins to the Topside Floating Drivers.
Bootstrapped capacitors, charged with external Schottky
diodes and a boost voltage source, are connected between
the BOOST and SW pins. Voltage swing at the BOOST pins
is from boost source voltage (typically VCC) to this boost
source voltage + VIN (where V
supply rail).

UU

(G36/QFN)

is the external MOSFET

IN

PGOOD (Pin 35/Pin 34): This open-drain output is pulled
low when the output voltage is outside the PGOOD toler­ance window. PGOOD is blanked during VID transitions
for approximately 120µs.

PLLIN (NA/Pin 38): Synchronization Input to Phase De­tector. This pin is internally terminated to SGND with
50kΩ. The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal. This pin is not available in the
G36 package.

Exposed Pad (NA/Pin 39): Signal Ground. Must be sol­dered to PCB.

3733f

9

LTC3733/LTC3733-1

U

U

W

FU CTIO AL DIAGRA

PLLIN

(LTC3733-1 ONLY)

F

IN

R

C

FCB

PGOOD

–

IN

+

IN

DIFFOUT

EAIN

I

TH

C

C

R

C

PLLFLTR

LP

LP

2.4V

2.5µA

+
–

0.6V

120µs

BLANKING

VID TRANSITIONS

0.600V

0.660V

PHASE DET

50k

OSCILLATOR

FCB

40k40k

–

A1

+

40k40k

V

FB

–

EA

+

OV

+
–

5-BIT VID DECODER

CLK1
CLK2

CLK3

–

0.66V

+

–
+

0.54V

6.667k

R2 VARIABLE

DUPLICATE FOR SECOND AND THIRD
CONTROLLER CHANNELS

EAIN

R1

LATCH

RS

V

CC

6V

5(VFB)

1.5µA

SLOPE

COMP

SRQ

I

1

5(V

Q

0.55V

–
+

2.4V

SHDN

RST

V

CC

BOOST

DROP

OUT

DET

BOT

FORCE BOT

B

+–

3mV

SHED

RUN
SOFT­START

FCB

SHDN

45k45k

–

I

+

+
–

+–

)

FB

SWITCH

LOGIC

2

0.600V

INTERNAL

SUPPLY

TOP

V

CC

THE LTC3733-1)

BOT

(DRVCC IN

V

CC

30k

30k

V

REF

TG

SW

BG

PGND

SENSE

SENSE

V

SGND

SS

+

R

SENSE

–

V

CC

CC

+

V

IN

D

B

C

B

L

+

C

IN

C

OUT

+

V

OUT

C

CC

10

VID0 VID1 VID2 VID3 VID4

NO_CPU

1µs

Figure 2

100k

RUN

C

SS

3733 F02

3733f