LINEAR TECHNOLOGY LTC3732 Technical data

FEATURES

■

3-Phase Current Mode Controller with
Onboard MOSFET Drivers

■

±5% Output Current Matching Optimizes Thermal
Performance and Size of Inductors and MOSFETs

■

4.5V ≤ VCC ≤ 7V; 4.5V ≤ VIN ≤ 32V

■

Differential Amplifier Accurately Senses V

■

Reduced Input and Output Capacitance

■

Reduced Power Supply Induced Noise

■

VID DAC Programmable from 1.1V to 1.85V

OUT

(VRM9.0/9.1)

■

±10% Power Good Output Indicator

■

250kHz to 600kHz Per Phase, PLL, Fixed Frequency

■

PWM, Stage SheddingTM or Burst Mode® Operation

■

OPTI-LOOP® Compensation Minimizes C

■

Adjustable Soft-Start Current Ramping

■

Short-Circuit Shutdown Timer with Defeat Option

■

Overvoltage Soft Latch

■

Small 36-Lead Narrow (0.209") SSOP Package

■

QFN 5mm × 7mm 38-Lead Package

U

OUT

APPLICATIO S

■

Desktop Computers

■

High Performance Notebook Computers

■

High Output Current DC/DC Power Supplies

LTC3732

3-Phase, 5-Bit VID,

600kHz, Synchronous Buck

Switching Regulator Controller

U

DESCRIPTIO

The LTC®3732 is a PolyPhase® synchronous step-down
switching regulator controller that drives all N-channel
external power MOSFET stages in a phase-lockable fixed
frequency architecture. The 3-phase controller drives its
output stages with 120° phase separation at frequencies
of up to 600kHz per phase to minimize the RMS current
losses in both the input and output filter capacitors. The 3­phase technique effectively triples the fundamental fre­quency, improving transient response while operating
each controller at an optimal frequency for high efficiency
and ease of thermal design. Light load efficiency is opti­mized by using a choice of output Stage Shedding or Burst
Mode technology.

A differential amplifier provides true remote sensing of both
the high and low side of the output voltage at load points.

Soft-start and a defeatable, timed short-circuit shutdown
protect the MOSFETs and the load. A foldback current
circuit also provides protection for the external MOSFETs
under short-circuit or overload conditions.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode, OPTI-LOOP and PolyPhase are registered trademarks of Linear Technology
Corporation. Stage Shedding is a trademark of Linear Technology Corporation

TYPICAL APPLICATIO

V

CC

4.5V TO 7V

POWER GOOD INDICATOR

OPTIONAL SYNC IN

U

LTC3732

SW1

SENSE1
SENSE1

SW2

PGND

SENSE2
SENSE2

SW3

SENSE3
SENSE3

TG1V

BG1

TG2

BG2

TG3

BG3

1µH

0.003Ω

+
–

V

IN

1µH

0.003Ω

+
–

V

IN

1µH

0.003Ω

+
–

+

+

0.1µF

100pF

CC

BOOST1
BOOST2
BOOST3

PGOOD
PLLIN

PLLFLTR

VID0-VID4

I

TH

RUN/SS
SGND

EAIN

–

IN

+

IN

10µF

0.1µF

SW3 SW2 SW1

5 VID BITS

680pF

5k

Figure 1. High Current Triple Phase Step-Down Converter

22µF
35V

V

OUT

1.1V TO 1.85V
55A

C

OUT

470µF
4V

3732 F01

V

IN

5V TO 28V

3732f

1

LTC3732

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

Topside Driver Voltages (BOOSTN)............38V to –0.3V

Switch Voltage (SWN)...................................32V to –5V

Boosted Driver Voltage (BOOSTN – SWN)....7V to –0.3V

Peak Output Current <1ms (TGN, BGN) ..................... 5A

Supply Voltage (VCC), PGOOD

Pin Voltage .................................................. 7V to –0.3V

RUN/SS, PLLFLTR, PLLIN, FCB Voltages .. VCC to –0.3V

ITH Voltage................................................2.4V to –0.3V

UU

W

PACKAGE/ORDER I FOR ATIO

1

VID1

2

PLLIN

3

PLLFLTR

4

FCB

+

5

IN

–

6

IN

7

DIFFOUT

8

EAIN

9

SGND

+

10

SENSE1

–

11

SENSE1

+

12

SENSE2

–

13

SENSE2

–

14

SENSE3

+

15

SENSE3

16

RUN/SS

17

I

TH

18

VID2

36-LEAD PLASTIC SSOP

T

= 125°C, θJA = 95°C/W

JMAX

TOP VIEW

G PACKAGE

36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19

VID0
PGOOD
BOOST1
TG1
SW1
BOOST2
TG2
SW2
V

CC

BG1
PGND
BG2
BG3
SW3
TG3
BOOST3
VID4
VID3

ORDER PART

NUMBER

LTC3732CG

Operating Ambient Temperature Range....... 0°C to 70°C

Junction Temperature (Notes 2, 3, 7) ................... 125°C

Storage Temperature Range ..................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)

SSOP Package.................................................. 300°C

Reflow Peak Body Temperature

QFN Package .................................................... 240°C

TOP VIEW

ORDER PART

NUMBER

FCB

PLLFLTR

PLLIN

VID1

VID0

PGOOD

17 18 19

VID3

VID4

BOOST1

TG3

BOOST3

31
30
29
28
27
26
25
24
23
22
21
20

TG1
SW1
BOOST2
TG2
SW2
V

CC

DRV

CC

BG1
PGND
BG2
BG3
SW3

LTC3732CUHF

38 37 36 35 34 33 32

+

1IN

–

IN

2

DIFFOUT

3

EAIN

4

PADDLE

5

SGND

6

+

SENSE1

7

–

SENSE1

8

+

SENSE2

9

–

SENSE2

10

–

SENSE3

11

+

SENSE3

12

(MUST BE CONNECTED TO PCB AND SGND PIN)

UNDERSIDE

PADDLE

IS SGND

13 14 15 16

TH

I

VID2

RUN/SS

UHF PACKAGE

38-LEAD (7mm × 5mm) PLASTIC QFN

PADDLE IS SGND

T

= 125°C, θJA = 34°C/W

JMAX

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= 5V unless otherwise noted.

RUN/SS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop

V

REGULATED

V

SENSEMAX

I

MATCH

V

LOADREG

V

REFLNREG

Regulated Voltage at IN

Maximum Current Sense Threshold V

Current Match Worst-Case Error at V
Output Voltage Load Regulation (Note 3)

Output Voltage Line Regulation VCC = 4.5V to 7V 0.03 %/V

+

(Note 3); VID Code = 11111, V

= 1.2V 1.067 1.075 1.083 V

ITH

● 1.064 1.075 1.086 V

= 0.5V, V

EAIN

V

SENSE1–, VSENSE2–, VSENSE3–

Measured in Servo Loop, ∆I
Measured in Servo Loop, ∆I

Open, 65 75 85 mV

ITH

= 0.6V, 1.8V ● 62 75 88 mV

SENSE MAX

TH
TH

Voltage = 1.2V to 0.7V ● 0.1 0.5 %
Voltage = 1.2V to 2V ● –0.1 –0.5 %

–5 5 %

3732f

2

LTC3732

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= 5V unless otherwise noted.

RUN/SS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
g

m

g

mOL

V

FCB

I

FCB

V

BINHIBIT

Transconductance Amplifier g

m

ITH = 1.2V, Sink/Source 25µA (Note 3) ● 3.6 5 6.6 mmho

Transconductance Amplifier GBW ITH = 1.2V, (gm • ZL, ZL = Series 1k-100kΩ-1nF) 3 MHz
Forced Continuous Threshold ● 0.58 0.60 0.62 V
FCB Bias Current V
Burst Inhibit Threshold Measured at FCB pin VCC – 1.5 V

= 0.65V 0.2 0.7 µA

FCB

– 0.7 V

CC

– 0.3 V

CC

UVR Undervoltage RUN/SS Reset VCC Lowered Until the RUN/SS Pin is Pulled Low 3.3 3.8 4.5 V
I

Q

I

RUN/SS

V

RUN/SS

V

RUN/SSARM

Input DC Supply Current (Note 4)
Normal Mode V
Shutdown V

Soft-Start Charge Current V
RUN/SS Pin ON Threshold V
RUN/SS Pin Arming Threshold V

= 5V 2.2 3.5 mA

CC
RUN/SS

RUN/SS

RUN/SS

RUN/SS

= 0V, VID0 to VID4 Open 25 100 µA
= 1.9V –0.8 –1.5 –2.5 µA

, Ramping Positive 1 1.5 1.9 V
, Ramping Positive Until Short-Circuit 3.8 4.5 V

Latch-Off is Armed

V

RUN/SSLO

I

SCL

I

SDLHO

I

SENSE

DF

MAX

TG tR,t

BG t

R, tF

TG/BG t

F

RUN/SS Pin Latch-Off Threshold V
RUN/SS Discharge Current Soft-Short Condition V
Shutdown Latch Disable Current V
SENSE Pins Source Current SENSE1+, SENSE1–, SENSE2+, SENSE2–,1320µA

Maximum Duty Factor In Dropout; V
Top Gate Rise Time C

Top Gate Fall Time C
Bottom Gate Rise Time C

Bottom Gate Fall Time C
Top Gate Off to Bottom Gate On Delay All Controllers, C

1D

, Ramping Negative 3.2 V

RUN/SS

= 0.375V, V

EAIN

= 0.375V, V

EAIN

+

SENSE3

, SENSE3– All Equal 1.2V; Current at Each Pin

SENSEMAX

= 3300pF 30 90 ns

LOAD

= 3300pF 40 90 ns

LOAD

= 3300pF 30 90 ns

LOAD

= 3300pF 20 90 ns

LOAD

= 4.5V 1.5 5 µA

RUN/SS

≤ 30mV 95 98.5 %

= 3300pF Each Driver 50 ns

LOAD

= 4.5V –5 –1.5 µA

RUN/SS

Synchronous Switch-On Delay Time

BG/TG t

Bottom Gate Off to Top Gate On Delay All Controllers, C

2D

= 3300pF Each Driver 60 ns

LOAD

Top Switch-On Delay Time

t

ON(MIN)

Minimum On-Time Tested with a Square Wave (Note 5) 110 ns

VID Parameters

VID

IL

VID

IH

VID

PULLUP

ATTEN

ERR

Maximum Low Level Input Voltage 0.4 V
Minimum High Level Input Voltage 2 V
VID0 to VID4 Internal Pull-Up Current V

= 0V 3 µA

VID

VID0 to VID4 (Note 6) ● –0.25 0.25 %

Power Good Output Indication

V

PGL

I

PGOOD

V

PGTHNEG

V

PGTHPOS

V

PGDLY

PGOOD Voltage Output Low I
PGOOD Output Leakage V
PGOOD Trip Thesholds V

V

Ramping Negative VID Code = 11111, –7 –10 –13 %

DIFFOUT

V

Ramping Positive PGOOD Goes Low After V

DIFFOUT

Power Good Fault Report Delay After V

= 2mA 0.1 0.3 V

PGOOD

= 5V 1 µA

PGOOD

with Respect to Set Output Voltage,

DIFFOUT

Delay 7 11 13 %

UVDLY

is Forced Outside the PGOOD Thresholds 100 150 µs

EAIN

3732f

3

LTC3732

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at TA = 25°C. VCC = V

The ● denotes the specifications which apply over the full operating

= 5V unless otherwise noted.

RUN/SS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Oscillator and Phase-Locked Loop

f

NOM

f

LOW

f

HIGH

R

PLLTH

R

PLL IN

I

PLLFLTR

R

RELPHS

Nominal Frequency V
Lowest Frequency V
Highest Frequency V

= 1.2V 360 400 440 kHz

PLLFLTR

= 0V 190 225 260 kHz

PLLFLTR

= 2.4V 600 680 750 kHz

PLLFLTR

PLLIN Input Threshold Minimum Pulse Width >100ns 1 V
PLLIN Input Resistance 50 kΩ
Phase Detector Output Current

Sinking Capability f
Sourcing Capability f

PLLIN
PLLIN

< f
> f

OSC
OSC

20 µA
20 µA

Controller 2-Controller 1 Phase 120 Deg
Controller 3-Controller 1 Phase 240 Deg

Differential Amplifier

A

V

V

OS

Differential Gain 0.995 1.000 1.005 V/V
Input Offset Voltage IN+ = IN

–

= 1.2V, I

= 1mA, 0.5 5 mV

OUT

Input Referred; Gain = 1

CM Common Mode Input Voltage Range 0 V

+

CMRR Common Mode Rejection Ratio 0V < IN
I

CL

GBP Gain Bandwidth Product I

Output Current 10 40 mA

= 1mA 2 MHz

OUT

= IN

–

< 5V, I

= 1mA, Input Referred 50 70 dB

OUT

CC

SR Slew Rate RL = 2k 5 V/µs
V

O(MAX)

R

IN

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired. A maximum current of 200µA is allowed to
pull-up the RUN/SS pin to prevent overcurrent shutdown.

Note 2: TJ is calculated from the ambient temperature TA and power
dissipation P

LTC3732CG: TJ = TA + (PD × 95°C/W)
LTC3732CUHF: T

Note 3: The IC is tested in a feedback loop that includes the differential
amplifier in a unity-gain configuration loaded with 100µA to ground driving
the VID DAC into the error amplifier and servoing the resultant voltage to
the midrange point for the error amplifier (V

Maximum High Output Voltage I

= 1mA V

OUT

– 1.2 V

CC

–␣ 0.8 V

CC

Input Resistance Measured at IN+ Pin 80 kΩ

Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.

Note 5: The minimum on-time condition corresponds to an inductor peak-

according to the following formula:

D

= TA + (PD × 34°C/W)

J

to-peak ripple current of ≥40% of I
considerations in the Applications Information Section).

Note 6: ATTEN

specification is in addition to the output voltage

ERR

accuracy specified at VID code = 11111.

(see minimum on-time

MAX

Note 7: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.

ITH

= 1.2V).

Continuous operation above the specified maximum operating junction
temperature may impair device reliability.

V

4

3732f

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LTC3732

Efficiency vs I

100

V

= OPEN

FCB

90

V

= 5V

FCB

80
70
60
50
40

EFFICIENCY (%)

30
20
10

0

0.1

V

= 0V

FCB

INDUCTOR CURRENT (A)

Reference Voltage vs
Temperature

610

605

600

(Figure 14)

OUT

VIN = 8V

= 1.5V

V

OUT

1 10 100

3732 G01

Efficiency vs V

100

95
90
85
80
75
70

EFFICIENCY (%)

65
60
55
50

0

IL = 50A

5

Error Amplifier gm vs
Temperature

6.0

5.5

(mmho)

m

5.0

(Figure 14)

IN

IL = 20A

10

VIN (V)

15

V

= 1.5V

OUT

f = 250kHz

20

3732 G02

Efficiency vs Frequency (Figure 14)

100

95

VIN = 5V

90

VIN = 12V

85

EFFICIENCY (%)

VIN = 20V

80

25

75

200

Maximum I

300

FREQUENCY (kHz)

SENSE

I

LOAD

V

OUT

VIN = 8V

400

500

Threshold vs

= 20A

= 1.5V

3732 G03

600

Temperature

85

80

VO = 1.8V

THRESHOLD (mV)

75

SENSE

VO = 0.6V

595

REFERENCE VOLTAGE (mV)

590

–30 10 50

–50

–10

TEMPERATURE (°C)

30

70

90

110

3732 G04

4.5

ERROR AMPLIFIER g

4.0
–30 0

–45

–15

15

TEMPERATURE (°C)

Oscillator Frequency vs
Temperature Oscillator Frequency vs V

700

V

PLLFLTR

600

500

400

V

PLLFLTR

300

FREQUENCY (kHz)

200

V

PLLFLTR

100

0

–30 0

–45 –15

= 2.4V

= 1.2V

= 0V

15

TEMPERATURE (°C)

V

= 5V

PLLFLTR

60

30 90

75

45

3732 G07

700

600

500

400

300

FREQUENCY (kHz)

200

100

0

0.6 1.2 2.4

0 1.8

V

60

30 90

45

PLLFLTR

PLLFLTR

75

3732 G05

3732 G08

70

MAXIMUM I

65

–30 0

–45 –15

TEMPERATURE (°C)

30 90

15

Undervoltage Reset Voltage vs
Temperature

5

4

3

2

UNDER VOLTAGE RESET (V)

1

0

–30 0

–45 –15

TEMPERATURE (°C)

30 90

15

60

75

45

3732 G06

60

45

75

3732 G09

3732f

5

LTC3732

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Short-Circuit Arming and Latchoff
vs Temperature Supply Current vs Temperature

5

ARMING

4

LATCHOFF

3

2

RUN/SS PIN VOLTAGE (V)

1

0

–30 0

–45 –15

TEMPERATURE (°C)

30 90

45

15

60

75

3732 G10

VCC = 5V

2.8

2.4

2.0

1.6

1.2

0.8

SUPPLY CURRENT (mA)

0.4

0

–30 0

–45 –15

TEMPERATURE (°C)

30 90

45

15

Maximum Current Sense

Maximum I

80

70

60

(mV)

50

SENSE

40

30

MAXIMUM I

20

10

0

0

1

SENSE

V

RUN/SS

2

vs V

RUN/SS

3

4

VOLTAGE (V)

56

3732 G13

Threshold vs Duty Factor

75

50

VOLTAGE (mV)

25

SENSE

I

0

0

20 40 60 80

DUTY FACTOR (%)

RUN/SS Pull-Up Current vs
Temperature

100

80

60

40

20

75

3732 G11

0

100

3732 G13a

60

2.5
V

RUN/SS

SHUTDOWN CURRENT (µA)

2.0

1.5

1.0

0.5

RUN/SS PULLUP CURRENT (mV)

0

–30 0

–45 –15

Peak Current Threshold vs V

75

60

45

30

15

VOLTAGE THRESHOLD (mV)

0

SENSE

I

–15

0

= 1.9V

60

30 90

45

15

TEMPERATURE (°C)

75

3732 G12

ITH

0.6 1.2 1.8 2.4
V

(V)

ITH

3732 G14

Percentage of Nominal Output vs
Peak I

80

70

60

50

40

VOLTAGE (mV)

30

SENSE

20

PEAK I

10

0

0

PERCENTAGE OF NOMINAL OUTPUT VOLTAGE (%)

(Foldback)

SENSE

2010 30 50 70 90

60

40

6

Maximum Duty Factor vs
Temperature

100

98

96

94

92

MAXIMUM DUTY FACTOR (%)

80

100

3732 G15

90

–30 0

–45 –15

15

TEMPERATURE (°C)

V

= 0V

PLLFLTR

60

30 90

45

75

3732 G16

PIN CURRENT (µA)

–10

SENSE

I

–20

–30

40

30

20

10

0

I

Pin Current vs V

SENSE

0

1

2

V

(V)

OUT

OUT

34

3732 G17

3732f

5

UW

TYPICAL PERFOR A CE CHARACTERISTICS

40

180

LTC3732

Differential Amplifier Gain-PhaseError Amplifier Gain-Phase

0

0

GAIN (dB)

V

OUT

AC, 20mV/DIV

V

SW1

10V/DIV

V

SW2

10V/DIV

V

SW3

10V/DIV

35

30

25

20

15

10

RL = 10k AC LOAD

5

100

1k 10k 1M

FREQUENCY (Hz)

100k

Shed Mode at 1Amp, Light Load
Current (Circuit of Figure 14)

3732 G18

135

90

PHASE (DEG)

45

0

–45

–90

–135

GAIN (dB)

–12

–15

V

OUT

AC, 20mV/DIV

V

SW1

10V/DIV

V

SW2

10V/DIV

V

SW3

10V/DIV

–3

–6

–9

0001

0.01

0.1

FREQUENCY (MHz)

1

Burst Mode at 1Amp, Light Load
Current (Circuit of Figure 14)

3732 G19

10

–45

–90

–135

–180

–225

PHASE (DEG)

V

OUT

AC, 20mV/DIV

V

SW1

10V/DIV

V

SW2

10V/DIV

V

SW3

10V/DIV

= 12V

V

IN

V

= 1.5V

OUT

= V

V

FCB

CC

FREQUENCY = 250kHz

4µs/DIV 4µs/DIV

3732 G20

Continuous Mode at 1Amp, Light
Load Current (Circuit of Figure 14)

VIN = 12V
V

= 1.5V

OUT

V

= 0V

FCB

FREQUENCY = 250kHz

4µs/DIV 20µs/DIV

3732 G22 3732 G23

V

OUT

AC, 20mV/DIV

20A/DIV

= 12V

V

IN

V

= 1.5V

OUT

= OPEN

V

FCB

FREQUENCY = 250kHz

3732 G21

Transient Load Current Response: 0Amp
to 50Amp (Circuit of Figure 14)

I

L

= 12V

V

IN

V

= 1.5V

OUT

V

= V

FCB

CC

FREQUENCY = 250kHz

3732f

7

LTC3732

U

UU

PI FU CTIO S

VID0 to VID4: Output Voltage Programming Input Pins. A
3µA internal pull-up current is provided on each input pin.
See Table 1 for details. Do not apply voltage to these pins
prior to the application of voltage on the VCC pin.

PLLIN: Synchronization Input to Phase Detector. This pin
is internally terminated to SGND with 50kΩ. The phase­locked loop will force the rising top gate signal of control­ler 1 to be synchronized with the rising edge of the PLLIN
signal.

PLLFLTR: The phase-locked loop’s lowpass filter is tied to
this pin. Alternatively, this pin can be driven with an AC or
DC voltage source to vary the frequency of the internal
oscillator. (Do not apply voltage directly to this pin prior to
the application of voltage on the VCC pin.)

FCB: Forced Continuous Control Input. The voltage ap­plied to this pin sets the operating mode of the controller.
The forced continuous current mode is active when the
applied voltage is less than 0.6V. Burst Mode operation
will be active when the pin is allowed to float and a stage
shedding mode will be active if the pin is tied to the VCC pin.
(Do not apply voltage directly to this pin prior to the
application of voltage on the VCC pin.)

IN+, IN–: Inputs to a precision, unity-gain differential
amplifier with internal precision resistors. This provides
true remote sensing of both the positive and negative load
terminals for precise output voltage control.

DIFFOUT: Output of the Remote Output Voltage Sensing
Differential Amplifier.

EAIN: This is the input to the error amplifier which com­pares the VID divided, feedback voltage to the internal

0.6V reference voltage.
PADDLE (UHF Package Only): This pin is connected to

the heat spreading metal pad at the center of the package
bottom and is tied to the IC’s substrate. It must be
connected to the SGND pin.

SGND: Signal Ground. This pin must be routed separately
under the IC to the PGND pin and then to the main ground
plane.

SENSE1+, SENSE2+, SENSE3+, SENSE1–, SENSE2–,
SENSE3–: The Inputs to Each Differential Current Com-

parator. The ITH pin voltage and built-in offsets between
SENSE– and SENSE+ pins, in conjunction with R
the current trip threshold level.

SENSE

, set

RUN/SS: Combination of Soft-Start, Run Control Input
and Short-Circuit Detection Timer. A capacitor to ground
at this pin sets the ramp time to full current output as well
as the time delay prior to an output voltage short-circuit
shutdown. A minimum value of 0.01µF is recommended
on this pin.

ITH: Error Amplifier Output and Switching Regulator Com­pensation Point. All three current comparator’s thresholds
increase with this control voltage.

PGND: Driver Power Ground. This pin connects directly to
the sources of the bottom N-channel external MOSFETs
and the (–) terminals of CIN.

BG1 to BG3: High Current Gate Drives for Bottom N­Channel MOSFETs. Voltage swing at these pins is from
ground to VCC.

VCC: Main Supply Pin. Because this pin supplies both the
controller circuit power as well as the high power pulses
supplied to drive the external MOSFET gates, this pin
needs to be very carefully and closely decoupled to the IC’s
PGND pin.

DRVCC (UHF Package Only): This pin provides power to
the bottom MOSFET on-chip drivers. Tie this pin to the V
pin and carefully decouple this pin to the PGND pin with a
minimum of 5µF of ceramic capacitance immediately
adjacent to the IC package.

SW1 to SW3: Switch Node Connections to Inductors.
Voltage swing at these pins is from a Schottky diode
(external) voltage drop below ground to VIN (where V
the external MOSFET supply rail).

TG1 to TG3: High Current Gate Drives for Top N-channel
MOSFETs. These are the outputs of floating drivers with a
voltage swing equal to the boost voltage source superim­posed on the switch node voltage SW.

BOOST1 to BOOST3: Positive Supply Pins to the Topside
Floating Drivers. Bootstrapped capacitors, charged with
external Schottky diodes and a boost voltage source, are
connected between the BOOST and SW pins. Voltage
swing at the BOOST pins is from boost source voltage
(typically VCC) to this boost source voltage + VIN (where
V

is the external MOSFET supply rail).

IN

PGOOD: This open-drain output is pulled low when the
output voltage has been outside the PGOOD tolerance
window for the V

delay of approximately 100µs.

PGDLY

IN

CC

is

8

3732f

LTC3732

U

U

W

FU CTIO AL DIAGRA

F

IN

R

C

PGOOD

PLLIN

PLLFLTR

LP

LP

FCB

0.6V

100µs

DELAY

–

IN

+

IN

DIFFOUT

EAIN

0.600V

0.660V

I

TH

C

C

R

C

VID0 VID1 VID2 VID3 VID4

PHASE DET

50k

OSCILLATOR

+
–

PROTECTION

R1
20k

V

FB

–

EA

+

+

–

5-BIT VID DECODER

FCB

40k40k

–

A1

+

40k40k

OV

R2 VARIABLE

CLK1
CLK2

CLK3

–
+

–
+

0.66V

EAIN

0.54V

LATCH

DUPLICATE FOR SECOND AND THIRD

CONTROLLER CHANNELS

BOOST

DROP

OUT
DET

BOT

+
–

+–

B

+–

3mV

SHED

RUN

SOFT-

START

FORCE BOT

FCB

SHDN

–
+

54k54k

INTERNAL

I

2.4V

SUPPLY

6V

5(VFB)

1.5µA

SLOPE

COMP

CLAMP

SRQ

I

1

SS

5(V

Q

0.55V

–
+

SHDN

RST

FCB

)

FB

RS

V

CC

SWITCH

LOGIC

2

0.600V

UV/ OVERTEMP

TOP

VCC/DRVCC*

BOT

RESET

TG

SW

BG

PGND

V

CC

SENSE

36k

SENSE

36k

V

REF

V

SGND

RUN/SS

V

CC

+

R

SENSE

–

V

CC

CC

+

V

IN

D

B

C

B

L

+

C

IN

C

OUT

+

V

OUT

C

CC

C

SS

Figure 2

U

OPERATIO

Main Control Loop

The IC uses a constant frequency, current mode step­down architecture. During normal operation, each top
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the main current
comparator, I1, resets each RS latch. The peak inductor

(Refer to Functional Diagram)

3732 F02

* UHF PACKAGE CONNECTION

current at which I1 resets the RS latch is controlled by the
voltage on the I

pin, which is the output of the error

TH

amplifier EA. The EAIN pin receives a portion of this
voltage feedback signal via the DIFFOUT pin through the
internal VID DAC and is compared to the internal reference

3732f

9