LINEAR TECHNOLOGY LTC3728 Technical data
CHANGE NOTIFICATION
Linear Technology Corporation
(408) 432-1900
August 15, 2008
Dear Sir/Madam:
Subject:
Please be advised that Linear Technology Corporation has made a minor change to the LTC3728
datasheet to more accurately reflect the device performance and optimize limits. The changes are
shown on the attached page of the marked up datasheet. There was no change made to the die. The
product shipped after September 15, 2008 will be tested to the new limits.
Should you have any further questions, please feel free to contact me at (408)-432-1900 ext. 2519, or
by e-mail at NGIRN@linear.com. If I do not hear from you by September 15, 2008, we will consider
this change to be approved by your company.
Sincerely,
Naib Girn
Quality Assurance Manager
Notification of Change to LTC3728 Datasheet
1630 McCarthy Blvd., Milpitas, CA 95035-7417
PCN#: 081508
Confidential Statement
This change notice is for Linear Technology’s Customers only.
Distribution or notification to third parties is prohibited
FEATURES
LTC3728
Dual, 550kHz, 2-Phase
Synchronous Step-Down Switching Regulator
U
DESCRIPTIO
■
Dual, 180° Phased Controllers Reduce Required
Input Capacitance and Power Supply Induced Noise
■
OPTI-LOOP® Compensation Minimizes C
■
±1% Output Voltage Accuracy
■
Power Good Output Voltage Indicator
■
Phase-Lockable Fixed Frequency 250kHz to 550kHz
■
Dual N-Channel MOSFET Synchronous Drive
■
Wide VIN Range: 3.5V to 36V Operation
■
Very Low Dropout Operation: 99% Duty Cycle
■
Adjustable Soft-Start Current Ramping
■
Foldback Output Current Limiting
■
Latched Short-Circuit Shutdown with Defeat Option
■
Output Overvoltage Protection
■
Remote Output Voltage Sense
■
Low Shutdown IQ: 20µA
■
5V and 3.3V Regulators
■
3 Selectable Operating Modes: Constant Frequency,
Burst Mode
■
Available in 32-Pin 5mm × 5mm QFN and
®
Operation and PWM
OUT
28-Pin SSOP Packages
U
APPLICATIO S
■
Notebook and Palmtop Computers
■
Telecom Systems
■
Portable Instruments
■
Battery-Operated Digital Devices
■
DC Power Distribution Systems
The LTC
®
3728 is a dual high performance step-down
switching regulator controller that drives all N-channel
synchronous power MOSFET stages. A constant frequency current mode architecture allows phase-lockable
frequency of up to 550kHz. Power loss and noise due to
the ESR of the input capacitors are minimized by operating
the two controller output stages out of phase.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance and
ESR values. The precision 0.8V reference and power good
output indicator are compatible with future microprocessor generations, and a wide 3.5V to 30V (36V maximum)
input supply range encompasses all battery chemistries.
A RUN/SS pin for each controller provides both soft-start
and optional timed, short-circuit shutdown. Current
foldback limits MOSFET dissipation during short-circuit
conditions when overcurrent latchoff is disabled. Output
overvoltage protection circuitry latches on the bottom
MOSFET until V
returns to normal. The FCB mode pin
OUT
can select among Burst Mode, constant frequency mode
and continuous inductor current mode or regulate a
secondary winding. The LTC3728 includes a power good
output pin that indicates when both outputs are within
7.5% of their designed set point.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 5929620, 6177787, 6144194, 6100678,
5408150, 6580258, 6304066, 5705919.
TYPICAL APPLICATIO
3.2µH
R
SENSE1
0.01Ω
V
OUT1
5V
5A
C
+
47µF
6V
SP
M1, M2: FDS6982S
U
+
OUT1
4.7µF
M1
L1
R2
105k
1%
R1
20k
1%
1000pF
C
220pF
R
C1
15k
C1
C
B1
500kHz
, 0.1µF
f
IN
D3
C
0.1µF
SS1
VINPGOOD INTV
TG1 TG2
BOOST1 BOOST2
SW1 SW2
LTC3728
BG1 BG2
PLLIN
+
SENSE1
–
SENSE1
V
OSENSE1
I
TH1
RUN/SS1 RUN/SS2
SGND
PGND
SENSE2
SENSE2
V
OSENSE2
CC
I
TH2
+
–
C
0.1µF
C
B2
SS2
Figure 1. High Efficiency Dual 5V/3.3V Step-Down Converter
D4
, 0.1µF
1000pF
220pF
1µF
C
C2
R
C2
15k
V
IN
5.2V TO 28V
C
IN
22µF
50V
M2
L2
3.2µH
R
SENSE2
0.01Ω
V
+
3728 F01
3.3V
5A
OUT2
3728fc
R4
63.4k
C
1%
R3
20k
1%
56µF
OUT
6V
SP
1
LTC3728
323331 30 29 28 27 26 25
9 10 11 12 13
TOP VIEW
14 15 16
17
18
19
20
21
22
23
24
8
7
6
5
4
3
2
1V
OSENSE1
PLLFLTR
PLLIN
FCB
I
TH1
SGND
3.3V
OUT
I
TH2
BOOST1
V
IN
BG1
EXTV
CC
INTV
CC
PGND
BG2
BOOST2
NC
SENSE1–SENSE1+NC
RUN/SS1
PGOOD
TG1
SW1
V
OSENSE2
NC
SENSE2
–
SENSE2
+
RUN/SS2
TG2
SW2
NC
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Input Supply Voltage (VIN).........................36V to –0.3V
Top Side Driver Voltages
(BOOST1, BOOST2) ...................................42V to –0.3V
Switch Voltage (SW1, SW2) .........................36V to – 5V
INTV
EXTVCC, RUN/SS1, RUN/SS2, (BOOST1-SW1),
CC,
(BOOST2-SW2), PGOOD ............................. 7V to – 0.3V
SENSE1
SENSE2
+
, SENSE2+, SENSE1–,
–
Voltages ........................ (1.1)INTVCC to –0.3V
PLLIN, PLLFLTR, FCB, Voltage ............ INTVCC to –0.3V
I
TH1, ITH2
, V
OSENSE1
, V
OSENSE2
Peak Output Current <10µs (TG1, TG2, BG1, BG2) ... 3A
INTV
Peak Output Current ................................ 50mA
CC
Operating Temperature Range (Note 7) ... –40°C to 85°C
Junction Temperature (Note 2)............................. 125°C
Storage Temperature Range ................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
(G Package Only) .................................................. 300°C
UU
W
PACKAGE/ORDER I FOR ATIO
TOP VIEW
RUN/SS1
SENSE1
SENSE1
V
OSENSE1
PLLFLTR
PLLIN
FCB
I
SGND
3.3V
OUT
I
V
OSENSE2
SENSE2
SENSE2
1
+
2
–
3
4
5
6
7
8
TH1
9
10
11
TH2
12
–
13
+
14
G PACKAGE
28-LEAD PLASTIC SSOP
T
= 125°C, θJA = 95°C/W
JMAX
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PGOOD
TG1
SW1
BOOST1
V
IN
BG1
EXTV
CC
INTV
CC
PGND
BG2
BOOST2
SW2
TG2
RUN/SS2
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/
ORDER PART
NUMBER
LTC3728EG
32-LEAD (5mm × 5mm) PLASTIC QFN
EXPOSED PAD IS SGND (MUST BE SOLDERED TO PCB)
UH PACKAGE
T
= 125°C, θJA = 34°C/W
JMAX
Voltages ...2.7V to –0.3V
ORDER PART
NUMBER
LTC3728EUH
UH PART
MARKING
3728
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loops
V
I
V
V
2
OSENSE1, 2
VOSENSE1, 2
REFLNREG
LOADREG
Regulated Feedback Voltage (Note 3); I
Feedback Current (Note 3) –5 – 50 nA
Reference Voltage Line Regulation VIN = 3.6V to 30V (Note 3) 0.002 0.02 %/V
Output Voltage Load Regulation (Note 3)
Measured in Servo Loop; ∆I
Measured in Servo Loop; ∆I
The ● denotes the specifications which apply over the full operating
= 5V unless otherwise noted.
●
0.792 0.800 0.808 V
●
●
0.1 0.5 %
–0.1 –0.5 %
Voltage = 1.2V
TH1, 2
RUN/SS1, 2
Voltage = 1.2V to 0.7V
TH
Voltage = 1.2V to 2.0V
TH
3728fc
LTC3728
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● denotes the specifications which apply over the full operating
= 25°C. VIN = 15V, V
A
RUN/SS1, 2
= 5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
g
m1, 2
g
mGBW1, 2
Transconductance Amplifier g
m
Transconductance Amplifier GBW I
I
= 1.2V; Sink/Source 5uA; (Note 3) 1.3 mmho
TH1, 2
= 1.2V; (Note 3) 3 MHzI
TH1, 2
Input DC Supply Current (Note 4)
V
FCB
I
FCB
V
BINHIBIT
Normal Mode V
Shutdown V
= 15V; EXTVCC Tied to V
IN
RUN/SS1, 2
= 0V 20 35 µA
Forced Continuous Threshold
Forced Continuous Pin Current V
= 0.85V – 0.50 – 0.18 –0.1 µA
FCB
Burst Inhibit (Constant Frequency) Measured at FCB pin 4.3 4.8 V
OUT1
; V
= 5V 450 µA
OUT1
●
0.76 0.800 0.84 V
Threshold
UVLO Undervoltage Lockout VIN Ramping Down
V
OVL
I
SENSE
DF
MAX
I
RUN/SS1, 2
V
RUN/SS1, 2
V
RUN/SS1, 2
I
SCL1, 2
I
SDLHO
V
SENSE(MAX)
Feedback Overvoltage Lockout Measured at V
Sense Pins Total Source Current (Each Channel); V
OSENSE1, 2
SENSE1–, 2–
Maximum Duty Factor In Dropout 98 99.4 %
Soft-Start Charge Current V
ON RUN/SS Pin ON Threshold V
LT RUN/SS Pin Latchoff Arming Threshold V
RUN/SS1, 2
RUN/SS1, VRUN/SS2
RUN/SS1, VRUN/SS2
= 1.9V 0.5 1.2 µA
RUN/SS Discharge Current Soft Short Condition V
= 4.5V
= 0.5V 1.6 5 µA
= 0.7V,V
= 0.7V,V
Shutdown Latch Disable Current V
Maximum Current Sense Threshold V
V
RUN/SS1, 2
OSENSE1, 2
OSENSE1, 2
V
OSENSE1, 2
= V
SENSE1+, 2+
= 0V – 85 – 60 µA
Rising 1.0 1.5 1.9 V
Rising from 3V 3.8 4.5 V
OSENSE1, 2
SENSE1–, 2
SENSE1–, 2
= 0.5V; 0.5 2 4 µA
–
= 5V 65 75 85 mV
–
= 5V
●
●
0.84 0.86 0.88 V
●
62 75 88 mV
3.5 4 V
TG Transition Time: (Note 5)
TG1, 2 t
TG1, 2 t
Rise Time C
r
Fall Time C
f
= 3300pF 50 90 ns
LOAD
= 3300pF 50 90 ns
LOAD
BG Transition Time: (Note 5)
BG1, 2 t
BG1, 2 t
TG/BG t
BG/TG t
t
ON(MIN)
Rise Time C
r
Fall Time C
f
1D
Top Gate Off to Bottom Gate On Delay
Synchronous Switch-On Delay Time C
2D
Bottom Gate Off to Top Gate On Delay
Top Switch-On Delay Time C
Minimum On-Time Tested with a Square Wave (Note 6) 100 ns
= 3300pF 40 90 ns
LOAD
= 3300pF 40 80 ns
LOAD
= 3300pF Each Driver 90 ns
LOAD
= 3300pF Each Driver 90 ns
LOAD
INTVCC Linear Regulator
V
INTVCC
V
INT INTVCC Load Regulation ICC = 0 to 20mA, V
LDO
V
EXT EXTVCC Voltage Drop ICC = 20mA, V
LDO
V
EXTVCC
V
LDOHYS
Internal VCC Voltage 6V < VIN < 30V, V
EXTVCC
EXTVCC Switchover Voltage ICC = 20mA, EXTV
= 4V 4.8 5.0 5.2 V
EXTVCC
= 4V 0.2 1.0 %
EXTVCC
= 5V 80 160 mV
Ramping Positive
CC
●
4.5 4.7 V
EXTVCC Hysteresis 0.2 V
Oscillator and Phase-Locked Loop
f
NOM
f
LOW
f
HIGH
R
PLLIN
I
PLLFLTR
Nominal Frequency V
Lowest Frequency V
Highest Frequency V
= 1.2V 360 400 440 kHz
PLLFLTR
= 0V 230 260 290 kHz
PLLFLTR
≥ 2.4V 480 550 590 kHz
PLLFLTR
PLLIN Input Resistance 50 kΩ
Phase Detector Output Current
Sinking Capability f
Sourcing Capability f
PLLIN
PLLIN
< f
> f
OSC
OSC
–15 µA
15 µA
Q
3728fc
3
LTC3728
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● denotes the specifications which apply over the full operating
= 25°C. VIN = 15V, V
A
RUN/SS1, 2
= 5V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
3.3V Linear Regulator
V
3.3OUT
V
3.3IL
V
3.3VL
I
3.3LEAK
3.3V Regulator Output Voltage No Load
3.3V Regulator Load Regulation I
= 0 to 10mA 0.5 2 %
3.3
3.3V Regulator Line Regulation 6V < V
Leakage Current of 3.3V Regulator V
RUN/SS1, 2
●
3.25 3.35 3.45 V
< 30V 0.05 0.2 %
IN
= 0V, VIN = 30V
●
10 50 µA
in Shutdown
PGOOD Output
V
PGL
I
PGOOD
V
PG
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: T
dissipation P
LTC3728: T
Note 3: The LTC3728 is tested in a feedback loop that servos V
specified voltage and measures the resultant V
Note 4: Dynamic supply current is higher due to the gate charge being
PGOOD Voltage Low I
PGOOD Leakage Current V
PGOOD Trip Level, Either Controller V
is calculated from the ambient temperature TA and power
J
according to the following formulas:
D
= TA + (PD • 95 °C/W)
J
OSENSE1, 2.
PGOOD
PGOOD
OSENSE
V
OSENSE
V
OSENSE
ITH1, 2
= 2mA 0.1 0.3 V
= 5V ±1 µA
with Respect to Set Output Voltage
Ramping Negative – 6 –7.5 – 9.5 %
Ramping Positive 6 7.5 9.5 %
delivered at the switching frequency. See Applications Information.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 6: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current ≥40% of I
(see minimum on-time
MAX
considerations in the Applications Information section).
Note 7: The LTC3728E is guaranteed to meet performance specifications
to a
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Output Current
and Mode (Figure 13)
100
Burst Mode
90
OPERATION
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0.001
0.01
OUTPUT CURRENT (A)
FORCED
CONTINUOUS
MODE (PWM)
CONSTANT
FREQUENCY
(BURST DISABLE)
0.1
VIN = 15V
V
OUT
f = 250kHz
1
= 5V
10
3728 G01
Efficiency vs Output Current
(Figure 13)
100
90
80
70
EFFICIENCY (%)
60
50
0.001
VIN = 7V
VIN = 10V
= 15V
V
IN
V
= 20V
IN
0.01
0.1
OUTPUT CURRENT (A)
V
OUT
f = 250kHz
1
= 5V
3728 G02
Efficiency vs Input Voltage
(Figure 13)
100
90
80
70
EFFICIENCY (%)
60
50
10
5
15
INPUT VOLTAGE (V)
25
V
= 5V
OUT
= 3A
I
OUT
f = 250kHz
3728 G03
35
4
3728fc
UW
TEMPERATURE (°C)
–50
INTV
CC
AND EXTV
CC
SWITCH VOLTAGE (V)
4.95
5.00
5.05
25 75
3728 G06
4.90
4.85
–25 0
50 100 125
4.80
4.70
4.75
INTVCC VOLTAGE
EXTVCC SWITCHOVER THRESHOLD
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3728
Supply Current vs Input Voltage
and Mode (Figure 13)
1000
800
600
400
SUPPLY CURRENT (µA)
200
0
05
BOTH
CONTROLLERS ON
SHUTDOWN
10
INPUT VOLTAGE (V)
20
15
Internal 5V LDO Line Regulation
5.1
I
= 1mA
LOAD
5.0
4.9
4.8
VOLTAGE (V)
4.7
CC
INTV
4.6
4.5
4.4
0
510
INPUT VOLTAGE (V)
20 30 35
15 25
INTVCC and EXTVCC Switch
EXTVCC Voltage Drop
250
200
150
100
VOLTAGE DROP (mV)
CC
EXTV
50
30
35
3728 G04
25
0
10
0
CURRENT (mA)
30
40
20
50
3728 G05
Voltage vs Temperature
Maximum Current Sense Threshold
3728 G07
Maximum Current Sense Threshold
vs Duty Factor
75
50
(mV)
SENSE
V
25
0
0
20 40 60 80
DUTY FACTOR (%)
100
3728 G08
vs Percent of Nominal Output
Voltage (Foldback)
80
70
60
50
(mV)
40
SENSE
V
30
20
10
0
0
25
PERCENT ON NOMINAL OUTPUT VOLTAGE (%)
50
75
100
3728 G09
80
60
(mV)
40
SENSE
V
20
0
Maximum Current Sense Threshold
vs V
V
SENSE(CM)
0
(Soft-Start)
RUN/SS
= 1.6V
1234
V
(V)
RUN/SS
56
3728 G10
Maximum Current Sense Threshold
vs Sense Common Mode Voltage
80
76
72
(mV)
SENSE
68
V
64
60
1
0
2
COMMON MODE VOLTAGE (V)
3
Current Sense Threshold
Voltage
vs I
TH
90
80
70
60
50
40
(mV)
30
20
SENSE
V
10
0
–10
–20
4
5
3728 G11
–30
0.5
0
1.5
2
3728 G12
3728fc
2.5
1
V
(V)
ITH
5
LTC3728
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Load Regulation
0.0
–0.1
(%)
OUT
–0.2
NORMALIZED V
–0.3
–0.4
1
0
2
LOAD CURRENT (A)
Maximum Current Sense
Threshold vs Temperature
80
78
76
(mV)
SENSE
74
V
72
70
–50 –25
25
0
TEMPERATURE (°C)
V
vs V
ITH
RUN/SS
2.5
V
0
OSENSE
= 0.7V
234
1
V
RUN/SS
(V)
56
3728 G14
FCB = 0V
= 15V
V
IN
2.0
1.5
(V)
ITH
V
1.0
0.5
3
4
5
3728 G13
0
SENSE Pins Total Source Current
100
50
(µA)
0
SENSE
I
–50
–100
0
24
V
COMMON MODE VOLTAGE (V)
SENSE
6
3728 G15
Dropout Voltage vs Output Current
(Figure 14)
4
V
= 5V
OUT
3
2
R
= 0.015Ω
SENSE
DROPOUT VOLTAGE (V)
1
R
= 0.010Ω
SENSE
0
0
50
75
100
125
3728 G17
0.5 1.0 1.5 2.0
OUTPUT CURRENT (A)
2.5 3.0 3.5 4.0
3728 G18
RUN/SS Current vs Temperature
1.8
1.6
1.4
1.2
1.0
0.8
0.6
RUN/SS CURRENT (µA)
0.4
0.2
0
–50 –25
0 25 125
TEMPERATURE (°C)
75 10050
3728 G25
6
Soft-Start Up (Figure 13)
V
OUT
5V/DIV
V
RUN/SS
5V/DIV
I
L
2A/DIV
V
= 15V 5ms/DIV
IN
V
= 5V
OUT
3728 G19
V
OUT
200mV/DIV
2A/DIV
Load Step (Figure 13)
I
L
V
= 15V 20µs/DIV
IN
V
= 5V
OUT
V
= 0V
PLLFLTR
LOAD STEP = 0A TO 3A
Burst Mode OPERATION
3728 G20
V
OUT
200mV/DIV
2A/DIV
Load Step (Figure 13)
I
L
= 15V 20µs/DIV
V
IN
V
= 5V
OUT
V
= 0V
PLLFLTR
LOAD STEP = 0A TO 3A
CONTINUOUS MODE
3728 G21
3728fc
TEMPERATURE (°C)
–50
400
500
700
25 75
3728 G28
300
200
–25 0
50 100 125
100
0
600
FREQUENCY (kHz)
V
PLLFLTR
= 5V
V
PLLFLTR
= 1.2V
V
PLLFLTR
= 0V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3728
Input Source/Capacitor
Instantaneous Current (Figure 13)
I
IN
2A/DIV
V
IN
200mV/DIV
V
SW1
10V/DIV
V
SW2
10V/DIV
V
= 15V 1µs/DIV
IN
V
= 5V
OUT
= 0V
V
PLLFLTR
I
= I
OUT3.3
= 2A
OUT5
Current Sense Pin Input Current
vs Temperature
35
V
= 5V
OUT
33
31
3728 G22
Burst Mode Operation (Figure 13)
V
OUT
20mV/DIV
I
L
0.5A/DIV
= 15V 10µs/DIV
V
IN
V
= 5V
OUT
= 0V
V
PLLFLTR
V
= OPEN
FCB
= 20mA
I
OUT
EXTVCC Switch Resistance
vs Temperature
10
8
6
3728 G23
Constant Frequency (Burst Inhibit)
Operation (Figure 13)
V
OUT
20mV/DIV
I
L
0.5A/DIV
= 15V 2µs/DIV
V
IN
V
= 5V
OUT
= 0V
V
PLLFLTR
V
= 5V
FCB
= 20mA
I
OUT
Oscillator Frequency
vs Temperature
3728 G24
CURRENT SENSE INPUT CURRENT (µA)
29
27
25
–50 –25
0
TEMPERATURE (°C)
50
25
75
100
Undervoltage Lockout
vs Temperature
3.50
3.45
3.40
3.35
3.30
UNDERVOLTAGE LOCKOUT (V)
3.25
3.20
–50
–25 0
TEMPERATURE (°C)
125
3728 G26
50 100 125
25 75
SWITCH RESISTANCE (Ω)
CC
EXTV
4
2
0
–50 –25
3728 G29
50
25
0
TEMPERATURE (°C)
100
125
3728 G27
75
Shutdown Latch Thresholds
vs Temperature
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
SHUTDOWN LATCH THRESHOLDS (V)
0
–50 –25
LATCH ARMING
LATCHOFF
THRESHOLD
0 25 125
TEMPERATURE (°C)
75 10050
3728 G30
3728fc
7
LTC3728
U
PI FU CTIO S
UU
G Package/UH Package
RUN/SS1, RUN/SS2 (Pins 1, 15/Pins 28, 13): Combina-
tion of soft-start, run control inputs and short-circuit detection timers. A capacitor to ground at each of these pins sets
the ramp time to full output current. Forcing either of these
pins back below 1.0V causes the IC to shut down the
circuitry required for that particular controller. Latchoff
overcurrent protection is also invoked via this pin as described in the Applications Information section.
SENSE1
to the Differential Current Comparators. The I
and controlled offsets between the SENSE
pins in conjunction with R
+
, SENSE2+ (Pins 2, 14/Pins 30, 12): The (+) Input
pin voltage
th
–
and SENSE
set the current trip thresh-
SENSE
+
old.
SENSE1
–
, SENSE2– (Pins 3, 13/Pins 31, 11): The (–) Input
to the Differential Current Comparators.
V
OSENSE1
, V
OSENSE2
(Pins 4, 12/Pins 1, 9): Receives the
remotely-sensed feedback voltage for each controller from
an external resistive divider across the output.
PLLFLTR (Pin 5/Pin 2): The Phase-Locked Loop’s Lowpass Filter is Tied to This Pin. Alternatively, this pin can be
driven with an AC or DC voltage source to vary the frequency of the internal oscillator.
PLLIN (Pin 6/Pin 3): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50kΩ. The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
FCB (Pin 7/Pin 4): Forced Continuous Control Input. This
input acts on both controllers and is normally used to
regulate a secondary winding. Pulling this pin below 0.8V
will force continuous synchronous operation.
I
TH1, ITH2
(Pins 8, 11/Pins 5, 8): Error Amplifier Output and
Switching Regulator Compensation Point. Each associated
channels’ current comparator trip point increases with this
control voltage.
SGND (Pin 9/Pin 6): Small Signal Ground common to
both controllers, must be routed separately from high
current grounds to the common (–) terminals of the
C
capacitors.
OUT
3.3V
(Pin 10/Pin 7): Output of a linear regulator capable
OUT
of supplying 10mA DC with peak currents as high as 50mA.
NC (Pins 10, 16, 29, 32 UH Package Only): No Connect.
PGND (Pin 20/Pin 19): Driver Power Ground. Connects to the
sources of bottom (synchronous) N-channel MOSFETs, anodes of the Schottky rectifiers and the (–) terminal(s) of C
INTV
Dropout Regulator and the EXTV
(Pin 21/Pin 20): Output of the Internal 5V Linear Low
CC
Switch. The driver and
CC
IN
.
control circuits are powered from this voltage source. Must
be decoupled to power ground with a minimum of 4.7µF
tantalum or other low ESR capacitor.
EXTV
Internal Switch Connected to INTV
and supplies V
out regulator, whenever EXTV
EXTV
(Pin 22/Pin 21): External Power Input to an
CC
. This switch closes
CC
power, bypassing the internal low drop-
CC
is higher than 4.7V. See
CC
connection in Applications section. Do not exceed
CC
7V on this pin.
BG1, BG2 (Pins 23, 19/Pins 22, 18): High Current Gate
Drives for Bottom (Synchronous) N-Channel MOSFETs.
Voltage swing at these pins is from ground to INTV
V
(Pin 24/Pin 23): Main Supply Pin. A bypass capacitor
IN
CC
.
should be tied between this pin and the signal ground pin.
BOOST1, BOOST2 (Pins 25, 18/Pins 24, 17): Bootstrapped
Supplies to the Top Side Floating Drivers. Capacitors are
connected between the boost and switch pins and Schottky diodes are tied between the boost and INTV
Voltage swing at the boost pins is from INTV
INTV
CC
).
CC
pins.
CC
to (VIN +
SW1, SW2 (Pins 26, 17/Pins 25, 15): Switch Node
Connections to Inductors. Voltage swing at these pins is
from a Schottky diode (external) voltage drop below
ground to V
IN
.
TG1, TG2 (Pins 27, 16/Pins 26, 14): High Current Gate
Drives for Top N-Channel MOSFETs. These are the outputs
of floating drivers with a voltage swing equal to INTV
CC
–
0.5V superimposed on the switch node voltage SW.
PGOOD (Pin 28/Pin 27): Open-Drain Logic Output. PGOOD
is pulled to ground when the voltage on either V
OSENSE
pin
is not within ±7.5% of its set point.
Exposed Pad (Pin 33) SGND: The exposed pad must be
soldered to PCB ground for elecrical contact and rated
thermal performance.
8
3728fc
LTC3728
U
U
W
FU CTIO AL DIAGRA
PLLIN
F
IN
PLLFLTR
R
LP
C
LP
PGOOD
V
SEC
R6
FCB
R5
3.3V
V
IN
V
IN
EXTV
INTV
5V
+
SGND
50k
0.18µA
OUT
CC
CC
PHASE DET
OSCILLATOR
1.5V
+
–
4.7V
4.5V
0.8V
CLK1
CLK2
–
0.86V
+
V
OSENSE1
–
+
0.74V
0.86V
–
+
V
OSENSE2
–
+
0.74V
–
BINH
+
+
FCB
–
V
REF
+
–
5V
LDO
REG
INTERNAL
SUPPLY
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
0.86V
4(VFB)
SLOPE
COMP
1.2µA
6V
DROP
OUT
DET
BOT
FCB
45k
+
–
+– –+
SHDN
4(VFB)
RST
B
3mV
TOP ON
SHDN
START
–
+
45k
OV
RUN
SOFT
2.4V
SRQ
Q
0.55V
I1 I2
+
–
SWITCH
EA
LOGIC
–
+
+
–
INTV
BOOST
CC
INTV
30k
30k
CC
TG
SW
BG
PGND
SENSE
SENSE
V
OSENSE
I
TH
RUN/SS
+
–
TOP
BOT
INTV
V
FB
0.80V
0.86V
V
CC
IN
D
B
C
B
D
SEC
R2
R1
C
C
C
C2
C
SS
+
C
1
SENSE
IN
C
OUT
+
V
OUT
+
C
SEC
D
R
R
C
Figure 2
U
OPERATIO
Main Control Loop
The LTC3728 uses a constant frequency, current mode
step-down architecture with the two controller channels
operating 180 degrees out of phase. During normal operation, each top MOSFET is turned on when the clock for that
channel sets the RS latch, and turned off when the main
current comparator, I1, resets the RS latch. The peak
(Refer to Functional Diagram)
3728 FD/F02
inductor current at which I1 resets the RS latch is controlled by the voltage on the I
each error amplifier EA. The V
pin, which is the output of
TH
OSENSE
pin receives the
voltage feedback signal, which is compared to the internal
reference voltage by the EA. When the load current increases, it causes a slight decrease in V
OSENSE
the 0.8V reference, which in turn causes the I
relative to
voltage to
TH
3728fc
9
LTC3728
OPERATIO
U
(Refer to Functional Diagram)
increase until the average inductor current matches the
new load current. After the top MOSFET has turned off, the
bottom MOSFET is turned on until either the inductor
current starts to reverse, as indicated by current comparator I
, or the beginning of the next cycle.
2
The top MOSFET drivers are biased from floating bootstrap capacitor C
, which normally is recharged during
B
each off cycle through an external diode when the top
MOSFET turns off. As V
, the loop may enter dropout and attempt to turn on
V
OUT
decreases to a voltage close to
IN
the top MOSFET continuously. The dropout detector detects this and forces the top MOSFET off for about 400ns
every tenth cycle to allow C
to recharge.
B
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 1.2µA
current source to charge soft-start capacitor CSS. When
C
reaches 1.5V, the main control loop is enabled with the
SS
voltage clamped at approximately 30% of its maximum
I
TH
value. As C
continues to charge, the I
SS
pin voltage is
TH
gradually released allowing normal, full-current operation. When both RUN/SS1 and RUN/SS2 are low, all
LTC3728 controller functions are shut down,
including the 5V and 3.3V regulators.
Low Current Operation
The FCB pin is a multifunction pin providing two functions: 1) to provide regulation for a secondary winding by
temporarily forcing continuous PWM operation on
both controllers; and 2) select between
two
modes of low
current operation. When the FCB pin voltage is below
0.8V, the controller forces continuous PWM current
mode operation. In this mode, the top and bottom
MOSFETs are alternately turned on to maintain the output
voltage independent of direction of inductor current.
When the FCB pin is below V
INTVCC
– 1V but greater than
0.8V, the controller enters Burst Mode operation. Burst
Mode operation sets a minimum output current level
before inhibiting the top switch and turns off the synchronous MOSFET(s) when the inductor current goes negative. This combination of requirements will, at low currents, force the ITH pin below a voltage threshold that will
temporarily inhibit turn-on of both output MOSFETs until
the output voltage drops. There is 60mV of hysteresis in
the burst comparator B tied to the I
pin. This hysteresis
TH
produces output signals to the MOSFETs that turn them
on for several cycles, followed by a variable “sleep”
interval depending upon the load current. The resultant
output voltage ripple is held to a very small value by
having the hysteretic comparator after the error amplifier
gain block.
Frequency Synchronization
The phase-locked loop allows the internal oscillator to be
synchronized to an external source via the PLLIN pin. The
output of the phase detector at the PLLFLTR pin is also the
DC frequency control input of the oscillator that operates
over a 250kHz to 550kHz range corresponding to a DC
voltage input from 0V to 2.4V. When locked, the PLL aligns
the turn on of the top MOSFET to the rising edge of the
synchronizing signal. When PLLIN is left open, the PLLFLTR
pin goes low, forcing the oscillator to minimum frequency.
Constant Frequency Operation
When the FCB pin is tied to INTV
, Burst Mode operation
CC
is disabled and the forced minimum output current
requirement is removed. This provides constant frequency,
discontinuous (preventing reverse inductor current)
current operation over the widest possible output current
range. This constant frequency operation is not as efficient
as Burst Mode operation, but does provide a lower noise,
constant frequency operating mode down to approximately 1% of designed maximum output current.
Continuous Current (PWM) Operation
Tying the FCB pin to ground will force continuous current
operation. This is the least efficient operating mode, but
may be desirable in certain applications. The output can
source or sink current in this mode. When sinking current
while in forced continuous operation, current will be
forced back into the main power supply.
10
3728fc
Loading...