The LTC®3709 is a single output, dual phase, synchronous
step-down switching regulator. The controller uses a
constant on-time, valley current control architecture to
deliver very low duty cycles without requiring a sense
resistor. Operating frequency is selected by an external
resistor and is compensated for variations in input supply
voltage. An internal phase-lock loop allows the LTC3709
to be synchronized to an external clock.
A TRACK pin is provided for tracking or sequencing the
output voltage among several LTC3709 chips or an
LTC3709 and other DC/DC regulators. Soft-start is accomplished using an external timing capacitor.
Fault protection is provided by an output overvoltage comparator and an optional short-circuit shutdown timer. The
current limit level is user programmable. A wide supply
range allows voltages as high as 31V to step down as low
as 0.6V.
TM
, LTC and LT are registered trademarks of Linear Technology Corporation. No R
a trademark of Linear Technology Corporation. PolyPhase is a registered trademark of
Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 6476589, 6144194, 5847554,
6177678, 6304066, 6580258, 6674274, 6462525, 6593724.
SENSE
,
is
TYPICAL APPLICATIO
High Efficiency Dual Phase 1.5V/30A Step-Down Converter
5V
47.5k
10k
100nF
680pF
4.7µF
0.1µF
3.32k
1µF
100k
20k
10k
15k
10Ω
VCCDRVCCI
TRACKTG1
V
RNG
FCB
BOOST1
SENSE1
PGOOD
RUN/SS
EXTLPF
SENSE1
INTLPF
LTC3709
I
TH
SGND
BOOST2
V
FB
DIFFOUT
SENSE2
–
V
OS
SENSE2
+
V
OS
ON
SW1
BG1
PGND1
TG2
SW2
BG2
PGND2
324k
+
–
+
–
U
0.22µF
0.22µF
HAT2168H
HAT2165H
HAT2168H
HAT2165H
10µF
35V
×3
1.22µH
V
IN
1.22µH
+
V
4.5V TO 28V
V
1.5V
30A
330µF
2.5V
×4
3709 TA01a
IN
OUT
Efficiency and Power Loss
100
VIN = 12V
95
90
85
80
75
70
EFFICIENCY (%)
65
60
55
50
0.01110100
EFFICIENCY
POWER LOSS
0.1
LOAD CURRENT (A)
3709 TA01b
10
9
8
POWER LOSS (W)
7
6
5
4
3
2
1
0
3709fa
1
LTC3709
WW
W
U
ABSOLUTE AXIU RATIGS
Input Supply Voltage (VCC, DRVCC) ............ 7V to – 0.3V
Boosted Topside Driver Supply Voltage
(BOOST1, BOOST2) .................................. 37V to –0.3V
Switch Voltage (SW1, 2) ............................. 31V to – 1V
+
SENSE1
SENSE1
I
ON
, SENSE2+ Voltages....................... 31V to –1V
–
, SENSE2– Voltages.................... 10V to – 0.3V
Voltage ............................................... 31V to –0.3V
(BOOST – SW) Voltages ..............................7V to – 0.3V
RUN/SS, PGOOD Voltages .......................... 7V to – 0.3V
TRACK Voltage ............................................7V to –0.3V
Voltage ................................. VCC + 0.3V to –0.3V
V
RNG
UU
W
PACKAGE/ORDER I FOR ATIO
I
V
TRACK
SGND
SGND
V
OS
DIFFOUT
TOP VIEW
RNG
V
FCB
IONPGOOD
BOOST1
32 31 30 29 28 27 26 25
1RUN/SS
2
TH
3
FB
4
5
6
–
7
8
9 10 11 12
+
OS
V
32-LEAD (5mm × 5mm) PLASTIC QFN
EXPOSED PAD IS SGND (PIN 33)
MUST BE SOLDERED TO PCB
T
JMAX
33
13 14 15 16
NC
INTLPF
EXTLPF
= 125°C, θJA = 34°C/ W
BOOST2
UH PACKAGE
TG1
TG2
SW1
SW2
+
SENSE1
24
23
22
21
20
19
18
17
+
SENSE2
SENSE1
PGND1
BG1
DRV
CC
BG2
PGND2
SENSE2
V
CC
–
–
(Note 1)
ITH Voltage ............................................... 2.7V to –0.3V
V
Voltage .............................................. 2.7V to – 0.3V
FB
INTLPF, EXTLPF Voltages ........................ 2.7V to –0.3V
+
–
, V
V
OS
Voltages ................................... 7V to – 0.3V
OS
FCB Voltage ................................................ 7V to – 0.3V
Operating Temperature Range (Note 4) .. –40°C to 85°C
Junction Temperature (Note 2)............................ 125°C
Storage Temperature Range
UH Package ..................................... – 65°C to 125°C
G Package ....................................... – 65°C to 150°C
TOP VIEW
NC
PGOOD
I
ON
FCB
V
RNG
RUN/SS
I
TH
V
FB
TRACK
SGND
SGND
–
V
OS
DIFFOUT
+
V
OS
EXTLPF
INTLPF
NC
NC
36-LEAD PLASTIC SSOP
T
JMAX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
G PACKAGE
= 125°C, θJA = 95°C/ W
36
25
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
BOOST1
TG1
SW1
SENSE1
SENSE1
PGND1
BG1
DRV
CC
BG2
PGND2
SENSE2
V
CC
SENSE2
SW2
TG2
BOOST2
NC
NC
+
–
–
+
ORDER PART NUMBER
LTC3709EUH
UH PART MARKING
3709
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
2
ORDER PART NUMBER
LTC3709EG
3709fa
LTC3709
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● denotes specifications which apply over the full operating
External PLL Sinking Current–20µA
Forced Continuous ThresholdMeasured with a DC Voltage at FCB Pin1.92.12.3V
Clock Input ThresholdMeasured with a AC Pulse at FCB Pin11.52V
t
Modulation Range by External PLL
ON1
Up ModulationI
Down ModulationI
t
Modulation Range by Internal PLL
ON2
Up ModulationI
Down ModulationI
= 180µA, V
ON1
= 180µA, V
ON1
= 180µA, V
ON2
= 180µA, V
ON2
= 1.8V186233ns
EXTPLL
= 0.6V5880ns
EXTPLL
= 1.8V186233ns
INTPLL
= 0.6V5880ns
INTPLL
Differential Amplifier
A
V
V
OS
Differential Gain0.9951.0001.005V/V
Input Offset VoltageIN+ = IN
–
= 1.2V, I
= 1mA,0.57mV
OUT
Input Referred; Gain = 1
CMCommon Mode Input Voltage RangeI
CMRRCommon Mode Rejection Ratio0V < IN
= 1mA05V
OUT
+
–
= IN
< 5V, I
= 1mA,4570dB
OUT
Input Referred
I
CL
GBPGain Bandwidth ProductI
Output Current1040mA
= 1mA2MHz
OUT
SRSlew RateRL = 2k5V/µs
V
O(MAX)
R
IN
Maximum High Output VoltageI
= 1mAV
OUT
– 1.2 V
CC
– 0.8V
CC
Input ResistanceMeasured at IN+ Pin80kΩ
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
dissipation P
is calculated from the ambient temperature TA and power
J
as follows:
D
LTC3709EUH: T
= TA + (PD • 34°C/W)
J
LTC3709EG: TJ = TA + (PD • 95°C/W)
Note 3: The LTC3709 is tested in a feedback loop that adjusts VFB to
achieve a specified error amplifier output voltage (I
).
TH
Note 4: The LTC3709E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 5: R
limit is guaranteed by design and/or correlation to static
DS(ON)
test.
3709fa
4
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3709
V
RUN/SS
5V/DIV
V
OUT
1V/DIV
10A/DIV
10A/DIV
I
LOAD
3A-18A
V
OUT
50mV/DIV
V
SW1
20V/DIV
V
SW2
20V/DIV
Start-Up
I
L1
I
L2
1ms/DIV
3709 G01
Transient Response (CCM)Efficiency vs Load Current
50mV/DIV
20µs/DIV
3709 G04
Continuous Current Mode (CCM)Discontinuous Current Mode (DCM)
SW1
5V/DIV
SW2
5V/DIV
2µs/DIV
3709 G02
SW1
5V/DIV
SW2
1V/DIV
10µs/DIV
Transient Response (DCM)
100
I
LOAD
3A-18A
V
OUT
V
SW1
20V/DIV
V
SW2
20V/DIV
20µs/DIV
3709 G05
VIN = 12V
95
= 1.5V
V
OUT
f = 220kHz
90
85
80
75
70
EFFICIENCY (%)
65
60
55
50
10100010000100000
100
LOAD (mA)
3709 G03
3709 G06
Power Loss vs Load CurrentQuiescent Current at VCC = 5VEfficiency vs V
RUN/SS (Pin 1/Pin 6): Run Control and Soft-Start Input.
A capacitor to ground at this pin sets the ramp rate of the
output voltage (approximately 0.5s/µF) and the time delay
for overcurrent latch-off (see Applications Information).
Forcing this pin below 1.4V shuts down the device.
(Pin 2/Pin 7): Error Amplifier Compensation Point. The
I
TH
current comparator threshold increases with this control
voltage. The voltage ranges from 0V to 2.4V with 0.8V
corresponding to zero sense voltage (zero current).
V
(Pin 3/Pin 8): Error Amplifier Feedback Input. This pin
FB
connects to the error amplifier input. It can be used to
attach additional compensation components if desired.
TRACK (Pin 4/Pin 9): Tie the TRACK pin to a resistive
divider connected to the output of another LTC3709 for
either coincident or ratiometric output tracking (see Applications Information). To disable this feature, tie the pin to
.
Do Not Float this pin
V
CC
.
Minimum Current Sense
Threshold Voltage vs V
0
–20
–40
–60
–80
–100
THRESHOLD VOLTAGE (mV)
MINIMUM CURRENT SENSE
–120
–140
0.81.11.42.0
0.5
V
RNG
RNG
1.7
(V)
3709 G20
SGND (Pins 5, 6, 33/Pins 10, 11): Signal Ground. All
small-signal components such as C
and compensation
SS
components should connect to this ground and eventually
connect to PGND at one point. The Exposed Pad of the QFN
package must be soldered to PCB ground.
–
(Pin 7/Pin 12): The (–) Input to the Differential
V
OS
Amplifer.
DIFFOUT (Pin 8/Pin 13): The Output of the Differential
Amplifier.
+
V
(Pin 9/Pin 14): The (+) Input to the Differential
OS
Amplifier.
EXTLPF (Pin 10/Pin 15): Filter Connection for the PLL.
This PLL is used to synchronize the LTC3709 with an
external clock.
INTLPF (Pin 11/Pin 16): Filter Connection for the PLL.
This PLL is use to phase shift the second channel to the
first channel by 180°.
3709fa
7
LTC3709
U
PI FU CTIO S
UU
(QFN/SSOP)
NC (Pin 12/Pins 1, 17, 18, 19, 20): No Connect.
V
(Pin 17/Pin 25): Main Input Supply. Decouple this pin
CC
to SGND with an RC filter (1Ω, 0.1µF).
DRV
(Pin 21/Pin 29): Driver Supply. Provides supply to
CC
the driver for the bottom gate. Also used for charging the
bootstrap capacitor.
BG1, BG2 (Pins 22, 20/Pins 30, 28): Bottom Gate Drive.
Drives the gate of the bottom N-channel MOSFET between
ground and DRV
CC
.
PGND1, PGND2 (Pins 23, 19/Pins 31, 27): Power Ground.
Connect this pin closely to the source of the bottom Nchannel MOSFET, the (–) terminal of C
minal of C
SENSE1
.
IN
–
, SENSE2– (Pins 24, 18/Pins 32, 26): Current
and the (–) ter-
DRVCC
Sense Comparator Input. The (–) input to the current
comparator is used to accurately Kelvin sense the bottom
side of the sense resistor or MOSFET.
+
SENSE1
, SENSE2+ (Pins 25, 16/Pins 33, 24): Current
Sense Comparator Input. The (+) input to the current
comparator is normally connected to the SW node unless
using a sense resistor (see Applications Information).
TG1, TG2 (Pins 27, 14/Pins 35, 22): Top Gate Drive.
Drives the top N-channel MOSFET with a voltage swing
equal to DRV
superimposed on the switch node voltage
CC
SW.
BOOST1, BOOST2 (Pins 28, 13/Pins 36, 21): Boosted
Floating Driver Supply. The (+) terminal of the bootstrap
capacitor C
voltage drop below DRV
connects here. This pin swings from a diode
B
up to V
CC
+ DRVCC.
IN
PGOOD (Pin 29/Pin 2): Power Good Output. Open-drain
logic output that is pulled to ground when output voltage
is not within ±10% of the regulation point. The output
voltage must be out of regulation for at least 100µs before
the power good output is pulled to ground.
I
(Pin 30/Pin 3): On-Time Current Input. Tie a resistor
ON
from V
to this pin to set the one-shot timer current and
IN
thereby set the switching frequency.
FCB (Pin 31/Pin 4): Forced Continuous and External Clock
Input. Tie this pin to ground to force continuous synchronous operation or to V
to enable discontinuous mode
CC
operation at light load. Feeding an external clock signal
into this pin will synchronize the LTC3709 to the external
clock and enable forced continuous mode.
SW1, SW2 (Pins 26, 15/Pins 34, 23): Switch Node. The
(–) terminal of the bootstrap capacitor C
connects here.
B
This pin swings from a Schottky diode voltage drop below
ground up to V
IN
.
V
(Pin 32/Pin 5): Sense Voltage Range Input. The volt-
RNG
age at this pin is ten times the nominal sense voltage at maximum output current and can be programmed from 0.5V to
2V. The sense voltage defaults to 70mV when this pin is tied
to ground, 140mV when tied to V
CC
.
3709fa
8
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