High Efficiency Operation (No Sense
Resistor Required)
■
Wide Input Voltage Range: 2.5V to 36V
■
Current Mode Control Provides Excellent Transient
Response
■
High Maximum Duty Cycle (Typ 92%)
■
±1% Internal Voltage Reference
■
±2% RUN Pin Threshold with 100mV Hysteresis
■
Micropower Shutdown: IQ = 10µA
■
Programmable Switching Frequency
(50kHz to 1MHz) with One External Resistor
■
Synchronizable to an External Clock Up to 1.3 × f
■
User-Controlled Pulse Skip or Burst Mode® Operation
■
Internal 5.2V Low Dropout Voltage Regulator
■
Capable of Operating with a Sense Resistor for High
Output Voltage Applications (V
■
Small 10-Lead MSOP Package
>36V)
DS
U
APPLICATIO S
■
SLIC Power Supplies
■
Telecom Power Supplies
■
Portable Electronic Equipment
■
Cable and DSL Modems
■
Router Supplies
OSC
Wide Input Range, No R
SENSE
U
DESCRIPTIO
The LTC®3704 is a wide input range, current mode,
positive-to-negative DC/DC controller that drives an
N-channel power MOSFET and requires very few external
components. Intended for low to high power applications,
it eliminates the need for a current sense resistor by
utilizing the power MOSFET’s on-resistance, thereby maximizing efficiency.
The IC’s operating frequency can be set with an external
resistor over a 50kHz to 1MHz range, and can be synchronized to an external clock using the MODE/SYNC pin.
Burst Mode operation at light loads, a low minimum
operating supply voltage of 2.5V and a low shutdown
quiescent current of 10µA make the LTC3704 ideally
suited for battery-operated systems.
For applications requiring constant frequency operation,
the Burst Mode operation feature can be defeated using
the MODE/SYNC pin. Higher than 36V switch voltage
applications are possible with the LTC3704 by connecting
the SENSE pin to a resistor in the source of the power
MOSFET.
The LTC3704 is available in the 10-lead MSOP package.
TM
, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. Burst
Mode is a registered trademark of Linear Technology Corporation. No R
registered trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 5847554, 5731694.
SENSE
is a
TYPICAL APPLICATIO
R1
1M
R
C
3k
C
C1
4.7nF
C
, C
: TDK C5750X5R1C476M
IN
DC
: TDK C5750X5R0J107M
C
OUT
: TAIYO YUDEN LMK316BJ475ML
C
VCC
Figure 1. High Efficiency Positive to Negative Supply
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
= V
V
IN
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
Oscillator
f
OSC
D
MAX
f
SYNC/fOSC
t
SYNC(MIN)
t
SYNC(MAX)
V
IL(MODE)
V
IH(MODE)
R
MODE/SYNC
V
FREQ
Low Dropout Regulator
V
INTVCC
∆V
INTVCC
∆V
IN1
∆V
INTVCC
∆V
IN2
V
LDO(LOAD)
V
DROPOUT
I
INTVCC
GATE Driver
t
r
t
f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: The LTC3704E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3704I is guaranteed over the full
–40°C to 125°C operating temperature range.
Note 3: T
dissipation P
T
J
= 5V, V
INTVCC
Oscillator FrequencyR
= 1.5V, R
RUN
FREQ
= 80k, V
MODE/SYNC
= 0V, unless otherwise specified.
= 80k250300350kHz
FREQ
Oscillator Frequency Range501000kHz
Maximum Duty Cycle879297%
Recommended Maximum Synchronizedf
= 300kHz (Note 6)1.251.30
OSC
Frequency Ratio
MODE/SYNC Minimum Input Pulse WidthV
Note 4: The dynamic input supply current is higher due to power MOSFET
• f
gate charging (Q
). See Applications Information.
G
OSC
Note 5: The LTC3704 is tested in a feedback loop that servos V
reference voltage with the I
pin forced to a voltage between 0V and 1.4V
TH
(the no load to full load operating voltage range for the I
1.23V).
Note 6: In a synchronized application, the internal slope compensation
gain is increased by 25%. Synchronizing to a significantly higher ratio will
reduce the effective amount of slope compensation, which could result in
is calculated from the ambient temperature TA and power
J
according to the following formula:
D
subharmonic oscillation for duty cycles greater than 50%.
Note 7: Rise and fall times are measured at 10% and 90% levels.
= TA + (PD • 120°C/W)
NFB
pin is 0.3V to
TH
to the
ns
3704fa
3
LTC3704
UW
TYPICAL PERFOR A CE CHARACTERISTICS
NFB Voltage vs TempNFB Voltage Line RegulationNFB Pin Current vs Temperature
–1.25
–1.24
–1.23
NFB VOLTAGE (V)
–1.22
–1.21
–50
–25
0
50
25
TEMPERATURE (°C)
–1.231
–1.230
NFB VOLTAGE (V)
–1.229
0
75
100
125
150
3704 G01
5101520
VIN (V)
253035
3704 G02
8.0
7.9
7.8
7.7
7.6
7.5
7.4
NFB CURRENT (µA)
7.3
7.2
7.1
7.0
–50
–25
2505010075
TEMPERATURE (°C)
125 150
3704 G03
Shutdown Mode IQ vs V
30
(µA)
Q
20
10
SHUTDOWN MODE I
0
0
1020
VIN (V)
Burst Mode IQ vs Temperature
500
400
(µA)
300
Q
200
Burst Mode I
100
0
–50
–2525
0
50
TEMPERATURE (°C)
IN
30
40
3704 G04
Shutdown Mode IQ vs Temperature
20
VIN = 5V
15
(µA)
Q
10
5
SHUTDOWN MODE I
0
–50
–25 025 50
TEMPERATURE (°C)
75 100 125 150
3704 G05
Burst Mode IQ vs V
600
500
400
(µA)
Q
300
200
Burst Mode I
100
0
0
1020
IN
3040
VIN (V)
3704 G06
Gate Drive Rise and Fall Time
Dynamic IQ vs Frequency
18
CL = 3300pF
= 550µA + Qg • f
I
16
Q(TOT)
14
12
10
(mA)
Q
8
I
6
4
2
125
100
75
150
3704 G07
0
0
4001200
2001000
FREQUENCY (kHz)
600
800
3704 G08
vs C
60
50
40
30
TIME (ns)
20
10
0
0
L
4000 6000 8000
2000
RISE TIME
FALL TIME
10000 12000
CL (pF)
3704 G09
4
3704fa
INTVCC LOAD (mA)
0
0
DROPOUT VOLTAGE (mV)
50
150
200
250
500
350
5
10
3704 G18
100
400
450
300
15
20
150°C
75°C
125°C
25°C
–50°C
0°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC3704
RUN Thresholds vs V
1.5
1.4
1.3
RUN THRESHOLDS (V)
1.2
0
1020
VIN (V)
Frequency vs Temperature
325
320
315
310
305
300
295
290
GATE FREQUENCY (kHz)
285
280
275
–50
–2525
0
TEMPERATURE (°C)
INTV
Load Regulation
CC
TA = 25°C
IN
30
40
3704 G10
RUN Thresholds vs Temperature
1.40
1.35
1.30
RUN THRESHOLDS (V)
1.25
1.20
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
125
150
3704 G11
RT vs Frequency
1000
100
(kΩ)
T
R
10
100
0
2001000
400
500
300
FREQUENCY (kHz)
800700600
900
3704 G12
Maximum Sense Threshold
vs Temperature
160
155
150
145
MAX SENSE THRESHOLD (mV)
140
–50
125
50
100
75
150
3704 G13
–25 025 50
INTV
5.4
TA = 25°C
TEMPERATURE (°C)
Line Regulation
CC
75 100 125 150
3704 G14
SENSE Pin Current vs Temperature
45
GATE HIGH
= 0V
V
SENSE
40
SENSE PIN CURRENT (µA)
35
–50
–2525
INTV
0
Dropout Voltage
CC
50
TEMPERATURE (°C)
100
75
vs Current, Temperature
125
150
3704 G15
5.2
VOLTAGE (V)
CC
5.1
INTV
5.0
0
10 20
40
305080
INTVCC LOAD (mA)
60 70
3704 G16
5.3
VOLTAGE (V)
CC
5.2
INTV
5.1
0
515
1020
VIN (V)
25
30
35
40
3704 G17
3704fa
5
LTC3704
U
UU
PI FU CTIO S
RUN (Pin 1): The RUN pin provides the user with an
accurate means for sensing the input voltage and programming the start-up threshold for the converter. The
falling RUN pin threshold is nominally 1.248V and the
comparator has 100mV of hysteresis for noise immunity.
When the RUN pin is below this input threshold, the IC is
shut down and the VIN supply current is kept to a low
value (typ 10µA). The Absolute Maximum Rating for the
voltage on this pin is 7V.
ITH (Pin 2): Error Amplifier Compensation Pin. The current comparator input threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 1.40V.
NFB (Pin 3): Receives the feedback voltage from the
external resistor divider across the output. Nominal
voltage for this pin in regulation is –1.230V.
FREQ (Pin 4): A resistor from the FREQ pin to ground
programs the operating frequency of the chip. The nominal voltage at the FREQ pin is 0.62V.
MODE/SYNC (Pin 5): This input controls the operating
mode of the converter and allows for synchronizing the
operating frequency to an external clock. If the MODE/
SYNC pin is connected to ground, Burst Mode operation
is enabled. If the MODE/SYNC pin is connected to INTV
or if an external logic-level synchronization signal is
applied to this input, Burst Mode operation is disabled
and the IC operates in a continuous mode.
GND (Pin 6): Ground Pin.
GATE (Pin 7): Gate Driver Output.
I
NTVCC (Pin 8): The Internal 5.20V Regulator Output. The
gate driver and control circuits are powered from this
voltage. Decouple this pin locally to the IC ground with a
minimum of 4.7µF low ESR tantalum or ceramic
capacitor.
V
(Pin 9): Main Supply Pin. Must be closely decoupled
IN
to ground.
SENSE (Pin 10): The Current Sense Input for the Control
Loop. Connect this pin to the drain of the power MOSFET
for V
SENSE pin may be connected to a resistor in the source
of the power MOSFET. Internal leading edge blanking is
provided for both sensing methods.
sensing and highest efficiency. Alternatively, the
DS
CC
,
6
3704fa
BLOCK DIAGRA
FREQ
4
MODE/SYNC
5
NFB
200k
3
1.230V
I
TH
2
INTV
CC
8
2.00V
W
0.62V
5.2V
–
BUFFER
+
–
+
–
+
200k
g
m
EA
LDO
UV
I
OSC
0.30V
1.230V
TO
START-UP
CONTROL
SLOPE
COMPENSATION
OSCV-TO-I
50k
+
–
BURST
COMPARATOR
V-TO-I
SLOPE
BIASV
I
LOOP
1.230V
REF
BIAS AND
START-UP
CONTROL
S
Q
R
PWM LATCH
100mV
HYSTERESIS
(1.348V RISING)
LOGIC
C1
CURRENT
COMPARATOR
LTC3704
RUN
1
+
C2
1.248V
–
V
IN
9
INTV
CC
GATE
7
GND
SENSE
+
–
R
10
LOOP
GND
6
3704 BD
V
IN
3704fa
7
LTC3704
OPERATIO
U
Main Control Loop
The LTC3704 is a constant frequency, current mode
controller for DC/DC positive-to-negative converter applications. The LTC3704 is distinguished from conventional
current mode controllers because the current control loop
can be closed by sensing the voltage drop across the
power MOSFET switch instead of across a discrete sense
resistor, as shown in Figure 2. This sensing technique
improves efficiency, increases power density, and reduces the cost of the overall solution.
V
IN
V
IN
SENSE
GATE
GND
GND
2a. SENSE Pin Connection for
Maximum Efficiency (V
V
IN
V
IN
GATE
SENSE
GND
GND
2b. SENSE Pin Connection for Precise
Control of Peak I
Figure 2. Using the SENSE Pin On the LTC3704
IN/IOUT
V
SW
< 36V)
SW
V
SW
R
SENSE
3704 F02
or for VSW > 36V
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power
MOSFET is turned on when the oscillator sets the PWM
latch and is turned off when the current comparator C1
resets the latch. The divided-down output voltage is compared to an internal 1.230V reference by the error amplifier
EA, which outputs an error signal at the ITH pin. The voltage
on the ITH pin sets the current comparator C1 input
threshold. When the load current increases, a fall in the
NFB voltage relative to the reference voltage causes the I
TH
pin to rise, which causes the current comparator C1 to trip
at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
The nominal operating frequency of the LTC3704 is programmed using a resistor from the FREQ pin to ground
and can be controlled over a 50kHz to 1000kHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the MODE/SYNC pin and can be
locked to a frequency between 100% and 130% of its
nominal value. When the MODE/SYNC pin is left open, it is
pulled low by an internal 50k resistor and Burst Mode
operation is enabled. If this pin is taken above 2V or an
external clock is applied, Burst Mode operation is disabled
and the IC operates in continuous mode. With no load (or
an extremely light load), the controller will skip pulses in
order to maintain regulation and prevent excessive output
ripple.
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V reference and comparator C2 allow the user to program the
supply voltage at which the IC turns on and off (comparator C2 has 100mV of hysteresis for noise immunity). With
the RUN pin below 1.248V, the chip is off and the input
supply current is typically only 10µA.
The LTC3704 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in Figure 2. Sensing the
voltage across the power MOSFET maximizes converter
efficiency and minimizes the component count, but limits
the output voltage to the maximum rating for this pin
(36V). By connecting the SENSE pin to a resistor in the
source of the power MOSFET, the user is able to program
output voltages significantly greater than the 36V maximum input voltage rating for the IC.
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100µA) is a high priority, Burst Mode
operation should be applied (i.e., the MODE/SYNC pin
should be connected to ground). In applications where
fixed frequency operation is more critical than low current efficiency, or where the lowest output ripple is
desired, pulse-skip mode operation should be used and
the MODE/SYNC pin should be connected to the INTV
CC
pin. This allows discontinuous conduction mode (DCM)
operation down to near the limit defined by the chip’s
3704fa
8
OPERATIO
LTC3704
U
minimum on-time (about 175ns). Below this output
current level, the converter will begin to skip cycles in
order to maintain output regulation. Figures 3 and 4 show
the light load switching waveforms for Burst Mode and
Pulse-Skip Mode operation for the converter in Figure 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the ITH pin corresponding
to no load to full load is 0.30V to 1.2V. In Burst Mode
operation, if the error amplifier EA drives the I
voltage
TH
below 0.525V, the buffered ITH input to the current comparator C1 will be clamped at 0.525V (which corresponds
to 25% of maximum load current). The inductor current
peak is then held at approximately 30mV divided by the
power MOSFET R
. If the ITH pin drops below 0.30V,
DS(ON)
the Burst Mode comparator B1 will turn off the power
MOSFET and scale back the quiescent current of the IC to
250µA (sleep mode). In this condition, the load current will
be supplied by the output capacitor until the I
voltage
TH
rises above the 50mV hysteresis of the burst comparator.
At light loads, short bursts of switching (where the average inductor current is 25% of its maximum value) followed by long periods of sleep will be observed, thereby
greatly improving converter efficiency. Oscilloscope waveforms illustrating Burst Mode operation are shown in
Figure 3.
MODE/SYNC = 0V
(Burst Mode OPERATION)
V
OUT
50mV/DIV
I
L
5A/DIV
buffered I
burst clamp is removed, allowing the ITH pin
TH
to directly control the current comparator from no load to
full load. With no load, the I
pin is driven below 0.30V,
TH
the power MOSFET is turned off and sleep mode is
invoked. Oscilloscope waveforms illustrating this mode of
operation are shown in Figure 4.
MODE/SYNC = INTV
(PULSE-SKIP MODE)
V
OUT
50mV/DIV
I
L
5A/DIV
2µs/DIV
Figure 4. LTC3704 Low Output Current Operation with Burst
Mode Operation Disabled (MODE/SYNC = INTV
CC
3704 F04
CC
)
When an external clock signal drives the MODE/SYNC pin
at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the
expense of overall system efficiency of light loads.
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the internal
oscillator ramp is terminated early and the slope compensation is increased by approximately 30%. As a result, in
applications requiring synchronization, it is recommended
that the nominal operating frequency of the IC be programmed to be about 75% of the external clock frequency.
Attempting to synchronize to too high an external frequency (above 1.3fO) can result in inadequate slope compensation and possible subharmonic oscillation (or jitter).
10µs/DIV3704 F03
Figure 3. LTC3704 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 5. The MOSFET turn on will synchronize to the
rising edge of the external clock signal.
3704fa
9
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