The LTC
management and battery charger ICs for Li-Ion/Polymer
battery applications. They each include a high effi ciency,
bidirectional switching PowerPath™ manager with automatic load prioritization, a battery charger, an ideal diode, a
controller for an external high voltage switching regulator
and three general purpose step-down switching regulators
with I
ing regulators automatically limit input current for USB
compatibility and can also generate 5V at 500mA for USB
on-the-go applications when powered from the battery.
Both the USB and external switching regulator power paths
feature Bat-Track optimized charging to provide maximum
power to the application from supplies as high as 38V. An
overvoltage circuit protects the LTC3576/LTC3576-1 from
damage due to high voltage on the V
just two external components. The LTC3576/LTC3576-1 are
available in a low profi le 38-pin (4mm × 6mm × 0.75mm)
QFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Bat-Track
and PowerPath are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118, 6404251.
®
3576/LTC3576-1 are highly integrated power
2
C adjustable output voltages. The internal switch-
or WALL pins with
BUS
TYPICAL APPLICATION
High Effi ciency PowerPath Manager with Overvoltage Protection
and Triple Step-Down Regulator
AUTOMOTIVE
FIREWIRE, ETC.
USB OR
5V AC
ADAPTER
CONTROLS
ENABLE
CHARGE
6
OVERVOLTAGE
PROTECTION
USB COMPLIANT
BIDIRECTIONAL
SWITCHING
REGULATOR
LTC3576/LTC3576-1
HIGH EFFICIENCY
LT3653
EXTERNAL HIGH VOLTAGE
BUCK CONTROLLER
CC/CV
BATTERY
CHARGER
ALWAYS ON LDO
TRIPLE
STEP-DOWN
SWITCHING
REGULATORS
2
C PORT
I
0V
T
1
2
3
OPTIONAL
+
Li-Ion
3.3V/20mA
0.8V TO 3.6V/400mA
0.8V TO 3.6V/400mA
0.8V TO 3.6V/1A
RST
2
TO OTHER
LOADS
RTC/LOW
POWER LOGIC
MEMORY
I/O
CORE
µPROCESSOR
2
C
I
3576 TA01
PowerPath Switching Regulator Effi ciency
to System Load (P
100
90
80
BAT = 4.2V
70
60
50
40
EFFICIENCY (%)
30
20
V
BUS
I
BAT
10
10x MODE
0
10
= 5V
= 0mA
LOAD CURRENT (mA)
BAT = 3.3V
VOUT/PVBUS
1001000
)
3576 TA01b
3576f
1
LTC3576/LTC3576-1
(Notes 1, 2, 3)
V
, WALL (Transient) t < 1ms,
BUS
Duty Cycle < 1% .......................................... –0.3V to 7V
, WALL (Static), BAT, V
V
BUS
, ENOTG, NTC, SDA, SCL, DVCC,
V
OUT
RST3, CHRG ................................................ –0.3V to 6V
, I
I
LIM0
.........–0.3V to Max(V
ILIM1
EN1, EN2, EN3 ...............................–0.3V to V
FBx (x = 1, 2, 3) ..............................–0.3V to V
Maximum Junction Temperature........................... 125°C
Operating Temperature Range.................. –40°C to 85°C
Storage Temperature Range ................... –65°C to 125°C
IN1
, V
IN2
BUS
, V
,
IN3
, V
, BAT) + 0.3V
OUT
OUT
INx
+ 0.3V
+ 0.3V
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
TOP VIEW
LIM1ILIM0
I
38 37 36 35 34 33 32
1CLPROG
LDO3V3
2
NTCBIAS
3
NTC
4
OVGATE
5
OVSENS
6
FB1
7
V
8
IN1
SW1
9
EN1
10
ENOTG
11
DV
12
CC
13 14 15 16
SCL
38-LEAD (4mm s 6mm) PLASTIC QFN
T
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
JMAX
BUSVBUSVOUT
SW
V
39
17 18 19
NC
SDA
UFE PACKAGE
= 125°C, θJA = 34°C/W
NC
IN3
V
SW3
BAT
EN3
31
30
29
28
27
26
25
24
23
22
21
20
IDGATE
CHRG
PROG
ACPR
WALL
V
C
FB2
V
IN2
SW2
EN2
RST3
FB3
ORDER INFORMATION
LEAD FREE FINISHTAPE AND REELPART MARKINGPACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC3576EUFE#PBFLTC3576EUFE#TRPBF3576
LTC3576EUFE-1#PBFLTC3576EUFE-1#TRPBF35761
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. V
Overvoltage Protection ThresholdWith 6.2k Series Resistor6.16.356.7V
OVGATE Output VoltageV
OVSENS
V
OVSENS
OVGATE Time to Reach RegulationOVGATE C
BAT Regulated Output VoltageLTC3576
LTC3576-1
Constant Current Mode Charger CurrentR
Battery Drain CurrentV
PROG
R
PROG
BUS
I
VOUT
V
BUS
> V
= 0µA
= 0V, I
(Ideal Diode Mode)
PROG Pin Servo Voltage1.000V
PROG Pin Servo Voltage in Trickle Charge BAT < V
C/10 Threshold Voltage at PROG100mV
Ratio of I
to PROG Pin Current1030mA/mA
BAT
Trickle Charge CurrentBAT < V
Trickle Charge Threshold VoltageBAT Rising2.72.853.0V
Trickle Charge Hysteresis Voltage135mV
Recharge Battery Threshold VoltageThreshold Voltage Relative to V
Safety Timer Termination PeriodTimer Starts When V
Bad Battery Termination TimeBAT < V
End of Charge Current Ratio(Note 7)0.0850.10.112mA/mA
Clock Operating Frequency400kHz
Bus Free Time Between Stop and Start
Condition
Hold Time After (Repeated) Start
Condition
Repeated Start Condition Setup Time0.6µs
Stop Condition Setup Time0.6µs
Data Hold Time Output0900ns
Data Hold Time Input0ns
Data Setup Time100ns
SCL Low Period1.3µs
SCL High Period0.6µs
SDA/SCL Fall Time20300ns
SDA/SCL Rise Time20300ns
Input Spike Suppression Pulse Width50ns
Input Supply Voltage(Note 8)2.75.5V
V
OUT
V
OUT
UVLO—V
UVLO—V
OUT
OUT
Falling
Rising
V
IN1,2,3
Low Impedance. Switching
Regulators are Disabled in UVLO
Switching Frequency1.82.252.7MHz
FBx Input CurrentV
FB1,2,3
SWx Pull-Down in Shutdown10k
= 5V, BAT = 3.8V, DVCC = 3.3V, R
BUS
< 20mA3.13.33.5V
LDO3V3
= 3.01k, unless
CLPROG
2µA
1.3µs
0.6µs
Connected to V
Through
OUT
2.52.6
2.82.9
= 0.85V–5050nA
CC
CC
V
V
3576f
5
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
= 25°C. V
A
otherwise noted.
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
I
VIN1,2,3
V
FBHIGH1,2,3
V
FBLOW1,2,3
V
LSB1,2,3
R
LDO_CL1,2,3
R
LDO_OL1,2,3
General Purpose Switching Regulator 1 and 2
I
LIM1,2
I
OUT1,2
R
P1,2
R
N1,2
General Purpose Switching Regulator 3
I
LIM3
I
OUT3
R
P3
R
N3
t
RST3
Burst Mode is a registered trademark of Linear Technology Corporation.
Pulse Skip Mode Input CurrentI
Burst Mode
®
Input CurrentI
LDO Mode Input CurrentI
Shutdown Input Current LimitI
OUT1,2,3
OUT1,2,3
OUT1,2,3
OUT1,2,3
Maximum Servo VoltageFull Scale (1,1,1,1) (Note 10)
Minimum Servo VoltageZero Scale (0,0,0,0) (Note 10)0.4050.4250.445V
V
Servo Voltage Step Size25mV
FB1,2
LDO Mode Closed-Loop R
LDO Mode Open-Loop R
OUT
OUT
V
FB1,2,3
(Note 11)2.5
PMOS Switch Current LimitPulse Skip/Burst Mode Operation
(Note 5)
Available Output CurrentLDO Mode50mA
PMOS R
DS(ON)
NMOS R
DS(ON)
PMOS Switch Current LimitPulse Skip/Burst Mode Operation
(Note 5)
Available Output CurrentLDO Mode50mA
PMOS R
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3576E/LTC3576E-1 are guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: The LTC3576E/LTC3576E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the specifi ed maximum
operating junction temperature may impair device reliability.
Note 4: Total input current is the sum of quiescent current, I
measured current given by V
CLPROG
/R
CLPROG
• (h
CLPROG
VBUSQ
+ 1).
, and
Note 5: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specifi ed pin current rating may result in device
degradation or failure.
Note 6: The bidirectional switcher’s supply current is bootstrapped to V
and in the application will refl ect back to V
OUT
by (V
BUS/VOUT
) •
BUS
1/effi ciency. Total quiescent current is the sum of the current into the
V
pin plus the refl ected current.
OUT
Note 7: h
is expressed as a fraction of the measured full charge
C/10
current with indicated PROG resistor.
Note 8: V
not in UVLO.
OUT
Note 9: FBx above regulation such that regulator is in sleep. Specifi cation
does not include resistive divider current refl ected back to V
INx
.
Note 10: Applies to pulse skip and Burst Mode operation only.
Note 11: Inductor series resistance adds to open-loop R
OUT
.
3576f
6
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode Resistance
Ideal Diode V-I Characteristics
1.0
0.8
0.6
0.4
CURRENT (A)
0.2
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
0
0.04
0
INTERNAL IDEAL
DIODE ONLY
0.12
0.08
FORWARD VOLTAGE (V)
V
0.16
BUS
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
900
800
700
600
500
400
300
LOAD CURRENT (mA)
200
100
0
2.7
3.03.6
BATTERY VOLTAGE (V)
3.3
V
BUS
5x MODE
3.9
= 5V
0.20
3576 G01
= 5V
4.2
3576 G04
vs Battery Voltage
0.25
0.20
INTERNAL IDEAL
0.15
0.10
RESISTANCE ()
0.05
0
3.0
2.7
Battery and V
vs Load Current
750
500
250
0
CURRENT (mA)
V
= 5V
BUS
BAT = 3.8V
–250
5x MODE
R
CLPROG
= 1k
R
PROG
–500
100 200 300
0
DIODE
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
3.6
3.3
BATTERY VOLTAGE (V)
Currents
BUS
V
CURRENT
BUS
BATTERY CURRENT
(CHARGING)
= 3.01k
BATTERY CURRENT
(DISCHARGING)
600 700900
400 500
LOAD CURRENT (mA)
TA = 25°C unless otherwise specifi ed.
Voltage vs Load Current
V
OUT
(Battery Charger Disabled)
4.50
BAT = 4V
4.25
4.00
(V)
3.9
3576 G02
4.2
OUT
V
3.75
3.50
3.25
0
BAT = 3.4V
0.1 0.2 0.3
0.4 0.5
LOAD CURRENT (A)
Battery Charge Current vs
Temperature
600
R
= 2k
PROG
500
400
THERMAL REGULATION
040
TEMPERATURE (°C)
800
3576 G05
1000
300
200
CHARGE CURRENT (mA)
100
0
–40
–2020
0.6 0.70.9
0.8
80
60
100
1.0
3576 G03
120
3576 G06
V
OUT
50mV/DIV
AC COUPLED
I
VOUT
500mA/DIV
0mA
PowerPath Switching Regulator
Transient Response
V
= 5V
BUS
= 3.65V
V
OUT
CHARGER OFF
10x MODE
20µs/DIV
3576 G07
PowerPath Switching Regulator
Effi ciency vs Load Current
100
90
1x MODE
80
70
60
EFFICIENCY (%)
50
40
30
10
5x, 10x MODE
100
LOAD CURRENT (mA)
3576 G08
1000
Battery Charging Effi ciency vs
Battery Voltage with No External
Load (P
95
R
CLPROG
R
90
PROG
85
80
75
70
EFFICIENCY (%)
65
5x MODE
60
55
50
2.7
BAT/PVBUS
= 3.01k
= 1k
3.03.6
BATTERY VOLTAGE (V)
)
1x MODE
3.3
3.9
4.2
3576 G09
3576f
7
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS
V
Quiescent Current vs
BUS
V
Voltage (Suspend)
BUS
60
50
40
30
20
QUIESCENT CURRENT (µA)
10
0
0
1234
BUS VOLTAGE (V)
Battery Charge Current vs V
Voltage
600
R
= 3.01k
CLPROG
= 2k
R
PROG
500
5x MODE
400
300
200
BATTERY CURRENT (mA)
100
0
3.40
3.503.60
3.453.55
V
(V)
OUT
3.65
3.70
OUT
3.75
3576 G10
3576 G13
3.80
(V)
OUT
V
3.0
5
4.7
4.5
4.3
4.1
3.9
(V)
3.7
OUT
V
3.5
3.3
3.1
2.9
2.7
Voltage vs Load Current in
V
OUT
Suspend
5.0
4.5
3.5
2.5
4.0
0
V
HIGH POWER SUSPEND
LOW POWER SUSPEND
V
= 5V
BUS
BAT = 3.3V
= 3.01k
R
CLPROG
0.5
LOAD CURRENT (mA)
Voltage vs Battery Voltage
OUT
1.0
1.5
(Charger Overprogrammed)
V
= 5V
BUS
= 0V
I
VOUT
= 3.01k
R
CLPROG
= 1k
R
PROG
5x MODE
1x MODE
2.7
3.0
BATTERY VOLTAGE (V)
3.3
3.6
TA = 25°C unless otherwise specifi ed.
V
Current vs Load Current in
BUS
Suspend
2.5
V
= 5V
BUS
BAT = 3.3V
= 3.01k
R
CLPROG
2.0
1.5
HIGH POWER
SUSPEND
LOW POWER SUSPEND
0.5
0
1.0
LOAD CURRENT (mA)
2.0
3576 G11
2.5
CURRENT (mA)
1.0
BUS
V
0.5
0
Normalized Battery Charger Float
Voltage vs Temperature
1.001
1.000
0.999
0.998
0.997
NORMALIZED FLOAT VOLTAGE
3.9
3576 G14
4.2
0.996
–40
–15
10
TEMPERATURE (°C)
1.5
35
2.0
2.5
3576 G12
60
85
3576 G15
V
Quiescent Current vs
BUS
Temperature
25
V
= 5V
BUS
20
15
10
QUIESCENT CURRENT (mA)
5
0
–15
–40
8
5x MODE
1x MODE
35
10
TEMPERATURE (°C)
V
Quiescent Current in
BUS
Suspend vs Temperature
60
V
= 5V
BUS
50
40
30
20
QUIESCENT CURRENT (µA)
10
0
–40
60
85
3576 G16
–15103560
TEMPERATURE (°C)
85
3576 G17
Battery Drain Current vs
Temperature
35
30
25
20
15
10
BATTERY CURRENT (µA)
5
0
–15103585
–40
TEMPERATURE (°C)
BAT = 3.8V
= 0V
V
BUS
SWITCHING
REGULATORS OFF
60
3576 G18
3576f
LTC3576/LTC3576-1
TYPICAL PERFORMANCE CHARACTERISTICS
OTG Boost Quiescent Current
vs V
Voltage
OUT
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
QUIESCENT CURRENT (mA)
0.9
0.7
0.5
2.90
3.55
4.20
V
(V)
OUT
OTG Boost Effi ciency
vs V
Voltage
OUT
95
500mA LOAD
90
85
80
EFFICIENCY (%)
75
100mA LOAD
4.85
3576 G19
5.50
OTG Boost V
vs Load Current
5.5
5.0
0100
V
V
OUT
V
OUT
V
OUT
V
OUT
(V)
BUS
V
4.5
4.0
3.5
3.0
OTG Boost Start-Up Time into
Current Source Load vs V
Voltage
CLPROG (Pin 1): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
pins. A precise fraction, h
V
BUS
CLPROG
, of the V
BUS
current is sent to the CLPROG pin when the PMOS switch of
the PowerPath switching regulator is on. The switching
regulator delivers power until the CLPROG pin reaches
1.18V in step-down mode and 1.15V in step-up mode.
When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
Several V
current limit settings are available via user
BUS
input which will typically correspond to the 500mA and
100mA USB specifi cations. When the switching regulator
is in step-up mode (USB on-the-go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for fi ltering.
LDO3V3 (Pin 2): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from V
. It may be used for light loads
OUT
such as a watchdog microprocessor or real time clock.
A 1µF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to V
OUT
.
NTCBIAS (Pin 3): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 4): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a negative temperature coeffi cient
thermistor, which is typically co-packaged with the battery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistor is required from NTCBIAS to NTC and a thermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
OVGATE (Pin 5): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
be connected to V
and the drain should be connected
BUS
to the product’s DC input connector. In the absence of an
overvoltage condition, this pin is connected to an internal
charge pump capable of creating suffi cient overdrive to fully
enhance the pass transistor. If an overvoltage condition is
detected, OVGATE is brought rapidly to GND to prevent
damage to the LTC3576/LTC3576-1. OVGATE works in
conjunction with OVSENS to provide this protection.
OVSENS (Pin 6): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.2k resistor to
the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on this
pin exceeds
V
OVCUTOFF
,
the OVGATE pin will be pulled
to GND to disable the pass transistor and protect the
LTC3576/LTC3576-1. The OVSENS pin shunts current
during an overvoltage transient in order to keep the pin
voltage at 6V.
FB1 (Pin 7): Feedback Input for Switching Regulator 1.
When regulator 1’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
2
value from the I
(Pin 8): Power Input for Switching Regulator 1.
V
IN1
This pin will generally be connected to V
C serial port. See Table 4.
OUT
. A 1µF MLCC
capacitor is recommended on this pin.
SW1 (Pin 9): Power Transmission Pin for Switching
dently enables switching regulator 1. Active high. This
pin is logically ORed with its corresponding bit in the
2
C serial port. See Table 3. Has a 2µA internal pull-down
I
current source.
ENOTG (Pin 11): Logic Input. This logic input pin independently enables the bidirectional switching regulator to
step up the voltage on V
for USB on-the-go applications. Active high. This
V
BUS
and provide a 5V output on
OUT
pin is logically ORed with its corresponding bit in the
2
C serial port. See Table 3. Has a 2µA internal pull-down
I
current source.
3576f
13
LTC3576/LTC3576-1
PIN FUNCTIONS
DVCC (Pin 12): Logic Supply for the I2C Serial Port. If the
serial port is not needed, it can be disabled by grounding
. When DVCC is grounded, the I2C bits are set to their
DV
CC
default values. See Table 3.
2
SCL (Pin 13): Clock Input Pin for the I
2
C logic levels are scaled with respect to DVCC. If DVCC
I
C Serial Port. The
is grounded, the SCL pin is equivalent to the C2, C4 and
2
C6 bits in the I
C serial port. SCL in conjunction with SDA
determine the operating modes of switching regulators 1,
2 and 3 when DV
is grounded. See Tables 3 and 5. Has
CC
a 2µA internal pull-down current source.
2
SDA (Pin 14): Data Input Pin for the I
2
C logic levels are scaled with respect to DVCC. If DVCC
I
C Serial Port. The
is grounded, the SDA pin is equivalent to the C3, C5 and
2
C7 bits in the I
C serial port. SDA in conjunction with SCL
determine the operating modes of switching regulators 1,
2 and 3 when DV
is grounded. See Tables 3 and 5. Has
CC
a 2µA internal pull-down current source.
NC (Pin 15): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to V
in order to make the V
(Pin 16): Power Input for Switching Regulator 3.
V
IN3
This pin will generally be connected to V
PCB trace wider.
IN3
. A 1µF MLCC
OUT
IN3
capacitor is recommended on this pin.
SW3 (Pin 17): Power Transmission Pin for Switching
Regulator 3.
NC (Pin 18): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to SW3
in order to make the SW3 PCB trace wider.
EN3 (Pin 19): Logic Input. This logic input pin independently enables switching regulator 3. Active high. This
pin is logically ORed with its corresponding bit in the
2
C serial port. See Table 3. Has a 2µA internal pull-down
I
current source.
FB3 (Pin 20): Feedback Input for Switching Regulator 3.
When regulator 3’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
2
value from the I
C serial port. See Table 4.
RST3 (Pin 21): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its fi nal value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
EN2 (Pin 22): Logic Input. This logic input pin independently enables switching regulator 2. Active high. This
pin is logically ORed with its corresponding bit in the
2
C serial port. See Table 3. Has a 2µA internal pull-down
I
current source.
SW2 (Pin 23): Power Transmission Pin for Switching
Regulator 2.
(Pin 24): Power Input for Switching Regulator 2.
V
IN2
This pin will generally be connected to V
. A 1µF MLCC
OUT
capacitor is recommended on this pin.
FB2 (Pin 25): Feedback Input for Switching Regulator 2.
When regulator 2’s control loop is complete, this pin servos
to 1 of 16 possible set points based on the commanded
2
value from the I
(Pin 26): Bat-Track External Switching Regulator Control
V
C
Output. This pin drives the V
C serial port. See Table 4.
pin of an external Linear
C
Technology step-down switching regulator. An external Pchannel MOSFET is sometimes required to provide power
to V
with its gate tied to the ACPR pin (see Applications
OUT
Information). In concert with WALL and ACPR, it will
regulate V
to maximize battery charger effi ciency
OUT
WALL (Pin 27): External Power Source Sense Input. WALL
should be connected to the output of the external high
voltage switching regulator and to the drain of an external
P-channel MOSFET if used. It is used to determine when
power is applied to the external regulator. When power
is detected, ACPR is driven low and the USB input is automatically disabled. Pulling this pin above 4.3V enables
pin.
the V
C
14
3576f
PIN FUNCTIONS
LTC3576/LTC3576-1
ACPR (Pin 28): External Power Source Present Output
(Active Low). ACPR indicates that the output of the external
high voltage step-down switching regulator is suitable for
use by the LTC3576/LTC3576-1. It should be connected to
the gate of an external P-channel MOSFET whose source
is connected to V
WALL. ACPR has a high level of V
and whose drain is connected to
OUT
and a low level of
OUT
GND. The USB bidirectional switcher is disabled when
ACPR is low.
PROG (Pin 29): Charge Current Program and Charge Current Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If suffi cient input
power is available in constant-current mode, this pin servos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
V
I
BAT
PROG
=• 1030
R
PROG
CHRG (Pin 30): Open-Drain Charge Status Output. The CHRG pin indicates the status of the battery charger.
Four possible charger states are represented by CHRG:
charging, not charging, unresponsive battery and battery
temperature out of range. In addition, CHRG is used to
indicate whether there is a short-circuit condition on V
BUS
when the bidirectional switching regulator is in step-up
mode (on-the-go). CHRG is modulated at 35kHz and
switches between a low and a high duty cycle for easy
recognition by either humans or microprocessors. See
Table 1. CHRG requires a pull-up resistor and/or LED to
provide indication.
IDGATE (Pin 31): Ideal Diode Amplifi er Output. This pin
controls the gate of an optional external P-channel MOSFET
used as an ideal diode between V
and BAT. The external
OUT
ideal diode operates in parallel with the internal ideal diode.
The source of the P-channel MOSFET should be connected
to V
and the drain should be connected to BAT. If the
OUT
external ideal diode MOSFET is not used, IDGATE should
be left fl oating.
BAT (Pin 32): Single Cell Li-Ion Battery Pin. Depending on
available V
deliver power to V
from V
V
OUT
(Pin 33): Output Voltage of the Bidirectional Pow-
OUT
power, a Li-Ion battery on BAT will either
BUS
through the ideal diode or be charged
OUT
via the battery charger.
erPath Switching Regulator in step-down mode and
Input Voltage of the Battery Charger. The majority of
the portable product should be powered from V
OUT
. The
LTC3576/LTC3576-1 will partition the available power
between the external load on V
and the internal bat-
OUT
tery charger. Priority is given to the external load and any
extra power is used to charge the battery. An ideal diode
from BAT to V
ensures that V
OUT
the load exceeds the allotted power from V
power source is removed. In on-the-go mode, this
V
BUS
pin delivers power to V
via the SW pin. V
BUS
is powered even if
OUT
or if the
BUS
should
OUT
be bypassed with a low impedance ceramic capacitor.
V
(Pins 34, 35): Power Pins. These pins deliver power
BUS
to V
via the SW pin by drawing controlled current from
OUT
a DC source such as a USB port or DC output wall adapter.
In on-the-go mode these pins provide power to external
loads. Tie the two V
pins together at the part and bypass
BUS
with a low impedance multilayer ceramic capacitor.
SW (Pin 36): The SW pin transfers power between V
and V
via the bidirectional switching regulator. See
OUT
BUS
the Applications Information section for a discussion of
inductance value and current rating.
, I
I
LIM0
(Pins 37, 38): I
LIM1
LIM0
and I
control the current
LIM1
limit of the PowerPath switching regulator. See Table 1.
Both the I
LIM0
and I
corresponding bits in the I
pins are logically ORed with their
LIM1
2
C serial port. See Tables 3 and
6. Each has a 2µA internal pull-down current source.
Exposed Pad (Pin 39): Ground. The Exposed Pad should
be connected to a continuous ground plane on the second
layer of the printed circuit board by several vias directly
under the LTC3576/LTC3576-1.
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15
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