LTC3545/LTC3545-1
3
35451fa
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3545/LTC3545-1 are guaranteed to meet performance
specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature TA and power
dissipation P
D
according to the following formula:
T
J
= TA + (PD)(68°C/W)
This IC includes overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperature
will exceed 125°C when overtemperature is active. Continuous operation
above the specifi ed maximum operating junction temperature may impair
device reliability.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
FB
Feedback Pin Leakage 80 nA
I
S
Input DC Bias Current Active Mode (Pulse Skip)
Burst Mode (All Regulators Sleeping)
Shutdown
VFB = 0.5V or V
OUT
= 90%, I
LOAD
= 0A,
2.25MHz, Three Regulators Enabled,
680
58
0.1
750
70
2.0
µA
µA
µA
f
OSC
Oscillator Frequency
●
1.8 2.25 2.7 MHz
f
SYNC
Synchronization Frequency LTC3545 Only
●
13MHz
V
RUN(HIGH)
RUNx Input High Voltage
●
1V
V
RUN(LOW)
RUNx Input Low Voltage
●
0.3 V
I
RUN
RUN Leakage Current ±0.1 ±1 µA
I
LSW
SWx Leakage V
RUN
= 0V, VSW = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 µA
I
SYNC
SYNC Leakage V
RUNx
= 0V, V
SYNC
= 0V or 5.5V,
V
IN
= 5.5V
±0.1 ±1 µA
T
PGOOD
Power Good Threshold–Deviation From VFB
Steady State (0.6V)
V
FBx
Ramping Up
V
FBx
Ramping Down
–7.5
–10
%
%
R
PGOOD
Power Good Pull-Down On-Resistance I
PGD
= 50mA
●
14 50
Ω
MODE/SYNC Thresholds 0.93 V
Individual Regulator Characteristics
t
SS
Soft-Start Period VFB = 10% to 90% Fullscale 850 1100 µs
I
PK
Peak Switch Current Limit VFB < V
FBREG
, Duty Cycle < 35% 1 1.3 1.6 A
I
Q
Input DC Bias Current Active Mode (Pulse Skip)
Burst Mode Operation
VFB = 0.5V, I
LOAD
= 0A, 2.25MHz 310
31
µA
µA
R
PFET
R
DS(ON)
of P-Channel FET (Note 7) ISW = 100mA 0.35
Ω
R
NFET
R
DS(ON)
of N-Channel FET (Note 7) ISW = –100mA 0.35
Ω
V
UVLO
Undervoltage Lockout (High VCC to Low)
●
1.8 2.25 V
ELECTRICAL CHARACTERISTICS
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. VIN = 3.6V unless otherwise noted. (Note 3)
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.
Note 5: The LTC3545/LTC3545-1 are tested in a proprietary test mode that
connects V
FB
to the output of the error amplifi er.
Note 6: Load regulation is inferred by measuring the regulation loop gain.
Note 7: The QFN switch-on resistance is guaranteed by correlation to
water level measurements.
Note 8: Guaranteed by long-term current density limitations.