LINEAR TECHNOLOGY LTC3440 Technical data

FEATURES

LTC3440

Micropower Synchronous

Buck-Boost DC/DC Converter

U

DESCRIPTIO

■

Single Inductor

■

Fixed Frequency Operation with Battery Voltages
Above, Below or Equal to the Output

■

Synchronous Rectification: Up to 96% Efficiency

■

25µA Quiescent Current in Burst Mode® Operation

■

Up to 600mA Continuous Output Current

■

No Schottky Diodes Required (V

■

V

Disconnected from VIN During Shutdown

OUT

■

2.5V to 5.5V Input and Output Range

■

Programmable Oscillator Frequency

OUT

< 4.3V)

from 300kHz to 2MHz

■

Synchronizable Oscillator

■

Burst Mode Enable Control

■

<1µA Shutdown Current

■

Small Thermally Enhanced 10-Pin MSOP and
(3mm × 3mm) DFN Packages

U

APPLICATIO S

■

Palmtop Computers

■

Handheld Instruments

■

MP3 Players

■

Digital Cameras

The LTC®3440 is a high efficiency, fixed frequency, Buck­Boost DC/DC converter that operates from input voltages
above, below or equal to the output voltage. The topology
incorporated in the IC provides a continuous transfer
function through all operating modes, making the product
ideal for single lithium-ion, multicell alkaline or NiMH
applications where the output voltage is within the battery
voltage range.

The device includes two 0.19Ω N-channel MOSFET
switches and two 0.22Ω P-channel switches. Switching
frequencies up to 2MHz are programmed with an external
resistor and the oscillator can be synchronized to an
external clock. Quiescent current is only 25µA in Burst
Mode operation, maximizing battery life in portable appli­cations. Burst Mode operation is user controlled and can
be enabled by driving the MODE/SYNC pin high. If the
MODE/SYNC pin has either a clock or is driven low, then
fixed frequency switching is enabled.

Other features include a 1µA shutdown, soft-start con-
trol, thermal shutdown and current limit. The LTC3440 is
available in the 10-pin thermally enhanced MSOP and
(3mm × 3mm) DFN packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode is a registered trademark of Linear Technology Corporation.
Protected by U.S. Patents including 6404251, 6166527.

TYPICAL APPLICATIO

Li-Ion to 3.3V at 600mA Buck-Boost Converter

L1

10µH

3

2.7V TO 4.2V

V

IN =

+

Li-Ion

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY

C1
10µF

*

SW1

7

V

8

SHDN/SS

2

MODE/SYNC

1

R

R

T

60.4k

IN

T

SW2

LTC3440

V

OUT

FB

V

C

GND

C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH6D38-100

4

6

9

C5 1.5nF

10

5

U

R3

15k

R1
340k

R2
200k

C2
22µF

3440 TA01

V

OUT

3.3V
600mA

100

V

= 3.3V

OUT

98

= 100mA

I

OUT

= 1MHz

f

OSC

96

94

92

90

88

EFFICIENCY (%)

86

84

82

80

2.5

3.0

Efficiency vs V

4.0 4.5

3.5
VIN (V)

IN

5.5

5.0

3440 TA02

3440fa

1

LTC3440

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

VIN, V

SW1, SW2 Voltage ..................................... – 0.3V to 6V

VC, RT, FB, SHDN/SS,

MODE/SYNC Voltage .................................. –0.3V to 6V

Voltage........................................ –0.3V to 6V

OUT

Operating Temperature Range (Note 2) .. – 40°C to 85°C

Storage Temperature Range ................. –65°C to 125°C

Lead Temperature (Soldering, 10 sec).................. 300°C

UU

W

PACKAGE/ORDER I FOR ATIO

TOP VIEW

R

1

T

MODE/SYNC

T

JMAX

2

3

SW1

4

SW2

5

GND

10-LEAD (3mm × 3mm) PLASTIC DFN

DD PACKAGE

EXPOSED PAD (PIN 11) IS GND

MUST BE SOLDERED TO PCB

= 125°C, θJA = 43°C/ W, θJC = 3°C/ W

10

V

C

FB

9

11

8

7

6

SHDN/SS

V

IN

V

OUT

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

range, otherwise specifications are at TA = 25°C. VIN = V

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Start-Up Voltage ● 2.4 2.5 V
Input Operating Range ● 2.5 5.5 V
Output Voltage Adjust Range ● 2.5 5.5 V

Feedback Voltage ● 1.196 1.22 1.244 V
Feedback Input Current V

Quiescent Current, Burst Mode Operation VC = 0V, MODE/SYNC = 3V (Note 3) 25 40 µA
Quiescent Current, Shutdown SHDN = 0V, Not Including Switch Leakage 0.1 1 µA

Quiescent Current, Active VC = 0V, MODE/SYNC = 0V (Note 3) 600 1000 µA
NMOS Switch Leakage Switches B and C 0.1 5 µA
PMOS Switch Leakage Switches A and D 0.1 10 µA

NMOS Switch On Resistance Switches B and C 0.19 Ω
PMOS Switch On Resistance Switches A and D 0.22 Ω

Input Current Limit ● 1A
Maximum Duty Cycle Boost (% Switch C On) ● 55 75 %

Minimum Duty Cycle ● 0%
Frequency Accuracy ● 0.8 1 1.2 MHz

MODE/SYNC Threshold 0.4 2 V
MODE/SYNC Input Current V
Error Amp AVOL 90 dB

Error Amp Source Current 15 µA
Error Amp Sink Current 380 µA

ORDER PART

NUMBER

LTC3440EDD

DD

PART MARKING

LBKT

The ● denotes specifications that apply over the full operating temperature

= 3.6V, RT = 60k, unless otherwise noted.

OUT

= 1.22V 1 50 nA

FB

Buck (% Switch A On)

MODE/SYNC

= 5.5V 0.01 1 µA

MODE/SYNC

SW1
SW2
GND

θ
θ

TOP VIEW

1

R

T

2
3
4
5

MS PACKAGE

10-LEAD PLASTIC MSOP

T

= 125°C,

JMAX

= 130°C/ W 1 LAYER BOARD

JA

= 100°C/ W 4 LAYER BOARD

JA

= 45°C/ W

θ

JC

ORDER PART

10

V
9
8
7
6

C

FB

SHDN/SS

V

IN

V

OUT

NUMBER

LTC3440EMS

MS

PART MARKING

LTNP

● 100 %

3440fa

2

LTC3440

OUTPUT CURRENT (mA)

30

EFFICIENCY (%)

90

100

20

80

50

70

60

40

0.1 10 100 1000

3440 G03

1

Burst Mode

OPERATION

VIN = 2.5V

VIN = 3.3V

f

OSC

= 2MHz

VIN = 4.2V

ELECTRICAL CHARACTERISTICS

range, otherwise specifications are at TA = 25°C. VIN = V

The ● denotes specifications that apply over the full operating temperature

= 3.6V, RT = 60k, unless otherwise noted.

OUT

PARAMETER CONDITIONS MIN TYP MAX UNITS

SHDN/SS Threshold When IC is Enabled ● 0.4 1 1.5 V

When EA is at Maximum Boost Duty Cycle 2.2 V

SHDN/SS Input Current V

Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.

Note 2: The LTC3440E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating

= 5.5V 0.01 1 µA

SHDN

temperature range are assured by design, characterization and correlation
with statistical process controls.

Note 3: Current measurements are performed when the outputs are not
switching.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Li-Ion to 3.3V Efficiency
(f

= 300kHz)

OSC

100

90

Burst Mode

OPERATION

80

70

VIN = 2.5V

60

50

EFFICIENCY (%)

40

30

f

= 300kHz

OSC

20

0.1 10 100 1000

1
OUTPUT CURRENT (mA)

VIN = 4.2V

VIN = 3.3V

3440 G01

Li-Ion to 3.3V Efficiency,
Power Loss (f

100

Burst Mode

90

OPERATION

80

70

VIN = 2.5V

60

50

EFFICIENCY (%)

40

30

20

0.1 10 100 1000

1
OUTPUT CURRENT (mA)

= 1MHz)

OSC

VIN = 3.3V

VIN = 4.2V

VIN = 3.3V

f

OSC

= 1MHz

3440 G02

1000

100

POWER LOSS (mW)

10

1

0.1

Li-Ion to 3.3V Efficiency
(f

= 2MHz)

OSC

Switch Pins During Buck/Boost

SW1

2V/DIV

SW2

2V/DIV

= 3.78V 50ns/DIV 3440 G04

V

IN

V

= 3.3V

OUT

= 250mA

I

OUT

Switch Pins on the Edge of
Buck/Boost and Approaching Boost

SW1

2V/DIV

SW2

2V/DIV

= 3.42V 50ns/DIV 3440 G05

V

IN

V

= 3.3V

OUT

= 250mA

I

OUT

Switch Pins on the Edge of
Buck/Boost and Approaching Buck

SW1

2V/DIV

SW2

2V/DIV

= 4.15V 50ns/DIV 3440 G06

V

IN

V

= 3.3V

OUT

= 250mA

I

OUT

3440fa

3

LTC3440

TEMPERATURE (°C)

–55

5

E/A SOURCE CURRENT (µA)

10

15

20

–25 5 35 65

3440 G12

95 125

VIN = V

OUT

= 3.6V

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Switch Pins in Buck Mode

Switch Pins in Boost Mode

V

Ripple During Buck,

OUT

Buck/Boost and Boost Modes

SW1

2V/DIV

SW2

2V/DIV

= 5V 250ns/DIV 3440 G07

V

IN

V

= 3.3V

OUT

I

= 250mA

OUT

SW1

2V/DIV

SW2

2V/DIV

= 2.5V 250ns/DIV 3440 G08

V

IN

V

= 3.3V

OUT

I

= 250mA

OUT

V

OUT

10mV/DIV

AC Coupled

L = 10µH1µs/DIV
C

= 22µF

OUT

I

= 250mA

OUT

f

= 1MHz

OSC

Active Quiescent Current Burst Mode Quiescent Current Error Amp Source Current

CURRENT (µA)

OUT

+ V

IN

V

550

500

450

VIN = V

OUT

= 3.6V

CURRENT (µA)

OUT

+ V

IN

V

40

VIN = V

30

20

OUT

= 3.6V

3440 G09

Buck

= 5V

V

IN

Buck/Boost

= 3.78V

V

IN

Boost
V

= 2.5V

IN

400

–55

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G10

Output Frequency NMOS R

1.10
VIN = V

1.05

1.00

FREQUENCY (MHz)

0.95

0.90

–55

= 3.6V

OUT

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G13

10

–55

0.30
VIN = V

SWITCHES B AND C

0.25

(Ω)

0.20

DS(ON)

NMOS R

0.15

0.10

–55

–25 5 35 65

TEMPERATURE (°C)

DS(ON)

= 3.6V

OUT

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G11

95 125

3440 G14

Feedback Voltage

1.236
VIN = V

1.216

FEEDBACK VOLTAGE (V)

1.196

–55

= 3V

OUT

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G15

3440fa

4

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LTC3440

Feedback Voltage Line Regulation Error Amp Sink Current PMOS R

90

VIN = V

80

70

LINE REGULATION (dB)

60

–55

= 2.5V TO 5.5V

OUT

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G16

430

VIN = V

= 3.6V

OUT

410

390

E/A SINK CURRENT (µA)

370

350

–55

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G17

0.30
VIN = V

SWITCHES A AND D

0.25

(Ω)

0.20

DS(ON)

PMOS R

0.15

0.10
–55

Boost Max Duty Cycle Minimum Start Voltage Current Limit

90

VIN = V
R

85

80

= 60k

T

OUT

= 3.6V

2.40

2.35

3000

2500

2000

DS(ON)

= 3.6V

OUT

–25 5 35 65

TEMPERATURE (°C)

VIN = V

PEAK SWITCH

95 125

= 3.6V

OUT

3440 G18

DUTY CYCLE (%)

75

70

–55

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G19

2.30

MINIMUM START VOLTAGE (V)

2.25
–55

–25 5 35 65

TEMPERATURE (°C)

95 125

3440 G20

CURRENT LIMIT (A)

1500

1000

–55

–25 5 35 65

AVERAGE INPUT

95 125

TEMPERATURE (°C)

3440 G21

3440fa

5

LTC3440

U

UU

PI FU CTIO S

RT (Pin 1): Timing Resistor to Program the Oscillator
Frequency. The programming frequency range is 300kHz
to 2MHz.

10

•

T

=

810

=

610

R

T

10

•
f

SW

Hz

f

OSC

MODE/SYNC (Pin 2): MODE/SYNC = External CLK : Syn­chronization of the internal oscillator. A clock frequency of
twice the desired switching frequency and with a pulse
width between 100ns and 2µs is applied. The oscillator
free running frequency is set slower than the desired
synchronized switching frequency to guarantee sync. The
oscillator RT component value required is given by:

R

where fSW = desired synchronized switching frequency.

SW1 (Pin 3): Switch Pin Where the Internal Switches A
and B are Connected. Connect inductor from SW1 to SW2.
An optional Schottky diode can be connected from SW1 to
ground. Minimize trace length to keep EMI down.

SW2 (Pin 4): Switch Pin Where the Internal Switches C
and D are Connected. For applications with output volt-

ages over 4.3V, a Schottky diode is required from SW2 to
V

to ensure the SW pin does not exhibit excess voltage.

OUT

GND (Pin 5): Signal and Power Ground for the IC.

(Pin 6): Output of the Synchronous Rectifier. A filter

V

OUT

capacitor is placed from V

(Pin 7): Input Supply Pin. Internal VCC for the IC. A

V

IN

ceramic bypass capacitor as close to the V
(Pin 5) is required.

SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.
Grounding this pin shuts down the IC. Tie to >1.5V to
enable the IC and >2.5V to ensure the error amp is not
clamped from soft-start. An RC from the shutdown com­mand signal to this pin will provide a soft-start function by
limiting the rise time of the VC pin.

FB (Pin 9): Feedback Pin. Connect resistor divider tap
here. The output voltage can be adjusted from 2.5V to

5.5V. The feedback reference voltage is typically 1.22V.

VC (Pin 10): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to
compensate the loop. See the section “Compensating the
Feedback Loop” for guidelines.

Exposed Pad (Pin 11, DFN Package Only): Ground. This
pin must be soldered to the PCB and electrically connected
to ground.

to GND.

OUT

pin and GND

IN

6

3440fa

BLOCK DIAGRA

SW1 SW2

V

2.5V TO 5.5V

+

IN

7

2.7A

SW A

SW B SW C

SUPPLY

CURRENT

LIMIT

+

–

UVLO

+

W

3 4

GATE

DRIVERS

AND

ANTICROSS

CONDUCTION

PWM

LOGIC

AND
OUTPUT
PHASING

COMPARATORS

PWM

I

SENSE

AMP

–0.4A

–

+

–

SW D

–

+

REVERSE

CURRENT

LIMIT

ERROR

AMP

CLAMP

LTC3440

V

OUT

V

OUT

6

1.22V

+

FB

–

9

2.5V TO 5.5V

R1

R

T

R

T

1

MODE/SYNC

1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY

2

2.4V

OSC

SYNC

–

SLEEP

Burst Mode

OPERATION

CONTROL

5µs DELAY

5

GND

+

SHUTDOWN

10

8

V

C

SHDN/SS

R2

R

SS

V

IN

C

SS

3440 BD

3440fa

7

LTC3440

OPERATIO

U

The LTC3440 provides high efficiency, low noise power
for applications such as portable instrumentation. The
LTC proprietary topology allows input voltages above,
below or equal to the output voltage by properly phasing
the output switches. The error amp output voltage on the
VC pin determines the output duty cycle of the switches.
Since the VC pin is a filtered signal, it provides rejection of
frequencies from well below the switching frequency. The
low R

, low gate charge synchronous switches pro-

DS(ON)

vide high frequency pulse width modulation control at
high efficiency. Schottky diodes across the synchronous
switch D and synchronous switch B are not required, but
provide a lower drop during the break-before-make time
(typically 15ns). The addition of the Schottky diodes will
improve peak efficiency by typically 1% to 2% at 600kHz.
High efficiency is achieved at light loads when Burst Mode
operation is entered and when the IC’s quiescent current
is a low 25µA.

LOW NOISE FIXED FREQUENCY OPERATION

Oscillator

The frequency of operation is user programmable and is
set through a resistor from the R

⎛

⎞

e

610

f

=

⎜
⎝

Hz

⎟
⎠

R

T

pin to ground where:

T

An internally trimmed timing capacitor resides inside the
IC. The oscillator can be synchronized with an external
clock applied to the MODE/SYNC pin. A clock frequency of
twice the desired switching frequency and with a pulse
width between 100ns and 2µs is applied. The oscillator R

T

component value required is given by:

10

•

810

R

=

T

f

SW

where fSW = desired synchronized switching frequency.

For example to achieve a 1.2MHz synchronized switching
frequency the applied clock frequency to the MODE/SYNC
pin is set to 2.4MHz and the timing resistor, RT, is set to

66.5k (closest 1% value).

Error Amp

The error amplifier is a voltage mode amplifier. The loop
compensation components are configured around the
amplifier to provide loop compensation for the converter.
The SHDN/SS pin will clamp the error amp output, VC, to
provide a soft-start function.

Supply Current Limit

The current limit amplifier will shut PMOS switch A off
once the current exceeds 2.7A typical. The current ampli­fier delay to output is typically 50ns.

Reverse Current Limit

The reverse current limit amplifier monitors the inductor
current from the output through switch D. Once a negative
inductor current exceeds – 400mA typical, the IC will shut
off switch D.

Output Switch Control

Figure 1 shows a simplified diagram of how the four
internal switches are connected to the inductor, VIN, V

OUT

and GND. Figure 2 shows the regions of operation for the
LTC3440 as a function of the internal control voltage, VCI.
The VCI voltage is a level shifted voltage from the output of
the error amp (VC pin) (see Figure 5). The output switches
are properly phased so the transfer between operation
modes is continuous, filtered and transparent to the user.
When VIN approaches V

the Buck/Boost region is

OUT

reached where the conduction time of the four switch
region is typically 150ns. Referring to Figures 1 and 2, the
various regions of operation will now be described.

V

IN

7

PMOS A

SW1

3

NMOS B

Figure 1. Simplified Diagram of Output Switches

SW2

4

V

OUT

V

6

OUT

PMOS D

NMOS C

3440 F01

8

3440fa

OPERATIO

LTC3440

U

75%

D

MAX

BOOST

D

MIN

BOOST

D

MAX

BUCK

DUTY

CYCLE

Figure 2. Switch Control vs Internal Control Voltage, V

Buck Region (VIN > V

A ON, B OFF

PWM CD SWITCHES

FOUR SWITCH PWM

D ON, C OFF

PWM AB SWITCHES

0%

BOOST REGION

BUCK REGION

)

OUT

BUCK/BOOST REGION

3440 F02

V4 (≈2.05V)

V3 (≈1.65V)

V2 (≈1.55V)

V1 (≈0.9V)

INTERNAL
CONTROL
VOLTAGE, V

CI

CI

Switch D is always on and switch C is always off during this
mode. When the internal control voltage, VCI, is above
voltage V1, output A begins to switch. During the off time
of switch A, synchronous switch B turns on for the
remainder of the time. Switches A and B will alternate
similar to a typical synchronous buck regulator. As the
control voltage increases, the duty cycle of switch A
increases until the maximum duty cycle of the converter in
Buck mode reaches D

D

MAX_BUCK

= 100 – D4SW %

MAX_BUCK

, given by:

where D4SW = duty cycle % of the four switch range.

D4SW = (150ns • f) • 100 %

where f = operating frequency, Hz.

The input voltage, VIN, where the four switch region begins
is given by:

V

V

=

IN

OUT

1 150–( • )

ns f

V

The point at which the four switch region ends is given by:

= V

V

IN

Boost Region (V

(1 – D) = V

OUT

IN

< V

(1 – 150ns • f) V

OUT

)

OUT

Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is above
voltage V3, switch pair CD will alternately switch to
provide a boosted output voltage. This operation is typical
to a synchronous boost regulator. The maximum duty
cycle of the converter is limited to 75% typical and is
reached when VCI is above V4.

Burst Mode Operation

Burst Mode operation is when the IC delivers energy to the
output until it is regulated and then goes into a sleep mode
where the outputs are off and the IC is consuming only
25µA. In this mode the output ripple has a variable
frequency component that depends upon load current.

During the period where the device is delivering energy to
the output, the peak current will be equal to 400mA typical
and the inductor current will terminate at zero current for
each cycle. In this mode the maximum average output
current is given by:

Beyond this point the “four switch,” or Buck/Boost region
is reached.

Buck/Boost or Four Switch (VIN ~ V

OUT

)

When the internal control voltage, VCI, is above voltage V2,
switch pair AD remain on for duty cycle D

MAX_BUCK

, and
the switch pair AC begins to phase in. As switch pair AC
phases in, switch pair BD phases out accordingly. When
the VCI voltage reaches the edge of the Buck/Boost range,
at voltage V3, the AC switch pair completely phase out the
BD pair, and the boost phase begins at duty cycle D4SW.

V

.•

01

I

OUT MAX BURST

()

≈

VV

IN

+

OUT IN

A

Burst Mode operation is user controlled, by driving the
MODE/SYNC pin high to enable and low to disable.

The peak efficiency during Burst Mode operation is less
than the peak efficiency during fixed frequency because
the part enters full-time 4-switch mode (when servicing
the output) with discontinuous inductor current as illus­trated in Figures 3 and 4. During Burst Mode operation, the
control loop is nonlinear and cannot utilize the control

3440fa

9

LTC3440

OPERATIO

U

voltage from the error amp to determine the control mode,
therefore full-time 4-switch mode is required to maintain
the Buck/Boost function. The efficiency below 1mA
becomes dominated primarily by the quiescent current
and not the peak efficiency. The equation is given by:

Efficiency Burst

η

≈

25 A I

µ+

LOAD

LOAD

( bm) • I

where (ηbm) is typically 79% during Burst Mode opera­tion for an ESR of the inductor of 50mΩ. For 200mΩ of
inductor ESR, the peak efficiency (ηbm) drops to 75%.

V

IN

7

V

dI

A

3

SW1

B

IN

≈

dT

L

+–

L

5

GND

4

SW2

V

OUT

6

D

INDUCTOR

C

I

Burst Mode Operation to Fixed Frequency Transient
Response

When transitioning from Burst Mode operation to fixed
frequency, the system exhibits a transient since the modes
of operation have changed. For most systems this tran­sient is acceptable, but the application may have stringent
input current and/or output voltage requirements that
dictate a broad-band voltage loop to minimize the tran­sient. Lowering the DC gain of the loop will facilitate the
task (10M FB to V

) at the expense of DC load regulation.

C

Type 3 compensation is also recommended to broad band
the loop and roll off past the two pole response of the LC
of the converter (see Closing the Feedback Loop).

400mA

0mA

T1

3440 F03

Figure 3. Inductor Charge Cycle During Burst Mode Operation

V

IN

7

V

dI

A

3

SW1

B

OUT

≈ –

L

dT

–+

L

5

GND

4

SW2

V

OUT

6

D

400mA

INDUCTOR

C

I

0mA

T2

3440 F04

Figure 4. Inductor Discharge Cycle During Burst Mode Operation

3440fa

10

OPERATIO

LTC3440

U

SOFT-START

The soft-start function is combined with shutdown. When
the SHDN/SS pin is brought above typically 1V, the IC is

CHIP

pin.

C

15µA

enabled but the EA duty cycle is clamped from the V

V

IN

SOFT-START

CLAMP

V

TO PWM

COMPARATORS

CI

ENABLE

A detailed diagram of this function is shown in Figure 5.
The components R

and CSS provide a slow ramping

SS

voltage on the SHDN/SS pin to provide a soft-start
function.

ERROR AMP

V

1.22V

+

FB

–

9

V

C

10

SHDN/SS

8

C

+

1V

–

OUT

R1

P1

R2

R

SS

ENABLE SIGNAL

C

SS

3440 F05

Figure 5. Soft-Start Circuitry

WUUU

APPLICATIO S I FOR ATIO

COMPONENT SELECTION

LTC3440

R

1

T

MODE/SYNC

2

MULTIPLE

VIAS

L1

D1

GND

SW1

3

4

5

GND

SW2

D2

C2

Figure 6. Recommended Component Placement. Traces Carrying
High Current are Direct. Trace Area at FB and VC Pins are Kept
Low. Lead Length to Battery Should be Kept Short

SHDN/SS

V

V

OUT

V

10

C

FB

9

8

7

IN

6

C1

V

OUT

R1 R2

V

IN

3440 F06

Inductor Selection

The high frequency operation of the LTC3440 allows the
use of small surface mount inductors. The inductor cur­rent ripple is typically set to 20% to 40% of the maximum
inductor current. For a given ripple the inductance terms
are given as follows:

VVV

L

>

f I Ripple V

•••

L

>

f I Ripple V

•••

2

•–

IN MIN OUT IN MIN

() ()

OUT MAX OUT

VV V

OUT IN MAX OUT

OUT MAX IN MAX

()

()

•–

()

()

() ()

H

µ

,

2

µ

H

where f = operating frequency, MHz

3440fa

11

LTC3440

WUUU

APPLICATIO S I FOR ATIO

Ripple = allowable inductor current ripple
(e.g., 0.2 = 20%)

V
V
V
I

OUT(MAX)

= minimum input voltage, V

IN(MIN)

IN(MAX)

OUT

= maximum input voltage, V

= output voltage, V

= maximum output load current

For high efficiency, choose an inductor with a high fre­quency core material, such as ferrite, to reduce core loses.
The inductor should have low ESR (equivalent series

2

resistance) to reduce the I

R losses, and must be able to
handle the peak inductor current without saturating. Molded
chokes or chip inductors usually do not have enough core
to support the peak inductor currents in the 1A to 2A
region. To minimize radiated noise, use a toroid, pot core
or shielded bobbin inductor. See Table 1 for suggested
components and Table 2 for a list of component suppliers.

Table 1. Inductor Vendor Information

SUPPLIER PHONE FAX WEB SITE

Coilcraft [phone] [phone] www.coilcraft.com

Coiltronics [phone] [phone] www.coiltronics.com

Murata USA: USA: www.murata.com

[phone] [phone]
[phone]

Sumida USA: www.japanlink.com/

[phone] [phone] sumida
Japan:
81(3) 3607-5111 81(3) 3607-5144

Output Capacitor Selection

The bulk value of the capacitor is set to reduce the ripple
due to charge into the capacitor each cycle. The steady
state ripple due to charge is given by:

%_

Ripple Boost

Ripple Buck

%_

IVV

OUT MAX OUT IN MIN

=

IVV

() ()

OUT MAX IN MAX OUT

=

•– •

() ()

CV Vf

()

2

••

CV f

OUT OUT

•–•

()

•••

OUT IN MAX OUT

()

100

%

100

%

The output capacitance is usually many times larger in
order to handle the transient response of the converter.
For a rule of thumb, the ratio of the operating frequency to
the unity-gain bandwidth of the converter is the amount
the output capacitance will have to increase from the
above calculations in order to maintain the desired tran­sient response.

The other component of ripple is due to the ESR (equiva­lent series resistance) of the output capacitor. Low ESR
capacitors should be used to minimize output voltage
ripple. For surface mount applications, Taiyo Yuden ce­ramic capacitors, AVX TPS series tantalum capacitors or
Sanyo POSCAP are recommended.

Input Capacitor Selection

Since the V

pin is the supply voltage for the IC it is

IN

recommended to place at least a 4.7µF, low ESR bypass
capacitor.

Table 2. Capacitor Vendor Information

SUPPLIER PHONE FAX WEB SITE

AVX [phone] [phone] www.avxcorp.com

Sanyo [phone] [phone] www.sanyovideo.com

Taiyo Yuden [phone] [phone] www.t-yuden.com

Optional Schottky Diodes

To achieve a 1%-2% efficiency improvement above 50mW,
Schottky diodes can be added across synchronous switches
B (SW1 to GND) and D (SW2 to V

). The Schottky

OUT

diodes will provide a lower voltage drop during the break­before-make time (typically 15ns) of the NMOS to PMOS
transition. General purpose diodes such as a 1N914 are
not recommended due to the slow recovery times and will
compromise efficiency. If desired a large Schottky diode,
such as an MBRM120T3, can be used from SW2 to V

OUT

.
A low capacitance Schottky diode is recommended
from GND to SW1 such as a Phillips PMEG2010EA or
equivalent.

where C

12

= output filter capacitor, F

OUT

3440fa

WUUU

f

RCP

Hz

UG

=

π

1

211•• •

APPLICATIO S I FOR ATIO

LTC3440

Output Voltage > 4.3V

A Schottky diode from SW to V

is required for output

OUT

voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.

Input Voltage > 4.5V

For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a 2Ω/
1nF series snubber is required between the SW1 pin and
GND. A Schottky diode such as the Phillips PMEG2010EA
or equivalent from SW1 to VIN should also be added as
close to the pins as possible. For the higher input voltages
VIN bypassing becomes more critical, therefore, a ceramic
bypass capacitor as close to the VIN and GND pins as
possible is also required.

Operating Frequency Selection

There are several considerations in selecting the operating
frequency of the converter. The first is, what are the
sensitive frequency bands that cannot tolerate any spec­tral noise? For example, in products incorporating RF
communications, the 455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz and in
that case a 2MHz converter frequency may be employed.

Other considerations are the physical size of the converter
and efficiency. As the operating frequency goes up, the
inductor and filter capacitors go down in value and size.
The trade off is in efficiency since the switching losses due
to gate charge are going up proportional with frequency.

Additional quiescent current due to the output switches
GATE charge is given by:

Buck: 500e

Boost: 250e

Buck/Boost: F • (750e

–12

• VIN • F

–12

• (VIN + V

) • F

OUT

–12

• VIN + 250e

–12

• V

OUT

)

where F = switching frequency

Closing the Feedback Loop

The LTC3440 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(Buck, Boost, Buck-Boost), but is usually no greater than

15. The output filter exhibits a double pole response is
given by:

f

FILTER POLE

f

FILTER POLE

where C

_

_

is the output filter capacitor.

OUT

•• •

π12

LC

V

IN

••

π2

LV

OUT

OUT

()

Hz in Buck e

()

Hz in Boost e

mod=

mod=

The output filter zero is given by:

f

FILTER ZERO

where R

_

ESR

=

•• •

2

is the capacitor equivalent series resistance.

1

RC

π

ESR OUT

Hz

A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:

2

V

f

RHPZ

=

2• • • •

IN

ILV

π

OUT OUT

Hz

The loop gain is typically rolled off before the RHP zero
frequency.

A simple Type I compensation network can be incorpo­rated to stabilize the loop but at a cost of reduced band­width and slower transient response. To ensure proper
phase margin, the loop requires to be crossed over a
decade before the LC double pole.

The unity-gain frequency of the error amplifier with the
Type I compensation is given by:

Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a
higher bandwidth, Type III compensation is required. Two
zeros are required to compensate for the double-pole
response.

3440fa

13

LTC3440

WUUU

APPLICATIO S I FOR ATIO

f

POLE

≈

1

π

•• • •

232 1

1

3

eRC

P

Hz

1

Which is extremely close toDC

=

f

ZERO

1

2

ZERO

POLE

=

2

=

2

ERROR

AMP

f

f

Figure 7. Error Amplifier with Type I Compensation

1

π

•• •

RC

ZP

1

1

21

π

•• •

RC

Z

1

1

2

π

•• •

RC

ZP

1.22V

+

FB

9

–

V

C

10

2

Hz

Hz

C

P1

Hz

V

OUT

R1

R2

3440 F07

traces and external components. Following the recom­mendations for output voltage >4.3V and input voltage
>4.5V will improve this condition. Additional short-circuit
protection can be accomplished with some external cir­cuitry.
In an overload or short-circuit condition the LTC3440
voltage loop opens and the error amp control voltage on

pin slams to the upper clamp level. This condition

the V

C

forces boost mode operation in order to attempt to provide
more output voltage and the IC hits a peak switch current
limit of 2.7A. When switch current limit is reached switches
B and D turn on for the remainder of the cycle to reverse
the volts • seconds on the inductor. Although this prevents
current run away, this condition produces four switch
operation producing a current foldback characteristic and
the average input current drops. The IC is trimmed to
guarantee greater than 1A average input current to meet
the maximum load demand, but in a short-circuit or
overload condition the foldback characteristic will occur
producing higher peak switch currents. To minimize this
affect during this condition the following circuits can be
utilized.

V

OUT

1.22V

ERROR

AMP

+

FB

9

–

C

V

C

10

P1

R

Z

C

P2

3440 F08

C

R1

R2

Z1

Figure 8. Error Amplifier with Type III Compensation

Short-Circuit Improvements

The LTC3440 is current limited to 2.7A peak to protect the
IC from damage. At input voltages above 4.5V a current
limit condition may produce undesirable voltages to the IC
due to the series inductance of the package, as well as the

Restart Circuit

For a sustained short-circuit the circuit in Figure 9 will
force a soft-start condition. The only design constraint is
that R2/C2 time constant must be longer than the soft­start components R1/C1 to ensure start-up.

V

IN

R1

SOFT-START

SO/SS

4.7nF

1M

NMOS

VN2222

C1

D1

1N4148

M2

C2

10nF

Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit

M1

NMOS

VN2222

3440 F09

R2
1M

V

OUT

14

3440fa

WUUU

APPLICATIO S I FOR ATIO

LTC3440

Simple Average Input Current Control

A simple average current limit circuit is shown in
Figure 10. Once the input current of the IC is above
approximately 1A, Q1 will start sourcing current into the
FB pin and lower the output voltage to maintain the
average input current. Since the voltage loop is utilized to
perform average current limit, the voltage control loop is
maintained and the V

voltage does not slam. The averag-

C

ing function of current comes from the fact that voltage
loop compensation is also used with this circuit.

U

TYPICAL APPLICATIO S

3-Cell to 3.3V at 600mA Converter

L1

4.7µH

V

IN =

3 CELLS

D1

2.7V TO 4.5V

+

C1
10µF

*

3

SW1

7

V

8

SHDN/SS

2

MODE/SYNC

1

R

R

T

45.3k

LTC3440

IN

T

f

OSC

= 1.5MHz

SW2

V

OUT

GND

FB

V

C

INPUT_VOLTAGE

FB_PIN

C1

V1

10µF

Q1

2N3906

R1

0.5Ω

VIN_PIN

Figure 10. Simple Input Current Control
Utilizing the Voltage Loop

D2

C3

4

6

9

C4 150pF

R3 15k

10

5

C5 10pF

33pF

R1
340k

R2
200k

R5
10k

V

3.3V
600mA

C2
22µF

OUT

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY

100

90

Burst Mode
OPERATION

80

70

60

50

40

EFFICIENCY (%)

30

20

10

f

= 1.5MHz

OSC

0

0.1 10 100 1000

C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: CENTRAL SEMICONDUCTOR CMDSH2-3
L1: SUMIDA CDR43-4R7M

3-Cell to 3.3V Efficiency

VIN = 2.7V

VIN = 4.5V

VIN = 3.3V

1

OUTPUT CURRENT (mA)

3440 TA03b

3440 TA03a

3440fa

15

LTC3440

TYPICAL APPLICATIO S

U

3-Cell to 5V Boost Converter with Output Disconnect

2.7V TO 4.5V

V

IN =

R4 1M

+

3

CELLS

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
** LOCATE COMPONENTS AS

CLOSE TO IC AS POSSIBLE

C1
10µF

SD

C3

0.1µF

L1

10µH

3

*

SW1

7

V

8

SHDN/SS

2

MODE/SYNC

1

R

R

T

60.4k

IN

T

SW2

LTC3440

V

OUT

FB

V

GND

= 1MHz

f

OSC

C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-100

D1**

4

6

9

10

C

5

C4

1.5nF

15k

R1
619k

R2
200k

V
5V
300mA

C2**
22µF

3440 TA06a

OUT

Low Profile (<1.1mm) Li-Ion to 3.3V at 200mA Converter

L1

4.7µH

SW2

V

OUT

GND

4

6

9

FB

10

V

C

R3

5

15k

C4

1.5nF

= 2.5V TO 4.2V

V

IN

+

Li-Ion

C1

4.7µF

*

3

SW1

7

V

8

SHDN/SS

2

MODE/SYNC

1

R

R

T

30.1k

LTC3440

IN

T

R1
340k

R2
200k

3-Cell to 5V Boost Efficiency

100

90

Burst Mode
OPERATION

80

70

60

50

40

EFFICIENCY (%)

30

20

10

f

= 1MHz

OSC

0

0.1 10 100 1000

V

OUT

3.3V
200mA

C2

4.7µF

VIN = 4.5V

VIN = 3.6V

1
OUTPUT CURRENT (mA)

VIN = 2.7V

3440 TA06b

16

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY

= 2MHz

f

OSC

100

90

Burst Mode

80

OPERATION

70

60

VIN = 2.5V

50

40

EFFICIENCY (%)

30

20

10

0

0.1 10 100 1000

C1: TAIYO YUDEN JMK212BJ475MG
C2: TAIYO YUDEN JMK212BJ475MG
L1: COILCRAFT LPO1704-472M

Efficiency

VIN = 4.2V

VIN = 3.3V

1
OUTPUT CURRENT (mA)

3440 TA04b

3440 TA04a

3440fa

TYPICAL APPLICATIO S

WCDMA Power Amp Power Supply with Dynamic Voltage Control

L1

3.3µH

SW2

V

GND

OUT

4

6

9

FB

10

V

C

5

V

2.5V TO 4.2V

IN =

+

Li-Ion

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
** LOCATE COMPONENTS AS

CLOSE TO IC AS POSSIBLE

C1
10µF

*

R

30.1k

3

SW1

7

V

IN

8

SHDN/SS

2

MODE/SYNC

1

R

T

T

f

OSC

LTC3440

= 2MHz

C1, C2: TAIYO YUDEN JMK212BJ106MM
D1: ON SEMICONDUCTOR MBRM120T3
L1: SUMIDA CDRH4D28-3R3

U

D1**

R3 15k

C4 150pF

C5 10pF

DAC

340k

LTC3440

Efficiency of the WCDMA

Power Amp Power Supply

V

= 3.3V – 1.7V • (V

OUT

C3
33pF

R1

R5
10k

R6

200k

R2
200k

3440 TA07a

V

OUT

0.4V TO 5V

C2**
10µF

DAC

– 1.22V)

100

V

= 3.4V

OUT

98

96

94

92

90

88

EFFICIENCY (%)

86

84

82

80

2.5

I

I

= 250mA

OUT

I

= 600mA

OUT

3

3.5

INPUT VOLTAGE (V)

OUT

= 100mA

4

4.5

5

3440 TA07b

2.5V TO 5.5V

USB/PCMCIA POWER

500mA MAX

GSM Modem Powered from USB or PCMCIA with 500mA Input Current Limit

L1

10µH

3

C1
10µF

*

7

8

2

1

R

T

60.4k

SW1

LTC3440

V

IN

SHDN/SS

MODE/SYNC

R

T

R

0.1Ω

S

V

IN

+

R4

1/2 LT1490A

1k

–

2N3906

SW2

V

GND

OUT

FB

V

C

4

6

9

10

5

I

CURRENTLIMIT

C5

10nF

1.22 • R4

=

R5 • R

R6

130k

1N914

1/2 LT1490A

+

–

R5
24k

C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH-4D28-100
*1 = Burst Mode OPERATION

S

0 = FIXED FREQUENCY

R1
392k

R2
200k

V

OUT

3.6V
2A
(PULSED)

C6 TO C9
470µF
×4

3440 TA08

3440fa

17

LTC3440

PACKAGE DESCRIPTIO

U

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699)

3.50 ±0.05

0.675 ±0.05

1.65 ±0.05
(2 SIDES)2.15 ±0.05

PACKAGE
OUTLINE

0.25 ± 0.05

2.38 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

(2 SIDES)

0.50
BSC

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

R = 0.115

TYP

3.00 ±0.10
(4 SIDES)

0.75 ±0.05

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

1.65 ± 0.10
(2 SIDES)

0.00 – 0.05

2.38 ±0.10
(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

106

15

0.50 BSC

0.38 ± 0.10

0.25 ± 0.05

(DD10) DFN 1103

18

3440fa

PACKAGE DESCRIPTIO

U

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1661)

0.889

± 0.127

(.035 ± .005)

LTC3440

5.23

(.206)

MIN

0.305 ± 0.038

(.0120 ± .0015)

TYP

RECOMMENDED SOLDER PAD LAYOUT

0.254

(.010)

GAUGE PLANE

0.18

(.007)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3.20 – 3.45

(.126 – .136)

DETAIL “A”

DETAIL “A”

0.50

(.0197)

BSC

0° – 6° TYP

0.53 ± 0.152
(.021 ± .006)

SEATING

PLANE

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

4.90 ± 0.152

(.193 ± .006)

0.17 – 0.27

(.007 – .011)

TYP

1.10

(.043)

MAX

12

0.50

(.0197)

BSC

0.497 ± 0.076

6

45

(.0196 ± .003)

REF

3.00 ± 0.102
(.118 ± .004)

(NOTE 4)

0.86

(.034)

REF

0.127

± 0.076

(.005 ± .003)

MSOP (MS) 0603

8910

7

3

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

3440fa

19

LTC3440

TYPICAL APPLICATIO

Li-Ion to 3.3V at 600mA Buck-Boost Converter

L1

10µH

3

SW1

2.8V TO 4.2V

V

IN =

+

Li-Ion

*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY

C1
10µF

*

LTC3440

7

V

IN

8

SHDN/SS

2

MODE/SYNC

1

R

T

R

T

60.4k

C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
L1: SUMIDA CDRH4D28-100

RELATED PARTS

SW2

V

GND

OUT

FB

V

C

U

4

6

9

C5 300pF

10

5

R3

15k

R1
340k

R2
200k

220pF

2.2k

C2
22µF

3440 TA01

V

OUT

3.3V
600mA

100

90

Burst Mode

OPERATION

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

0.1 10 100 10001.0

Efficiency

VIN = 4.2V

= 3.3V

V

IN

OUTPUT CURRENT (mA)

3440 TA05

PART NUMBER DESCRIPTION COMMENTS

LT1613 550mA(ISW), 1.4MHz, High Efficiency Step-Up 90% Efficiency, VIN: 0.9V to 10V, V

DC/DC Converter I

= <1µA, ThinSOTTM Package

SD

LT1618 1.5A(ISW), 1.25MHz, High Efficiency Step-Up 90% Efficiency, VIN: 1.6V to 18V, V

DC/DC Converter I

LTC1877 600mA(I

), 550kHz, Synchronous Step-Down 95% Efficiency, VIN: 2.7V to 10V, V

OUT

DC/DC Converter I

LTC1878 600mA(I

), 550kHz, Synchronous Step-Down 95% Efficiency, VIN: 2.7V to 6V, V

OUT

DC/DC Converter I

LTC1879 1.2A(I

), 550kHz, Synchronous Step-Down 95% Efficiency, VIN: 2.7V to 10V, V

OUT

DC/DC Converter I

LT1961 1.5A(ISW), 1.25MHz, High Efficiency Step-Up 90% Efficiency, VIN: 3V to 25V, V

DC/DC Converter I

= <1µA, MS10 Package

SD

= <1µA, MS8 Package

SD

= <1µA, MS8 Package

SD

= <1µA, TSSOP16 Package

SD

= 6µA, MS8E Package

SD

OUT(MIN)

LTC3400/LTC3400B 600mA(ISW), 1.2MHz, Synchronous Step-Up 92% Efficiency, VIN: 0.85V to 5V, V

DC/DC Converter I

= <1µA, ThinSOT Package

SD

LTC3401 1A(ISW), 3MHz, Synchronous Step-Up 97% Efficiency, VIN: 0.5V to 5V, V

DC/DC Converter I

= <1µA, MS10 Package

SD

LTC3402 2A(ISW), 3MHz, Synchronous Step-Up 97% Efficiency, VIN: 0.5V to 5V, V

DC/DC Converter I

LTC3405/LTC3405A 300mA(I

DC/DC Converter I

LTC3406/LTC3406B 600mA(I

DC/DC Converter I

LTC3411 1.25A(I

DC/DC Converter I

LTC3412 2.5A(I

OUT

DC/DC Converter I

LTC3441/LTC3443 1.2A(I

OUT

Buck-Boost DC/DC Converter I

), 1.5MHz, Synchronous Step-Down 95% Efficiency, VIN: 2.7V to 6V, V

OUT

), 1.5MHz, Synchronous Step-Down 95% Efficiency, VIN: 2.5V to 5.5V, V

OUT

), 4MHz, Synchronous Step-Down 95% Efficiency, VIN: 2.5V to 5.5V, V

OUT

), 4MHz, Synchronous Step-Down 95% Efficiency, VIN: 2.5V to 5.5V, V

), 1MHz/0.6MHz, Micropower Synchronous 95% Efficiency, VIN: 2.4V to 5.5V, V

= <1µA, MS10 Package

SD

= <1µA, ThinSOT Package

SD

= <1µA, ThinSOT Package

SD

= <1µA, MS10 Package

SD

= <1µA, TSSOP16E Package

SD

= 25µA, ISD = <1µA, DFN Package

Q

ThinSOT is a trademark of Linear Technology Corporation.

Linear Technology Corporation

20

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

© LINEAR TECHNOLOGY CORPORATION 2001

= 34V, IQ = 3mA,

OUT(MIN)

= 35V, IQ = 1.8mA,

OUT(MIN)

= 0.8V, IQ = 10µA,

OUT(MIN)

= 0.8V, IQ = 10µA,

OUT(MIN)

= 0.8V, IQ = 15µA,

OUT(MIN)

= 35V, IQ = 0.9mA,

= 5V, IQ = 19µA/300µA,

OUT(MIN)

= 6V, IQ = 38µA,

OUT(MIN)

= 6V, IQ = 38µA,

OUT(MIN)

= 0.8V, IQ = 20µA,

OUT(MIN)

= 0.6V, IQ = 20µA,

OUT(MIN)

= 0.8V, IQ = 60µA,

OUT(MIN)

= 0.8V, IQ = 60µA,

OUT(MIN)

: 2.4V to 5.25V,

OUT(MIN)

LT/TP 1004 1K REV A • PRINTED IN USA

3440fa