interface. A low-drift, on-chip reference and 14-bit ΔΣ A/D
converter allow precise measurements of supply voltages,
load currents or internal die temperature. Fault manage-
⎯A⎯L⎯E⎯R⎯
ment allows
T to be asserted for confi gurable over
and under voltage fault conditions. Two voltage buffered,
8-bit IDACs allow highly accurate programming of DC/DC
converter output voltages. The IDACs can be confi gured
to automatically servo the power supplies to the desired
voltages using the ADC. The LTC2970-1 adds a tracking
feature that can be used to turn multiple power supplies
on or off in a controlled manner.
The bus address is set to 1 of 9 possible combinations by
pin strapping the ASEL0 and ASEL1 pins. The LTC2970/
LTC2970-1 are packaged in the 24-lead, 4mm × 5mm
QFN package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
TYPICAL APPLICATIO
Dual Power Supply Monitor and Controller (One of Two Channels Shown)
8V TO 15V
12V
IN
V
IN
IN
DC/DC
CONVERTER
RUN/SS
SGND
GND
OUT
1/2 LTC2970
I+
I–
FB
LOAD
V
IN0_BM
V
IN0_BP
V
OUT0
V
IN0_AP
I
OUT0
V
IN0_AM
GND
ASEL0 ASEL1
V
GPIO_CFG
ALERT
SCL
SDA
GPIO_0
REF
ADC Total Unadjusted Error
vs Temperature
0.50
0.1μF
DD
0.1μF
2
C BUS
I
SMBUS
()
COMPATIBLE
0.1μF
29701 TA01
15 PARTS MOUNTED ON PCB
0.25
0
ERROR (%)
–0.25
–0.50
–25050
–50
25
TEMPERATURE (°C)
ADC VIN = 5V
75
29701 TA01b
100
29701fc
1
LTC2970/LTC2970-1
WW
W
U
ABSOLUTE AXIU RATIGS
(Notes 1 and 2)
Supply Voltages:
......................................................... –0.3V to 6V
V
DD
.................................................... –0.3V to 15V
12V
IN
Digital Input/Output Voltages:
ASEL0, ASEL1 ............................ –0.3V to V
SDA, SCL, GPIO_CFG,
⎯A⎯L⎯E⎯R⎯
T, GPIO_0, GPIO_1 .......................... –0.3V to 6V
Analog Voltages:
V
IN0_AP
V
IN0_BM
V
IN1_BP
I
OUT0
, I
, V
, V
, V
OUT1
IN0_AM
IN1_AP
IN1_BM
, V
, V
, V
IN0_BP
IN1_AM
, V
OUT0
,
,
.............. –0.3V to 6V
OUT1
, REF ......................... –0.3V to V
RGND .................................................... –0.3V to 0.3V
Operating Temperature Range:
LTC2970C ................................................ 0°C to 70°C
LTC2970I ............................................. –40°C to 85°C
Storage Temperature Range ...................–65°C to 125°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
+ 0.3V
DD
+ 0.3V
DD
PIN CONFIGURATION
TOP VIEW
RGND
REF
ASEL0
ASEL1
24 23 22 21 20
1
V
IN0_AP
V
2
IN0_AM
V
3
IN0_BP
4
V
IN0_BM
V
5
IN1_AP
6
V
IN1_AM
7
V
IN1_BP
24-LEAD (4mm × 5mm) PLASTIC QFN
T
EXPOSED PAD (PIN 25) IS GND MUST BE SOLDERED TO PCB
JMAX
25
8 9
10 11 12
IN
DD
V
OUT0VOUT1
12V
IN1_BM
V
UFD PACKAGE
= 125°C, θJA = 37°C/W
V
GPIO_CFG
19
SDA
18
SCL
17
ALERT
16
GPIO_0
15
GPIO_1
14
I
13
I
OUT0
OUT1
ORDER INFORMATION
LEAD FREE FINISHTAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC2970CUFD#PBFLTC2970CUFD#TRPBF297024-Lead (4mm × 5mm) Plastic DFN0°C to 70°C
LTC2970CUFD-1#PBFLTC2970CUFD-1#TRPBF2970124-Lead (4mm × 5mm) Plastic DFN0°C to 70°C
LTC2970IUFD#PBFLTC2970IUFD#TRPBF297024-Lead (4mm × 5mm) Plastic DFN–40°C to 85°C
LTC2970IUFD-1#PBFLTC2970IUFD-1#TRPBF2970124-Lead (4mm × 5mm) Plastic DFN–40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
2
29701fc
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
C
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
2
C Interface Timing Characteristics
I
f
SCL
t
LOW
t
HIGH
t
BUF
t
HD,STA
t
SU,STA
t
SU,STO
t
HD,DAT
t
SU,DAT
t
SP
t
SETUP_GPIO
t
HOLD_GPIO
t
OUT_GPIO
Internal Timers
t
TIMEOUT_SMB
t
SETUP_ADC
t
TIMEOUT_
SYNC
t
HOLD_TRACK
Serial Clock Frequency(Note 6)
Serial Clock Low Period(Note 6)
Serial Clock High Period(Note 6)
Bus Free Time Between Stop and Start(Note 6)
Start Condition Hold Time(Note 6)
Start Condition Setup Time(Note 6)
Stop Condition Setup Time(Note 6)
Data Hold Time (LTC2970 Receiving Data)
Data Hold Time (LTC2970 Transmitting Data)
Data Setup Time (LTC2970 Receiving Data)(Note 6)
Pulse Width of Spike Suppressed(Note 6)
GPIO_0 and GPIO_1 Setup TimeGPIO_0 and GPIO_1 input setup time
GPIO_0 and GPIO_1 Hold TimeGPIO_0 and GPIO_1 input hold time
GPIO_0 and GPIO_1 Output TimeGPIO_0 and GPIO_1 output delay after
Stuck BUS TimerThe LTC2970 will release the I2C bus and
ADC Channel Setup TimeAfter selecting a new ADC channel, the
Tracking SYNC Failure TimerLTC2970-1 Only: The LTC2970-1 will
Tracking IDAC Disconnect DelayLTC2970-1 Only: After the tracking
= 25°C.
A
(Note 6)
prior to the 26th rising SCL of an IO()
2
I
C read. These inputs must be valid and
stable by this time to be returned in the
IO() read result. (Note 6)
after the 26th rising SCL of an IO() I
read. These inputs must be held until
this amount of time has elapsed to be
returned in the IO() read result. (Note 6)
the 35th rising SCL of an I
2
C write. These
outputs will become high impedance or
begin driving low by this time. (Note 6)
terminate the current command if the
command is not completed before this
amount of time has elapsed.
LTC2970 will wait this amount of time
to allow the analog input to settle before
beginning an ADC conversion.
abort a pending SYNC() command if a
tracking command is not received before
this amount of time has elapsed.
algorithm asserts CPIO_CFG low, the
LTC2970-1 will delay disconnecting the
IDACs from the power supply feedback
nodes by this amount of time. Used while
tracking power supplies on.
●
10400kHz
●
1.3μs
●
0.6μs
●
1.3μs
●
600ns
●
600ns
●
600ns
●
0
300900
●
100ns
●
●
2.5μs
●
2
C
2.5μs
●
98ns
2.5μs
ns
ns
243239ms
304μs
255ms
32ms
29701fc
5
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
t
SETUP_TRACK
t
DEC_TRACK
Tracking IDAC Disconnect DelayLTC2970-1 Only: After the tracking
Tracking IDAC Decrement RateLTC2970-1 Only: The LTC2970-1 changes
= 25°C.
A
algorithm asserts CPIO_CFG high, the
LTC2970-1 will wait this amount of time
before starting to decrement Chn_a_
delay_track[9:0]. Used while tracking
power supplies off.
Chn_a_delay_track[9:0] at this rate.
32ms
88μs/LSB
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specifi ed.
Note 3: TUE (%) is defi ned as:
%
INLV LSB V
+
+500
μ
V
IN
OS
•Gain Error
100
(•/)
TIMING DIAGRAM
The I2C Bus Specifi cation
SDA
t
SU;DAT
t
f
SCL
t
f
t
LOW
t
r
Note 4: Integral nonlinearity (INL) is defi ned as the deviation of a code
from a straight line passing through the actual endpoints (0V and 6V)
of the transfer curve. The deviation is measured from the center of the
quantization band.
Note 5: Nonlinearity is defi ned from the fi rst code that is greater than or
equal to the maximum offset specifi cation to code 255 (full-scale).
Note 6: Maximum capacitive load, C
clock risetime (t
(20 + 0.1 • C
) and falltime (tf) are: (20 + 0.1 • CB)(ns) < tr < 300ns and
r
)(ns) < tf < 300ns. CB = capacitance of one bus line in pF.
B
SCL and SDA external pull-up voltage, V
, for SCL and SDA is 400pF. Data and
B
, is 3V < VIO < 5.5V.
IO
Note 7: This specifi cation is guaranteed by design.
t
HD;STA
t
SP
t
t
r
BUF
6
START
CONDITION
t
HD;STA
t
HD;DAT
t
HIGH
t
SU;STA
REPEATED START
CONDITION
t
SU;STO
STOP
CONDITION
START
CONDITION
29701 TD
29701fc
0
UW
TYPICAL PERFOR A CE CHARACTERISTICS
ADC Total Unadjusted Error
vs TemperatureADC INLADC DNL
0.050
0.025
0
–0.025
–0.050
–0.075
ERROR (%)
–0.100
–0.125
–0.150
–0.175
BASED ON AVERAGE OF 15 PARTS
ASSEMBLED ON 1/8" THICK PCB
3.3V
ADC VIN = 5V
0
–50
–25
2510
TEMPERATURE (oC)
1V
1.8V
2.5V
50
75
29701 G01
2.5
2.0
1.5
1.0
0.5
ERROR (LSBs)
0
–0.5
–1.0
0
12
INPUT VOLTAGE (V)
46
35
LTC2970/LTC2970-1
1.00
0.75
0.50
0.25
0
–0.25
ERROR (LSBs)
–0.50
–0.75
–1.00
29701 G02
124
0
INPUT VOLTAGE (V)
3
5
6
29701 G03
ADC Zero Code Center Offset
Voltage vs Temperature
–305
–310
–315
(MV)
–320
OS
V
–325
–330
–335
–50
–25
ADC Noise Histogram
10,000,000
1,000,000
NUMBER OF READINGS
VIN = 0V
100000
10,000
1000
100
10
02550
TEMPERATURE (oC)
75100
29701 G04
ADC Rejection vs Frequency
at V
IN
0
–10
–20
–30
–40
–50
–60
REJECTION (dB)
–70
–80
–90
–100
1
10
100
FREQUENCY AT VIN (Hz)
Voltage Buffered IDAC INL
0.50
CHANNELS 0 AND 1 SHOWN
= R
IOUT1
= 10k7
R
IOUT0
0.25
0
ERROR (LSBs)
–0.25
1000
10000
29701 G05
ADC Rejection vs Frequency
at V
IN
0
–10
–20
–30
–40
–50
–60
REJECTION (dB)
–70
–80
–90
–100
5000
0
15000 20000
10000
FREQUENCY AT VIN (Hz)
Voltage Buffered IDAC DNL
0.50
CHANNELS 0 AND 1 SHOWN
= R
R
IOUT0
0.25
0
ERROR (LSBs)
–0.25
IOUT1
= 10k7
25000
30000
29701 G06
1
–102
–2
OUTPUT CODE (LSBs)
1
29701 G07
–0.50
50
0
100
DAC CODE
150
200
29701 G08
250
–0.50
50
0
100
DAC CODE
150
200
250
29701 G09
29701fc
7
LTC2970/LTC2970-1
0
UW
TYPICAL PERFOR A CE CHARACTERISTICS
IDAC Output Current
vs Temperature
257.4
IDAC CODE = 'hff
= 13kΩ
R
IOUT
257.2
257.0
256.8
256.6
OUTPUT CURRENT (μA)
256.4
256.2
–50
02550
–25
TEMPERATURE (°C)
Voltage Buffered IDAC Load
Regulation Sinking
0.35
V
= 0.1V
IOUT
0.30
0.25
0.20
0.15
0.10
OUTPUT VOLTAGE (V)
7510
29701 G10
90oC
25oC
–45oC
V
Offset Voltage
OUTn
vs Temperature
1.620
IDAC CODE = 'h00
1.615
1.610
1.605
1.600
OFFSET VOLTAGE (mV)
1.595
1.590
–50
02550
–25
TEMPERATURE (oC)
Voltage Buffered IDAC Transient
Response to 1LSB DAC Code Change
100k7 SERIES RESISTANCE ON V
R
= 10k7
IOUT
CODE 'h7f
10mV PER DIVISION
75100
29701 G11
OUTn
CODE 'h80
Voltage Buffered IDAC Load
Regulation Sourcing
3.500
3.498
3.496
3.494
OUTPUT VOLTAGE (V)
3.492
V
= 3.5V
IOUTn
3.490
–2
0
–4
CURRENT (mA)
Voltage Buffered IDAC SoftConnect Transient Response
100k7 SERIES RESISTANCE ON V
R
= 10k7
IOUT
CODE 'h80
HIGH-Z
10mV PER DIVISION
–6
CONNECTED
–8
OUTn
25oC
–45oC
90oC
–10
29701 G12
0.05
0
246 10
0
CURRENT (mA)
Voltage Buffered IDAC Transient
Response During Transition from
On State to High-Z State
100k7 SERIES RESISTANCE ON V
R
= 10k7
IOUT
HIGH-Z
CONNECTED
10mV PER DIVISION
10Ms PER DIVISION
OUTn
8
5Ms PER DIVISION
Regulator Output Voltage
= 12V
= 0A
50100
–250
2575
TEMPERATURE (oC)
29701 G15
29701 G18
29701fc
29701 G13
29701 G16
1Ms PER DIVISION
Temperature Sensor Error
vs Temperature
1.5
1.0
0.5
0
ERROR (oC)
–0.5
–1.0
–1.5
–50
02550
–25
TEMPERATURE (oC)
29701 G14
75100
29701 G17
V
vs Temperature
4.945
V
I
VDD
4.944
4.943
4.942
(V)
DD
V
4.941
4.940
4.939
4.938
–50
DD
12VIN
8
UW
TYPICAL PERFOR A CE CHARACTERISTICS
VDD Regulator Load Regulation
0
–100
–200
–300
(ppm)
–400
DD
ΔV
–500
–600
–700
V
= 12V
12VIN
–800
–1–2–4
0
CURRENT (mA)
–45°C
25°C90°C
–3
29701 G19
(ppm)
DD
–100
ΔV
–200
–300
–400
–500
–5
Regulator Line Regulation
V
DD
400
NO LOAD ON V
300
200
100
0
25°C
8
–45°C
9
90°C
DD
1015
10
V
12VIN
(V)
12
1314
UUU
PI FUCTIOS
LTC2970/LTC2970-1
VDD Regulator Short-Circuit
Current vs Temperature
–25
V
= 12V
12VIN
= 0V
V
DD
–30
–35
SHORT-CIRCUIT CURRENT (mA)
–40
–50
–2502550
TEMPERATURE (°C)
29701 G20
75100
29701 G21
V
(Pin 1): Positive CH0_A ADC Multiplexer Input.
IN0_AP
The output of the differential, 7:1 multiplexer connects to
the input of the ADC. CH0_A can be confi gured to servo
IDAC0.
V
(Pin 2): Negative CH0_A ADC Multiplexer Input.
IN0_AM
The output of the differential, 7:1 multiplexer connects to
the input of the ADC. CH0_A can be confi gured to servo
IDAC0.
V
(Pin 3): Positive CH0_B ADC Multiplexer Input. The
IN0_BP
output of the differential, 7:1 multiplexer connects to the
input of the ADC. CH0_B is a voltage monitor input only.
V
(Pin 4): Negative CH0_B ADC Multiplexer Input.
IN0_BM
The output of the differential, 7:1 multiplexer connects to the
input of the ADC. CH0_B is a voltage monitor input only.
V
(Pin 5): Positive CH1_A ADC Multiplexer Input.
IN1_AP
The output of the differential, 7:1 multiplexer connects to
the input of the ADC. CH1_A can be confi gured to servo
IDAC1.
V
(Pin 6): Negative CH1_A ADC Multiplexer Input.
IN1_AM
The output of the differential, 7:1 multiplexer connects to
the input of the ADC. CH1_A can be confi gured to servo
IDAC1.
V
(Pin 7): Positive CH1_B ADC Multiplexer Input. The
IN1_BP
output of the differential, 7:1 multiplexer connects to the
input of the ADC. CH1_B is a voltage monitor input only.
V
(Pin 8): Negative CH1_B ADC Multiplexer Input.
IN1_BM
The output of the differential, 7:1 multiplexer connects to the
input of the ADC. CH1_B is a voltage monitor input only.
(Pin 9): VDD Power Supply, Voltage Monitor Input,
V
DD
and Internal 5V Regulator Output. The supply input range
is 4.5V to 5.75V. The V
to the ADC through an internal mux. Bypass the V
to device ground with a 100nF capacitor (C
input voltage supply is available, fl oat the V
power the LTC2970 from the 12V
(Pin 10): 12V Power Supply and Voltage Monitor
12V
IN
Input. An internal regulator generates 5V from 12V
input range for 12V
pin voltage can be connected
DD
pin
DD
). If no 5V
VDD
pin and
DD
pin.
IN
. The
IN
is 8V to 15V. Bypass this pin with a
IN
100nF capacitor. The regulator’s output is connected to the
pin. The 12VIN pin voltage can also be monitored by
V
DD
the ADC through a 3:1 attenuator and the internal mux. If
no 12V supply input is available, tie the 12V
to the VDD
IN
pin and operate from 4.5V to 5.75V.
(Pin 11): CH0 Voltage Output. Buffered version of
V
OUT0
IDAC0 output voltage.
29701fc
9
LTC2970/LTC2970-1
UUU
PI FUCTIOS
V
(Pin 12): CH1 Voltage Output. Buffered version of
OUT1
IDAC1 output voltage.
(Pin 13): IDAC1 Current Output. Connect a resistor
I
OUT1
between this pin and the point-of-load ground for channel
1. The IDAC sources between 0 and 255μA.
(Pin 14): IDAC0 Current Output. Connect a resistor
I
OUT0
between this pin and the point-of-load ground for channel
0. The IDAC sources between 0 and 255μA.
GPIO_1 (Pin 15): General Purpose Input or Open Drain
Digital Output. GPIO_1 can be confi gured as the IDAC
Fault or Faults output, a digital input, or an open-drain
digital output.
GPIO_0 (Pin 16): General Purpose Input or Open Drain
Digital Output. GPIO_0 can be confi gured as the voltage
monitor power-good or power-good bar output, a digital
input, or a programmable open-drain output. Power good
is the NOR of all instantaneous OV and UV faults; it does
not include IDAC faults.
⎯A⎯L⎯E⎯R⎯
T (Pin 17): Open Drain Digital Output. Connect the
⎯A⎯L⎯E⎯R⎯
SMBALERT signal to this pin.
either IDAC0 or IDAC1 rails out (optional), or when one
of the monitored voltages ventures outside its UV and OV
thresholds (also optional).
SCL (Pin 18): Serial Bus Clock Input.
T is asserted low when
SDA (Pin 19): Serial Bus Data Input and Output.
GPIO_CFG (Pin 20): GPIO Confi guration Digital Input and
Open Drain Output. Pulling GPIO_CFG high will cause the
GPIO_0 and GPIO_1 open-drain outputs to automatically
assert low after a power-on reset. If GPIO_CFG is pulled
low, then GPIO_0 and GPIO_1 do not assert low after
power-up.
ASEL1 (Pin 21): Slave Address Select Bit 1. Tie this pin to
the V
location (see Table 2).
ASEL0 (Pin 22): Slave Address Select Bit 0. Tie this pin to
the V
location (see Table 2).
REF (Pin 23): Internal Reference Output or ADC Reference
Overdrive Input. The voltage at this pin determines the
full-scale input voltage of the delta-sigma ADC (V
SCALE
decouples the reference output from this pin. Bypass this
pin to RGND with a 100nF capacitor (C
RGND (Pin 24): Reference Ground. Connect to device
ground.
GND (Pin 25): Device Ground. Must be soldered to
ground.
pin, ground, or fl oat in order to select the address
DD
pin, ground, or fl oat in order to select the address