LINEAR TECHNOLOGY LTC2970, LTC2970-1 Technical data

FEATURES
LTC2970/LTC2970-1
Dual I2C Power
Supply Monitor and
Margining Controller
U
DESCRIPTIO
Less Than ±0.5% Total Unadjusted Error 14-Bit ΔΣ
ADC with On-Chip Reference
Dual, 8-Bit IDACs with 1x Voltage Buffers
Linear, Voltage Servo Adjusts Supply Voltages by
Ramping IDAC Outputs Up/Down
I2C™ Bus Interface (SMBus Compatible)
Extensive, User Confi gurable Fault Monitoring
On-Chip Temperature Sensor
Available in 24-Lead 4mm × 5mm QFN Package
U
APPLICATIO S
Dual Power Supply Voltage Servo
Monitoring Supply Voltage and Current
Programmable Power Supplies
Programmable Reference
The LTC®2970 is a dual power supply monitor and
2
margining controller with an SMBus compatible I
C bus
interface. A low-drift, on-chip reference and 14-bit ΔΣ A/D converter allow precise measurements of supply voltages, load currents or internal die temperature. Fault manage-
⎯A⎯L⎯E⎯R⎯
ment allows
T to be asserted for confi gurable over and under voltage fault conditions. Two voltage buffered, 8-bit IDACs allow highly accurate programming of DC/DC converter output voltages. The IDACs can be confi gured to automatically servo the power supplies to the desired voltages using the ADC. The LTC2970-1 adds a tracking feature that can be used to turn multiple power supplies on or off in a controlled manner.
The bus address is set to 1 of 9 possible combinations by pin strapping the ASEL0 and ASEL1 pins. The LTC2970/ LTC2970-1 are packaged in the 24-lead, 4mm × 5mm QFN package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
TYPICAL APPLICATIO
Dual Power Supply Monitor and Controller (One of Two Channels Shown)
8V TO 15V
12V
IN
V
IN
IN
DC/DC
CONVERTER
RUN/SS
SGND
GND
OUT
1/2 LTC2970
I+
I–
FB
LOAD
V
IN0_BM
V
IN0_BP
V
OUT0
V
IN0_AP
I
OUT0
V
IN0_AM
GND
ASEL0 ASEL1
V
GPIO_CFG
ALERT
SCL
SDA
GPIO_0
REF
ADC Total Unadjusted Error
vs Temperature
0.50
0.1μF
DD
0.1μF
2
C BUS
I
SMBUS
()
COMPATIBLE
0.1μF
29701 TA01
15 PARTS MOUNTED ON PCB
0.25
0
ERROR (%)
–0.25
–0.50
–25 0 50
–50
25
TEMPERATURE (°C)
ADC VIN = 5V
75
29701 TA01b
100
29701fc
1
LTC2970/LTC2970-1
WW
W
U
ABSOLUTE AXI U RATI GS
(Notes 1 and 2)
Supply Voltages:
......................................................... –0.3V to 6V
V
DD
.................................................... –0.3V to 15V
12V
IN
Digital Input/Output Voltages:
ASEL0, ASEL1 ............................ –0.3V to V
SDA, SCL, GPIO_CFG,
⎯A⎯L⎯E⎯R⎯
T, GPIO_0, GPIO_1 .......................... –0.3V to 6V
Analog Voltages:
V
IN0_AP
V
IN0_BM
V
IN1_BP
I
OUT0
, I
, V
, V
, V
OUT1
IN0_AM
IN1_AP
IN1_BM
, V , V , V
IN0_BP IN1_AM
, V
OUT0
,
,
.............. –0.3V to 6V
OUT1
, REF ......................... –0.3V to V
RGND .................................................... –0.3V to 0.3V
Operating Temperature Range:
LTC2970C ................................................ 0°C to 70°C
LTC2970I ............................................. –40°C to 85°C
Storage Temperature Range ...................–65°C to 125°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
+ 0.3V
DD
+ 0.3V
DD
PIN CONFIGURATION
TOP VIEW
RGND
REF
ASEL0
ASEL1
24 23 22 21 20
1
V
IN0_AP
V
2
IN0_AM
V
3
IN0_BP
4
V
IN0_BM
V
5
IN1_AP
6
V
IN1_AM
7
V
IN1_BP
24-LEAD (4mm × 5mm) PLASTIC QFN
T
EXPOSED PAD (PIN 25) IS GND MUST BE SOLDERED TO PCB
JMAX
25
8 9
10 11 12
IN
DD
V
OUT0VOUT1
12V
IN1_BM
V
UFD PACKAGE
= 125°C, θJA = 37°C/W
V
GPIO_CFG
19
SDA
18
SCL
17
ALERT
16
GPIO_0
15
GPIO_1
14
I
13
I
OUT0
OUT1
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2970CUFD#PBF LTC2970CUFD#TRPBF 2970 24-Lead (4mm × 5mm) Plastic DFN 0°C to 70°C
LTC2970CUFD-1#PBF LTC2970CUFD-1#TRPBF 29701 24-Lead (4mm × 5mm) Plastic DFN 0°C to 70°C
LTC2970IUFD#PBF LTC2970IUFD#TRPBF 2970 24-Lead (4mm × 5mm) Plastic DFN –40°C to 85°C
LTC2970IUFD-1#PBF LTC2970IUFD-1#TRPBF 29701 24-Lead (4mm × 5mm) Plastic DFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
2
29701fc
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T C
= 100nF and C
VDD
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power-Supply Characteristics
I
I
V
V
V12
DD
LKO
DD
12VIN Supply Current V
VDD Supply Current VDD = 5V, V
VDD Undervoltage Lockout VDD Ramping-Down, V
V
DD
Supply Input Operating Range
Regulator Output Voltage 8V ≤ V
Regulator Output Voltage Temperature Coeffi cient
Regulator Output Voltage Load Regulation
Regulator Line Regulation 8V ≤ V
Regulator Output Short-Circuit Current V
V
12VIN
12VIN Supply Operating Range
Voltage Reference Characteristics
V
REF
Reference Output Voltage 1.229 V
Reference Voltage Temperature Coeffi cient
Reference Overdrive Voltage Input Range
ADC Characteristics
N_ADC Resolution N_ADC = 8.192V/16384 500 μV/LSB
TUE_ADC Total Unadjusted Error V
INL_ADC Integral Nonlinearity (Note 4)
DNL_ADC Differential Nonlinearity (Note 7)
V
IN_ADC
V
OS_ADC
Input Voltage Range
Offset Error
Offset Error Drift 0.19 μV/°C
GAIN_ADC Gain Error Full-Scale V
Gain Error Drift 3 ppm/°C
T
CONV_ADC
C
IN_ADC
F
IN_ADC
I
LEAK_ADC
Conversion Time 33.3 ms
Input Sampling Capacitance 3pF
Input Sampling Frequency 61.4 kHz
Input Leakage Current 0V < VIN < 6V
IDAC Output Current Characteristics
N_I
OUT
INL_I
OUT
DNL_I
I
FS-IOUT
I
DRIFT-IOUT
I
OS-IOUT
Resolution (Guaranteed Monotonic) 8 Bits
Integral Nonlinearity V
Differential Nonlinearity V
OUT
Full-Scale Output Current V
Output Current Drift DAC Code = 'hff 32 ppm/°C
Offset Current DAC Code = 'h00
= 100nF.
REF
Undervoltage Lockout Hysteresis 118 mV
= 25°C. V
A
= 12V, VDD Floating
12VIN
12VIN
–1mA ≤ I
12VIN
= 12V, VDD = 0V
12VIN
= 3V, VIN = V
IN
< VDD – 1.5V
IOUTn
< VDD – 1.5V
IOUTn
< VDD – 1.5V, DAC Code = 'hff
IOUTn
12VIN
= V
12VIN
DD
≤ 15V, –1mA ≤ I
≤ 0 160 ppm/mA
VDD
≤ 15V, I
VDD
INn_xP
= 6V
IN
= 12V, VDD and REF pins fl oating unless otherwise indicated,
12VIN
= V
VDD
DD
≤ 0
3.7 4.14 4.4 V
4.5 5.75 V
4.75 4.95 5.25 V
= 0mA 80 ppm/V
–5 –34 –63 mA
815V
11.5V
– V
INn_xM
(Note 3)
–4.5 2 4.5 LSB
06V
–1000 –316 1000 μV
–236 –255 –276 μA
4.24 7.5 mA
3.7 5 mA
10 ppm/°C
2 ppm/°C
±0.5 %
±0.5 LSB
±0.4 %
±0.1 μA
±1 LSB
±1 LSB
±0.1 μA
29701fc
3
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
= 100nF and C
C
VDD
= 100nF.
REF
= 25°C. V
A
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Voltage Buffered IDAC Output Characteristics
INL_V
DNL_V
V
OS-VOUT
V
OUT
OUT
Integral Nonlinearity R
Differential Nonlinearity R
OUT
Offset Voltage VOS = V
Output Voltage Drift No Load on V
Load Regulation 0.1V < V
Leakage Current V
Short-Circuit Current Low V
Short-Circuit Current High V
= 10kΩ, No Load on V
IOUTn
= 10kΩ, No Load on V
IOUTn
– V
OUTn
OUTn
< VDD – 1.5V, I
OUTn
0.1V < V
OUTn
OUTn
OUTn
< VDD – 1.5V, I
OUTn
High-Z, 0V ≤ V
Shorted to GND
Shorted to V
Soft Connect Comparator Characteristics (CMP0, CMP1)
V
OS
Offset Voltage ±3 mV
Temperature Sensor Characteristics
TMP Gain 0.25 °C/LSB
Voltage Divider Characteristics
12V
IN
GAIN_12V
Gain
IN
Digital Inputs SCL, SDA, GPIO_CFG, GPIO_0, GPIO_1
V
IH
Input High Threshold Voltage SDA, SCL
GPIO_CFG, GPIO_0, GIPO_1
V
IL
Input Low Threshold Voltage SDA, SCL
GPIO_CFG, GPIO_0, GIPO_1
V
I
LEAK
C
HYST
IN
Input Hysteresis 0.08 V
Input Leakage Current 0V ≤ VIN ≤ 6V
Input Capacitance 10 pF
Three State Inputs ASEL[1:0]
V
IH_ASEL
V
IL_ASEL
I
IN,HL
I
IN,Z
Open Drain Outputs SDA, GPIO_CFG, GPIO_0, GPIO_1,
V
OL
I
OH
Input High Threshold Voltage
Input Low Threshold Voltage
High, Low Input Current ASEL[1:0] = 0, V
High Z Input Current
⎯A⎯L⎯E⎯R⎯
T
Output Low Voltage I
SINK
= 3mA
Input Leakage Current 0V ≤ VIN ≤ 6V
= 12V, VDD and REF pins fl oating unless otherwise indicated,
12VIN
1.6 ±10 mV
, No Load on V
IOUTn
OUTn
OUTn
(Note 5)
(Note 5)
OUTn
0.17 μV/°C
Source = 1mA –57 ppm/mA
VOUTn
Sink = 1mA 100 ppm/mA
VOUTn
0.329 0.333 0.335 V/V
1.5 V
1.0 V
0.5 V
±2 μA
1 ±100 nA
VDD – 0.5 V
DD
DD
OUTn
≤ V
DD
±1 LSB
±1 LSB
–50 mA
50 mA
2.1 V
1.6 V
±1 μA
±20 μA
0.4 V
±1 μA
4
29701fc
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
2
C Interface Timing Characteristics
I
f
SCL
t
LOW
t
HIGH
t
BUF
t
HD,STA
t
SU,STA
t
SU,STO
t
HD,DAT
t
SU,DAT
t
SP
t
SETUP_GPIO
t
HOLD_GPIO
t
OUT_GPIO
Internal Timers
t
TIMEOUT_SMB
t
SETUP_ADC
t
TIMEOUT_
SYNC
t
HOLD_TRACK
Serial Clock Frequency (Note 6)
Serial Clock Low Period (Note 6)
Serial Clock High Period (Note 6)
Bus Free Time Between Stop and Start (Note 6)
Start Condition Hold Time (Note 6)
Start Condition Setup Time (Note 6)
Stop Condition Setup Time (Note 6)
Data Hold Time (LTC2970 Receiving Data) Data Hold Time (LTC2970 Transmitting Data)
Data Setup Time (LTC2970 Receiving Data) (Note 6)
Pulse Width of Spike Suppressed (Note 6)
GPIO_0 and GPIO_1 Setup Time GPIO_0 and GPIO_1 input setup time
GPIO_0 and GPIO_1 Hold Time GPIO_0 and GPIO_1 input hold time
GPIO_0 and GPIO_1 Output Time GPIO_0 and GPIO_1 output delay after
Stuck BUS Timer The LTC2970 will release the I2C bus and
ADC Channel Setup Time After selecting a new ADC channel, the
Tracking SYNC Failure Timer LTC2970-1 Only: The LTC2970-1 will
Tracking IDAC Disconnect Delay LTC2970-1 Only: After the tracking
= 25°C.
A
(Note 6)
prior to the 26th rising SCL of an IO()
2
I
C read. These inputs must be valid and stable by this time to be returned in the IO() read result. (Note 6)
after the 26th rising SCL of an IO() I read. These inputs must be held until this amount of time has elapsed to be returned in the IO() read result. (Note 6)
the 35th rising SCL of an I
2
C write. These outputs will become high impedance or begin driving low by this time. (Note 6)
terminate the current command if the command is not completed before this amount of time has elapsed.
LTC2970 will wait this amount of time to allow the analog input to settle before beginning an ADC conversion.
abort a pending SYNC() command if a tracking command is not received before this amount of time has elapsed.
algorithm asserts CPIO_CFG low, the LTC2970-1 will delay disconnecting the IDACs from the power supply feedback nodes by this amount of time. Used while tracking power supplies on.
10 400 kHz
1.3 μs
0.6 μs
1.3 μs
600 ns
600 ns
600 ns
0
300 900
100 ns
2.5 μs
2
C
2.5 μs
98 ns
2.5 μs
ns ns
24 32 39 ms
304 μs
255 ms
32 ms
29701fc
5
LTC2970/LTC2970-1
The ● denotes the specifi cations which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
SETUP_TRACK
t
DEC_TRACK
Tracking IDAC Disconnect Delay LTC2970-1 Only: After the tracking
Tracking IDAC Decrement Rate LTC2970-1 Only: The LTC2970-1 changes
= 25°C.
A
algorithm asserts CPIO_CFG high, the LTC2970-1 will wait this amount of time before starting to decrement Chn_a_ delay_track[9:0]. Used while tracking power supplies off.
Chn_a_delay_track[9:0] at this rate.
32 ms
88 μs/LSB
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specifi ed.
Note 3: TUE (%) is defi ned as:
%
INL V LSB V
+
+500
μ
V
IN
OS
Gain Error
100
(• / )
TIMING DIAGRAM
The I2C Bus Specifi cation
SDA
t
SU;DAT
t
f
SCL
t
f
t
LOW
t
r
Note 4: Integral nonlinearity (INL) is defi ned as the deviation of a code from a straight line passing through the actual endpoints (0V and 6V) of the transfer curve. The deviation is measured from the center of the quantization band.
Note 5: Nonlinearity is defi ned from the fi rst code that is greater than or equal to the maximum offset specifi cation to code 255 (full-scale).
Note 6: Maximum capacitive load, C clock risetime (t (20 + 0.1 • C
) and falltime (tf) are: (20 + 0.1 • CB)(ns) < tr < 300ns and
r
)(ns) < tf < 300ns. CB = capacitance of one bus line in pF.
B
SCL and SDA external pull-up voltage, V
, for SCL and SDA is 400pF. Data and
B
, is 3V < VIO < 5.5V.
IO
Note 7: This specifi cation is guaranteed by design.
t
HD;STA
t
SP
t
t
r
BUF
6
START
CONDITION
t
HD;STA
t
HD;DAT
t
HIGH
t
SU;STA
REPEATED START
CONDITION
t
SU;STO
STOP
CONDITION
START
CONDITION
29701 TD
29701fc
0
UW
TYPICAL PERFOR A CE CHARACTERISTICS
ADC Total Unadjusted Error vs Temperature ADC INL ADC DNL
0.050
0.025
0
–0.025
–0.050
–0.075
ERROR (%)
–0.100
–0.125
–0.150
–0.175
BASED ON AVERAGE OF 15 PARTS ASSEMBLED ON 1/8" THICK PCB
3.3V
ADC VIN = 5V
0
–50
–25
25 10
TEMPERATURE (oC)
1V
1.8V
2.5V
50
75
29701 G01
2.5
2.0
1.5
1.0
0.5
ERROR (LSBs)
0
–0.5
–1.0
0
12
INPUT VOLTAGE (V)
46
35
LTC2970/LTC2970-1
1.00
0.75
0.50
0.25
0
–0.25
ERROR (LSBs)
–0.50
–0.75
–1.00
29701 G02
12 4
0
INPUT VOLTAGE (V)
3
5
6
29701 G03
ADC Zero Code Center Offset Voltage vs Temperature
–305
–310
–315
(MV)
–320
OS
V
–325
–330
–335
–50
–25
ADC Noise Histogram
10,000,000
1,000,000
NUMBER OF READINGS
VIN = 0V
100000
10,000
1000
100
10
02550
TEMPERATURE (oC)
75 100
29701 G04
ADC Rejection vs Frequency at V
IN
0
–10
–20
–30
–40
–50
–60
REJECTION (dB)
–70
–80
–90
–100
1
10
100
FREQUENCY AT VIN (Hz)
Voltage Buffered IDAC INL
0.50
CHANNELS 0 AND 1 SHOWN
= R
IOUT1
= 10k7
R
IOUT0
0.25
0
ERROR (LSBs)
–0.25
1000
10000
29701 G05
ADC Rejection vs Frequency at V
IN
0
–10
–20
–30
–40
–50
–60
REJECTION (dB)
–70
–80
–90
–100
5000
0
15000 20000
10000
FREQUENCY AT VIN (Hz)
Voltage Buffered IDAC DNL
0.50
CHANNELS 0 AND 1 SHOWN
= R
R
IOUT0
0.25
0
ERROR (LSBs)
–0.25
IOUT1
= 10k7
25000
30000
29701 G06
1
–1 0 2
–2
OUTPUT CODE (LSBs)
1
29701 G07
–0.50
50
0
100
DAC CODE
150
200
29701 G08
250
–0.50
50
0
100
DAC CODE
150
200
250
29701 G09
29701fc
7
LTC2970/LTC2970-1
0
UW
TYPICAL PERFOR A CE CHARACTERISTICS
IDAC Output Current vs Temperature
257.4
IDAC CODE = 'hff
= 13kΩ
R
IOUT
257.2
257.0
256.8
256.6
OUTPUT CURRENT (μA)
256.4
256.2
–50
02550
–25
TEMPERATURE (°C)
Voltage Buffered IDAC Load Regulation Sinking
0.35
V
= 0.1V
IOUT
0.30
0.25
0.20
0.15
0.10
OUTPUT VOLTAGE (V)
75 10
29701 G10
90oC
25oC
–45oC
V
Offset Voltage
OUTn
vs Temperature
1.620
IDAC CODE = 'h00
1.615
1.610
1.605
1.600
OFFSET VOLTAGE (mV)
1.595
1.590
–50
02550
–25
TEMPERATURE (oC)
Voltage Buffered IDAC Transient Response to 1LSB DAC Code Change
100k7 SERIES RESISTANCE ON V R
= 10k7
IOUT
CODE 'h7f
10mV PER DIVISION
75 100
29701 G11
OUTn
CODE 'h80
Voltage Buffered IDAC Load Regulation Sourcing
3.500
3.498
3.496
3.494
OUTPUT VOLTAGE (V)
3.492
V
= 3.5V
IOUTn
3.490 –2
0
–4
CURRENT (mA)
Voltage Buffered IDAC Soft­Connect Transient Response
100k7 SERIES RESISTANCE ON V R
= 10k7
IOUT
CODE 'h80
HIGH-Z
10mV PER DIVISION
–6
CONNECTED
–8
OUTn
25oC
–45oC
90oC
–10
29701 G12
0.05
0
246 10
0
CURRENT (mA)
Voltage Buffered IDAC Transient Response During Transition from On State to High-Z State
100k7 SERIES RESISTANCE ON V R
= 10k7
IOUT
HIGH-Z
CONNECTED
10mV PER DIVISION
10Ms PER DIVISION
OUTn
8
5Ms PER DIVISION
Regulator Output Voltage
= 12V
= 0A
50 100
–25 0
25 75
TEMPERATURE (oC)
29701 G15
29701 G18
29701fc
29701 G13
29701 G16
1Ms PER DIVISION
Temperature Sensor Error vs Temperature
1.5
1.0
0.5
0
ERROR (oC)
–0.5
–1.0
–1.5
–50
02550
–25
TEMPERATURE (oC)
29701 G14
75 100
29701 G17
V vs Temperature
4.945
V I
VDD
4.944
4.943
4.942
(V)
DD
V
4.941
4.940
4.939
4.938
–50
DD
12VIN
8
UW
TYPICAL PERFOR A CE CHARACTERISTICS
VDD Regulator Load Regulation
0
–100
–200
–300
(ppm)
–400
DD
ΔV
–500
–600
–700
V
= 12V
12VIN
–800
–1 –2 –4
0
CURRENT (mA)
–45°C
25°C90°C
–3
29701 G19
(ppm)
DD
–100
ΔV
–200
–300
–400
–500
–5
Regulator Line Regulation
V
DD
400
NO LOAD ON V
300
200
100
0
25°C
8
–45°C
9
90°C
DD
10 15
10
V
12VIN
(V)
12
13 14
UUU
PI FU CTIO S
LTC2970/LTC2970-1
VDD Regulator Short-Circuit Current vs Temperature
–25
V
= 12V
12VIN
= 0V
V
DD
–30
–35
SHORT-CIRCUIT CURRENT (mA)
–40
–50
–25 0 25 50
TEMPERATURE (°C)
29701 G20
75 100
29701 G21
V
(Pin 1): Positive CH0_A ADC Multiplexer Input.
IN0_AP
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH0_A can be confi gured to servo IDAC0.
V
(Pin 2): Negative CH0_A ADC Multiplexer Input.
IN0_AM
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH0_A can be confi gured to servo IDAC0.
V
(Pin 3): Positive CH0_B ADC Multiplexer Input. The
IN0_BP
output of the differential, 7:1 multiplexer connects to the input of the ADC. CH0_B is a voltage monitor input only.
V
(Pin 4): Negative CH0_B ADC Multiplexer Input.
IN0_BM
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH0_B is a voltage monitor input only.
V
(Pin 5): Positive CH1_A ADC Multiplexer Input.
IN1_AP
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH1_A can be confi gured to servo IDAC1.
V
(Pin 6): Negative CH1_A ADC Multiplexer Input.
IN1_AM
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH1_A can be confi gured to servo IDAC1.
V
(Pin 7): Positive CH1_B ADC Multiplexer Input. The
IN1_BP
output of the differential, 7:1 multiplexer connects to the input of the ADC. CH1_B is a voltage monitor input only.
V
(Pin 8): Negative CH1_B ADC Multiplexer Input.
IN1_BM
The output of the differential, 7:1 multiplexer connects to the input of the ADC. CH1_B is a voltage monitor input only.
(Pin 9): VDD Power Supply, Voltage Monitor Input,
V
DD
and Internal 5V Regulator Output. The supply input range is 4.5V to 5.75V. The V to the ADC through an internal mux. Bypass the V to device ground with a 100nF capacitor (C input voltage supply is available, fl oat the V power the LTC2970 from the 12V
(Pin 10): 12V Power Supply and Voltage Monitor
12V
IN
Input. An internal regulator generates 5V from 12V input range for 12V
pin voltage can be connected
DD
pin
DD
). If no 5V
VDD
pin and
DD
pin.
IN
. The
IN
is 8V to 15V. Bypass this pin with a
IN
100nF capacitor. The regulator’s output is connected to the
pin. The 12VIN pin voltage can also be monitored by
V
DD
the ADC through a 3:1 attenuator and the internal mux. If no 12V supply input is available, tie the 12V
to the VDD
IN
pin and operate from 4.5V to 5.75V.
(Pin 11): CH0 Voltage Output. Buffered version of
V
OUT0
IDAC0 output voltage.
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LTC2970/LTC2970-1
UUU
PI FU CTIO S
V
(Pin 12): CH1 Voltage Output. Buffered version of
OUT1
IDAC1 output voltage.
(Pin 13): IDAC1 Current Output. Connect a resistor
I
OUT1
between this pin and the point-of-load ground for channel
1. The IDAC sources between 0 and 255μA.
(Pin 14): IDAC0 Current Output. Connect a resistor
I
OUT0
between this pin and the point-of-load ground for channel
0. The IDAC sources between 0 and 255μA.
GPIO_1 (Pin 15): General Purpose Input or Open Drain Digital Output. GPIO_1 can be confi gured as the IDAC Fault or Faults output, a digital input, or an open-drain digital output.
GPIO_0 (Pin 16): General Purpose Input or Open Drain Digital Output. GPIO_0 can be confi gured as the voltage monitor power-good or power-good bar output, a digital input, or a programmable open-drain output. Power good is the NOR of all instantaneous OV and UV faults; it does not include IDAC faults.
⎯A⎯L⎯E⎯R⎯
T (Pin 17): Open Drain Digital Output. Connect the
⎯A⎯L⎯E⎯R⎯
SMBALERT signal to this pin. either IDAC0 or IDAC1 rails out (optional), or when one of the monitored voltages ventures outside its UV and OV thresholds (also optional).
SCL (Pin 18): Serial Bus Clock Input.
T is asserted low when
SDA (Pin 19): Serial Bus Data Input and Output.
GPIO_CFG (Pin 20): GPIO Confi guration Digital Input and
Open Drain Output. Pulling GPIO_CFG high will cause the GPIO_0 and GPIO_1 open-drain outputs to automatically assert low after a power-on reset. If GPIO_CFG is pulled low, then GPIO_0 and GPIO_1 do not assert low after power-up.
ASEL1 (Pin 21): Slave Address Select Bit 1. Tie this pin to the V location (see Table 2).
ASEL0 (Pin 22): Slave Address Select Bit 0. Tie this pin to the V location (see Table 2).
REF (Pin 23): Internal Reference Output or ADC Reference Overdrive Input. The voltage at this pin determines the full-scale input voltage of the delta-sigma ADC (V
SCALE
decouples the reference output from this pin. Bypass this pin to RGND with a 100nF capacitor (C
RGND (Pin 24): Reference Ground. Connect to device ground.
GND (Pin 25): Device Ground. Must be soldered to ground.
pin, ground, or fl oat in order to select the address
DD
pin, ground, or fl oat in order to select the address
DD
= 6.65 • V
, typically). An internal 3.5k resistor
REF
).
REF
FULL-
10
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BLOCK DIAGRA
LTC2970/LTC2970-1
W
IN0_AP
IN0_AM
IN0_BP
IN0_BM
IN1_AP
IN1_AM
IN1_BP
IN1_BM
1012V
IN
9V
DD
25GND
2R
R
12V
P
12V
M
V
DDP
V
DDM
5V REGULATOR
V
V
OUT
IN
IDAC0 8 BITS
V
DD
+
V
DD
VBUF0
0μA TO 255μA
+
CMP0
14 I
11 V
OUT0
OUT0
TEMP
SENSOR
1V
2V
3V
4V
5V
6V
7V
8V
23REF
24RGND
18SCL
19SDA
(400kHz, SMBUS COMPATIBLE)
22ASEL0
21ASEL1
16GPIO_0
DAC SOFT CONNECT FUNCTION
15GPIO_1
17ALERT
20GPIO_CFG
MANAGE FAULT REPORTING
TRACKING CONTROL (LT2970-1)
TSNSP
TSNSM
CH0_AP
CH0_AM
CH0_BP
CH0_BM
CH1_AP
CH1_AM
CH1_BP
CH1_BM
7:1 MUX
I2C BUS INTERFACE
SERVO CONTROLLER
SERVO FUNCTION
MONITOR FUNCTION
WATCH DOG
POR
POR
+
DELTA-SIGMA
6.65X (TYP)
OSCILLATOR
14-BIT
A/D
POR
ADC
CLOCKS
3.5k
7
2
UVLO
V
DD
REFERENCE
1.229V (TYP)
20Ω
CLOCK
GENERATION
IDAC1 8 BITS
+
VBUF1
RAM
ADC_Results MONITOR LIMITS SERVO TARGETS
REGISTERS
I/O CONFIGURATION IDAC0 IDAC1 ADC MONITOR FAULT ENABLE INSTANTANEOUS FAULTS LATCHED FAULTS
0μA TO 255μA
+
CMP1
13 I
OUT1
12 V
OUT1
18
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