14-Bit ADC Measures Voltage, Current
and Temperature
n
1% Voltage, Current and Charge Accuracy
n
±50mV Sense Voltage Range
n
High Side Sense
n
I2C Interface/SMBus Interface
n
General Purpose Measurements for Any Battery
Chemistry and Capacity
n
Configurable Alert Output/Charge Complete Input
n
Quiescent Current Less Than 150µA
n
Small 8-Lead 3mm × 3mm DFN Package
applicaTions
n
Electric and Hybrid Electric Vehicles
n
Power Tools
n
Electric Bicycles, Motorcycles, Scooters
n
High Power Portable Equipment
n
Photo Voltaics
n
Backup Battery Systems
The LT C®2944 measures battery charge state, battery volt-
age, battery current and its own temperature in portable
product
applications. The wide input voltage range allows
use with multicell batteries up to 60V. A precision coulomb
counter integrates current through a sense resistor between
the battery’s positive terminal and the load or charger.
Voltage, current and temperature are measured with an
internal 14-bit No Latency ΔΣ™ ADC. The measurements
are stored in internal registers accessible via the onboard
2
C/SMBus Interface.
I
The LTC2944 features programmable high and low thresholds for
threshold
all four measured quantities. If a programmed
is exceeded, the device communicates an alert
using either the SMBus alert protocol or by setting a flag
in the internal status register. The LTC2944 requires only
a single low value sense resistor to set the measured
current range.
All registered trademarks and trademarks are the property of their respective owners.
LTC2944
Typical applicaTion
ALCC
SDA
SCL
CHARGER
LTC2944
SENSE
SENSE
GND
3.3V
2k2k2k
V
DD
µP
1A
LOAD
1µF
+
R
SENSE
–
50mΩ
+
MULTICELL
Li-ION
2944 TA01a
For more information www.linear.com/LTC2944
Total Charge Error vs
Differential Sense Voltage
3
2
1
0
–1
CHARGE ERROR (%)
–2
–3
0.1
V
SENSE
+
= 3.6V TO 60V
110100
V
(mV)
SENSE
2944fa
1
Page 2
LTC2944
(Notes 1, 2)
pin conFiguraTionabsoluTe MaxiMuM raTings
Supply Voltage (SENSE+) ........................... –0.3V to 65V
SCL, SDA, ALC C Voltage .............................. –0.3V to 6V
SENSE
–
...............(–0.3V + V
SENSE
+
) to (V
SENSE
+
+ 0.3V)
Operating Ambient Tempera tur e Range
LTC2944C ............................................... 0°C to 70°C
LTC2944I ............................................–40°C to 85°C
GND
GND
SCL
TOP VIEW
+
1SENSE
2
3
4
9
8
7
6
5
SENSE
GND
ALCC
SDA
–
Storage Temperature Range .................. –65°C to 150°C
8-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 9) PCB GND CONNECTION OP
orDer inForMaTion
http://www.linear.com/product/LTC2944#orderinfo
LEAD FREE FINISHTAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC2944CDD#PBFLTC2944CDD#TRPBFLGCR8-Lead (3mm × 3mm) Plastic DFN0°C to 70°C
LTC2944IDD#PBFLTC2944IDD#TRPBFLGCR8-Lead (3mm × 3mm) Plastic DFN–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
DD PACKAGE
= 150°C, θJA = 100°C/W
T
JMAX
TIONAL
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
Power Requirements
+
V
SENSE
I
SUPPLY
I
SENSE
I
SENSE
V
UVLO
Supply Voltage
Supply Current (Note 3)Battery Gas Gauge On, ADC Sleep
+
Pin Current (Note 3)Battery Gas Gauge On, ADC Sleep
–
Pin Current (Note 3)Battery Gas Gauge On, ADC Sleep
Undervoltage Lockout ThresholdV
Coulomb Counter
V
SENSE
Sense Voltage Differential Input
Range
R
IDR
Differential Input Resistance Across
SENSE
q
LSB
Charge LSB (Note 4)Prescaler M = 4096(Default), R
+
and SENSE– (Note 8)
Battery Gas Gauge On, ADC On
Shutdown
Battery Gas Gauge On, ADC On
Shutdown
Battery Gas Gauge On, ADC On
Shutdown
+
Falling
SENSE
V
SENSE
+
– V
SENSE
–
= 50mΩ0.340mAh
SENSE
l
l
l
l
l
l
3.660V
80
850
15
80
500
15
1
350
1
150
950
30
µA
µA
µA
µA
µA
µA
µA
µA
µA
3.03.53.6V
±50mV
400kΩ
2944fa
2
For more information www.linear.com/LTC2944
Page 3
LTC2944
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
The l denotes the specifications which apply over the full operating
elecTrical characTerisTics
temperature range, otherwise specifications are at TA = 25°C.
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
2
C Timing Characteristics
I
f
SCL(MAX)
t
BUF(MAX)
t
SU(STA(MIN))
t
HD(STA(MIN))
t
SU(STO(MIN))
t
SU(DAT(MIN))
T
HD(DAT(MIN))
T
HDDATO
T
OF
Maximum SCL Clock Frequency
Bus Free Time Between Stop/Start
Minimum Repeated Start Set-Up
Time
Minimum Hold Time (Repeated)
Start Condition
Minimum Set-Up Time for Stop
Condition
Minimum Data Setup Time Input
Minimum Data Hold Time Input
Data Hold Time Input Output
Data Output Fall Time(Notes 7, 8)
l
400900kHz
l
l
l
l
l
l
l
l
0.30.9µs
20 + 0.1 • C
B
1.3µs
600ns
600ns
600ns
100ns
50ns
300ns
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
Note 3. I
flowing in SENSE
SENSE
= I
SUPPLY
–
pin as well. Typically, I
conversion and I
+
SENSE
+
pin. Only during ADC conversions current is flowing in
–
= 20µA during ADC current conversion.
SENSE
+ I
–
. In most operating modes I
SENSE
SENSE
–
= V
–
/150k during ADC voltage
SENSE
SUPPLY
is
Note 4. The equivalent charge of an LSB in the accumulated charge
register depends on the value of R
and the setting of the internal
SENSE
prescaling factor M:
q
= 0.340mAh • (50mΩ/R
LSB
) • (M/4096):
SENSE
TiMing DiagraM
SDA
t
SCL
t
HD(STA)
SU(DAT)
t
HD(DAT0)
t
HD(DAT1)
See Choosing R
and Choosing Coulomb Counter Prescaler M section
SENSE
for more information. 1mAh = 3.6C (Coulombs)
Note 5. Deviation of q
from its nominal value.
LSB
Note 6. The quantization step of the 14-bit ADC in voltage mode, 12-bit
ADC in current mode and 11-bit ADC in temperature mode is not the same
as the LSB of the respective combined 16-bit registers. See the Voltage,
Current
and Temperature Registers section for more information.
Note 7.
C
= Capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF).
B
Note 8. Guaranteed by design, not subject to test.
Note 9. See "Effect of Differential Offset Voltage on Total Charge Error”
section.
t
OF
t
t
SU(STA)
t
HD(STA)
t
SU(STO)
BUF
2944 TD01
START
CONDITION
4
REPEATED START
CONDITION
Figure 1. Definition of Timing on I2C Bus
For more information www.linear.com/LTC2944
STOP
CONDITION
START
CONDITION
2944fa
Page 5
Typical perForMance characTerisTics
2944 G08
2944 G07
LTC2944
Total Charge Error vs Differential
Sense Voltage
3
2
1
0
–1
CHARGE ERROR (%)
–2
–3
0.1
V
SENSE
+
= 3.6V TO 60V
110100
V
(mV)
SENSE
Supply Current vs Supply Voltage
110
100
90
80
(µA)
70
SUPPLY
I
60
50
TA = 85°C
TA = 25°C
TA = –40°C
2944 G01
Total Charge Error vs Supply
Voltage
1.00
0.75
0.50
0.25
0
–0.25
CHARGE ERROR (%)
–0.50
–0.75
–1.00
0
V
= 10mV
SENSE
V
= 50mV
SENSE
1070
2030405060
V
SENSE
Shutdown Supply Current
vs Supply Voltage
30
25
20
(µA)
15
SIPPLY
I
10
5
–
(V)
TA = 85°C
TA = 25°C
TA = –40°C
2944 G02
Total Charge Error vs
Temperature
1.00
0.75
0.50
0.25
0
–0.25
CHARGE ERROR (%)
–0.50
–0.75
–1.00
–50
V
SENSE
V
SENSE
–250
TEMPERATURE (°C)
= 10mV
= 50mV
Voltage Measurement ADC
Total Unadjusted Error
1.0
0.5
0
TUE (%)
–0.5
TA = –45°C
TA = 25°C
25
50
TA = 85°C
75
100
2944 G03
40
0
1020
406070
3050
+
V
(V)
SENSE
2944 G04
Voltage Measurement ADC
Integral Nonlinearity
3
2
1
)
LSB
0
INL (V
–1
–2
–3
0
TA = –45°C
102040
30
V
SENSE
–
(V)
TA = 85°C
TA = 25°C
506070
0
0
20
10
30
V
SENSE
40
50
+
(V)
60
2944 G05
Current Measurement ADC
Gain Error
1.0
0.5
0
GAIN ERROR (%)
–0.5
–1.0
10
0
For more information www.linear.com/LTC2944
TA = –45°C
TA = 85°C
20
30405060
V
SENSE
–
(V)
TA = 25°C
70
–1.0
40
0
10
30
20
V
SENSE
50
–
(V)
60
70
2944 G06
Current Measurement ADC
Integral Nonlinearity
1.0
0.5
)
LSB
0
INL (I
–0.5
–1.0
70
–60–40–20204060
V
SENSE
+
= 30V
V
SENSE
0
(mV)
2943 G09
2944fa
5
Page 6
LTC2944
2944 G12
2943 G10
Typical perForMance characTerisTics
Temperature Error vs Temperature
3
2
1
0
–1
TEMPERATURE ERROR (°C)
–2
–3
–50–25
+
V
= 3.6V
SENSE
+
= 5.5V
V
SENSE
+
= 20V
V
SENSE
+
= 60V
V
SENSE
0755025100
TEMPERATURE (°C)
Voltage Measurements Noise
900
800
700
600
500
400
COUNTS
300
200
100
0
–2–1210
pin FuncTions
SENSE+ (Pin 1): Positive Current Sense Input and Power
Supply. Connect to load/charger side of the sense resistor.
+
V
an input to the ADC during current measurement. Bypass
to GND with a 1µF capacitor located as close to pin 1 and
pin 2 as possible.
GND (Pin 2, Pin 3, Pin 7): Device Ground. Connect directly
to the negative battery terminal.
SCL (Pin 4): Serial Bus Clock Input. SCL is internally pulled
up with 50µA (typ) above its logic input high threshold to
about 2V (typ).
SDA (Pin 5): Serial Bus Data Input and Output. SDA is
internally pulled up with 50µA (typ) above its logic input
high threshold to about 2V (typ).
operating range is 3.6V to 60V. SENSE+ is also
SENSE
Current Measurements Noise
450
800 READINGS
400
350
300
250
200
COUNTS
150
100
50
0
–2–12103
4.32mV/LSB
2944 G11
–3
31.25µV/LSB
ALCC (Pin 6): Alert Output or Charge Complete Input.
Configured either as an SMBus alert output or charge
complete input by control register bits B[2:1]. At power-up,
the pin defaults to alert mode conforming to the SMBus
alert response protocol. It behaves as an open-drain logic
output that pulls to GND when any threshold register value
is exceeded. When configured as a charge complete input,
connect to the charge complete output from the battery
charger circuit. A low
level at CC sets the value of the
accumulated charge (registers C, D) to FFFFh.
–
SENSE
SENSE
resistor. The voltage between SENSE
(Pin 8): Negative Current Sense Input. Connect
–
to the positive battery terminal side of the sense
–
and SENSE+ must
remain within ±50mV in normal operation. SENSE
an input to the ADC during voltage and current measurement.
–
is also
6
Exposed
Pad (Pin 9): Exposed pad may be left open or
connected to device ground (GND).
For more information www.linear.com/LTC2944
2944fa
Page 7
block DiagraM
2944 BD
LTC2944
1
8
7
2
3
SENSE
SENSE
GND
GND
GND
V
SUPPLY
+
ACCUMULATED
COULOMB COUNTER
REF
TEMPERATURE
SENSOR
–
MUX
REFERENCE
GENERATOR
IN
REF
+
–
CLK
OSCILLATOR
F = 10kHz
CLKREF
ADC
CHARGE
REGISTER
DATA AND
CONTROL
REGISTERS
CC
2
C/
I
SMBUS
LTC2944
ALALCC
SCL
SDA
6
4
5
For more information www.linear.com/LTC2944
2944fa
7
Page 8
LTC2944
operaTion
Overview
The LTC2944 is a battery gas gauge designed for use
with multicell batteries with terminal voltages from 3.6V
to 60V. It measures battery charge and discharge, battery
voltage, current and its own temperature.
A precision analog coulomb counter integrates current
through a sense resistor between the battery’s positive
terminal and the load or charger. Battery voltage, battery
current and silicon temperature are measured with an
internal ADC.
Coulomb Counter
Charge is the time integral of current. The LTC2944 measures charge
a sense resistor. The differential voltage between SENSE
and SENSE
by monitoring the voltage developed across
–
is applied to an auto-zeroed differential analog
+
integrator to infer charge.
When the integrator output ramps to REFHI or REFLO
levels, switches S1, S2, S3 and S4 toggle to reverse the
ramp direction (Figure 2). By observing the condition of
the switches and the ramp direction, polarity is determined.
This approach also significantly lowers the impact on offset
of the analog integrator as described in the Differential
Offset Voltage section.
A programmable prescaler effectively increases integration
time by a factor M programmable from 1 to 4096. At each
underflow or overflow of the prescaler, the accumulated
charge register (ACR) value is incremented
or decremented
one count. The value of accumulated charge is read via
2
C interface.
the I
Voltage, Current and Temperature ADC
The LTC2944 includes a 14-bit No Latency ΔΣ analog-todigital converter, with internal clock and voltage reference
circuits.
The ADC can be used to monitor the battery voltage at
SENSE
–
or the battery current flowing through the sense
resistor or to convert the output of the on-chip temperature sensor.
Conversion of voltage, current and temperature are triggered by programming the control register via the I
interface. The LTC2944 includes a scan mode where
voltage, current and temperature conversion measurements are executed every 10 seconds. At the end of each
conversion the corresponding registers are updated and
the converter goes to sleep to minimize quiescent current.
The temperature sensor generates a voltage proportional
to temperature with a slope of 2mV/K resulting in a voltage of 600mV at 27°C.
Power-Up Sequence
When SENSE+ rises above a threshold of approximately
3.3V, the LTC2944 generates an internal power-on reset
(POR) signal and sets all registers to their default state.
In the default state, the coulomb counter is active while
the voltage, current and temperature ADC is switched
The accumulated charge register is set to mid-scale
off.
(7FFFh), all low threshold registers are set to 0000h and all
high threshold registers are set to FFFFh. The alert mode
is enabled and the coulomb counter prescaling factor M
is set to 4096.
2
C
LOADCHARGER
V
CC
+
SENSE
1
R
SENSE
–
SENSE
8
I
BAT
+
BATTERY
GND
2
8
REFHI
+
S1
S2
S3
S4
Figure 2. Coulomb Counter Section of the LTC2944
For more information www.linear.com/LTC2944
–
+
REFLO
–
+
–
CONTROL
LOGIC
POLARITY
DETECTION
M
PRESCALER
ACR
2944 F02
2944fa
Page 9
applicaTions inForMaTion
LTC2944
Internal Registers
The LTC2944 register map is shown in Table 1. The
LTC2944 integrates current through a sense resistor,
measures battery voltage, current and temperature and
stores the results in internal 16-bit registers accessible
2
C. High and low limits can be programmed for each
via I
measured quantity. The LTC2944 continuously monitors
these limits and sets a flag in the status register when a
limit is exceeded. If the alert mode is enabled, the ALCC
pin pulls low.
Table 1. Register Map
ADDRESS NAME REGISTER DESCRIPTIONR/WDEFAULT
00hAStatusRSee Table 2
01hBControlR/W3Ch
02hCAccumulated Charge MSBR/W7Fh
03hDAccumulated Charge LSBR/WFFh
04hECharge Threshold High MSBR/WFFh
05hFCharge Threshold High LSB R/WFFh
06hGCharge Threshold Low MSB R/W00h
07hHCharge Threshold Low LSB R/W00h
08hIVoltage MSBR00h
09hJVoltage LSBR00h
0AhKVoltage Threshold High MSBR/WFFh
0BhLVoltage Threshold High LSBR/WFFh
0ChMVoltage Threshold Low MSBR/W00h
0DhNVoltage Threshold Low LSBR/W00h
0EhOCurrent MSBR00h
0FhPCurrent LSBR00h
10hQCurrent Threshold High MSBR/WFFh
11hRCurrent Threshold High LSBR/WFFh
12hSCurrent Threshold Low MSBR/W00h
13hTCurrent Threshold Low LSBR/W00h
14hUTemperature MSBR00h
15hVTemperature LSBR00h
16hWTemperature Threshold HighR/WFFh
17hXTemperature Threshold LowR/W00h
R = Read, W = Write
The status of the charge, voltage, current and temperature
alerts is reported in the status register shown in Table 2.
Table 2. Status Register (A)
BITNAMEOPERATIONDEFAULT
A[7]Reserved
A[6]Current Alert
Accumulated
A[5]
A[4]
A[3]
A[2]
A[1]Voltage Alert
A[0]
Charge
Overflow/
Underflow
Temperature
Alert
Charge Alert
High
Charge Alert
Low
Undervoltage
Lockout Alert
Indicates one of the current
limits was exceeded
Indicates that the value of the
ACR hit either top or bottom
Indicates one of the
temperature limits was
exceeded
Indicates that the ACR value
exceeded the charge threshold
high limit
Indicates that the ACR value
exceeded the charge threshold
low limit
Indicates one of the voltage
limits was exceeded
Indicates recovery from
undervoltage. If set to 1, a
UVLO has occurred and the
contents of the registers are
uncertain
0
0
0
0
0
0
1
After each voltage, current or temperature conversion, the
conversion
result is compared to the respective threshold
registers. If a value in the threshold registers is exceeded,
the corresponding bit A[6], A[4] or A[1] is set.
The accumulated charge register (ACR) is compared to
the charge thresholds every time the analog integrator
increments or decrements the prescaler. If the ACR value
exceeds the threshold register values, the corresponding
bit A[3] or A[2] are set. Bit A[5] is set if the accumulated
charge registers (ACR) overflows or underflows. At each
overflow or underflow, the ACR rolls over and resumes
integration.
undervoltage lockout (UVLO) bit of the status register
The
A[0] is set if, during operation, the voltage on the SENSE
+
pin drops below 3.5V without reaching the POR level. The
analog parts of the coulomb counter are switched off while
the digital register values are retained. After recovery of the
supply voltage, the coulomb counter resumes integrating
For more information www.linear.com/LTC2944
2944fa
9
Page 10
LTC2944
applicaTions inForMaTion
with the stored value in the accumulated charge registers
+
but it has missed any charge flowing while SENSE
< 3.5V.
All status register bits are cleared after being read by the
host, but might be reasserted after the next temperature,
voltage or current conversion or charge integration, if the
corresponding alert condition is still fulfilled.
Control Register (B)
The operation of the LTC2944 is controlled by program
ming the control register. Table 3 shows the organization
of the 8-bit control register B[7:0].
Table 3. Control Register B
BITNAMEOPERATIONDEFAULT
B[7:6]ADC Mode[11] Automatic Mode:
continuously performing
voltage, current and temperature
conversions
[10] Scan Mode: performing
voltage, current and temperature
conversion every 10s
[01] Manual Mode: performing
single conversions of voltage,
current and temperature then
sleep
becomes logic input and accepts
charge complete inverted signal
(e.g., from a charger) to set
accumulated charge register (C,D)
to FFFFh.
[00] ALCC pin disabled.
[11] Not allowed.
SUPPLY
.
reduce I
[10]
[0]
Power Down B[0]
Setting B[0] to 1 shuts down the analog parts of the
LTC2944, reducing the current consumption to less than
2
15μA (typical). The circuitry managing I
C communication remains operating and the values in the registers are
retained.
Note that any charge flowing while B[0] is 1 is
not measured and any charge information below 1LSB of
the accumulated charge register is lost.
Alert/Charge Complete Configuration B[2:1]
The ALCC pin is a dual function pin configured by the
control register. By setting bits B[2:1] to [10] (default),
the ALCC pin is configured as an alert pin following the
SMBus protocol. In this configuration, the ALCC is pulled
low if one of the four measured quantities (charge, voltage,
current, temperature) exceeds its high or low threshold or
if the value of the accumulated charge register overflows
underflows. An alert response procedure started by the
or
master resets the alert at the ALCC pin. If the configuration of
the ALCC
pin is changed while it is pulled low due
to an alert condition, the part will continue to pull ALCC
low until a successful alert response procedure (ARA) has
been issued by the master. For further information see the
Alert Response Protocol section.
10
Setting the control bits B[2:1] to [01] configures the
ALCC pin as a digital input. In this mode, a low input on
the ALCC pin indicates to the LTC2944 that the battery
is full and the accumulated charge register is set to its
maximum, value FFFFh.
2944fa
For more information www.linear.com/LTC2944
Page 11
50mV
MAX
50mΩ
SENSE
M
50mΩ
SENSE
Q
BAT>IMAX
•22 Hours
BAT
q
LSB
=0.340mAh=1224mC
50mΩ
SENSE
M
applicaTions inForMaTion
LTC2944
If neither the alert nor the charge complete functionality
is desired, bits B[2:1] should be set to [00]. The ALCC
pin is then disabled and should be tied to the supply of
2
C bus with a 10k resistor.
the I
Avoid setting B[2:1] to [11] as it enables the alert and the
charge complete modes simultaneously.
Choosing R
SENSE
To achieve the specified precision of the coulomb counter,
+
the differential voltage between SENSE
and SENSE– must
stay within ±50mV. With input signals up to 300mV the
LTC2944 will remain functional but the precision of the
coulomb counter is not guaranteed.
The required value of the external sense resistor, R
is determined by the maximum input range of V
SENSE
SENSE
and
,
the maximum current of the application:
R
SENSE
≤
I
The choice of the external sense resistor value influences
the gain of the coulomb counter. A larger sense resistor
+
gives a larger differential voltage between SENSE
–
SENSE
for the same current resulting in more precise
and
coulomb counting. The amount of charge represented by
the least significant bit (q
) of the accumulated charge
LSB
(registers C, D) is equal to:
q
=0.340mAh•
LSB
R
•
4096
For such low current applications with a large battery,
choosing R
lead to a q
SENSE
smaller than Q
LSB
mulated charge
according to R
BAT
register may underflow before the battery
SENSE
= 50mV/I
MAX
can
/216 and the 16-bit accu-
is exhausted or overflow during charge. Choose, in this
case, a maximum R
R
SENSE
0.340mAh• 2
≤
Q
SENSE
of:
16
•50mΩ
In an example application where the maximum current is
= 100mA, calculating R
I
MAX
lead to a sense resistor of 500mΩ. This gives a q
SENSE
= 50mV/I
MAX
would
of
LSB
34μAh and the accumulated charge register can represent
a maximum battery capacity of Q
2228mAh. If the battery capacity is larger, R
be lowered. For example, R
SENSE
= 34μAh•65535 =
BAT
must
SENSE
should be reduced to
150mΩ if a battery with a capacity of 7200mAh is used.
Choosing Coulomb Prescaler M B[5:3]
If the battery capacity (Q
maximum current (I
MAX
) is small compared to the
BAT
) the prescaler value M should
be changed from its default value (4096).
In these applications with a small battery but a high maxi
mum current, q
can get quite large with respect to the
LSB
-
battery capacity. For example, if the battery capacity is
100mAh and the maximum current is 1A, the standard
equation leads to choosing a sense resistor value of
50mΩ, resulting in:
or
q
=0.340mAh•
LSB
R
when the prescaler is set to its default value of M = 4096.
Note that 1mAh = 3.6C (coulomb).
Choosing R
SENSE
applications where
= 50mV/I
the battery capacity (Q
is not sufficient in
MAX
compared to the maximum current (I
The battery capacity then corresponds to only 294 q
and less than 0.5% of the accumulated charge register
is utilized.
To preserve digital resolution in this case, the LTC2944
includes a programmable prescaler. Lowering the prescaler
factor M reduces q
charge register to the capacity of the battery. The prescaling
factor M
MAX
BAT
):
) is very large
of 4096. The charge LSB then becomes:
For more information www.linear.com/LTC2944
to better match the accumulated
LSB
can be chosen between 1 and its default value
q
=0.34mAh•
LSB
R
•
4096
LSB
2944fa
11
Page 12
LTC2944
Q
216•0.340mAh
R
2944 F03
applicaTions inForMaTion
To use as much of the range of the accumulated charge
register as possible the prescaler factor M should be
chosen for a given battery capacity Q
resistor R
M≥ 4096 •
SENSE
as:
BAT
SENSE
•
50mΩ
and a sense
BAT
M can be set to 1, 4, 16, ... 4096 by programming B[5:3]
of the control register as M = 2
2 • (4 • B[5] + 2 • B[4] + B[3])
.
The default value is 4096.
In the above example of a 100mAh battery and an R
SENSE
of 50mΩ, the prescaler should be programmed to
M = 64. The q
corresponds to roughly 18821 q
is then 5.313μAh and the battery capacity
LSB
s.
LSB
Figure 3 illustrates the best choice for prescaler value M
and the sense resistor as function of the ratio between
battery capacity (Q
) and maximum current (I
BAT
MAX
). It
can be seen, that for high current applications with low
battery capacity the prescaler value should be reduced,
whereas in low current applications with a large battery
the sense resistor should be reduced with respect to its
default value of 50mV/I
MAX
.
ADC Mode B[7:6]
The LTC2944 features an ADC which measures either
–
voltage on SENSE
between SENSE
(battery voltage), voltage difference
+
and SENSE– (battery current) or temperature via an internal temperature sensor. The reference
voltage and clock for the ADC are generated internally.
ADC has four different modes of operation as shown
The
in Table 3. These modes are controlled by bits B[7:6] of
the control register. At power-up, bits
B[7:6] are set to
[00] and the ADC is in sleep mode.
A single conversion of the three measured quantities
is initiated by setting the bit B[7:6] to [01]. After three
conversions (voltage, current and temperature), the ADC
resets B[7:6] to [00] and goes back to sleep.
The LTC2944 is set to scan mode by setting B[7:6] to
[10]. In scan mode the ADC converts voltage, current,
then temperature, then sleeps for approximately ten
seconds. It then reawakens automatically and repeats the
three conversions. The chip remains in scan mode until
reprogrammed by the host.
Programming B[7:6] to [11] sets the chip into automatic
mode where the ADC continuously performs voltage,
current and temperature conversions. The chip stays in
automatic mode until reprogrammed by the host.
Programming B[7:6] to [00] puts the ADC to sleep. If
control bits B[7:6] change within a conversion, the ADC
will complete the running cycle of conversions before
entering the newly selected mode.
A conversion of voltage requires 33ms (typical), and cur
rent and temperature conversions are completed in 4.5ms
(typical). At the end of each conversion, the corresponding
registers are updated. If the converted quantity exceeds
the values programmed in the threshold registers, a flag
is set in
the status register and the ALCC
pin is pulled low
(if alert mode is enabled).
During ADC conversions additional currents are sunk from
+
SENSE
and SENSE–, refer to the Electrical Characteristics
table for details.
-
M = 1
12
M = 4M = 16M = 64M = 256M = 1024M = 4096
0.005hQ
0.02h
0.08h0.34h1.4h5.5h22h
50mV
R
≤
SENSE
I
MAX
Figure 3. Choice of Sense Resistor and Prescaler as
Function of Battery Capacity and Maximum Current
For
voltage, current and temperature) the LTC2944 features
high and low threshold registers. At power-up, the high
thresholds are set to FFFFh while the low thresholds are set
to 0000h, with the effect of disabling them. All thresholds
2
can be programmed to a desired value via I
C. As soon
as a measured quantity exceeds the high threshold or
falls below the low threshold, the LTC2944 sets the cor
-
responding flag in the status register and pulls the ALCC
pin low if alert mode is enabled via bits B[2:1].
Accumulated Charge Register (C,D)
The coulomb counting circuitry in the LTC2944 integrates
current through the sense resistor. The result of this charge
integration is stored in the 16-bit accumulated charge
register (registers C, D). As the LTC2944 does not know
the actual battery status at power-up, the accumulated
charge register (ACR) is set to mid-scale (7FFFh). If the
host knows the status of the battery, the accumulated
charge (C[7:0]D[7:0]) can be either programmed to the
2
correct value via I
C or it can be set after charging to FFFFh
(full) by pulling the ALCC pin low if charge complete mode
is enabled via bits B[2:1]. Note that before writing to the
accumulated charge registers, the analog section should
be temporarily shut down by setting B[0] to 1. In order to
avoid a change in the accumulated charge registers between
reading MSBs C[7:0] and LSBs D[7:0], it is recommended
to read them sequentially as shown in Figure 11.
Voltage Registers (I,J), and Voltage Threshold
Registers (K,L,M,N)
The result of the 16-bit ADC conversion of the voltage at
–
SENSE
is stored in the voltage registers (I, J).
From the result of the 16-bit voltage registers I[7:0]J[7:0]
the measured voltage can be calculated as:
Example 1: a register value I[7:0] = B0h and J[7:0] = 1Ch
–
corresponds to a voltage on SENSE
V
SENSE
–
=70.8V •
FFFF
h
=70.8V •
of:
65535
DEC
≈ 48.705V
Example 2: To set a low level threshold for the battery
voltage of 31.2V, register M should be programmed to
70h and register N to D0h.
Current Registers (O,P), and Current Threshold
Registers (Q,R,S,T)
The result of the current conversion is stored in the cur
-
rent registers (O,P).
As the ADC resolution is 12 bits in current mode, the
lowest four bits of the combined current registers (O, P)
are always zero.
The ADC measures battery current by converting the volt
age, V
, across the sense resistor R
SENSE
. Depending
SENSE
-
whether the battery is being charged or discharged the
measured voltage drop on R
is positive or negative.
SENSE
The result is stored in registers O and P in excess –32767
representation. O[7:0] = FFh, P[7:0] = F0h corresponds to
the full scale positive voltage 64mV. While O[7:0] = 00h,
P[7:0] = 00h corresponds to the full scale negative volt
age –64mV. The
battery current can be obtained from the
-
two byte register O[7:0]P[7:0] and the value of the chosen
sense resistor R
V
=
SENSE
SENSE
R
SENSE
•
RESULT
I
BAT
64 mV
R
SENSE
=
R
:
64mV
SENSE
DEC
32767
RESULT
•
– 32767
7FFF
– 7FFF
h
h
h
=
Positive current is measured when the battery is charging and negative current is measured when the battery is
discharging.
SENSE
–
=70.8V •
V
FFFF
h
h
=70.8V •
DEC
65535
For more information www.linear.com/LTC2944
2944fa
13
Page 14
LTC2944
1A •50mΩ
h
2
applicaTions inForMaTion
Example 1: a register value of O[7:0] = A8h P[7:0] = 40h
together with a sense resistor R
= 50mΩ corresponds
SENSE
to a battery current:
I
BAT
64 mV
50mΩ
64mV
=
50mΩ
•
•
A840
– 7FFF
h
7FFF
43072 – 32767
32767
h
=
h
≈ 402.5mA
The positive current result indicates that the battery is
being charged.
The values in the threshold register for the current mode
Q,R,S,T are also expressed in excess –32767 representa
-
tion in the same manner as the current conversion result.
alert after a current measurement is set if the result
The
is higher than the value stored in the high threshold reg
isters Q,R or lower than the value stored in the low value
registers S,T.
Example 2: In an application, the user wants to get an
alert if the absolute current through the sense resistor,
R
the upper threshold I
lower threshold I
for I
, of 50mΩ exceeds 1A. This is achieved by setting
SENSE
in register [Q,R] to 1A and the
HIGH
in register [S,T] to –1A. The formula
LOW
leads to:
BAT
I
HIGH (DEC)
=
64mV
• 32767
+ 32767= 58366
T = 510K •
RESULT
FFFF
h
=510K •
RESULT
65535
DEC
Example: a register value of U[7:0] = 96h V[7:0] = 96h
corresponds to ~300K or ~27°C
A high temperature limit of 60°C is programmed by setting
register W to A7h. Note that the temperature threshold
register is single byte register and only the eight MSBs of
the 11 bits temperature result are checked.
Effect of Differential Offset Voltage on Total Charge
Error
In battery gas gauges, an important parameter is the
differential offset (V
) of the circuitry monitoring the
OS
battery charge. Many coulomb counter devices perform
an analog to digital conversion of V
SENSE
, where V
SENSE
is the voltage drop across the sense resistor, and accumulate the
an architecture, the differential offset V
charge error of V
conversion results to infer charge. In such
causes relative
OS
OS/VSENSE
. For small V
SENSE
values VOS
can be the main source of error.
The LTC2944 performs the tracking of the charge with an
analog integrator. This approach allows to continuously
monitor the battery charge and significantly lowers the
error due to differential offset. The relative charge error
due to offset (CE
) can be expressed by:
OV
–1A • 50mΩ
I
LOW (DEC)
=
64mV
• 32767
Leading the user to set Q[7:0] = E3h, R[7:0] = FEh for the
high threshold and S[7:0] = 1Bh and T[7:0] = FFh for the
low threshold.
Temperature Registers (U,V) and Temperature
Threshold Registers (W,X)
As the ADC resolution is 11 bits in temperature mode, the
lowest five bits of the combined temperature registers
(U, V) are always zero.
actual temperature can be obtained from the two byte
The
register U[7:0]V[7:0] by:
14
+ 32767= 7168
CEOV=
As example, at a 1mV input signal a differential voltage
offset V
integration, whereas the error is only 0.04% (a factor of
50 times smaller!) using the analog integration approach
of LTC2944.
The reduction of the impact of the offset in LTC2944 can
be explained by its integration scheme depicted in Figure 2.
While positive offset accelerates the up ramping of the
integrator output from REFLO to REFHI, it slows the down
ramping from REFHI to REFLO thus the effect is largely
canceled as depicted in Figure 4.
For more information www.linear.com/LTC2944
V
OS
V
= 20µV results in a 2% error using digital
OS
SENSE
2944fa
Page 15
applicaTions inForMaTion
LTC2944
INTEGRATOR
OUTPUT
REFHI
REFLO
FASTER
UP RAMPING
Figure 4. Offset Cancellation
WITHOUT OFFSET
WITH OFFSET
SLOWER
DOWN RAMPING
TIME
2944 F04
For input signals with an absolute value smaller than the
offset of the internal op amp the LTC2944 stops integrating and does not integrate its own offset.
2
C/SMBus Interface
I
The LTC2944 communicates with a bus master using
2
a 2-wire interface compatible with I
2
7-bit hard coded I
C address of the LTC2944 is 1100100.
C and SMBus. The
The LTC2944 is a slave only device. The serial clock line
(SCL) is input only while the serial data line (SDA) is
2
bidirectional. The device supports I
mode. For more details refer to the I
C standard and fast
2
C Protocol section.
Each device on the I2C/SMbus is recognized by a unique
address stored in that device and can operate as either a
transmitter or receiver, depending on the function of the
device. In addition to transmitters and receivers, devices
can also be classified as masters or slaves when perform
ing data
data
transfers. A master is the device which initiates a
transfer on the bus and generates the clock signals to
-
permit that transfer. At the same time any device addressed
is considered a slave. The LTC2944 always acts as a slave.
Figure 5 shows an overview of the data transmission on
2
C bus.
the I
Start and Stop Conditions
When the bus is idle, both SCL and SDA must be high. A
bus master signals the beginning of a transmission with
a START condition by transitioning SDA from high to low
while SCL is high. When the master has finished com
municating with the slave, it issues a STOP condition by
transitioning SDA from low to high while SCL is high. The
bus is then free for another transmission. When the bus
is in use, it stays busy if a repeated START (Sr) is gener
ated instead of a STOP condition. The repeated START
conditions are functionally identical to the START (S).
(Sr)
2
C Protocol
I
2
The LTC2944 uses an I
C/SMBus-compatible 2-wire
interface supporting multiple devices on a single bus.
Connected devices can only pull the bus lines low and
must never drive the bus high. The bus wires are externally
connected to a positive supply voltage via current sources
pull-up resistors. When the bus is idle, all bus lines
or
are high. Data on the I
2
C bus can be transferred at rates
of up to 100kbit/s in standard mode and up to 400kbit/s
in fast mode.
SDA
SCL
S
START
CONDITION
a6 - a0b7 - b0b7 - b0
1 - 789
ADDRESSR/WACKDATAACKDATAACK
Figure 5. Data Transfer Over I2C or SMBus
1 - 7891 - 789
Write Protocol
The master begins a write operation with a START condition
followed by the seven bit slave address 1100100 and the
R/W bit set to zero, as shown in Figure 6. The LTC2944
acknowledges this by pulling SDA low and the master
sends a command byte which indicates which internal
register the master is to write. The LTC2944 acknowledges
and latches the command byte into its internal register
address pointer. The master delivers the data byte, the
LTC2944 acknowledges once more and latches the data
P
STOP
CONDITION
2944 F05
2944fa
For more information www.linear.com/LTC2944
15
Page 16
LTC2944
2944 F07
2944 F09
applicaTions inForMaTion
into the desired register. The transmission is ended when
the master sends a STOP condition. If the master contin-
sending a second data byte instead of a stop, the
ues by
LTC2944
acknowledges again, increments its address
pointer and latches the second data byte in the following
register, as shown in Figure 7.
SW
ADDRESSREGISTERDATA
110010001hFCh
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
AAA
0
000
A: ACKNOWLEDGE (LOW)
A: NOT ACKNOWLEDGE (HIGH)
S: START CONDITION
P: STOP CONDITION
R: READ BIT (HIGH)
W: WRITE BIT (LOW)
Figure 6. Writing FCh to the LTC2944 Control Register (B)
SW
ADDRESSREGISTERDATA
110010002hF0h01h
AAA
0
000
Figure 7. Writing F001h to the LTC2944 Accumulated Charge
Register (C, D)
2944 F06
DATA
P
P
A
0
Read Protocol
The master begins a read operation with a START condition
followed by the seven bit slave address 1100100 and the
R/W bit set to zero, as shown in Figure 8. The LTC2944
acknowledges and the master sends a command byte
which indicates which internal register the master is to
read. The LTC2944 acknowledges and then latches the
command byte into its internal register address pointer.
The master then sends a repeated START condition followed by
now
the same seven bit address with the R/W bit
set to one. The LTC2944 acknowledges and sends
the contents of the requested register. The transmission
is ended when the master sends a STOP condition. If
the master acknowledges the transmitted data byte, the
LTC2944 increments its address pointer and sends the
contents of the following register as depicted in Figure 9.
Alert Response Protocol
In a system where several slaves share a common inter
rupt line, the master can use the alert response address
(ARA) to determine which device initiated the interrupt
(Figure 10).
The master initiates the ARA procedure with a START
condition and the special 7-bit ARA bus address (0001100)
followed by the read bit (R) = 1. If the LTC2944 is as
serting the ALCC pin in alert mode, it acknowledges and
responds by sending its 7-bit bus address (1100100)
and a 0. While it is sending its address, it monitors the
SDA pin to see if another device is sending an address at
2
the same time using standard I
LTC2944 is sending a 1 and reads a 0
C bus arbitration. If the
on the SDA pin on
the rising edge of SCL, it assumes another device with a
lower address is sending and the LTC2944 immediately
aborts its transfer and waits for the next ARA cycle to try
again. If transfer is successfully completed, the LTC2944
will stop pulling down the ALCC pin and will not respond
to further ARA requests until a new Alert event occurs.
SW
ADDRESSREGISTERSr
110010000h1
SW
ADDRESSREGISTERSr
110010008h1
Figure 9. Reading the LTC2944 Voltage Register (I, J)
16
AAADDRESS
0
001100100
A
R
DATA
0
01h
Figure 8. Reading the LTC2944 Status Register (A)
AAADDRESS
0
001100100
For more information www.linear.com/LTC2944
A
R
0
DATA
F1h
A
0
DATA
24h
P
A
1
2944 F08
P
A
1
2944fa
Page 17
2944 F10
2944 F11
applicaTions inForMaTion
2944 F13
LTC2944
SR
ALERT RESPONSE ADDRESSDEVICE ADDRESS
000110011001000
A
1
01
P
A
Figure 10. LTC2944 Serial Bus SDA Alert Response Protocol
SW
ADDRESSREGISTERS
110010002h1
AAADDRESS
0
001100100
A
R
A
DATA
0
0
80h
DATA
01h
P
A
1
Figure 11. Reading the LTC2944 Accumulated Charge
Registers (C, D)
SW
ADDRESSREGISTERDATA
110010001h4C
SW
ADDRESSREGISTERS
110010008h1
AAADDRESS
0
001100100
AA
0
00
40ms
P
A
R
A
DATA
0
0
F1h
DATA
80h
A
1
2944 F12
P
Figure 12. ADC Single Conversion Sequence and Reading
of Voltage Registers (I,J)
PC Board Layout Suggestions
Keep all traces as short as possible to minimize noise and
inaccuracy. Use a 4-wire Kelvin sense connection for the
sense resistor, locating the LTC2944 close to the resistor
+
with short sense-traces to the SENSE
and SENSE– pins.
Use wider traces from the resistor to the battery, load
and/or charger. Put the bypass capacitor close to SENSE
+
and GND.
CHARGER/LOAD
TO
R
SENSE
TO BATTERY
Preventing Violation of Absolute Maximum Ratings
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the supply
bypass capacitor of LTC2944. However, these capacitors
can cause problems if the LTC2944 is plugged into a live
supply close to its maximum voltage of 65V. The low
loss ceramic capacitor, combined with stray inductance
in series with the power source, forms an under damped
–
tank circuit, and the voltage at the SENSE
pin of the
LTC2944 can ring several tens of volts, possibly exceeding the
be
diode to the SENSE
LTC2944 rating and damaging the part. This can
prevented by adding a transient voltage suppression
–
pin as shown in Figure 14.
Also pulling the digital communication pins SCL, SDA and
ALCC below their minimum absolute maximum voltage
of –0.3V—for example, due to differences between the
local GND and the GND of the connected microproces
sor—increases the
supply current of the LTC2944. At
supply voltages above 50V, the power dissipated due
to the increased supply current might damage the part,
which can be prevented by adding Schottky diodes as
shown in Figure 14.
LTC2944
GND
CHARGER
SENSE
SENSE
SMAJ58ACMHSHS-2L
+
R
SENSE
–
50mΩ
+
MULTICELL
Li-ION
3.3V
2k2k2k
V
DD
µP
ALCC
SDA
SCL
-
1A
LOAD
1µF
2944 F14
1
C
2
LTC2944
3
4
8
7
6
5
Figure 13. Kelvin Connection on Sense Resistor
Figure 14. Preventing Violation of Absolute Maximum Ratings
For more information www.linear.com/LTC2944
2944fa
17
Page 18
LTC2944
package DescripTion
Please refer to http://www.linear.com/product/LTC2944#packaging for the most recent package drawings.
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
(2 SIDES)2.10 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.50
BSC
2.38 ±0.05
3.00 ±0.10
(4 SIDES)
0.75 ±0.05
0.00 – 0.05
1.65 ± 0.10
(2 SIDES)
R = 0.125
TYP
0.25 ± 0.05
2.38 ±0.10
BOTTOM VIEW—EXPOSED PAD
0.40 ± 0.10
85
14
0.50 BSC
(DD8) DFN 0509 REV C
18
2944fa
For more information www.linear.com/LTC2944
Page 19
LTC2944
revision hisTory
REVDATEDESCRIPTIONPAGE NUMBER
A10/17Updated equation for obtaining temperature (T)15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Formoreinformationwww.linear.com/LTC2944
2944fa
19
Page 20
LTC2944
Typical applicaTion
Battery Charger with Gas Gauge
CX
Si7135DP
IGATE
22.1k
CSP
CSN
BGATE
BAT
OFB
FBG
BFB
NTC
1µF0.1µF
1.15M
47k
47k
1.13M
10k
5mΩ
Si7135DP
V
OUT
30.4V, 15A
3.3V
V
DD
µP
C1
R2
R1
2k
2k
LTC2944
R3
2k
ALCC
SDA
SCL
GND
SENSE
SENSE
+
–
1µF
R
SENSE
100mΩ
+
30V
Li-ION
BATTERY
2944 TA02
33V TO 60V
5mΩ
1.10M
100k
10nF
3.0V
LT3845A
IN
SHDN
RST
CLN
IN
1µF
VM
ENC
CHRG
F LT
IIMON
IBMON
10nF
OUT
V
C
14.7k
ITHCCIID
TMRGND BIASCL
100µF
47nF
LTC4000
24.9k
relaTeD parTs
PART NUMBER DESCRIPTIONCOMMENTS
Battery Gas Gauges
2
LTC2943I
C Battery Gas Gauge with Voltage, Current and
Temperature ADC
LTC2943-11A Multicell Batter
y Gas Gauge with Temperature,
Voltage and Current Measurement
2
LTC2941I
LTC2941-11A I
C Battery Gas Gauge2.7V to 5.5V Operation, 6-Lead (2mm × 3mm) DFN Package
2
C Battery Gas Gauge with Internal Sense
Resistor
2
LTC2942I
C Battery Gas Gauge with Temperature, Voltage
Measurement
2
LTC2942-11A I
C Battery Gas Gauge with Internal Sense
Resistor and Temperature/Voltage Measurement
LTC4150Coulomb Counter/Battery Gas Gauge2.7V to 8.5V Operation, 10-Pin MSOP Package
Battery Chargers
LTC4000High Voltage High Current Controller for Battery