LINEAR TECHNOLOGY LTC2753 Technical data
LTC2753
Dual Current Output
12-/14-/16-Bit SoftSpan
DACs with Parallel I/O
FEATURES
■
Six Programmable Output Ranges
Unipolar: 0V to 5V, 0V to 10V
Bipolar: ±5V, ±10V, ±2.5V, –2.5V to 7.5V
■
Maximum 16-Bit INL Error: ±1 LSB over Temperature
■
Low 1μA (Maximum) Supply Current
■
Guaranteed Monotonic over Temperature
■
Low Glitch Impulse 1nV•s
■
2.7V to 5.5V Single Supply Operation
■
2µs Settling Time to ±1 LSB
■
Parallel Interface with Readback of All Registers
■
Asynchronous CLR Pin Clears DAC Outputs to 0V in
Any Output Range
■
Power-On Reset to 0V
■
48-Pin 7mm × 7mm QFN Package
APPLICATIONS
■
High Resolution Offset and Gain Adjustment
■
Process Control and Industrial Automation
■
Automatic Test Equipment
■
Data Acquisition Systems
DESCRIPTION
The LTC®2753 is a family of dual 12-, 14-, and 16-bit
multiplying parallel-input, current-output DACs. These
DACs operate from a single 2.7V to 5.5V supply and are all
guaranteed monotonic over temperature. The LTC2753A-16
provides 16-bit performance (±1LSB INL and DNL) over
temperature without any adjustments. These SoftSpan™
DACs offer six output ranges—two unipolar and four
bipolar—that can be programmed through the parallel
interface, or pinstrapped for operation in a single range.
The LTC2753 DACs use a bidirectional input/output parallel
interface that allows readback of any on-chip register. A
power-on reset circuit resets the DAC outputs to 0V when
power is initially applied. A logic low on the CLR pin asynchronously clears the DACs to 0V in any output range.
The parts are specifi ed over commercial and industrial
temperature ranges.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
TYPICAL APPLICATION
Dual 16-Bit V
V
REF
5V
+
1/2 LT1469
–
150pF
DAC with Software-Selectable Ranges
OUT
47
R
OFSA
2
R
IN
R1
1
R
COM
R2
48
39
40
3
I/O PORT
16
I/O PORT
R
SPAN I/O
DATA I/O
REFA
REFB
OFSB
DAC A
DAC B
LTC2753-16
LTC2753-16 Integral Nonlinearity (INL)
1.0
R
46
FBA
15pF
I
45
OUT1A
I
4
OUT2A
44
R
VOSA
R
43
VOSB
32
I
OUT2B
I
42
OUT1B
15pF
41
R
FBB
–
1/2 LT1469
+
+
1/2 LT1469
–
2753 TA01
V
OUTA
V
OUTB
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0
VDD= 5V
= 5V
V
REF
±10V RANGE
16384
32768
CODE
49152
25°C
90°C
–45°C
65535
2753 TA01b
2753f
1
LTC2753
ABSOLUTE MAXIMUM RATINGS
I
, I
OUT1X
, R
R
VOSX
to GND .................................................. –0.3V to 7V
V
DD
OUT2X
, R
FBX
, R
to GND .................................±0.3V
COM
, RIN, REFX to GND ...................±15V
OFSX
Digital Inputs and Digital I/O
to GND ..........................–0.3V to V
+0.3V (max 7V)
DD
PIN CONFIGURATION
OFSARFBA
VOSARVOSB
FBBROFSB
OUT1A
REFA
R
48 47 46 45 44 43 42 41 40 39 38 37
R
1
COM
R
2
IN
S2
3
I
4
OUT2A
GND
5
D11
6
D10
7
D9
8
D8
9
D7
10
D6
11
D5
12
13 14 15 16 17 18 19 20 21 22 23 24
D4
D3
V
LTC2753-12 UK PACKAGE
48-LEAD (7mm × 7mm) PLASTIC QFN
T
EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB
JMAX
OUT1B
I
R
I
R
REFBS1WR
49
DD
A1
A0
GND
CLR
D2D1D0
MSPAN
NC
= 125°C, θJA = 29°C/W
UPD
36
READ
35
D/S
34
S0
33
I
32
OUT2B
GND
31
NC
30
NC
29
NC
28
NC
27
NC
26
NC
25
R
COM
R
IN
S2
I
OUT2A
GND
D13
D12
D11
D10
D9
D8
D7
EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB
REFA
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
D6
48-LEAD (7mm × 7mm) PLASTIC QFN
T
JMAX
(Notes 1, 2)
Operating Temperature Range
LTC2753C ..................................................... 0°C to 70°C
LTC2753I .................................................. –40°C to 85°C
Maximum Junction Temperature........................... 125°C
Storage Temperature Range ................... –65°C to 150°C
OFSARFBA
VOSARVOSB
OUT1A
R
I
DD
D5
NC
V
LTC2753-14 UK PACKAGE
= 125°C, θJA = 29°C/W
FBBROFSB
OUT1B
R
I
R
49
A1
A0
CLR
GND
REFBS1WR
D4D3D2
MSPAN
OFSARFBA
VOSARVOSB
FBBROFSB
OUT1A
OUT1B
I
R
I
R
REFA
R
48 47 46 45 44 43 42 41 40 39 38 37
UPD
36
READ
35
D/S
34
S0
33
I
32
OUT2B
GND
31
NC
30
NC
29
NC
28
NC
27
D0
26
D1
25
R
1
COM
R
2
IN
S2
3
I
4
OUT2A
GND
5
D15
6
D14
7
D13
8
D12
9
D11
10
D10
11
D9
12
13 14 15 16 17 18 19 20 21 22 23 24
D8
48-LEAD (7mm × 7mm) PLASTIC QFN
T
EXPOSED PAD (PIN 49) IS GND, MUST BE SOLDERED TO PCB
JMAX
49
DD
A1
D7
NC
V
LTC2753-16 UK PACKAGE
= 125°C, θJA = 29°C/W
REFBS1WR
UPD
36
READ
35
D/S
34
S0
33
I
32
OUT2B
GND
31
NC
30
NC
29
D0
28
D1
27
D2
26
D3
25
A0
D6D5D4
CLR
GND
MSPAN
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2753CUK-12#PBF LTC2753CUK-12#TRPBF LTC2753UK-12 48-Lead (7mm × 7mm) Plastic QFN 0°C to 70°C
LTC2753IUK-12#PBF LTC2753IUK-12#TRPBF LTC2753UK-12 48-Lead (7mm × 7mm) Plastic QFN –40°C to 85°C
LTC2753CUK-14#PBF LTC2753CUK-14#TRPBF LTC2753UK-14 48-Lead (7mm × 7mm) Plastic QFN 0°C to 70°C
LTC2753IUK-14#PBF LTC2753IUK-14#TRPBF LTC2753UK-14 48-Lead (7mm × 7mm) Plastic QFN –40°C to 85°C
LTC2753BCUK-16#PBF LTC2753BCUK-16#TRPBF LTC2753UK-16 48-Lead (7mm × 7mm) Plastic QFN 0°C to 70°C
LTC2753BIUK-16#PBF LTC2753BIUK-16#TRPBF LTC2753UK-16 48-Lead (7mm × 7mm) Plastic QFN –40°C to 85°C
LTC2753ACUK-16#PBF LTC2753ACUK-16#TRPBF LTC2753UK-16 48-Lead (7mm × 7mm) Plastic QFN 0°C to 70°C
LTC2753AIUK-16#PBF LTC2753AIUK-16#TRPBF LTC2753UK-16 48-Lead (7mm × 7mm) Plastic QFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
2753f
2
LTC2753
ELECTRICAL CHARACTERISTICS
V
specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T
LTC2753-12 LTC2753-14 LTC2753B-16 LTC2753A-16
SYMBOL PARAMETER CONDITIONS
Static Performance
●
Resolution
Monotonicity
DNL Differential
INL Integral
GE Gain Error All Output
GE
BZE Bipolar Zero Error All Bipolar
BZS
PSR Power Supply
I
LKG
C
IOUT1
Nonlinearity
Nonlinearity
Gain Error Temp-
TC
erature Coeffi cient
Bipolar Zero Temp-
TC
erature Coeffi cient
Rejection
I
Current
Output
Capacitance
OUT1
Leakage
Ranges
ΔGain/ΔTemp ±0.6 ±0.6 ±0.6 ±0.6 ppm/°C
Ranges
VDD = 5V, ±10%
V
= 3V, ±10%
DD
TA = 25°C
T
to T
MIN
Full-Scale
Zero Scale
MAX
12 14 16 16 Bits
●
12 14 16 16 Bits
●
●
●
●
●
●
●
±0.5 ±2 ±1.5 ±5 ±20 ±4 ±14 LSB
±0.2 ±1 ±0.6 ±3 ±12 ±2 ±8 LSB
±0.5 ±0.5 ±0.5 ±0.5 ppm/°C
±0.05 ±2
= 5V, V
DD
±1 ±1 ±1 ±0.2 ±1 LSB
±1 ±1 ±2 ±0.4 ±1 LSB
±0.025
±0.06
±5
75
45
= 5V unless otherwise specifi ed. The ● denotes the
REF
±0.1
±0.25
±0.05 ±2
±5
75
45
±0.05 ±2
75
45
= 25°C.
A
±0.4
±1
±5
±0.03
±0.1
±0.05 ±2
75
45
±0.2
±0.5
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
LSB/V
nA
±5
pF
pF
VDD = 5V, V
= 5V unless otherwise specifi ed. The ● denotes specifi cations that apply over the full operating temperature range,
REF
otherwise specifi cations are at TA = 25°C.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Resistances (Note 3)
●
R1, R2 Reference Inverting Resistors (Note 4)
R
REF
R
FB
R
OFS
R
VOS
Dynamic Performance
THD Total Harmonic Distortion (Note 8) Multiplying –110 dB
DAC Input Resistance
Feedback Resistor (Note 3)
Bipolar Offset Resistor (Note 3)
Offset Adjust Resistor
Output Settling Time 0V to 10V Range, 10V Step. To ±0.0015% FS
Glitch Impulse (Note 6) 1 nV•s
Digital-to-Analog Glitch Impulse (Note 7) 1 nV•s
Multiplying Feedthrough Error 0V to 10V Range, V
Output Noise Voltage Density (Note 9) at I
(Note 5)
Sine Wave
OUT1
= ±10V, 10kHz
REF
16 20 k
●
810 k
●
810 k
●
16 20 k
●
800 1000 k
2s
0.5 mV
13 nV/√⎯H⎯z
2753f
3
LTC2753
ELECTRICAL CHARACTERISTICS
V
specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Power Supply
V
DD
I
DD
Digital Inputs
V
IH
V
IL
I
IN
C
IN
Digital Outputs
V
OH
V
OL
Supply Voltage
Supply Current, VDD Digital Inputs = 0V or V
Digital Input High Voltage 3.3V ≤ VDD ≤ 5.5V
2.7V ≤ V
Digital Input Low Voltage 4.5V < VDD ≤ 5.5V
2.7V ≤ V
Digital Input Current VIN = GND to V
Digital Input Capacitance VIN = 0V (Note 10)
IOH = 200µA
IOL = 200µA
= 5V, V
DD
< 3.3V
DD
≤ 4.5V
DD
= 5V unless otherwise specifi ed. The ● denotes the
DD
REF
DD
●
●
●
●
●
●
●
●
●
●
= 25°C.
A
2.7 5.5 V
2.4
2
VDD – 0.4 V
0.5 1 A
0.8
0.6
±1 µA
6pF
0.4 V
V
V
V
V
TIMING CHARACTERISTICS
The ● denotes specifi cations that apply over the full operating temperature range,
otherwise specifi cations are at TA = 25°C.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
= 4.5V to 5.5V
V
DD
Write and Update Timing
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
I/O Valid to WR Rising Edge Set-Up
I/O Valid to WR Rising Edge Hold
WR Pulse Width Low
UPD Pulse Width High
UPD Falling Edge to WR Falling Edge No Data Shoot-Through
WR Rising Edge to UPD Rising Edge (Note 10)
D/S Valid to WR Falling Edge Set-Up Time
WR Rising Edge to D/S Valid Hold Time
A1-A0 Valid to WR Falling Edge Setup Time
WR Rising Edge to A1-A0 Valid Hold Time
A1-A0 Valid to UPD Rising Edge Setup Time
UPD Falling Edge to A1-A0 Valid Hold Time
Readback Timing
t
13
t
14
t
15
t
26
t
27
WR Rising Edge to READ Rising Edge
READ Falling Edge to WR Falling Edge (Note 10)
READ Rising Edge to I/O Propagation Delay CL = 10pF
A1-A0 Valid to READ Rising Edge Setup Time
READ Falling to A1-A0 Valid Hold Time (Note 10)
●
7ns
●
7ns
●
15 ns
●
15 ns
●
0ns
●
0ns
●
7ns
●
7ns
●
5ns
●
0ns
●
9ns
●
7ns
●
7ns
●
20 ns
●
●
20 ns
●
0ns
40 ns
4
2753f
LTC2753
TIMING CHARACTERISTICS
The ● denotes specifi cations that apply over the full operating temperature range,
otherwise specifi cations are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
17
t
18
t
19
t
20
t
22
t
23
t
24
CLR Timing
t
25
= 2.7V to 3.3V
V
DD
Write and Update Timing
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
Readback Timing
t
13
t
14
t
15
t
26
t
27
t
17
t
18
t
19
t
20
UPD Valid to I/O Propagation Delay CL = 10pF
D/S Valid to READ Rising Edge (Note 10)
READ Rising Edge to UPD Rising Edge No Update
UPD Falling Edge to READ Falling Edge No Update
READ Falling Edge to UPD Rising Edge (Note 10)
I/O Bus Hi-Z to READ Rising Edge (Note 10)
READ Falling Edge to I/O Bus Active (Note 10)
CLR Pulse Width Low
I/O Valid to WR Rising Edge Set-Up
I/O Valid to WR Rising Edge Hold
WR Pulse Width Low
UPD Pulse Width High
UPD Falling Edge to WR Falling Edge No Data Shoot-Through
WR Rising Edge to UPD Rising Edge (Note 10)
D/S Valid to WR Falling Edge Set-Up Time
WR Rising Edge to D/S Valid Hold Time
A1-A0 Valid to WR Falling Edge Setup Time
WR Rising Edge to A1-A0 Valid Hold Time
A1-A0 Valid to UPD Rising Edge Setup Time
UPD Falling Edge to A1-A0 Valid Hold Time
WR Rising Edge to Read Rising Edge
Read Falling Edge to WR Falling Edge (Note 10)
Read Rising Edge to I/O Propagation Delay CL = 10pF
A1-A0 Valid to READ Rising Edge Setup Time
READ Falling to A1-A0 Valid Hold Time (Note 10)
UPD Valid to I/O Propagation Delay CL = 10pF
D/S Valid to Read Rising Edge (Note 10)
Read Rising Edge to UPD Rising Edge No Update
UPD Falling Edge to Read Falling Edge No Update
= 25°C.
A
●
●
7ns
●
0ns
●
0ns
●
7ns
●
0ns
●
20 ns
●
15 ns
●
15 ns
●
15 ns
●
30 ns
●
30 ns
●
0ns
●
0ns
●
7ns
●
7ns
●
7ns
●
0ns
●
15 ns
●
15 ns
●
10 ns
●
35 ns
●
●
35 ns
●
0ns
●
●
12 ns
●
0ns
●
0ns
26 ns
53 ns
43 ns
2753f
5
LTC2753
The ● denotes specifi cations that apply over the full operating temperature range,
TIMING CHARACTERISTICS
otherwise specifi cations are at TA = 25°C.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
= 2.7V to 3.3V
V
DD
t
22
t
23
t
24
CLR Timing
t
25
READ Falling Edge to UPD Rising Edge (Note 10)
I/O Bus Hi-Z to Read Rising Edge (Note 10)
Read Falling Edge to I/O Bus Active (Note 10)
CLR Pulse Width Low
●
10 ns
●
0ns
●
35 ns
●
20 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Continuous operation above the specifi ed maximum operating
junction temperature may impair device reliability.
Note 3: Because of the proprietary SoftSpan switching architecture, the
measured resistance looking into each of the specifi ed pins is constant for
all output ranges if the I
Note 4: R1 is measured from R
R
.
COM
Note 5: Using LT1469 with C
of 1.7s can be achieved by optimizing the time constant on an individual
OUT1X
and I
IN
FEEDBACK
pins are held at ground.
OUT2X
to R
; R2 is measured from REFA to
COM
= 15pF. A ±0.0015% settling time
basis. See Application Note 74, Component and Measurement Advances
Ensure 16-Bit DAC Settling Time.
Note 6: Measured at the major carry transition, 0V to 5V range. Output
amplifi er: LT1469; C
Note 7. Full-scale transition; REF = 0V.
Note 8. REF = 6V
amplifi er = LT1469.
Note 9. Calculation from V
(Boltzmann constant), R = resistance (), T = temperature (°K), and B =
bandwidth (Hz).
Note 10. Guaranteed by design. Not production tested.
= 27pF.
FB
at 1kHz. 0V to 5V range. DAC code = FS. Output
RMS
= √⎯4⎯k⎯T⎯R
n
⎯⎯⎯
B, where k = 1.38E-23 J/°K
6
2753f
LTC2753
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2753-16
Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
1.0
VDD= 5V
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
= 5V
V
REF
±10V RANGE
0
16384
32768
CODE
49152
65535
2753 G01
DNL vs Temperature Bipolar Zero vs Temperature
1.0
VDD= 5V
0.8
0.6
0.4
0.2
0.0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
V
REF
±10V RANGE
–40
= 5V
–20200
TEMPERATURE (°C)
+DNL
–DNL
40
80
60
2753 G05
1.0
VDD= 5V
0.8
V
±10V RANGE
0.6
0.4
0.2
0.0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0
8
VDD= 5V
V
6
±10V RANGE
4
2
0
BZE (LSB)
2
4
6
8
–40
= 5V
REF
REF
–20200
16384
= 5V
0.5ppm/°C (TYP)
TEMPERATURE (°C)
32768
CODE
49152
40
= 25°C, unless otherwise noted.
T
A
INL vs Temperature
1.0
VDD= 5V
65535
2753 G02
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
V
REF
±10V RANGE
–40
= 5V
–20200
Gain Error vs Temperature
16
VDD= 5V
= 5V
V
REF
12
±10V RANGE
8
4
0
GE (LSB)
–4
–8
–12
–16
–40
80
60
2753 G06
–20200
+INL
–INL
TEMPERATURE (°C)
0.6ppm/°C (TYP)
TEMPERATURE (°C)
40
40
80
60
2753 G04
80
60
2753 G07
INL vs V
1.0
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
–10 –8
VDD= 5V
±5V RANGE
+INL
–INL
REF
DNL vs V
1.0
VDD= 5V
0.8
±5V RANGE
0.6
+INL
–INL
0
44–6
2
2
V
(V)
REF
10
6
8
2753 G08
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
–10 –8
+DNL
–DNL
REF
44–6
+DNL
–DNL
0
2
2
V
(V)
REF
10
6
8
2751 G09
2753f
7
LTC2753
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2753-16
INL vs V
1.0
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
2.5
LTC2753-14
LTC2753-12
DD
343.5
+INL
–INL
VDD (V)
4.5
5
WAVEFORM
250µV/DIV
5.5
2751 G09b
Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
1.0
VDD= 5V
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
= 5V
V
REF
±10V RANGE
0
4096
8192
CODE
Settling 0V to 10V
UPD
5V/DIV
GATED
SETTLING
USING LT1469 AMP
C
FEEDBACK
0V TO 10V STEP
12288
16383
2753 G11
= 12pF
500ns/DIV
1.0
VDD= 5V
0.8
V
±10V RANGE
0.6
0.4
0.2
0.0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0
TA = 25°C, unless otherwise noted.
Multiplying Frequency Response
vs Digital Code
ALL BITS ON
0
D15
D14
D13
–20
D12
D11
D10
–40
D9
D8
D7
–60
D6
D5
D4
D3
–80
ATTENUATION (dB)
D2
D1
–100
–120
8192
CODE
D0
ALL BITS OFF
1k 10k 100k 1M
100
12288
2753 G12
REF
2753 G10
= 5V
4096
UNIPOLAR 5V OUTPUT RANGE
LT1469 OUTPUT AMPLIFIER
C
= 15pF
FEEDBACK
FREQUENCY (Hz)
16383
10M
2753 G10a
8
Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
1.0
0.8
0.6
0.4
0.2
0.0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0
VDD= 5V
= 5V
V
REF
±10V RANGE
1024
2048
CODE
3072
4095
2753 G13
1.0
0.8
0.6
0.4
0.2
0.0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0
VDD= 5V
= 5V
V
REF
±10V RANGE
1024
2048
CODE
3072
4095
2753 G14
2753f
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