LINEAR TECHNOLOGY LTC2609, LTC2619, LTC2629 Technical data
FEATURES
www.BDTIC.com/LINEAR
■
Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
■
Guaranteed Monotonic Over Temperature
■
Separate Reference Inputs
■
27 Selectable Addresses
■
400kHz I2C™ Interface
■
Wide 2.7V to 5.5V Supply Range
■
Low Power Operation: 250µA per DAC at 3V
■
Individual Channel Power Down to 1µA (Max)
■
High Rail-to-Rail Output Drive (±15mA, Min)
■
Ultralow Crosstalk Between DACs (5µV)
■
LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero Scale
■
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Midscale
■
Tiny 16-Lead Narrow SSOP Package
U
APPLICATIO S
■
Mobile Communications
■
Process Control and Industrial Automation
■
Automatic Test Equipment and Instrumentation
LTC2609/LTC2619/LTC2629
Quad 16-/14-/12-Bit
Rail-to-Rail DACs with
2
C Interface
U
I
DESCRIPTIO
The LTC®2609/LTC2619/LTC2629 are quad 16-, 14- and
12-bit, 2.7V-to-5.5V rail-to-rail voltage output DACs in a
16-lead SSOP package. They have built-in high performance output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I2C compatible serial interface. The
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise
less than 10mV above zero scale; after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to midscale. The voltage outputs stay at
midscale until a valid write and update take place.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5396245. Patent pending.
W
BLOCK DIAGRA
V
V
V
REFA
OUTA
OUTB
REFB
SCL
SDA
INPUT
REGISTER
INPUT
REGISTER
I2C
INTERFACE
GND
1
REFLO
3
DAC A
4
DAC B
5
6
8
9
2
DAC
REGISTER
DAC
REGISTER
32-BIT SHIFT REGISTER
INPUT
INPUT
CONTROL
LOGIC
CC
16
REGISTER
REGISTER
DAC
REGISTER
DAC
REGISTER
ADDRESS
DECODE
LOGIC
DAC D
DAC C
15
14
13
12
11
10
7
2609 BD
REFD
V
OUTD
V
OUTC
REFC
CA0
CA1
CA2
Differential Nonlinearity
(LTC2609)
1.0
VCC = 5V
0.8
= 4.096V
V
REF
0.6
0.4
0.2
0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0 16384 32768 49152 65535
CODE
2609 G02
26091929f
1
LTC2609/LTC2619/LTC2629
www.BDTIC.com/LINEAR
A
W
O
LUTEXI TIS
S
A
WUW
U
(Note 1)
ARB
G
Any Pin to GND........................................... –0.3V to 6V
Any Pin to VCC.............................................– 6V to 0.3V
Maximum Junction Temperature ......................... 125°C
Storage Temperature Range ................ – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
WU
/
PACKAGE
Consult LTC Marketing for parts specified with wider operating temperature ranges.
O
RDER I FOR ATIO
TOP VIEW
1
GND
2
REFLO
3
REFA
4
V
OUTA
5
V
OUTB
6
REFB
7
CA2
8
SCL
16-LEAD PLASTIC SSOP
T
JMAX
GN PACKAGE
= 135°C, θJA = 150°C
V
16
CC
REFD
15
V
14
OUTD
V
13
OUTC
REFC
12
CA0
11
CA1
10
SDA
9
U
Operating Temperature Range:
LTC2609C/LTC2619C/LTC2629C
LTC2609C-1/LTC2619C-1/LTC2629C-1 ... 0°C to 70°C
LTC2609I/LTC2619I/LTC2629I
LTC2609I-1/LTC2619I-1/LTC2629I-1 .. –40°C to 85°C
ORDER PART NUMBER
LTC2609CGN
LTC2609CGN-1
LTC2609IGN
LTC2609IGN-1
LTC2619CGN
LTC2619CGN-1
LTC2619IGN
LTC2619IGN-1
LTC2629CGN
LTC2629CGN-1
LTC2629IGN
LTC2629IGN-1
GN PART MARKING
2609
26091
2609I
2609I1
2619
26191
2619I
2619I1
2629
26291
2629I
2629I1
LECTRICAL C CHARA TERIST
E
temperature range, otherwise specifications are at TA = 25°C. REFA = REFB = REFC = REFD = 4.096V (VCC = 5V), REFA = REFB =
REFC = REFD = 2.048V (VCC = 2.7V), REFLO = 0V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
DC Performance
Resolution ● 12 14 16 Bits
Monotonicity (Note 2) ● 12 14 16 Bits
DNL Differential Nonlinearity (Note 2) ● ±0.5 ±1 ±1LSB
INL Integral Nonlinearity (Note 2) ● ±1 ± 4 ±4 ±16 ± 16 ± 64 LSB
Load Regulation V
ZSE Zero-Scale Error Code = 0 ● 1.5 9 1.5 9 1.5 9 mV
V
OS
GE Gain Error ● ±0.1 ±0.7 ±0.1 ±0.7 ±0.1 ±0.7 %FSR
Offset Error (Note 4) ● ±1 ± 9 ±1 ± 9 ±1 ± 9mV
VOS Temperature ±6 ±6 ±6 µV/°C
Coefficient
Gain Temperature ±3 ± 3 ±3 ppm/°C
Coefficient
= VCC = 5V, Midscale
REF
= 0mA to 15mA Sourcing ● 0.02 0.125 0.1 0.5 0.3 2 LSB/mA
I
OUT
= 0mA to 15mA Sinking ● 0.02 0.125 0.1 0.5 0.4 2 LSB/mA
I
OUT
V
= VCC = 2.7V, Midscale
REF
= 0mA to 7.5mA Sourcing ● 0.04 0.25 0.2 1 0.7 4 LSB/mA
I
OUT
= 0mA to 7.5mA Sinking ● 0.05 0.25 0.2 1 0.8 4 LSB/mA
I
OUT
ICS
The ● denotes specifications which apply over the full operating
unloaded, unless otherwise noted.
OUT
LTC2629/LTC2629-1 LTC2619/LTC2619-1 LTC2609/LTC2609-1
26091929f
2
LTC2609/LTC2619/LTC2629
www.BDTIC.com/LINEAR
LECTRICAL C CHARA TERIST
E
ICS
temperature range, otherwise specifications are at T
REFC = REFD = 2.048V (VCC = 2.7V), REFLO = 0V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PSR Power Supply Rejection VCC ±10% –80 dB
R
OUT
I
SC
Reference Input
I
REF
Power Supply
V
CC
I
CC
Digital I/O (Note 9)
V
IL
V
IH
V
IL(CAn)
V
IH(CAn)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAX
DC Output Impedance V
DC Crosstalk (Note 10) Due to Full-Scale Output Change (Note 11) ±5 µV
Short-Circuit Output Current VCC = 5.5V, V
Input Voltage Range ● 0V
Resistance Normal Mode ● 88 125 160 kΩ
Capacitance 14 pF
Reference Current, Power Down Mode DAC Powered Down ● 0.001 1 µA
Positive Supply Voltage For Specified Performance ● 2.7 5.5 V
Supply Current VCC = 5V (Note 3) ● 1.25 2 mA
Low Level Input Voltage ● 0.3V
(SDA and SCL)
High Level Input Voltage ● 0.7V
(SDA and SCL)
Low Level Input Voltage on CA
(n = 0, 1, 2)
High Level Input Voltage on CA
(n = 0, 1, 2)
Resistance from CAn (n = 0, 1, 2) See Test Circuit 2 ● 10 kΩ
to Set CAn = V
to V
CC
Resistance from CAn (n = 0, 1, 2) See Test Circuit 2 ● 10 kΩ
to GND to Set CA
Resistance from CAn (n = 0, 1, 2) See Test Circuit 2 ● 2MΩ
to VCC or GND to Set CAn = Float
Low Level Output Voltage Sink Current = 3mA ● 0 0.4 V
Output Fall Time VO = V
Pulse Width of Spikes Suppressed ● 050ns
by Input Filter
Input Leakage 0.1VCC ≤ VIN ≤ 0.9V
I/O Pin Capacitance (Note 12) ● 10 pF
Capacitive Load for Each Bus Line ● 400 pF
External Capacitive Load on Address ● 10 pF
Pins CAn (n = 0, 1, 2)
n
= GND
CC
n
n
= VCC = 5V, Midscale; –15mA ≤ I
REF
V
= VCC = 2.7V, Midscale; –7.5mA ≤ I
REF
Due to Load Current Change ±4 µV/mA
Due to Powering Down (Per Channel) ±4 µV
Code: Zero Scale; Forcing Output to V
Code: Full Scale; Forcing Output to GND ● 15 36 60 mA
VCC = 2.7V, V
Code: Zero Scale; Forcing Output to V
Code: Full Scale; Forcing Output to GND
= 3V (Note 3) ● 1 1.6 mA
V
CC
DAC Powered Down (Note 3) VCC = 5V ● 0.35 1 µA
DAC Powered Down (Note 3) V
See Test Circuit 1 ● 0.15V
See Test Circuit 1 ● 0.85V
= 10pF to 400pF (Note 7)
C
B
The ● denotes specifications which apply over the full operating
= 25°C. REFA = REFB = REFC = REFD = 4.096V (VCC = 5V), REFA = REFB =
A
unloaded, unless otherwise noted. (Note 9)
OUT
≤ 15mA ● 0.030 0.15 Ω
OUT
≤ 7.5mA ● 0.035 0.15 Ω
OUT
= 5.5V
IH(MIN)
REF
= 2.7V
REF
to VO = V
CC
CC
CC
= 3V ● 0.15 1 µA
CC
, ● 20 + 0.1C
IL(MAX)
● 15 36 60 mA
● 7.5 22 50 mA
● 7.5 30 50 mA
CC
CC
CC
B
● 1 µA
250 ns
CC
CC
26091929f
V
V
V
V
V
3
LTC2609/LTC2619/LTC2629
www.BDTIC.com/LINEAR
LECTRICAL C CHARA TERIST
E
ICS
temperature range, otherwise specifications are at T
REFC = REFD = 2.048V (VCC = 2.7V), REFLO = 0V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
AC Performance
t
S
e
n
Settling Time (Note 5) ±0.024% (±1LSB at 12 Bits) 7 7 7 µs
±0.006% (±1LSB at 14 Bits) 9 9 µs
±0.0015% (±1LSB at 16 Bits) 10 µs
Settling Time for 1LSB Step ±0.024% (±1LSB at 12 Bits) 2.7 2.7 2.7 µs
(Note 6) ±0.006% (±1LSB at 14 Bits) 4.8 4.8 µs
±0.0015% (±1LSB at 16 Bits) 5.2 µs
Voltage Output Slew Rate 0.7 0.7 0.7 V/µs
Capacitive Load Driving 1000 1000 1000 pF
Glitch Impulse At Midscale Transition 12 12 12 nV • s
Multiplying Bandwidth 180 180 180 kHz
Output Voltage Noise Density At f = 1kHz 120 120 120 nV/√Hz
At f = 10kHz 100 100 100 nV/√Hz
Output Voltage Noise 0.1Hz to 10Hz 15 15 15 µV
The ● denotes specifications which apply over the full operating
= 25°C. REFA = REFB = REFC = REFD = 4.096V (VCC = 5V), REFA = REFB =
A
unloaded, unless otherwise noted.
OUT
LTC2629/LTC2629-1 LTC2619/LTC2619-1 LTC2609/LTC2609-1
P-P
UW
TI I G CHARACTERISTICS
range, otherwise specifications are at TA = 25°C. (See Figure 1) (Notes 8, 9)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC = 2.7V to 5.5V
f
SCL
t
HD(STA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
t
1
t
2
SCL Clock Frequency ● 0 400 kHz
Hold Time (Repeated) Start Condition ● 0.6 µs
Low Period of the SCL Clock Pin ● 1.3 µs
High Period of the SCL Clock Pin ● 0.6 µs
Set-Up Time for a Repeated Start Condition ● 0.6 µs
Data Hold Time ● 0 0.9 µs
Data Set-Up Time ● 100 ns
Rise Time of Both SDA and SCL Signals (Note 7) ● 20 + 0.1C
Fall Time of Both SDA and SCL Signals (Note 7) ● 20 + 0.1C
Set-Up Time for Stop Condition ● 0.6 µs
Bus Free Time Between a Stop and Start Condition ● 1.3 µs
Falling Edge of 9th Clock of the 3rd Input Byte ● 400 ns
to LDAC High or Low Transition
LDAC Low Pulse Width ● 20 ns
The ● denotes specifications which apply over the full operating temperature
B
B
300 ns
300 ns
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: Linearity and monotonicity are defined from code k
N
– 1, where N is the resolution and kL is given by kL = 0.016(2N/V
2
rounded to the nearest whole code. For V
256 and linearity is defined from code 256 to code 65,535.
Note 3: SDA, SCL at 0V or V
Note 4: Inferred from measurement at code k
scale.
Note 5: VCC = 5V, V
and 3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
REF
, CA0, CA1 and CA2 floating.
CC
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale
= 4.096V and N = 16, kL =
REF
(see Note 2) and at full
L
to code
L
REF
),
4
Note 6: VCC = 5V, V
scale and half scale – 1. Load is 2k in parallel with 200pF to GND.
Note 7: C
Note 8: All values refer to V
Note 9: These specifications apply to LTC2609/LTC2609-1,
LTC2619/LTC2619-1, LTC2629/LTC2629-1.
Note 10: DC crosstalk is measured with V
REFD = 4.096V, with the measured DAC at midscale, unless otherwise
noted.
Note 11: R
Note 12: Guaranteed by design and not production tested.
= capacitance of one bus line in pF.
B
= 2kΩ to GND or VCC.
L
= 4.096V. DAC is stepped ±1LSB between half
REF
IH(MIN)
and V
levels.
IL(MAX)
= 5V, REFA = REFB = REFC =
CC
26091929f
LTC2609/LTC2619/LTC2629
www.BDTIC.com/LINEAR
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2609
Integral Nonlinearity (INL) Differential Nonlinearity (DNL) INL vs Temperature
32
VCC = 5V
= 4.096V
V
REF
24
16
8
0
INL (LSB)
–8
–16
–24
–32
0 16384 32768 49152 65535
CODE
2609 G01
1.0
VCC = 5V
0.8
0.6
0.4
0.2
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
= 4.096V
V
REF
0
0 16384 32768 49152 65535
CODE
2609 G02
32
24
16
8
0
INL (LSB)
–8
–16
–24
–32
–50
VCC = 5V
= 4.096V
V
REF
–30 –10 10 30 50 70 90
INL (POS)
INL (NEG)
TEMPERATURE (°C)
2609 G03
DNL vs Temperature
1.0
VCC = 5V
= 4.096V
V
0.8
REF
0.6
0.4
0.2
0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
–30 –10 10 30 50 70 90
–50
TEMPERATURE (°C)
100µV/DIV
DNL (POS)
DNL (NEG)
2609 G04
INL vs V
32
24
16
8
0
INL (LSB)
–8
–16
–24
–32
0
REF
VCC = 5.5V
INL (POS)
INL (NEG)
1 2 3 4 5
V
(V)
REF
2609 G05
Settling to ±1LSB Settling of Full-Scale Step
V
OUT
SCL
2V/DIV
9TH CLOCK
OF 3RD DATA
BYTE
9.7µs
V
OUT
100µV/DIV
SCR
2V/DIV
DNL vs V
1.5
VCC = 5.5V
1.0
0.5
0
DNL (LSB)
–0.5
–1.0
–1.5
0
12.3µs
9TH CLOCK OF
3RD DATA BYTE
REF
DNL (POS)
DNL (NEG)
1 2 3 4 5
V
(V)
REF
2609 G06
2µs/DIV
= 5V, V
V
CC
1/4 SCALE TO 3/4 SCALE STEP
= 2k, CL = 200pF
R
L
AVERAGE OF 2048 EVENTS
= 4.096V
REF
2609 G07
5µs/DIV
SETTLING TO ±1LSB
= 5V, V
V
CC
CODE 512 TO 65535 STEP
AVERAGE OF 2048 EVENTS
REF
= 4.096V
2609 G08
26091929f
5
LTC2609/LTC2619/LTC2629
2µs/DIV
2609 G14
V
OUT
1mV/DIV
SCL
2V/DIV
V
CC
= 5V, V
REF
= 4.096V
1/4 SCALE TO 3/4 SCALE STEP
R
L
= 2k, CL = 200pF
AVERAGE OF 2048 EVENTS
6.8µs
9TH CLOCK
OF 3RD DATA
BYTE
www.BDTIC.com/LINEAR
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2619
Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
8
VCC = 5V
= 4.096V
V
REF
6
4
2
0
INL (LSB)
–2
–4
–6
–8
0 4096 8192 12288 16383
CODE
2609 G09
1.0
VCC = 5V
0.8
0.6
0.4
0.2
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
= 4.096V
V
REF
0
0 4096 8192 12288 16383
CODE
LTC2629
Integral Nonlinearity (INL) Differential Nonlinearity (DNL)
2.0
1.5
1.0
0.5
0
INL (LSB)
–0.5
–1.0
–1.5
–2.0
0 1024 2048 3072 4095
CODE
VCC = 5V
V
REF
= 4.096V
2609 G12
1.0
VCC = 5V
0.8
= 4.096V
V
REF
0.6
0.4
0.2
0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0 1024 2048 3072 4095
CODE
2609 G10
2609 G13
V
OUT
100µV/DIV
SCL
2V/DIV
Settling to ±1LSB
9TH CLOCK
OF 3RD DATA
BYTE
2µs/DIV
= 5V, V
V
CC
1/4 SCALE TO 3/4 SCALE STEP
= 2k, CL = 200pF
R
L
AVERAGE OF 2048 EVENTS
REF
= 4.096V
Settling to ±1LSB
8.9µs
2609 G11
6
26091929f
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