Easy DriveTM Technology Enables Rail-to-Rail
Inputs with Zero Differential Input Current
■
Directly Digitizes High Impedance Sensors with
Full Accuracy
■
Integrated Temperature Sensor
■
GND to VCC Input/Reference Common Mode Range
■
2-Wire I2C Interface
■
Programmable 50Hz, 60Hz or Simultaneous
50Hz/60Hz Rejection Mode
■
2ppm (0.25LSB) INL, No Missing Codes
■
1ppm Offset and 15ppm Full-Scale Error
■
Selectable 2x Speed Mode
■
No Latency: Digital Filter Settles in a Single Cycle
■
Single Supply 2.7V to 5.5V Operation
■
Internal Oscillator
■
Six Addresses Available and One Global Address for
Synchronization
■
Available in a Tiny (3mm × 3mm) 10-Lead
DFN Package
U
APPLICATIO S
■
Direct Sensor Digitizer
■
Weight Scales
■
Direct Temperature Measurement
■
Strain Gauge Transducers
■
Instrumentation
■
Industrial Process Control
■
DVMs and Meters
LTC2485
24-Bit ∆Σ ADC with Easy Drive
2
C Interface
U
DESCRIPTIO
®
The LTC
analog-to-digital converter with patented Easy Drive technology and I
scheme eliminates dynamic input current errors and the
shortcomings of on-chip buffering through automatic
cancellation of differential input current. This allows large
external source impedances and input signals, with rail-torail input range to be directly digitized while maintaining
exceptional DC accuracy.
The LTC2485 includes on-chip temperature sensor and an
oscillator. The LTC2485 can be configured through an I
interface to measure an external signal or internal temperature sensor and reject line frequencies. 50Hz, 60Hz or
simultaneous 50Hz/60Hz line frequency rejection can be
selected as well as a 2x speed-up mode.
The LTC2485 allows a wide common mode input range
(0V to VCC) independent of the reference voltage. The
reference can be as low as 100mV or can be tied directly
to V
lator eliminating the need for external crystals or oscillators. Absolute accuracy and low drift are automatically
maintained through continuous, transparent, offset and
full-scale calibration.
No Latency ∆Σ and Easy Drive are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
2485 combines a 24-bit plus sign No Latency ∆Σ
2
C digital interface. The patented sampling
. The LTC2485 includes an on-chip trimmed oscil-
CC
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
TM
2
C
TYPICAL APPLICATIO
V
CC
SENSE
10k
10k
= 0
I
DIFF
1µF
V
IN
V
IN
REF+V
+
LTC2485
–
GND
REF
U
1µF
SCL
SDA
CA0/F
CA1
2485 TA01
2-WIRE
2
I
C INTERFACE
0
6 ADDRESSES
CC
–
+FS Error vs R
80
VCC = 5V
= 5V
V
REF
60
+
= 3.75V
V
IN
–
= 1.25V
V
IN
40
= GND
F
O
= 25°C
T
A
20
0
–20
+FS ERROR (ppm)
–40
–60
–80
1010010k
1
SOURCE
CIN = 1µF
R
SOURCE
at IN+ and IN
1k
(Ω)
–
100k
2485 TA02
2485fa
1
LTC2485
TOP VIEW
11
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
10
9
6
7
8
4
5
3
2
1
CA0/F
0
CA1
GND
SDA
SCL
REF
+
V
CC
REF
–
IN
+
IN
–
WWWU
ABSOLUTE AXI U RATI GS
(Notes 1, 2)
Supply Voltage (VCC) to GND...................... –0.3V to 6V
Analog Input Voltage to GND ....... –0.3V to (V
Reference Input Voltage to GND .. – 0.3V to (V
Digital Input Voltage to GND ........ – 0.3V to (V
Digital Output Voltage to GND ..... – 0.3V to (V
Operating Temperature Range
LTC2485C ................................................... 0°C to 70°C
LTC2485I ................................................ – 40°C to 85°C
Storage Temperature Range ................ –65°C to 125°C
+ 0.3V)
CC
+ 0.3V)
CC
+ 0.3V)
CC
+ 0.3V)
CC
UU
W
PACKAGE/ORDER I FOR ATIO
T
= 125°C, θJA = 43°C/ W
JMAX
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC2485CDD
LTC2485IDD
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
DD PART MARKING*
LBST
ELECTRICAL CHARACTERISTICS ( OR AL SPEED)
apply over the full operating temperature range, otherwise specifications are at T
PARAMETERCONDITIONSMINTYPMAXUNITS
Resolution (No Missing Codes)0.1 ≤ V
Integral Nonlinearity5V ≤ VCC ≤ 5.5V, V
Offset Error2.5V ≤ V
Offset Error Drift2.5V ≤ V
Positive Full-Scale Error2.5V ≤ V
Positive Full-Scale Error Drift2.5V ≤ V
Negative Full-Scale Error2.5V ≤ V
Negative Full-Scale Error Drift2.5V ≤ V
Total Unadjusted Error5V ≤ VCC ≤ 5.5V, V
Output Noise5V ≤ VCC ≤ 5.5V, V
Internal PTAT SignalTA = 27°C420mV
Internal PTAT Temperature Coefficient1.4mV/°C
temperature range, otherwise specifications are at T
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
f
SCL
t
HD(SDA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
SCL Clock Frequency
Hold Time (Repeated) START Condition
LOW Period of the SCL Clock Pin
HIGH Period of the SCL Clock Pin
Set-Up Time for a Repeated START Condition
Data Hold Time
Data Set-Up Time
Rise Time for Both SDA and SCL Signals(Note 14)
Fall Time for Both SDA and SCL Signals(Note 14)
Set-Up Time for STOP Condition
The ● denotes the specifications which apply over the full operating
= 25°C. (Notes 3, 15)
A
●
●
●
●
●
●
●
●
●
●
0400kHz
0.6µs
1.3µs
0.6µs
0.6µs
0 0.9µs
100ns
20+0.1C
B
20+0.1C
B
0.6µs
300ns
300ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: V
= 2.7V to 5.5V unless otherwise specified.
CC
= REF+ – REF–, V
V
REF
V
= IN+ – IN–, V
IN
INCM
= (REF+ + REF–)/2, FS = 0.5V
REFCM
= (IN+ + IN–)/2.
REF
;
Note 4: Use internal conversion clock or external conversion clock source
with f
= 307.2kHz unless otherwise specified.
EOSC
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or f
= 256kHz ±2% (external
EOSC
oscillator).
Note 8: 60Hz mode (internal oscillator) or f
= 307.2kHz ±2% (external
EOSC
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or f
EOSC
280kHz ±2% (external oscillator).
Note 10: The external oscillator is connected to the CA0/F
external oscillator frequency, f
, is expressed in kHz.
EOSC
pin. The
0
Note 11: The converter uses the internal oscillator.
Note 12: The output noise includes the contribution of the internal
calibration operations.
Note 13: Guaranteed by design and test correlation.
Note 14: C
Note 15: All values refer to V
RMS Noise
vs Input Differential VoltageRMS Noise vs V
1.0
VCC = 5V
= 5V
V
REF
0.9
)
REF
0.8
V
IN(CM)
T
A
= 2.5V
= 25°C
1.0
0.9
0.8
VCC = 5V
= 5V
V
REF
= 0V
V
IN
V
IN(CM)
T
= 25°C
A
= GND
IN(CM)
LTC2485
RMS Noise vs Temperature (TA)
1.0
VCC = 5V
= 5V
V
REF
0.9
= 0V
V
IN
= GND
V
IN(CM)
0.8
0.7
0.6
RMS NOISE (ppm OF V
0.5
0.4
–1.5–0.50.51.5
INPUT DIFFERENTIAL VOLTAGE (V)
RMS Noise vs V
1.0
V
= 2.5V
REF
= 0V
V
IN
= GND
V
0.9
IN(CM)
= 25°C
T
A
0.8
0.7
RMS NOISE (µV)
0.6
0.5
0.4
2.7
3.13.5
CC
4.35.1 5.5
3.94.7
VCC (V)
2485 G10
2485 G13
0.7
RMS NOISE (µV)
0.6
0.5
0.4
–1
2.5–2–2.5–1012
01
RMS Noise vs V
1.0
VCC = 5V
= 0V
V
IN
0.9
0.8
0.7
RMS NOISE (µV)
0.6
0.5
0.4
= GND
V
IN(CM)
= 25°C
T
A
0
1234
356
24
V
(V)
IN(CM)
REF
V
(V)
REF
2485 G11
5
2485 G14
0.7
RMS NOISE (µV)
0.6
0.5
0.4
–45
–30 –1515
Offset Error vs V
0304560
TEMPERATURE (°C)
IN(CM)
75 90
2485 G12
Offset Error vs TemperatureOffset Error vs V
0.3
VCC = 5V
V
REF
0.2
V
)
IN
V
REF
IN(CM)
0.1
0
–0.1
OFFSET ERROR (ppm OF V
–0.2
–0.3
–300
–45
= 5V
= 0V
= GND
–15
TEMPERATURE (°C)
3090
15
45
CC
0.3
REF+ = 2.5V
–
= GND
REF
)
REF
OFFSET ERROR (ppm OF V
60
75
2485 G16
0.2
0.1
–0.1
–0.2
–0.3
0
2.7
= 0V
V
IN
V
IN(CM)
= 25°C
T
A
3.13.5
= GND
4.35.15.5
3.94.7
VCC (V)
2485 G17
Offset Error vs V
0.3
0.2
)
REF
0.1
0
–0.1
OFFSET ERROR (ppm OF V
–0.2
–0.3
0
1234
REF
VCC = 5V
–
= GND
REF
= 0V
V
IN
= GND
V
IN(CM)
= 25°C
T
A
V
(V)
REF
5
2485.G18
2485fa
7
LTC2485
TEMPERATURE (°C)
–45 –30
300
FREQUENCY (kHz)
304
310
–15
30
45
2485 G21
302
308
306
150
60 75
90
VCC = 4.1V
V
REF
= 2.5V
V
IN
= 0V
V
IN(CM)
= GND
FREQUENCY AT VCC (Hz)
0
–140
REJECTION (dB)
–120
–80
–60
–40
0
20
100
140
2485 G24
–100
–20
80
180
220200
40
60
120160
VCC = 4.1V DC ±1.4V
V
REF
= 2.5V
IN
+
= GND
IN
–
= GND
T
A
= 25°C
TEMPERATURE (°C)
–45
0
SLEEP MODE CURRENT (µA)
0.2
0.6
0.8
1.0
2.0
1.4
–15
15
3090
2485 G27
0.4
1.6
1.8
1.2
–300
45
60
75
VCC = 5V
VCC = 2.7V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Temperature Sensor
vs Temperature
0.40
VCC = 5V
= 1.4V
V
REF
0.35
(V)
REF
0.30
/V
PTAT
V
0.25
0.20
–60
30090–3060
TEMPERATURE (°C)
On-Chip Oscillator Frequency
vs V
CC
310
308
306
V
REF
V
IN
V
IN(CM)
= 2.5V
= 0V
2485 G19
= GND
120
Temperature Sensor Error
vs Temperature
5
VCC = 5V
4
3
2
1
0
–1
–2
TEMPERATURE ERROR (°C)
–3
–4
–5
–30
–60
0
TEMPERATURE (°C)
PSRR vs Frequency at V
0
VCC = 4.1V DC
= 2.5V
V
REF
–20
+
= GND
IN
–
= GND
IN
–40
= 25°C
T
A
–60
On-Chip Oscillator Frequency
vs Temperature
V
= 1.4V
REF
30
60
90
120
2485 G20
CC
PSRR vs Frequency at V
CC
FREQUENCY (kHz)
REJECTION (dB)
8
304
302
300
2.5
3.54.04.5
3.0
VCC (V)
PSRR vs Frequency at V
0
VCC = 4.1V DC ±0.7V
= 2.5V
V
REF
–20
+
= GND
IN
–
= GND
IN
–40
= 25°C
T
A
–60
–80
–100
–120
–140
30600
306503070030800
FREQUENCY AT VCC (Hz)
CC
30750
5.05.5
2485 G22
2485 G25
–80
REJECTION (dB)
–100
–120
–140
1
10100
FREQUENCY AT VCC (Hz)
Conversion Current
vs Temperature
200
180
160
140
CONVERSION CURRENT (µA)
120
100
–300
–45
–15
10k1M
1k100k
VCC = 5V
VCC = 2.7V
3090
45
15
TEMPERATURE (°C)
2485 G23
Sleep Mode Current
vs Temperature
60
75
2485 G26
2485fa
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2485
Conversion Current
vs Output Data Rate
500
V
= V
REF
CC
IN+ = GND
450
–
= GND
IN
= EXT OSC
CA0/F
400
350
300
250
SUPPLY CURRENT (µA)
200
150
100
0
= 25°C
T
A
0
2040601007010305090
OUTPUT DATA RATE (READINGS/SEC)
VCC = 5V
Integral Nonlinearity (2x Speed
Mode; V
3
VCC = 2.7V
V
REF
2
V
IN(CM)
)
1
REF
0
–1
INL (ppm OF V
–2
–3
= 2.7V, V
CC
= 2.5V
= 1.25V
90°C
–45°C, 25°C
–0.75–0.250.250.75
INPUT VOLTAGE (V)
REF
VCC = 3V
80
= 2.5V)
2485 G28
2485 G31
Integral Nonlinearity (2x Speed
Mode; V
3
2
)
1
REF
0
–1
INL (ppm OF V
–2
–3
= 5V, V
CC
–1.5–0.50.51.5
INPUT VOLTAGE (V)
= 5V)
REF
VCC = 5V
V
V
25°C, 90°C
REF
IN(CM)
–45°C
= 5V
= 2.5V
2.5–2–2.5–1012
2485 G29
Noise Histogram
(2x Speed Mode)
16
10,000 CONSECUTIVE
READINGS
14
= 5V
V
CC
= 5V
V
REF
12
= 0V
V
IN
= 25°C
T
A
10
8
6
4
NUMBER OF READINGS (%)
2
1.25–1.25
0
179
181.4183.8188.6
OUTPUT READING (µV)
RMS = 0.86µV
AVERAGE = 0.184mV
186.2
2485 G32
Integral Nonlinearity (2x Speed
Mode; VCC = 5V, V
3
VCC = 5V
= 2.5V
V
REF
2
)
1
REF
0
–1
INL (ppm OF V
–2
–3
= 1.25V
V
IN(CM)
–45°C, 25°C
–0.75–0.250.250.75
RMS Noise vs V
90°C
INPUT VOLTAGE (V)
REF
REF
= 2.5V)
(2x Speed Mode)
1.0
0.8
0.6
0.4
RMS NOISE (µV)
VCC = 5V
0.2
= 0V
V
IN
= GND
V
IN(CM)
= 25°C
T
A
0
1
0
3
2
V
(V)
REF
1.25–1.25
2485 G30
4
5
2485 G33
Offset Error vs V
(2x Speed Mode)
200
VCC = 5V
198
196
194
192
190
188
186
OFFSET ERROR (µV)
184
182
180
= 5V
V
REF
= 0V
V
IN
= 25°C
T
A
–1
0
IN(CM)
Offset Error vs Temperature
(2x Speed Mode)
240
VCC = 5V
= 5V
V
REF
230
= 0V
V
IN
= GND
V
IN(CM)
220
210
200
190
OFFSET ERROR (µV)
180
170
1
V
IN(CM)
4
(V)
3
2
5
6
2485 G34
160
–3090
–45
–15
15
30
0
TEMPERATURE (°C)
75
45
60
2485 G35
2485fa
9
LTC2485
FREQUENCY AT VCC (Hz)
1
0
–20
–40
–60
–80
–100
–120
–140
1k100k
2485 G38
10100
10k1M
REJECTION (dB)
VCC = 4.1V DC
REF
+
= 2.5V
REF
–
= GND
IN
+
= GND
IN
–
= GND
T
A
= 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Offset Error vs V
(2x Speed Mode)
250
V
= 2.5V
REF
= 0V
V
IN
V
IN(CM)
200
= 25°C
T
A
150
100
OFFSET ERROR (µV)
50
0
3
2.7
= GND
3.5
–20
–40
–60
–80
RREJECTION (dB)
–100
–120
–140
CC
4
VCC (V)
4.5
5.5
5
2485 G36
PSRR vs Frequency at V
(2x Speed Mode)
0
VCC = 4.1V DC ±1.4V
+
= 2.5V
REF
–
= GND
REF
+
= GND
IN
–
= GND
IN
= 25°C
T
A
0
60
20
80
40
FREQUENCY AT VCC (Hz)
100
120160
140
Offset Error vs V
(2x Speed Mode)
240
VCC = 5V
= 0V
V
IN
230
V
IN(CM)
= 25°C
T
A
220
210
200
190
OFFSET ERROR (µV)
180
170
160
0
CC
180
2485 G39
REF
= GND
124
220200
3
V
(V)
REF
–20
–40
–60
–80
REJECTION (dB)
–100
–120
–140
30600
PSRR vs Frequency at V
(2x Speed Mode)
5
2485 G37
PSRR vs Frequency at V
(2x Speed Mode)
0
VCC = 4.1V DC ±0.7V
+
= 2.5V
REF
–
= GND
REF
+
= GND
IN
–
= GND
IN
= 25°C
T
A
306503070030800
FREQUENCY AT VCC (Hz)
CC
CC
30750
2485 G40
10
2485fa
LTC2485
U
UU
PI FU CTIO S
REF+ (Pin 1), REF– (Pin 3): Differential Reference Input.
The voltage on these pins can have any value between GND
and V
more positive than the reference negative input, REF
at least 0.1V.
V
(Pin 8) with a 1µF tantalum capacitor in parallel with 0.1µF
ceramic capacitor as close to the part as possible.
IN+ (Pin 4), IN– (Pin 5): Differential Analog Input. The
voltage on these pins can have any value between
GND – 0.3V and V
converter bipolar input range (VIN = IN+ – IN–) extends
from –0.5 • V
the converter produces unique overrange and underrange
output codes.
SCL (Pin 6): Serial Clock Pin of the I2C Interface. The
LTC2485 can only act as a slave and the SCL pin only
accepts external serial clock. Data is shifted into the SDA
pin on the rising edges of the SCL clock and output
through the SDA pin on the falling edges of the
SCL clock.
as long as the reference positive input, REF+, is
CC
(Pin 2): Positive Supply Voltage. Bypass to GND
CC
+ 0.3V. Within these limits the
CC
to 0.5 • V
REF
. Outside this input range
REF
–
, by
2
SDA (Pin 7): Bidirectional Serial Data Line of the I
C
Interface. In the transmitter mode (Read), the conversion
result is output through the SDA pin, while in the receiver
mode (Write), the device configuration bits are input
through the SDA pin. At data input mode, the pin is high
impedance; while at data output mode, it is an open-drain
N-channel driver and therefore an external pull-up resistor
or current source to V
is needed.
CC
GND (Pin 8): Ground. Connect this pin to a ground plane
through a low impedance connection.
CA1 (Pin 9): Chip Address Control Pin. The CA1 pin is
configured as a three state (LOW, HIGH, or Floating)
address control bit for the device I
CA0/F
(Pin 10): Chip Address Control Pin/External Clock
0
Input Pin. When no transition is detected on the CA0/F
2
C address.
0
pin, it is a two state (HIGH or Floating) address control bit
for the device I
external clock signal with a frequency f
2
C address. When the pin is driven by an
of at least
EOSC
10kHz, the converter uses this signal as its system clock
and the fundamental digital filter rejection null is located at
a frequency f
/5120 and sets the Chip Address CA0
EOSC
internally to a HIGH.
UU
W
FU CTIO AL BLOCK DIAGRA
+
REF
1
+
IN
4
–
IN
5
TEMP
SENSOR
MUX
+
IN
–
IN
REF
AUTOCALIBRATION
–
REF
3
+
REF
3RD ORDER
∆Σ ADC
–
AND CONTROL
2
V
CC
SCL
6
SDA
CA1
CA0/F
0
2485 FB
7
9
10
2485fa
8
GND
I2C
SERIAL
INTERFACE
INTERNAL
OSCILLATOR
11
LTC2485
WUUU
APPLICATIO S I FOR ATIO
CONVERTER OPERATION
Converter Operation Cycle
The LTC2485 is a low power, ∆Σ analog-to-digital con-
2
verter with an I
C interface. After power on reset, its
operation is made up of three states. The converter
operating cycle begins with the conversion, followed by
the low power sleep state and ends with the data output/
input (see Figure 1).
POWER ON RESET
DEFAULT CONFIGURATION:
EXTERNAL INPUT
50/60Hz REJECTION
1X SPEED, AUTOCAL
CONVERSION
SLEEP
NO
ACKNOWLEDGE
YES
DATA OUTPUT
LTC2485 is addressed for a read operation, the device
begins outputting the conversion result under control of
the serial clock (SCL). There is no latency in the conversion result. The data output is 32 bits long and contains a
24-bit plus sign conversion result. This result is shifted
out on the SDA pin under the control of the SCL. Data is
updated on the falling edges of SCL allowing the user to
reliably latch data on the rising edge of SCL. In write
operation, the device accepts one configuration byte and
the data is shifted in on the rising edges of the SCL. A new
conversion is initiated by a STOP condition following a
valid write operation or at the conclusion of a data read
operation (read out all 32 bits).
2
I
C INTERFACE
2
The LTC2485 communicates through an I
2
The I
C interface is a 2-wire open-drain interface sup-
C interface.
porting multiple devices and masters on a single bus. The
connected devices can only pull the bus wires LOW and
they never drive the bus HIGH. The bus wires are externally connected to a positive supply voltage via a currentsource or pull-up resistor. When the bus is free, both
lines are HIGH. Data on the I2C-bus can be transferred at
rates of up to 100kbit/s in the Standard-mode and up to
400kbit/s in the Fast-mode.
STOP
NO
OR READ
32-BITS
YES
2485 F01
Figure 1. LTC2485 State Transition Diagram
Initially, the LTC2485 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced
by two orders of magnitude. The part remains in the sleep
state as long as it is not addressed for a read/write
operation. The conversion result is held indefinitely in a
static shift register while the converter is in the sleep state.
The device will not acknowledge an external request
during the conversion state. After a conversion is finished,
the device is ready to accept a read/write request. Once the
Each device on the I2C bus is recognized by a unique
address stored in that device and can operate as either a
transmitter or receiver, depending on the function of the
device. In addition to transmitters and receivers, devices
can also be considered as masters or slaves when performing data transfers. A master is the device which
initiates a data transfer on the bus and generates the clock
signals to permit that transfer. At the same time any device
addressed is considered a slave.
The LTC2485 can only be addressed as a slave. Once
addressed, it can receive configuration bits or transmit the
last conversion result. Therefore the serial clock line SCL
is an input only and the data line SDA is bidirectional. The
device supports the Standard-mode and the Fast-mode
for data transfer speeds up to 400kbit/s. Figure 2 shows
the definition of timing for Fast/Standard-mode devices
2
on the I
C-bus.
2485fa
12
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