LINEAR TECHNOLOGY LTC2421, LTC2422 Technical data

FEATURES
1-/2-Channel 20-Bit µPower
No Latency ∆Σ
DESCRIPTIO
LTC2421/LTC2422
TM
ADCs in MSOP-10
U
20-Bit ADCs in Tiny MSOP-10 Packages
1- or 2-Channel Inputs
Single Supply 2.7V to 5.5V Operation
Low Supply Current (200µA) and Auto Shutdown
Automatic Channel Selection (Ping-Pong) (LTC2422)
No Latency: Digital Filter Settles in a Single Conversion Cycle
8ppm INL, No Missing Codes
4ppm Full-Scale Error
0.5ppm Offset
1.2ppm Noise
Zero Scale and Full Scale Set for Reference and Ground Sensing
Internal Oscillator—No External Components Required
110dB Min, 50Hz/60Hz Notch Filter
Reference Input Voltage: 0.1V to V
Live Zero—Extended Input Range Accommodates
CC
12.5% Overrange and Underrange
Pin Compatible with LTC2401/LTC2402
U
APPLICATIO S
Direct Temperature Measurement
Gas Analyzers
Strain Gauge Transducers
Instrumentation
Data Acquisition
Industrial Process Control
The LTC®2421/LTC2422 are 1- and 2-channel 2.7V to 5.5V micropower 20-bit analog-to-digital converters with an integrated oscillator, 8ppm INL and 1.2ppm RMS noise. These ultrasmall devices use delta-sigma technology and a new digital filter architecture that settles in a single cycle. This eliminates the latency found in conventional ∆Σ converters and simplifies multiplexed applications.
Through a single pin, the LTC2421/LTC2422 can be configured for better than 110dB rejection at 50Hz or 60Hz ±2%, or can be driven by an external oscillator for a user defined rejection frequency in the range 1Hz to 120Hz. The internal oscillator requires no external fre­quency setting components.
These converters accept an external reference voltage from 0.1V to VCC. With an extended input conversion range of –12.5% V ZS
), the LTC2421/LTC2422 smoothly resolve the off-
SET
to 112.5% V
REF
REF
(V
REF
= FS
SET
set and overrange problems of preceding sensors or signal conditioning circuits.
The LTC2421/LTC2422 communicate through a 2- or 3-wire digital interface that is compatible with SPI and MICROWIRETM protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation.
TYPICAL APPLICATIO
2.7V TO 5.5V
1µF
110
REFERENCE VOLTAGE
ZS
+ 0.1V TO V
SET
ANALOG INPUT RANGE
– 0.12V
SET
+ 0.12V
– ZS
SET
SET
TO
REF
REF
SET
– 100mV
ZS
(V
REF
SET
FS = FS
0V TO FS
CC
)
V
2
FS
3
CH1 SDO
4
CH0
5
ZS
CC
LTC2422
SET
SET
SCK
GND
F
O
CS
U
Pseudo Differential Bridge Digitizer
2.7V TO 5.5V
V
CC
= INTERNAL OSC/50Hz REJECTION = EXTERNAL CLOCK SOURCE = INTERNAL OSC/60Hz REJECTION
9
8
7
6
3-WIRE SPI INTERFACE
24212 TA01
1
V
CC
LTC2422
2
FS
SET
4
CH0
3
CH1
5
ZS
SET
GND
9
SCK
8
CS
F
O
7
10
3-WIRE SPI INTERFACE
INTERNAL OSCILLATOR 60Hz REJECTION
24012TA02
24212f
SDO
6
1
LTC2421/LTC2422
1 2 3 4 5
V
CC
FS
SET
CH1 CH0
ZS
SET
10 9 8 7 6
F
O
SCK SDO CS GND
TOP VIEW
MS10 PACKAGE
10-LEAD PLASTIC MSOP
WW
W
ABSOLUTE MAXIMUM RATINGS
U
(Notes 1, 2)
Supply Voltage (VCC) to GND.......................– 0.3V to 7V
Analog Input Voltage to GND ....... –0.3V to (VCC + 0.3V)
Reference Input Voltage to GND .. –0.3V to (VCC + 0.3V)
Digital Input Voltage to GND........ –0.3V to (VCC + 0.3V)
Digital Output Voltage to GND ..... –0.3V to (VCC + 0.3V)
UUW
PACKAGE/ORDER INFORMATION
TOP VIEW
10
1
V
CC
FS
2
SET
V
3
IN
NC
4
ZS
5
SET
MS10 PACKAGE
10-LEAD PLASTIC MSOP
T
= 125°C, θJA = 130°C/W
JMAX
F
O
SCK
9
SDO
8
CS
7
GND
6
Consult factory for parts specified with wider operating temperature ranges.
ORDER PART NUMBER
LTC2421CMS LTC2421IMS
MS10 PART MARKING
LTUX LTUY
Operating Temperature Range
LTC2421/LTC2422C ................................ 0°C to 70°C
LTC2421/LTC2422I ............................ –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART NUMBER
LTC2422CMS LTC2422IMS
MS10 PART MARKING
T
= 125°C, θJA = 130°C/W
JMAX
LTUZ LTVA
U
CONVERTER CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. V
PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution 20 Bits No Missing Codes Resolution 0.1V FS Integral Nonlinearity FS
FS
SET SET
Offset Error 2.5V ≤ FS Offset Error Drift 2.5V ≤ FS Full-Scale Error 2.5V ≤ FS Full-Scale Error Drift 2.5V ≤ FS Total Unadjusted Error FS
FS
SET SET
Output Noise VIN = 0V (Note 13) 6 µV Normal Mode Rejection 60Hz ±2% (Note 7) 110 130 dB Normal Mode Rejection 50Hz ±2% (Note 8) 110 130 dB Power Supply Rejection, DC FS Power Supply Rejection, 60Hz ±2% FS Power Supply Rejection, 50Hz ±2% FS
SET
SET
SET
VCC, ZS
SET
= 2.5V, ZS = 5V, ZS
VCC, ZS
SET
VCC, ZS
SET
VCC, ZS
SET
VCC, ZS
SET
SET
= 2.5V, ZS = 5V, ZS
SET
= 2.5V, ZS = 2.5V, ZS = 2.5V, ZS
SET
= 0V (Note 6) 8 20 ppm of V
SET
= 0V 16 ppm of V
SET
SET
SET
The denotes specifications which apply over the full operating
= FS
REF
= 0V (Note 5) 20 Bits
SET
= 0V (Note 6) 4 10 ppm of V
= 0V 0.5 10 ppm of V
SET
= 0V 0.04 ppm of V
SET
= 0V 4 10 ppm of V
SET
= 0V 0.04 ppm of V
SET
= 0V 8 ppm of V
= 0V, VIN = 0V 100 dB = 0V, VIN = 0V, (Notes 7, 15) 110 dB = 0V, VIN = 0V, (Notes 8, 15) 110 dB
SET
– ZS
. (Notes 3, 4)
SET
REF
REF
REF REF
REF
/°C
REF
/°C
REF REF
RMS
2
24212f
LTC2421/LTC2422
UU
U
A ALOG I PUT A D REFERE CE
temperature range, otherwise specifications are at TA = 25°C. V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
FS
SET
ZS
SET
C
S(IN)
C
S(REF)
I
IN(LEAK)
I
REF(LEAK)
Input Voltage Range (Note 14) ZS Full-Scale Set Range 0.1 + ZS Zero-Scale Set Range 0FS Input Sampling Capacitance 1 pF Reference Sampling Capacitance 1.5 pF Input Leakage Current CS = V Reference Leakage Current V
U
CC
= 2.5V, CS = V
REF
The denotes specifications which apply over the full operating
REF
= FS
CC
SET
– ZS
. (Note 3)
SET
– 0.12V
SET
–100 1 100 nA
–100 1 100 nA
REF
SET
FS
+ 0.12V
SET
SET
V
CC
– 0.1 V
REF
V V
UU
DIGITAL I PUTS A D DIGITAL OUTPUTS
operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
V
IL
V
IH
V
IL
I
IN
I
IN
C
IN
C
IN
V
OH
V
OL
V
OH
V
OL
I
OZ
High Level Input Voltage 2.7V ≤ VCC 5.5V 2.5 V CS, F
O
Low Level Input Voltage 4.5V ≤ VCC 5.5V 0.8 V CS, F
O
High Level Input Voltage 2.7V ≤ VCC 5.5V (Note 9) 2.5 V SCK 2.7V V
Low Level Input Voltage 4.5V ≤ VCC 5.5V (Note 9) 0.8 V SCK 2.7V V
Digital Input Current 0V ≤ VIN V CS, F
O
Digital Input Current 0V ≤ VIN VCC (Note 9) –10 10 µA SCK
Digital Input Capacitance 10 pF CS, F
O
Digital Input Capacitance (Note 9) 10 pF SCK
High Level Output Voltage IO = –800µA VCC – 0.5 V SDO
Low Level Output Voltage IO = 1.6mA 0.4 V SDO
High Level Output Voltage IO = –800µA (Note 10) VCC – 0.5 V SCK
Low Level Output Voltage IO = 1.6mA (Note 10) 0.4 V SCK
High-Z Output Leakage –10 10 µA SDO
2.7V VCC 3.3V 2.0 V
2.7V VCC 5.5V 0.6 V
The denotes specifications which apply over the full
3.3V (Note 9) 2.0 V
CC
5.5V (Note 9) 0.6 V
CC
CC
–10 10 µA
WU
POWER REQUIRE E TS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
I
CC
Supply Voltage 2.7 5.5 V Supply Current
Conversion Mode CS = 0V (Note 12) Sleep Mode CS = V
(Note 12) 20 30 µA
CC
200 300 µA
24212f
3
LTC2421/LTC2422
UW
TI I G CHARACTERISTICS
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
EOSC
t
HEO
t
LEO
t
CONV
f
ISCK
D
ISCK
f
ESCK
t
LESCK
t
HESCK
t
DOUT_ISCK
t
DOUT_ESCK
t
1
t
2
t
3
t
4
t
KQMAX
t
KQMIN
t
5
t
6
External Oscillator Frequency Range 2.56 307.2 kHz External Oscillator High Period 0.5 390 µs External Oscillator Low Period 0.5 390 µs Conversion Time FO = 0V 130.86 133.53 136.20 ms
Internal SCK Frequency Internal Oscillator (Note 10) 19.2 kHz
Internal SCK Duty Cycle (Note 10) 45 55 % External SCK Frequency Range (Note 9) 2000 kHz External SCK Low Period (Note 9) 250 ns External SCK High Period (Note 9) 250 ns Internal SCK 24-Bit Data Output Time Internal Oscillator (Notes 10, 12) 1.23 1.25 1.28 ms
External SCK 24-Bit Data Output Time (Note 9) 24/f CS ↓ to SDO Low Z 0 150 ns CS ↑ to SDO High Z 0 150 ns CS ↓ to SCK ↓ (Note 10) 0 150 ns CS ↓ to SCK ↑ (Note 9) 50 ns SCK ↓ to SDO Valid 200 ns SDO Hold After SCK (Note 5) 15 ns SCK Set-Up Before CS 50 ns SCK Hold After CS 50 ns
The denotes specifications which apply over the full operating temperature
= V
F
O
CC
External Oscillator (Note 11)
External Oscillator (Notes 10, 11) f
External Oscillator (Notes 10, 11)
157.03 160.23 163.44 ms
20510/f
192/f
(in kHz) ms
EOSC
/8 kHz
EOSC
(in kHz) ms
EOSC
(in kHz) ms
ESCK
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired.
Note 2: All voltage values are with respect to GND. Note 3: V
= 2.7 to 5.5V unless otherwise specified. Input source
CC
resistance = 0Ω. Note 4: Internal Conversion Clock source with the F
to GND or to V f
= 153600Hz unless otherwise specified.
EOSC
or to external conversion clock source with
CC
pin tied
O
Note 5: Guaranteed by design, not subject to test. Note 6: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band.
Note 7: FO = 0V (internal oscillator) or f
= 153600Hz ±2%
EOSC
(external oscillator). Note 8: F
= VCC (internal oscillator) or f
O
= 128000Hz ±2%
EOSC
(external oscillator).
Note 9: The converter is in external SCK mode of operation such that the SCK pin is used as digital input. The frequency of the clock signal driving SCK during the data output is f
and is expressed in kHz.
ESCK
Note 10: The converter is in internal SCK mode of operation such that the SCK pin is used as digital output. In this mode of operation, the SCK pin has a total equivalent load capacitance C
LOAD
= 20pF.
Note 11: The external oscillator is connected to the FO pin. The external oscillator frequency, f
, is expressed in kHz.
EOSC
Note 12: The converter uses the internal oscillator.
= 0V or FO = VCC.
F
O
Note 13: The output noise includes the contribution of the internal calibration operations.
= FS
Note 14: V
REF
SET
– ZS
to –0.3V and the maximum to V Note 15: VCC (DC) = 4.1V, VCC (AC) = 2.8V
. The minimum input voltage is limited
SET
+ 0.3V.
CC
.
P-P
24212f
4
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Total Unadjusted Error (3V Supply) INL (3V Supply)
10
VCC = 3V
8
= 2.5V
V
REF
6 4 2 0
–2
ERROR (ppm)
–10
–4 –6 –8
0
TA = –55°C, –45°C, 25°C, 90°C
0.5 INPUT VOLTAGE (V)
1.0
1.5
Positive Extended Input Range Total Unadjusted Error (3V Supply)
VCC = 3V
8
= 2.5V
V
REF
6 4 2 0
–2
ERROR (ppm)
–4 –6 –8
–10
TA = –55°C, –45°C, 25°C, 90°C
2.50
2.55
2.60
INPUT VOLTAGE (V)
2.65 2.70
2.0
24212 G01
2.75102.80
24212 G04
2.5
10
VCC = 3V
8
= 2.5V
V
REF
6 4
2 0
–2
ERROR (ppm)
–4 –6 –8
–10
0
TA = –55°C, –45°C, 25°C, 90°C
0.5 INPUT VOLTAGE (V)
1.0
1.5
2.0
Total Unadjusted Error (5V Supply) INL (5V Supply)
10
VCC = 5V
8
V
= 5V
REF
6 4
2 0
–2
ERROR (ppm)
–4 –6 –8
–10
TA = –55°C, –45°C, 25°C, 90°C
1
0
2
INPUT VOLTAGE (V)
3
4
24212 G02
24212 G05
2.5
5
LTC2421/LTC2422
Negative Extended Input Range Total Unadjusted Error (3V Supply)
VCC = 3V
8
V
REF
6 4 2 0
–2
ERROR (ppm)
–4 –6 –8
–10
0
10
VCC = 5V
8
V
REF
6 4
2 0
–2
ERROR (ppm)
–4 –6 –8
–10
0
= 2.5V
–0.05
= 5V
TA = –55°C, –45°C, 25°C, 90°C
1
TA = 90°C
–0.15 –0.20
–0.10
INPUT VOLTAGE (V)
3
2
INPUT VOLTAGE (V)
TA = 25°C
TA = –45°C
TA = –55°C
–0.2510–0.30
4
24212 G03
5
24212 G06
Negative Extended Input Range Total Unadjusted Error (5V Supply)
VCC = 5V
8
V
REF
6 4 2 0
–2
ERROR (ppm)
–4 –6 –8
–10
0
= 5V
–0.05
–0.10 INPUT VOLTAGE (V)
TA = 25°C TA = 90°C TA = –45°C
–0.15 –0.20
TA = –55°C
–0.2510–0.30
24212 G07
Positive Extended Input Range Total Unadjusted Error (5V Supply)
VCC = 5V
8
= 5V
V
REF
6 4 2 0
–2
ERROR (ppm)
–4
–6
–10
–8
5.00
5.05
TA = 25°CTA = 90°C
5.15 5.20
5.10
INPUT VOLTAGE (V)
TA = –55°C
TA = –45°C
5.25105.30
24212 G08
Offset Error vs Reference Voltage
150
120
90
60
OFFSET ERROR (ppm)
30
0
1
0
REFERENCE VOLTAGE (V)
3
2
VCC = 5V
= 25°C
T
A
4
24212 G09
5
24212f
5
LTC2421/LTC2422
UW
TYPICAL PERFOR A CE CHARACTERISTICS
RMS Noise vs Reference Voltage Offset Error vs V
60
50
)
REF
40
30
20
RMS NOISE (ppm OF V
10
0
0
1234
REFERENCE VOLTAGE (V)
VCC = 5V
= 25°C
T
A
24212 G10
5
10
V
= 2.5V
REF
T
= 25°C
A
5
0
OFFSET ERROR (ppm)
–5
–10
2.7
3.2 3.7 4.2 4.7
CC
V
(V)
CC
5.2 5.5
24212 G11
RMS Noise vs V
10.0 V
= 2.5V
REF
T
= 25°C
A
7.5
5.0
RMS NOISE (ppm)
2.5
0
2.7
3.2 3.7 4.2 4.7
CC
VCC (V)
Noise Histogram RMS Noise vs Code Out Offset Error vs Temperature
350
VCC = 5
= 5
V
REF
300
= 0
V
IN
250
200
150
100
NUMBER OF READINGS
50
5.00 VCC = 5V
= 5V
V
REF
V
= 0.3V TO 5.3V
IN
= 25°C
T
A
3.75
2.50
RMS NOISE (ppm)
1.25
10
VCC = 5V
= 5V
V
REF
= 0V
V
IN
5
0
OFFSET ERROR (ppm)
–5
5.2 5.5
24212 G12
0
–2 0
26
OUTPUT CODE (ppm)
Full-Scale Error vs Temperature
10
VCC = 5V
= 5V
V
REF
= 5V
V
IN
5
0
–5
FULL-SCALE ERROR (ppm)
–10
–55
–30 –5 20 45
TEMPERATURE (°C)
4
24212 G13
70 95 120
24212 G16
0
0 7FFFF FFFFF
CODE OUT (HEX)
24212 G14
–10
–55
–30 –5 20 45
TEMPERATURE (°C)
Full-Scale Error vs Reference Voltage Full-Scale Error vs V
0
–25
–50
–75
–100
FULL-SCALE ERROR (ppm)
–125
–150
0
1234
REFERENCE VOLTAGE (V)
VCC = 5V
= V
V
IN
24212 G17
REF
5
10
V
= 2.5V
REF
= 2.5V
V
IN
= 25°C
T
A
5
0
–5
FULL-SCALE ERROR (ppm)
–10
2.7
3.2 3.7 4.2 4.7
70 95 120
24212 G15
CC
5.2 5.5
VCC (V)
24212 G18
24212f
6
UW
FREQUENCY AT VIN (Hz)
1
–120
REJECTION (dB)
–100
–80
–60
–40
–20
0
50 100 150 200
24212 G24
250
VCC = 5V V
REF
= 5V
V
IN
= 2.5V
F
O
= 0
INPUT FREQUENCY
0
–60
–40
0
24212 G27
–80
–100
fS/2 f
S
–120
–140
–20
REJECTION (dB)
TYPICAL PERFOR A CE CHARACTERISTICS
Conversion Current vs Temperature
230
220
210
200
190
180
SUPPLY CURRENT (µA)
170
160
150
–30 –5 45
–55
VCC = 5.5V
VCC = 4.1V
VCC = 2.7V
20
TEMPERATURE (°C)
70 95 120
24212 G19
Sleep Current vs Temperature
30
20
10
SUPPLY CURRENT (µA)
0
–30 –5 20 45
–55
VCC = 2.7V
VCC = 5V
TEMPERATURE (°C)
70 95 120
24212 G20
LTC2421/LTC2422
Rejection vs Frequency at V
0
VCC = 4.1V
= 0V
V
IN
–20
= 25°C
T
A
= 0
F
O
–40
–60
REJECTION (dB)
–80
–100
–120
1
100 10k 1M
FREQUENCY AT VCC (Hz)
CC
24212 G23
Rejection vs Frequency at V
–20
VCC = 4.1V V
= 0V
IN
= 25°C
T
A
–40
F
= 0
O
–60
–80
REJECTION (dB)
–100
–120
50
1
FREQUENCY AT VCC (Hz)
100
150
Rejection vs Frequency at V
–60
–70
–80
–90
–100
–110
REJECTION (dB)
–120
–130
–140
12–8–404812
INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%)
200
CC
250
24212 G21
IN
24212 G25
Rejection vs Frequency at V
0
VCC = 4.1V
= 0V
V
IN
–20
= 25°C
T
A
= 0
F
O
–40
–60
REJECTION (dB)
–80
–100
–120
15200
15300 15350 15400
15250
FREQUENCY AT VCC (Hz)
Rejection vs Frequency at V
0
VCC = 5V
= 5V
V
REF
–20
= 2.5V
V
IN
= 0
F
O
–40
–60
REJECTION (dB)
–80
–100
–120
SAMPLE RATE = 15.36kHz ±2%
15100
15200 15300 15400 15500
FREQUENCY AT VIN (Hz)
CC
15450 15500
24212 G22
IN
24212 G26
Rejection vs Frequency at V
Rejection vs Frequency at V
IN
IN
24212f
7
LTC2421/LTC2422
UW
TYPICAL PERFOR A CE CHARACTERISTICS
INL vs Output Rate
20
VCC = 5V
= 5V
V
REF
= EXTERNAL
F
O
18
16
14
TUE RESOLUTION (BITS)
12
10
0
10
TA = –45°C
30
20
OUTPUT RATE (Hz)
TA = 25°C
40
50 60 70 80 90
TA = 90°C
100
24212 G28
INL vs Output Rate
20
VCC = 3V
= 2.5V
V
REF
= EXTERNAL
F
O
18
16
TA = –45°C
14
TA = 25°C
TUE RESOLUTION (BITS)
12
10
102030
0
OUTPUT RATE (Hz)
40
UUU
PIN FUNCTIONS
VCC (Pin 1): Positive Supply Voltage. Bypass to GND (Pin␣ 6) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
Resolution vs Output Rate
24
22
20
TA = 90°C
50 60 70 80 90
24212 G29
100
VCC = 5V
18
V
= 5V
REF
EFFECTIVE RESOLUTION (BITS)
= EXTERNAL
f
O
STANDARD DEVIATION OF 100 SAMPLES
16
0 7.5
25
50
OUTPUT RATE (Hz)
TA = 25°C
= 90°C
T
A
T
= –45°C
A
75
100
24212 G30
be connected directly to a ground plane through a mini­mum length trace or it should be the single-point-ground in a single-point grounding system.
FS
(Pin 2): Full-Scale Set Input. This pin defines the
SET
full-scale input value. When VIN = FS
, the ADC outputs
SET
full scale (FFFFFH). The total reference voltage is FS
SET
– ZS
SET
.
CH0, CH1 (Pins 4, 3): Analog Input Channels. The input voltage range is –0.125 • V V
> 2.5V, the input voltage range may be limited by the
REF
to 1.125 • V
REF
REF
. For
absolute maximum rating of – 0.3V to VCC + 0.3V. Conver­sions are performed alternately between CH0 and CH1 for the LTC2422. Pin 4 is a No Connect (NC) on the LTC2421.
ZS
(Pin 5): Zero-Scale Set Input. This pin defines the
SET
zero-scale input value. When VIN = ZS
, the ADC
SET
outputs zero scale (00000H). GND (Pin 6): Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
CS (Pin 7): Active LOW Digital Input. A LOW on this pin enables the SDO digital output and wakes up the ADC. Following each conversion, the ADC automatically enters the Sleep mode and remains in this low power state as long as CS is HIGH. A LOW on CS wakes up the ADC. A LOW-to-HIGH transition on this pin disables the SDO digital output. A LOW-to-HIGH transition on CS during the Data Output transfer aborts the data transfer and starts a new conversion.
SDO (Pin 8): Three-State Digital Output. During the data output period, this pin is used for serial data output. When the chip select CS is HIGH (CS = VCC), the SDO pin is in a high impedance state. During the Conversion and Sleep periods, this pin can be used as a conversion status out­put. The conversion status can be observed by pulling CS LOW.
8
24212f
LTC2421/LTC2422
3.4k
SDO
24212 TC02
Hi-Z TO V
OL
VOH TO V
OL
VOL TO Hi-Z
C
LOAD
= 20pF
V
CC
U
UU
PIN FUNCTIONS
SCK (Pin 9): Bidirectional Digital Clock Pin. In the Internal Serial Clock Operation mode, SCK is used as digital output for the internal serial interface clock during the data output period. In the External Serial Clock Operation mode, SCK is used as digital input for the external serial interface. An internal pull-up current source is automatically activated in Internal Serial Clock Operation mode. The Serial Clock mode is determined by the level applied to SCK at power up and the falling edge of CS.
UU
W
FUNCTIONAL BLOCK DIAGRA
V
CC
GND
FO (Pin 10): Frequency Control Pin. Digital input that controls the ADC’s notch frequencies and conversion time. When the FO pin is connected to VCC (FO = VCC), the converter uses its internal oscillator and the digital filter’s first null is located at 50Hz. When the FO pin is connected to GND (FO = 0V), the converter uses its internal oscillator and the digital filter’s first null is located at 60Hz. When F is driven by an external clock signal with a frequency f
EOSC
O
, the converter uses this signal as its clock and the digital filter first null is located at a frequency f
OSCILLATOR
AUTOCALIBRATION
AND CONTROL
EOSC
INTERNAL
/2560.
(INT/EXT)
F
O
V
IN
V
REF
TEST CIRCUITS
SDO
DAC
3.4k
Hi-Z TO V
OH
VOL TO V
OH
VOH TO Hi-Z
C
LOAD
= 20pF
24212 TC01
ADC
DECIMATING FIR
SERIAL
INTERFACE
SDO
SCK
CS
24212 FD
24212f
9
LTC2421/LTC2422
CONVERT
SLEEP
DATA OUTPUT
24212 F02
0
1
CS AND
SCK
WUUU
APPLICATIO S I FOR ATIO
The LTC2421/LTC2422 are pin compatible with the LTC2401/LTC2402. The devices are designed to allow the user to incorporate either device in the same design with no modifications. While the LTC2421/LTC2422 output word length is 24 bits (as opposed to the 32-bit output of the LTC2401/LTC2402), its output clock timing can be identi­cal to the LTC2401/LTC2402. As shown in Figure 1, the LTC2421/LTC2422 data output is concluded on the falling edge of the 24th serial clock (SCK). In order to maintain drop-in compatibility with the LTC2401/LTC2402, it is possible to clock the LTC2421/LTC2422 with an additional 8 serial clock pulses. This results in 8 additional output bits which are always logic HIGH.
Converter Operation Cycle
The LTC2421/LTC2422 are low power, delta-sigma ana­log-to-digital converters with an easy to use 3-wire serial interface. Their operation is simple and made up of three states. The converter operating cycle begins with the con­version, followed by the sleep state and concluded with the data output (see Figure 2). The 3-wire interface consists of serial data output (SDO), a serial clock (SCK) and a chip select (CS).
Once CS is pulled LOW and SCK rising edge is applied, the device begins outputting the conversion result. There is no latency in the conversion result. The data output corre­sponds to the conversion just performed. This result is shifted out on the serial data out pin (SDO) under the control of the serial clock (SCK). Data is updated on the falling edge of SCK allowing the user to reliably latch data on the rising edge of SCK, see Figure 4. The data output state is concluded once 24 bits are read out of the ADC or when CS is brought HIGH. The device automatically initiates a new conversion and the cycle repeats.
Through timing control of the CS and SCK pins, the LTC2421/LTC2422 offer several flexible modes of opera­tion (internal or external SCK and free-running conver­sion modes). These various modes do not require program
ming configuration registers; moreover, they do not disturb the cyclic operation described above. These modes of operation are described in detail in the Serial Interface Timing Modes section.
Initially, the LTC2421/LTC2422 perform a conversion. Once the conversion is complete, the device enters the sleep state. While in this sleep state, power consumption is re­duced by an order of magnitude if CS is HIGH. The part remains in the sleep state as long as CS is logic HIGH. The conversion result is held indefinitely in a static shift regis­ter while the converter is in the sleep state.
CS
SCK
EOC = 0
SDO
EOC = 1
CONVERSION SLEEP
Figure 1. LTC2421/LTC2422 Compatible Timing with the LTC2401/LTC2402
Figure 2. LTC2421/LTC2422 State Transition Diagram
8 8 8 8 (OPTIONAL)
DATA OUT
4 STATUS BITS 20 DATA BITS
DATA OUTPUT
EOC = 1
LAST 8 BITS ALWAYS 1
CONVERSION
24212 F01
24212f
10
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