LINEAR TECHNOLOGY LTC2414, LTC2418 Technical data
FEATURES
INPUT VOLTAGE (V)
–2.5 –2 –1 0 1.0 2.0
TUE (ppm OF V
REF
)
3
2
1
0
–1
–2
–3
–1.5 –0.5 0.5 1.5
2414/18 TA01b
2.5
VCC = 5V
V
REF
= 5V
V
INCM
= V
REFCM
= 2.5V
F
O
= GND
TA = 85°C
TA = 25°C
TA = –45°C
LTC2414/LTC2418
8-/16-Channel
24-Bit No Latency ∆Σ
U
DESCRIPTIO
TM
ADCs
■
8-/16-Channel Single-Ended or 4-/8-Channel
Differential Inputs (LTC2414/LTC2418)
■
Low Supply Current (200µA, 4µA in Autosleep)
■
Differential Input and Differential Reference
with GND to V
■
2ppm INL, No Missing Codes
■
2.5ppm Full-Scale Error and 0.5ppm Offset
■
0.2ppm Noise
■
No Latency: Digital Filter Settles in a Single Cycle
Common Mode Range
CC
Each Conversion Is Accurate, Even After a New
Channel is Selected
■
Single Supply 2.7V to 5.5V Operation
■
Internal Oscillator—No External Components
Required
■
110dB Min, 50Hz/60Hz Notch Filter
U
APPLICATIO S
■
Direct Sensor Digitizer
■
Weight Scales
■
Direct Temperature Measurement
■
Gas Analyzers
■
Strain Gauge Transducers
■
Instrumentation
■
Data Acquisition
■
Industrial Process Control
The LTC®2414/LTC2418 are 8-/16-channel (4-/8-differential) micropower 24-bit ∆Σ analog-to-digital converters. They operate from 2.7V to 5.5V and include an
integrated oscillator, 2ppm INL and 0.2ppm RMS noise.
They use delta-sigma technology and provide single cycle
settling time for multiplexed applications. Through a
single pin, the
LTC2414/LTC2418
can be configured for
better than 110dB differential mode rejection at 50Hz or
60Hz ± 2%, or they can be driven by an external oscillator
for a user-defined rejection frequency. The internal oscillator requires no external frequency setting components.
The LTC2414/LTC2418 accept any external differential
reference voltage from 0.1V to V
for flexible ratiometric
CC
and remote sensing measurement applications. They can
be configured to take 4/8 differential channels or
8/16 single-ended channels. The full-scale bipolar input
range is from – 0.5V
mode voltage, V
age, V
INCM
REFCM
, may be independently set within GND to VCC.
to 0.5V
REF
, and the input common mode volt-
. The reference common
REF
The DC common mode input rejection is better than 140dB.
The LTC2414/LTC2418 communicate through a flexible
4-wire digital interface that is compatible with SPI and
TM
MICROWIRE
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
protocols.
TYPICAL APPLICATIO
THERMOCOUPLE
21
22
8
10
12
15
CH0
CH1
CH7
CH8281
CH15
COM
REF
GND
•
•
•
•
•
•
–
16-CHANNEL
MUX
U
+
–
2.7V TO 5.5V
REF+V
DIFFERENTIAL
24-BIT ∆Σ ADC
CC
911
LTC2418
F
SDI
SCK
SDO
CS
241418 TA01a
Total Unadjusted Error
vs Input Voltage
1µF
V
CC
19
O
20
18
17
16
= 50Hz REJECTION
= EXTERNAL OSCILLATOR
= 60Hz REJECTION
4-WIRE
SPI INTERFACE
241418fa
1
LTC2414/LTC2418
WWWU
ABSOLUTE AXI U RATI GS
(Notes 1, 2)
Supply Voltage (VCC) to GND.......................–0.3V to 7V
Analog Input Voltage to GND ....... –0.3V to (V
Reference Input Voltage to GND .. – 0.3V to (V
Digital Input Voltage to GND ........ – 0.3V to (V
Digital Output Voltage to GND ..... – 0.3V to (V
UU
W
+ 0.3V)
CC
+ 0.3V)
CC
+ 0.3V)
CC
+ 0.3V)
CC
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
COM
REF
REF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
CC
10
+
11
–
12
13
14
CH7
28
CH6
27
CH5
26
CH4
25
CH3
24
CH2
23
CH1
22
CH0
21
SDI
20
F
19
O
SCK
18
SDO
17
CS
16
GND
15
Operating Temperature Range
LTC2414/LTC2418C ................................ 0°C to 70°C
LTC2414/LTC2418I ............................ –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
V
COM
REF
REF
NC
NC
1
2
3
4
5
6
7
8
9
CC
10
+
11
–
12
13
14
CH7
28
CH6
27
CH5
26
CH4
25
CH3
24
CH2
23
CH1
22
CH0
21
SDI
20
F
19
O
SCK
18
SDO
17
CS
16
GND
15
28-LEAD PLASTIC SSOP
T
JMAX
ORDER PART NUMBER
LTC2414CGN
LTC2414IGN
Order Options
Tape and Reel: Add #TR
GN PACKAGE
= 125°C, θJA = 110°C/W
PART MARKING
ORDER PART NUMBER PART MARKING
LTC2418CGN
LTC2418IGN
GN PACKAGE
28-LEAD PLASTIC SSOP
T
= 125°C, θJA = 110°C/W
JMAX
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
2
241418fa
LTC2414/LTC2418
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
The ● denotes specifications which apply over the full operating
= 25°C. (Notes 3, 4)
A
PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) 0.1V ≤ V
Integral Nonlinearity 4.5V ≤ VCC ≤ 5.5V, REF+ = 2.5V, REF– = GND, V
5V ≤ VCC ≤ 5.5V, REF+ = 5V, REF– = GND, V
REF+ = 2.5V, REF– = GND, V
Offset Error 2.5V ≤ REF+ ≤ VCC, REF– = GND,
GND ≤ IN
Offset Error Drift 2.5V ≤ REF+ ≤ VCC, REF– = GND, 20 nV/°C
GND ≤ IN
Positive Full-Scale Error 2.5V ≤ REF+ ≤ VCC, REF– = GND,
IN+ = 0.75 • REF+, IN– = 0.25 • REF
Positive Full-Scale Error Drift 2.5V ≤ REF+ ≤ VCC, REF– = GND, 0.03 ppm of V
IN
+
Negative Full-Scale Error 2.5V ≤ REF+ ≤ VCC, REF– = GND,
IN+ = 0.25 • REF+, IN– = 0.75 • REF
Negative Full-Scale Error Drift 2.5V ≤ REF+ ≤ VCC, REF– = GND, 0.03 ppm of V
IN
+
Total Unadjusted Error 4.5V ≤ VCC ≤ 5.5V, REF+ = 2.5V, REF– = GND, V
5V ≤ VCC ≤ 5.5V, REF+ = 5V, REF– = GND, V
REF+ = 2.5V, REF– = GND, V
Output Noise 5V ≤ VCC ≤ 5.5V, REF+ = 5V, V
≤ VCC, –0.5 • V
REF
+
= IN– ≤ VCC (Note 14)
+
= IN– ≤ V
CC
≤ VIN ≤ 0.5 • V
REF
= 1.25V (Note 6) 5 ppm of V
INCM
= 0.75 • REF+, IN– = 0.25 • REF
= 0.25 • REF+, IN– = 0.75 • REF
= 1.25V 6 ppm of V
INCM
REF
(Note 5)
REF
= 1.25V (Note 6) 1 ppm of V
INCM
= 2.5V (Note 6)
INCM
+
+
+
+
= 1.25V 3 ppm of V
INCM
= 2.5V 3 ppm of V
INCM
●
24 Bits
●
●
●
●
2 14 ppm of V
2.5 10 µV
2.5 12 ppm of V
2.5 12 ppm of V
REF
REF
– = GND, 1 µV
REF
REF
REF
REF
/°C
REF
/°C
REF
REF
REF
RMS
GND ≤ IN– = IN+ ≤ 5V (Note 13)
U
CO VERTER CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Common Mode Rejection DC 2.5V ≤ REF+ ≤ VCC, REF– = GND,
GND ≤ IN
Input Common Mode Rejection 2.5V ≤ REF+ ≤ VCC, REF– = GND,
60Hz ±2% GND ≤ IN
Input Common Mode Rejection 2.5V ≤ REF+ ≤ VCC, REF– = GND,
50Hz ±2% GND ≤ IN
Input Normal Mode Rejection (Notes 5, 7)
60Hz ±2%
Input Normal Mode Rejection (Notes 5, 8)
50Hz ±2%
Reference Common Mode 2.5V ≤ REF+ ≤ VCC, GND ≤ REF– ≤ 2.5V,
Rejection DC V
Power Supply Rejection, DC REF+ = 2.5V, REF– = GND, IN– = IN+ = GND 110 dB
Power Supply Rejection, 60Hz ±2% REF+ = 2.5V, REF– = GND, IN– = IN+ = GND (Note 7) 120 dB
Power Supply Rejection, 50Hz ±2% REF+ = 2.5V, REF– = GND, IN– = IN+ = GND (Note 8) 120 dB
–
= IN+ ≤ 5V (Note 5)
–
= IN+ ≤ 5V (Notes 5, 7)
–
= IN+ ≤ 5V (Notes 5, 8)
= 2.5V, IN– = IN+ = GND (Note 5)
REF
The ● denotes specifications which apply over the full operating
●
130 140 dB
●
140 dB
●
140 dB
●
110 140 dB
●
110 140 dB
●
130 140 dB
241418fa
3
LTC2414/LTC2418
UU
U
A ALOG I PUT A D REFERE CE
temperature range, otherwise specifications are at T
U
The ● denotes specifications which apply over the full operating
= 25°C. (Note 3)
A
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
+
IN
–
IN
V
IN
+
REF
–
REF
V
REF
CS (IN+)IN
CS (IN–)IN
CS (REF+)REF
CS (REF–)REF
I
I
I
I
(IN+)IN+ DC Leakage Current CS = VCC = 5.5V, IN+ = GND
DC_LEAK
(IN–)IN– DC Leakage Current CS = VCC = 5.5V, IN– = 5V
DC_LEAK
(REF+)REF+ DC Leakage Current CS = VCC = 5.5V, REF+ = 5V
DC_LEAK
(REF–)REF– DC Leakage Current CS = VCC = 5.5V, REF– = GND
DC_LEAK
Absolute/Common Mode IN+ Voltage
Absolute/Common Mode IN– Voltage
Input Differential Voltage Range
+
(IN
– IN–)
Absolute/Common Mode REF+ Voltage
Absolute/Common Mode REF– Voltage
Reference Differential Voltage Range
+
(REF
– REF–)
+
Sampling Capacitance 18 pF
–
Sampling Capacitance 18 pF
+
Sampling Capacitance 18 pF
–
Sampling Capacitance 18 pF
●
GND – 0.3 VCC + 0.3 V
●
GND – 0.3 VCC + 0.3 V
●
–V
/2 V
REF
●
●
●
●
●
●
●
0.1 V
GND VCC – 0.1 V
0.1 V
–10 1 10 nA
–10 1 10 nA
–10 1 10 nA
–10 1 10 nA
REF
CC
CC
/2 V
Off Channel to In Channel Isolation DC 140 dB
= 100Ω) 1Hz 140 dB
(R
t
OPEN
I
S(OFF)
IN
MUX Break-Before-Make Interval 2.7V ≤ VCC ≤ 5.5V 70 100 300 ns
Channel Off Leakage Current Channel at VCC and GND
f
= 15,3600Hz 140 dB
S
●
–10 1 10 nA
V
V
UU
DIGITAL I PUTS A D DIGITAL OUTPUTS
operating temperature range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
V
IL
V
IH
V
IL
I
IN
I
IN
C
IN
C
IN
V
OH
High Level Input Voltage 2.7V ≤ VCC ≤ 5.5V
, SDI 2.7V ≤ VCC ≤ 3.3V 2.0 V
CS, F
O
Low Level Input Voltage 4.5V ≤ VCC ≤ 5.5V
, SDI 2.7V ≤ VCC ≤ 5.5V 0.6 V
CS, F
O
High Level Input Voltage 2.7V ≤ VCC ≤ 5.5V (Note 9)
SCK 2.7V ≤ V
Low Level Input Voltage 4.5V ≤ VCC ≤ 5.5V (Note 9)
SCK 2.7V ≤ V
Digital Input Current 0V ≤ VIN ≤ V
, SDI
CS, F
O
Digital Input Current 0V ≤ VIN ≤ VCC (Note 9)
SCK
Digital Input Capacitance 10 pF
CS, F
, SDI
O
Digital Input Capacitance (Note 9) 10 pF
SCK
High Level Output Voltage IO = – 800µA
SDO
= 25°C. (Note 3)
A
≤ 3.3V (Note 9) 2.0 V
CC
≤ 5.5V (Note 9) 0.6 V
CC
CC
The ● denotes specifications which apply over the full
●
●
●
●
●
●
●
2.5 V
0.8 V
2.5 V
0.8 V
–10 10 µA
–10 10 µA
VCC – 0.5 V
4
241418fa
LTC2414/LTC2418
UU
DIGITAL I PUTS A D DIGITAL OUTPUTS
operating temperature range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OL
V
OH
V
OL
I
OZ
Low Level Output Voltage IO = 1.6mA
SDO
High Level Output Voltage IO = – 800µA (Note 10)
SCK
Low Level Output Voltage IO = 1.6mA (Note 10)
SCK
Hi-Z Output Leakage
SDO
= 25°C. (Note 3)
A
The ● denotes specifications which apply over the full
●
●
VCC – 0.5 V
●
●
–10 10 µA
0.4 V
0.4 V
WU
POWER REQUIRE E TS
otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
I
CC
Supply Voltage
Supply Current
Conversion Mode CS = 0V (Note 12)
Sleep Mode CS = V
Sleep Mode CS = V
= 25°C. (Note 3)
A
The ● denotes specifications which apply over the full operating temperature range,
●
●
(Note 12)
CC
, 2.7V ≤ VCC ≤ 3.3V (Note 12) 2 µA
CC
●
2.7 5.5 V
200 300 µA
410 µA
UW
TI I G CHARACTERISTICS
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
EOSC
t
HEO
t
LEO
t
CONV
f
ISCK
D
ISCK
f
ESCK
t
LESCK
t
HESCK
t
DOUT_ISCK
t
DOUT_ESCK
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time FO = 0V
Internal SCK Frequency Internal Oscillator (Note 10) 19.2 kHz
Internal SCK Duty Cycle (Note 10)
External SCK Frequency Range (Note 9)
External SCK Low Period (Note 9)
External SCK High Period (Note 9)
Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 10, 12)
External SCK 32-Bit Data Output Time (Note 9)
The ● denotes specifications which apply over the full operating temperature
●
2.56 2000 kHz
●
0.25 390 µs
●
0.25 390 µs
●
130.86 133.53 136.20 ms
= V
F
O
CC
External Oscillator (Note 11)
External Oscillator (Notes 10, 11) f
External Oscillator (Notes 10, 11)
●
157.03 160.23 163.44 ms
●
●
●
●
●
●
●
●
20510/f
45 55 %
250 ns
250 ns
1.64 1.67 1.70 ms
256/f
32/f
(in kHz) ms
EOSC
/8 kHz
EOSC
2000 kHz
(in kHz) ms
EOSC
(in kHz) ms
ESCK
241418fa
5
LTC2414/LTC2418
UW
TI I G CHARACTERISTICS
range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
1
t2 CS ↑ to SDO High Z
t3 CS ↓ to SCK ↓ (Note 10)
t4 CS ↓ to SCK ↑ (Note 9)
t
KQMAX
t
KQMIN
t
5
t
6
t
7
t
8
CS ↓ to SDO Low
SCK ↓ to SDO Valid
SDO Hold After SCK ↓ (Note 5)
SCK Set-Up Before CS ↓
SCK Hold After CS ↓
SDI Setup Before SCK↑ (Note 5)
SDI Hold After SCK↑ (Note 5)
= 25°C. (Note 3)
A
The ● denotes specifications which apply over the full operating temperature
●
●
●
●
●
●
●
●
●
●
0 200 ns
0 200 ns
0 200 ns
50 ns
220 ns
15 ns
50 ns
50 ns
100 ns
100 ns
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: V
V
REF
V
INCM
= 2.7V to 5.5V unless otherwise specified.
CC
= REF+ – REF–, V
= (REF+ + REF–)/2; VIN = IN+ – IN–,
REFCM
= (IN+ + IN–)/2, IN+ and IN– are defined as the selected positive
and negative input respectively.
Note 4: F
source with f
pin tied to GND or to VCC or to external conversion clock
O
= 153600Hz unless otherwise specified.
EOSC
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7: F
= 0V (internal oscillator) or f
O
= 153600Hz ±2%
EOSC
(external oscillator).
Note 8: F
= VCC (internal oscillator) or f
O
= 128000Hz ±2%
EOSC
(external oscillator).
Note 9: The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is f
and is expressed in kHz.
ESCK
Note 10: The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance C
Note 11: The external oscillator is connected to the F
oscillator frequency, f
, is expressed in kHz.
EOSC
= 20pF.
LOAD
pin. The external
O
Note 12: The converter uses the internal oscillator.
F
= 0V or FO = VCC.
O
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
6
241418fa
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2414/LTC2418
Total Unadjusted Error
= 5V, V
(V
CC
3
FO = GND
= 5V
V
CC
= 5V
V
2
REF
= V
V
INCM
)
1
REF
0
–1
TUE (ppm OF V
–2
–3
–2.5 –2.0 –1.0 0 1.0 2.0
–1.5
= 5V)
REF
= 2.5V
REFCM
TA = 25°C
–0.5
INPUT VOLTAGE (V)
TA = –45°C
0.5 1.5
Integral Nonlinearity
= 5V, V
(V
CC
3
FO = GND
= 5V
V
CC
= 5V
V
2
REF
= V
V
INCM
)
1
REF
0
–1
INL (ppm OF V
–2
–3
–2.5 –2.0 –1.0 0 1.0 2.0
–1.5
= 5V)
REF
= 2.5V
REFCM
TA = 25°C
–0.5 0.5 1.5
INPUT VOLTAGE (V)
Noise Histogram
= 5V, V
(V
CC
30
10,000 CONSECUTIVE READINGS
= GND
F
O
= 25°C
T
25
A
= 5V
V
CC
= 5V
V
REF
20
= 0V
V
IN
= 2.5V
V
INCM
15
10
NUMBER OF READINGS (%)
5
REF
= 5V)
GAUSSIAN
DISTRIBUTION
m = –0.24ppm
σ = 0.183ppm
TA = 85°C
241418 G01
TA = 85°C
TA = –45°C
241418 G04
2.5
2.5
Total Unadjusted Error
(V
= 5V, V
CC
3
FO = GND
= 5V
V
CC
= 2.5V
V
2
REF
V
INCM
)
1
REF
0
TA = 85°C
–1
TUE (ppm OF V
–2
–3
–1.25
REF
= V
= 1.25V
REFCM
–0.25 0.25 0.75
–0.75
INPUT VOLTAGE (V)
Integral Nonlinearity
(VCC = 5V, V
3
FO = GND
= 5V
V
CC
V
2
REF
V
INCM
)
1
REF
0
–1
INL (ppm OF V
–2
–3
–1.25
= 2.5V
REF
= V
= 1.25V
REFCM
TA = 25°C
–0.25 0.25 0.75 1.25
–0.75
INPUT VOLTAGE (V)
Noise Histogram
(V
= 2.7V, V
CC
14
10,000 CONSECUTIVE READINGS
= GND
F
O
12
= 25°C
T
A
= 2.7V
V
CC
= 2.5V
V
10
REF
= 0V
V
IN
= 2.5V
V
INCM
8
6
4
NUMBER OF READINGS (%)
2
= 2.5V)
= 2.5V)
TA = 85°C
= 2.5V)
REF
TA = 25°C
TA = –45°C
241418 G02
TA = –45°C
241418 G05
GAUSSIAN
DISTRIBUTION
m = –0.48ppm
σ = 0.375ppm
1.25
Total Unadjusted Error
(V
= 2.7V, V
CC
8
FO = GND
= 2.7V
V
CC
6
= 2.5V
V
REF
V
INCM
4
)
REF
2
0
–2
TUE (ppm OF V
–4
–6
–8
–1.25
= V
–0.75
REF
= 1.25V
REFCM
TA = 25°C
–0.25 0.25 0.75
INPUT VOLTAGE (V)
Integral Nonlinearity
(V
= 2.7V, V
CC
8
FO = GND
= 2.7V
V
CC
6
V
REF
V
INCM
4
)
REF
2
0
–2
INL (ppm OF V
–4
–6
–8
–1.25
= 2.5V
= V
–0.75
REF
= 1.25V
REFCM
–0.25 0.25 0.75
INPUT VOLTAGE (V)
Long Term ADC Readings
1.0
RMS NOISE = 0.19ppm
= GND
F
O
= 25°C
T
A
)
0.5
= 5V
V
CC
REF
0
–0.5
ADC READING (ppm OF V
–1.0
V
V
V
REF
= 0V
IN
INCM
= 5V
= 2.5V
= 2.5V)
TA = –45°C
TA = 85°C
1.25
241418 G03
= 2.5V)
TA = –45°C
TA = 25°C
TA = 85°C
1.25
241418 G06
0
–1.2
–0.6 0
OUTPUT CODE (ppm OF V
REF
)
241418 G07
0.6
0
–2.4
–1.2 –0.6 0 0.6 1.2
–1.8
OUTPUT CODE (ppm OF V
REF
)
241418 G08
–1.5
0
20 30 40
10
TIME (HOURS)
50 60
LTXXXX • TPCXX
241418fa
7
LTC2414/LTC2418
UW
TYPICAL PERFOR A CE CHARACTERISTICS
RMS Noise vs Input Differential
)
REF
0.5
0.4
0.3
Voltage
FO = GND
= 25°C
T
A
= 5V
V
CC
= 5V
V
REF
= 2.5V
V
INCM
RMS Noise vs V
1.0
0.9
0.8
INCM
RMS Noise vs Temperature (TA)
1.2
1.1
1.0
0.9
0.2
RMS NOISE (ppm OF V
0.1
0
–2.5 –2.0 –1.0 0 1.0 2.0
–1.5
INPUT DIFFERENTIAL VOLTAGE (V)
RMS Noise vs V
1.0
0.9
0.8
0.7
RMS NOISE (µV)
0.6
0.5
2.7
3.1
3.5
–0.5
3.9
VCC (V)
0.5 1.5
CC
4.3
4.7
FO = GND
= 25°C
T
A
= 0V
V
IN
= GND
V
INCM
+
= 2.5V
REF
–
= GND
REF
5.1
241418 G10
241418 G13
5.5
2.5
0.7
RMS NOISE (µV)
0.6
0.5
–1
0
RMS Noise vs V
1.0
0.9
0.8
0.7
RMS NOISE (µV)
0.6
0.5
0
FO = GND
= 25°C
T
A
= 5V
V
CC
+
= 5V
REF
–
= GND
REF
= 0V
V
IN
= GND
V
INCM
1
V
INCM
4
(V)
3
2
5
241418 G11
6
REF
FO = GND
= 25°C
T
A
= 5V
V
CC
= 0V
V
IN
= GND
V
INCM
–
= GND
REF
1
3
4
2
V
(V)
REF
5
241418 G14
0.8
RMS NOISE (µV)
0.7
0.6
0.5
–50
0 25 50 75 100
–25
TEMPERATURE (°C)
Offset Error vs V
0
–0.1
)
–0.2
REF
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
OFFSET ERROR (ppm OF V
–0.9
–1.0
–1
1
0
V
2
INCM
INCM
3
(V)
FO = GND
= 5V
V
CC
= 5V
V
REF
= 0V
V
IN
= GND
V
INCM
FO = GND
= 25°C
T
A
= 5V
V
CC
+
= 5V
REF
–
REF
= 0V
V
IN
4
241418 G12
= GND
5
241418 G15
6
Offset Error vs Temperature
0
FO = GND
= 5V
V
CC
–0.1
)
REF
–0.2
–0.3
–0.4
–0.5
OFFSET ERROR (ppm OF V
–0.6
–0.7
V
REF
= 0V
V
IN
V
INCM
–45 –30
= 5V
= GND
–15 0 7545
15 30 60 90
TEMPERATURE (°C)
8
241418 G16
Offset Error vs V
1.0
FO = GND
0.8
= 25°C
T
A
= 0V
V
)
IN
0.6
REF
0.4
0.2
–0.2
–0.4
–0.6
OFFSET ERROR (ppm OF V
–0.8
–1.0
= GND
V
INCM
+
= 2.5V
REF
–
= GND
REF
0
3.1
3.5
2.7
3.9
VCC (V)
CC
4.3
4.7
5.1
241418 G17
5.5
Offset Error vs V
1.0
FO = GND
0.8
= 25°C
T
A
)
REF
–0.2
–0.4
–0.6
OFFSET ERROR (ppm OF V
–0.8
–1.0
0.6
0.4
0.2
= 5V
V
CC
= 0V
V
IN
= GND
V
INCM
–
= GND
REF
0
1
0
REF
3
4
2
V
(V)
REF
5
241418 G18
241418fa
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2414/LTC2418
Full-Scale Error vs Temperature
5
FO = GND
4
= 5V
V
CC
)
REF
FULL-SCALE ERROR (ppm OF V
3
2
1
0
–1
–2
–3
–4
–5
–60
= 5V
V
REF
= 2.5V
V
INCM
–FS ERROR
–40 0
–20
20
TEMPERATURE (°C)
40
PSRR vs Frequency at V
0
FO = GND
= 25°C
T
A
–20
= 4.1V
V
CC
DC
REF+ = 2.5V
–
–40
–60
–80
REJECTION (dB)
–100
= GND
REF
+
= GND
IN
–
= GND
IN
SDI = GND
+FS ERROR
80
60
241418 G19
CC
100
Full-Scale Error vs V
5
4
)
REF
3
2
FO = GND
1
= 25°C
T
A
= 2.5V
V
REF
0
= 0.5V
V
INCM
–1
REF– = GND
–2
–3
FULL-SCALE ERROR (ppm OF V
–4
–5
2.7
3.1
+FS ERROR
REF
3.5 3.9 4.3 4.7 5.1 5.5
VCC (V)
PSRR vs Frequency at V
0
FO = GND
= 25°C
T
A
–20
V
CC
REF
–40
REF
+
IN
–
IN
–60
SDI = GND
–80
REJECTION (dB)
–100
= 4.1V
+
= 2.5V
–
= GND
= GND
= GND
DC
±1.4V
CC
–FS ERROR
CC
241418 G20
Full-Scale Error vs V
5
4
)
REF
3
2
1
0
–1
–2
FO = GND
= 25°C
T
A
–3
= 5V
V
CC
FULL-SCALE ERROR (ppm OF V
–4
–5
= 0.5V
V
INCM
REF– = GND
0
0.5
REF
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
REF
PSRR vs Frequency at V
0
FO = GND
= 25°C
T
A
–20
V
CC
REF+ = 2.5V
–40
REF
+
IN
–
IN
–60
SDI = GND
–80
REJECTION (dB)
–100
= 4.1V
–
= GND
= GND
= GND
DC
±0.7V
P-P
REF
+FS ERROR
–FS ERROR
(V)
241418 G21
CC
–120
–140
1
10
FREQUENCY AT VCC (Hz)
Conversion Current
vs Temperature
240
230
220
210
CS = GND
200
= GND
F
O
SCK = NC
190
SDO = NC
SDI = GND
180
CONVERSION CURRENT (µA)
170
160
–45 –30 –15
100 1000 10000 100000 1000000
241418 G22
VCC = 5.5V
VCC = 5V
VCC = 3V
VCC = 2.7V
15 30
0
TEMPERATURE (°C)
756045
241418 G25
90
–120
–140
30 90 150 210
0
60 120 240
FREQUENCY AT VCC (Hz)
Supply Current at Elevated
Output Rates (FO Over Driven)
1000
CS = GND
900
= EXT OSC
F
O
+
= GND
IN
–
800
= GND
IN
SCK = NC
700
SDO = NC
SDI = GND
600
= 25°C
T
A
= V
V
REF
500
400
SUPPLY CURRENT (µA)
300
200
100
CC
0 102030
OUTPUT DATA RATE (READINGS/SEC)
40
50
180
241418 G23
VCC = 5V
VCC = 3V
60 70 80 90 100
241418 G26
–120
–140
15250 15300 15350 15400 15450
FREQUENCY AT V
(Hz)
CC
Sleep Mode Current
vs Temperature
6
5
4
3
2
SLEEP-MODE CURRENT (µA)
1
0
–45 –30 –15
VCC = 5.5V
15 30
0
TEMPERATURE (°C)
VCC = 5V
VCC = 3V
CS = V
FO = GND
SCK = NC
SDO = NC
SDI = GND
VCC = 2.7V
241418 G24
CC
756045
241418 G27
241418fa
90
9
LTC2414/LTC2418
U
UU
PI FU CTIO S
CH0 to CH15 (Pin 21 to Pin 28 and Pin 1 to Pin 8): Analog
Inputs. May be programmed for single-ended or differential mode. CH8 to CH15 (Pin 1 to Pin 8) not connected on
the LTC2414.
V
(Pin 9): Positive Supply Voltage. Bypass to GND
CC
(Pin 15) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
COM (Pin 10): The common negative input (IN–) for all
single-ended multiplexer configurations. The voltage on
Channel 0 to 15 and COM input pins can have any value
between GND – 0.3V and V
the two selected inputs (IN
input range (V
= IN+ – IN–) from – 0.5 • V
IN
Outside this input range, the converter produces unique
overrange and underrange output codes.
REF+ (Pin 11), REF– (Pin 12): Differential Reference
Input. The voltage on these pins can have any value
between GND and V
input, REF
+
, is maintained more positive than the negative
reference input, REF
CC
–
, by at least 0.1V.
GND (Pin 15): Ground. Connect this pin to a ground plane
through a low impedance connection.
CS (Pin 16): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 17): Three-State Digital Output. During the Data
Output period, this pin is used as the serial data output.
When the chip select CS is HIGH (CS = V
+ 0.3V. Within these limits,
CC
+
and IN–) provide a bipolar
to 0.5 • V
REF
REF
.
as long as the positive reference
), the SDO pin
CC
is in a high impedance state. During the Conversion and
Sleep periods, this pin is used as the conversion status
output. The conversion status can be observed by pulling
CS LOW.
SCK (Pin 18): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as the digital
output for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as the digital input for the external serial
interface clock during the Data Output period. A weak
internal pull-up is automatically activated in Internal Serial
Clock Operation mode. The Serial Clock Operation mode is
determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
(Pin 19): Frequency Control Pin. Digital input that
F
O
controls the ADC’s notch frequencies and conversion
time. When the F
pin is connected to VCC (FO = VCC), the
O
converter uses its internal oscillator and the digital filter
first null is located at 50Hz. When the F
to GND (F
= 0V), the converter uses its internal oscillator
O
and the digital filter first null is located at 60Hz. When F
is driven by an external clock signal with a frequency f
pin is connected
O
EOSC
O
,
the converters use this signal as their system clock and the
digital filter first null is located at a frequency f
EOSC
/2560.
SDI (Pin 20): Serial Digital Data Input. During the Data
Output period, this pin is used to shift in the multiplexer
address started from the first rising SCK edge. During the
Conversion and Sleep periods, this pin is in the DON’T
CARE state. However, a HIGH or LOW logic level should be
maintained on SDI in the DON’T CARE mode to avoid an
excessive current in the SDI input buffers.
NC Pins: Do Not Connect.
10
241418fa
LTC2414/LTC2418
1.69k
SDO
241418 TA03
Hi-Z TO V
OL
VOH TO V
OL
VOL TO Hi-Z
C
LOAD
= 20pF
V
CC
UU
W
FU CTIO AL BLOCK DIAGRA
V
CC
GND
+
REF
–
REF
CH0
CH1
CH15
COM
•
•
MUX
•
+
IN
–
IN
–
DIFFERENTIAL
3RD ORDER
∆Σ MODULATOR
TEST CIRCUITS
+
Figure 1
AUTOCALIBRATION
AND CONTROL
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
241418 F01
F
O
(INT/EXT)
SDI
SCK
SDO
CS
SDO
1.69k
Hi-Z TO V
VOL TO V
OH
VOH TO Hi-Z
OH
C
LOAD
241418 TA02
= 20pF
WUUU
APPLICATIO S I FOR ATIO
CONVERTER OPERATION
Converter Operation Cycle
The LTC2414/LTC2418 are multichannel, low power, deltasigma analog-to-digital converters with an easy-to-use
4-wire serial interface (see Figure 1). Their operation is made
up of three states. The converter operating cycle begins with
the conversion, followed by the low power sleep state and
ends with the data input/output (see Figure 2). The 4-wire
interface consists of serial data input (SDI), serial data output (SDO), serial clock (SCK) and chip select (CS).
Initially, the LTC2414 or LTC2418 performs a conversion.
Once the conversion is complete, the device enters the
sleep state. The part remains in the sleep state as long as
CS is HIGH. While in the sleep state, power consumption
is reduced by nearly two orders of magnitude. The conversion result is held indefinitely in a static shift register while
the converter is in the sleep state.
Once CS is pulled LOW, the device exits the low power
mode and enters the data output state. If CS is pulled HIGH
before the first rising edge of SCK, the device returns to the
low power sleep mode and the conversion result is still
held in the internal static shift register. If CS remains LOW
after the first rising edge of SCK, the device begins outputting the conversion result and inputting channel selection
bits. Taking CS high at this point will terminate the data
output state and start a new conversion. The channel
selection control bits are shifted in through SDI from the
241418fa
11
LTC2414/LTC2418
WUUU
APPLICATIO S I FOR ATIO
POWER UP
+
= CH0, IN– = CH1
IN
CONVERT
SLEEP
FALSE
CS = LOW
AND
SCK
TRUE
DATA OUTPUT
ADDRESS INPUT
Figure 2. LTC2414/LTC2418 State Transition Diagram
241418 F02
first rising edge of SCK and depending on the control bits,
the converter updates its channel selection immediately
and is valid for the next conversion. The details of channel
selection control bits are described in the Input Data Mode
section. The output data is shifted out the SDO pin under
the control of the serial clock (SCK). The output data is
updated on the falling edge of SCK allowing the user to
reliably latch data on the rising edge of SCK (see Figure 3).
The data output state is concluded once 32 bits are read
out of the ADC or when CS is brought HIGH. The device
automatically initiates a new conversion and the cycle
repeats.
Through timing control of the CS and SCK pins, the
LTC2414/LTC2418 offer several flexible modes of operation (internal or external SCK and free-running conversion
modes). These various modes do not require programming configuration registers; moreover, they do not disturb the cyclic operation described above. These modes of
operation are described in detail in the Serial Interface
Timing Modes section.
Conversion Clock
A major advantage the delta-sigma converter offers over
conventional type converters is an on-chip digital filter
(commonly implemented as a Sinc or Comb filter). For
high resolution, low frequency applications, this filter is
typically designed to reject line frequencies of 50Hz or
60Hz plus their harmonics. The filter rejection performance is directly related to the accuracy of the converter
system clock. The LTC2414/LTC2418 incorporate a highly
accurate on-chip oscillator. This eliminates the need for
external frequency setting components such as crystals or
oscillators. Clocked by the on-chip oscillator, the
LTC2418
achieve a minimum of 110dB rejection at the line
LTC2414/
frequency (50Hz or 60Hz ± 2%).
Ease of Use
The LTC2414/LTC2418 data output has no latency, filter
settling delay or redundant data associated with the
conversion cycle. There is a one-to-one correspondence
between the conversion and the output data. Therefore,
multiplexing multiple analog voltages is easy.
The LTC2414/LTC2418 perform offset and full-scale calibrations in every conversion cycle. This calibration is transparent to the user and has no effect on the cyclic operation
described above. The advantage of continuous calibration
is extreme stability of offset and full-scale readings with respect to time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2414/LTC2418 automatically enter an internal
reset state when the power supply voltage V
drops
CC
below approximately 2V. This feature guarantees the
integrity of the conversion result and of the serial interface
mode selection. (See the 3-wire I/O sections in the Serial
Interface Timing Modes section.)
When the V
voltage rises above this critical threshold,
CC
the converter creates an internal power-on-reset (POR)
signal with a typical duration of 1ms. The POR signal
clears all internal registers. Following the POR signal, the
LTC2414/LTC2418 start a normal conversion cycle and
follow the succession of states described above. The first
conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (2.7V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
The LTC2414/LTC2418 accept a truly differential external
reference voltage. The absolute/common mode voltage
241418fa
12
WUUU
APPLICATIO S I FOR ATIO
LTC2414/LTC2418
specification for the REF+ and REF– pins covers the entire
range from GND to V
+
the REF
pin must always be more positive than the REF
. For correct converter operation,
CC
–
pin.
The LTC2414/LTC2418 can accept a differential reference
voltage from 0.1V to V
. The converter output noise is
CC
determined by the thermal noise of the front-end circuits,
and, as such, its value in nanovolts is nearly constant with
reference voltage. A decrease in reference voltage will not
significantly improve the converter’s effective resolution.
On the other hand, a reduced reference voltage will improve the converter’s overall INL performance. A reduced
reference voltage will also improve the converter performance when operated with an external conversion clock
(external FO signal) at substantially higher output data rates.
Input Voltage Range
The two selected pins are labeled IN
+
and IN– (see Tables
1 and 2). Once selected (either differential or single-ended
multiplexing mode), the analog input is differential with a
common mode range for the IN+ and IN– input pins extending from GND – 0.3V to V
+ 0.3V. Outside
CC
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase rapidly. Within these limits, the LTC2414/LTC2418 convert
the bipolar differential input signal, V
– FS = – 0.5 • V
+
REF
– REF–. Outside this range the converters indicate
to +FS = 0.5 • V
REF
= IN+ – IN–, from
IN
where V
REF
REF
=
the overrange or the underrange condition using distinct
output codes.
Input signals applied to IN+ and IN– pins may extend
300mV below ground or above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN+ or IN– pins without affecting the performance
of the device. In the physical layout, it is important to
maintain the parasitic capacitance of the connection between these series resistors and the corresponding pins
as low as possible; therefore, the resistors should be
located as close as practical to the pins. In addition, series
resistors will introduce a temperature dependent offset
error due to the input leakage current. A 1nA input leakage
current will develop a 1ppm offset error on a 5k resistor if
V
= 5V. This error has a very strong temperature
REF
dependency.
Input Data Format
When the LTC2414/LTC2418 are powered up, the default
selection used for the first conversion is IN
+
= CH0 and IN
–
= CH1 (Address = 00000). In the data input/output mode
following the first conversion, a channel selection can be
updated using an 8-bit word. The LTC2414/LTC2418
serial input data is clocked into the SDI pin on the rising
edge of SCK (see Figure 3). The input is composed of an
8-bit word with the first 3 bits acting as control bits and the
remaining 5 bits as the channel address bits.
The first 2 bits are always 10 for proper updating operation. The third bit is EN. For EN = 1, the following 5 bits are
used to update the input channel selection. For EN = 0,
previous channel selection is kept and the following bits
are ignored. Therefore, the address is updated when the 3
control bits are 101 and kept for 100. Alternatively, the 3
control bits can be all zero to keep the previous address.
This alternation is intended to simplify the SDI interface
allowing the user to simply connect SDI to ground if no
update is needed. Combinations other than 101, 100 and
000 of the 3 control bits should be avoided.
When update operation is set (101), the following 5 bits
are the channel address. The first bit, SGL, decides if the
differential selection mode (SGL = 0) or the single-ended
selection mode is used (SGL = 1). For SGL = 0, two
adjacent channels can be selected to form a differential
input; for SGL = 1, one of the 8 channels (CH0-CH7) for the
LTC2414 or one of the 16 channels (CH0-CH15) for the
LTC2418 is selected as the positive input and the COM pin
is used as the negative input. For the LTC2414, the lower
half channels (CH0-CH7) are used and the channel address bit A2 should be always 0, see Table 1. While for the
LTC2418, all the 16 channels are used and the size of the
corresponding selection table (Table 2) is doubled from
that of the LTC2414 (Table 1). For a given channel selection, the converter will measure the voltage between the
two channels indicated by IN
+
and IN– in the selected row
of Tables 1 or 2.
241418fa
13
LTC2414/LTC2418
WUUU
APPLICATIO S I FOR ATIO
CS
BIT31
SDO
SCK
SDI
SLEEP DATA INPUT/OUTPUT
Hi-Z
EOC
1 0 EN SGL A2 A1 A0 DON’T CARE
BIT29
BIT28 BIT27 BIT26 BIT25 BIT24
SIGDMY
MSB B22
CONVERSON RESULT
ODD/
SIGN
Figure 3a. Input/Output Data Timing
CONVERSION RESULT
SDO
SCK
SDI
OPERATION
N – 1
ADDRESS
N – 1
ADDRESS
N
OUTPUT
N – 1
Hi-Z
DON’T CARE
CONVERSION N
CONVERSION RESULT
ADDRESS
ADDRESS
OUTPUT
Figure 3b. Typical Operation Sequence
N
N
N + 1
N
BIT6
LSB
DON’T CARE
CONVERSION N + 1
BIT4BIT30
BIT5
ODD/
SGL
SIGN
ADDRESS CORRESPONDING TO RESULT
CONVERSION RESULT
Hi-Z Hi-Z
BIT3A1BIT2A0BIT1
A2
N + 1
ADDRESS
N + 1
ADDRESS
N + 2
OUTPUT
N + 1
241418 F03b
BIT0
PARITY
CONVERSION
241418 F03a
Table 1. Channel Selection for the LTC2414 (Bit A2 Should Always Be 0)
MUX ADDRESS CHANNEL SELECTION
ODD/
SGL SIGN A2 A1 A0 01234567COM
*0 0 000 IN+IN
0 0 001 IN+IN
0 0 010 IN+IN
0 0 011 IN+IN
0 1 000 IN–IN
0 1 001 IN–IN
0 1 010 IN–IN
0 1 011 IN–IN
1 0 000 IN
1 0 001 IN
1 0 010 IN
1 0 011 IN
1 1 000 IN
1 1 001 IN
1 1 010 IN
1 1 011 IN+IN
*Default at power up
–
–
–
–
+
+
+
+
+
+
+
+
+
+
+
IN
IN
IN
IN
IN
IN
IN
–
–
–
–
–
–
–
–
241418fa
14
LTC2414/LTC2418
WUUU
APPLICATIO S I FOR ATIO
Table 2. Channel Selection for the LTC2418
MUX ADDRESS CHANNEL SELECTION
ODD/
SGL SIGN A2 A1 A0 0 123456789101112131415COM
*00000IN+IN
00001 IN+IN
00010 IN+IN
00011 IN+IN
00100 IN+IN
00101 IN+IN
00110 IN+IN
00111 IN+IN
01000IN–IN
01001 IN–IN
01010 IN–IN
01011 IN–IN
01100 IN–IN
01101 IN–IN
01110 IN–IN
01111 IN–IN
10000IN
10001 IN
10010 IN
10011 IN
10100 IN
10101 IN
10110 IN
10111 IN
11000 IN
11001 IN
11010 IN
11011 IN
11100 IN
11101 IN
11110 IN
11111 IN+IN
*Default at power up
–
–
–
–
–
–
–
–
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
IN
–
Output Data Format
The LTC2414/LTC2418 serial output data stream is 32 bits
long. The first 3 bits represent status information indicating the sign and conversion state. The next 23 bits are the
conversion result, MSB first. The next 5 bits (Bit 5 to Bit 1)
indicate which channel the conversion just performed was
selected. The address bits programmed during this data
output phase select the input channel for the next conversion cycle. These address bits are output during the subsequent data read, as shown in Figure 3b. The last bit is a
241418fa
15
Loading...