The LTC®2411/LTC2411-1 are 2.7V to 5.5V micropower
24-bit differential ∆Σ analog-to-digital converters with an
integrated oscillator, 2ppm INL and 0.29ppm RMS noise.
They use delta-sigma technology and provide single cycle
settling time for multiplexed applications. Through a
single pin, the LTC2411 can be configured for better than
110dB differential mode rejection at 50Hz or 60Hz ±2%,
and the LTC2411-1 can provide better than 87dB input
differential mode rejection over the range of 49Hz to
61.2Hz, or they can be driven by an external oscillator for
a user-defined rejection frequency. The LTC2411 and
LTC2411-1 are identical when driven by an external
oscillator. The internal oscillator requires no external
frequency setting components.
The converters accept any external differential reference
voltage from 0.1V to VCC for flexible ratiometric and
remote sensing measurement configurations. The full-
TM
scale differential input range is from –0.5V
The reference common mode voltage, V
input common mode voltage, V
, may be indepen-
INCM
dently set anywhere within the GND to VCC range of the
LTC2411/LTC2411-1. The DC common mode input rejection is better than 140dB.
The LTC2411/LTC2411-1 communicate through a flexible
3-wire digital interface that is compatible with SPI and
MICROWIRETM protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
Note 1: Absolute Maximum Ratings are those values beyond which the
life of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7 to 5.5V unless otherwise specified.
V
= REF+ – REF–, V
REF
= IN+ – IN–, V
V
IN
INCM
= (REF+ + REF–)/2;
REFCM
= (IN+ + IN–)/2.
Note 4: FO pin tied to GND or to VCC or to external conversion clock
source with f
= 153600Hz unless otherwise specified.
EOSC
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from
a straight line passing through the actual endpoints of the transfer
curve. The deviation is measured from the center of the quantization
band.
Note 7: FO = 0V (internal oscillator) or f
= 153600Hz ±2%
EOSC
(external oscillator).
Note 8: F
= VCC (internal oscillator) or f
O
= 128000Hz ±2%
EOSC
(external oscillator).
Note 9: The converter is in external SCK mode of operation such that
the SCK pin is used as digital input. The frequency of the clock signal
driving SCK during the data output is f
and is expressed in kHz.
ESCK
Note 10: The converter is in internal SCK mode of operation such that
the SCK pin is used as digital output. In this mode of operation the
SCK pin has a total equivalent load capacitance C
Note 11: The external oscillator is connected to the F
oscillator frequency, f
, is expressed in kHz.
EOSC
= 20pF.
LOAD
pin. The external
O
Note 12: The converter uses the internal oscillator.
F
= 0V or FO = VCC.
O
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: F
= 0V (internal oscillator) or f
O
= 139800Hz ±2%
EOSC
(external oscillator).
5
LTC2411/LTC2411-1
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Total Unadjusted Error
(VCC = 5V, V
3
2
)
1
REF
0
–1
TUE (ppm OF V
VCC = 5V
+
= 5V
REF
–
= GND
REF
–2
–3
= 2.5V
V
INCM
= GND
F
O
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5
REF
= 5V)
TA = 90°C
TA = 25°C
TA = –45°C
VIN (V)
Integral Nonlinearity
(VCC = 5V, V
3
VCC = 5V
+
= 5V
REF
–
2
= GND
REF
= 2.5V
V
INCM
= GND
F
)
O
1
REF
0
–1
INL (ppm OF V
–2
–3
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5
REF
= 5V)
TA = 25°C
TA = 90°C
TA = –45°C
VIN (V)
2411 G01
2411 G04
Total Unadjusted Error
(VCC = 5V, V
1.5
1.0
)
0.5
REF
0
–0.5
TUE (ppm OF V
VCC = 5V
+
= 2.5V
REF
–
= GND
REF
–1.0
–1.5
= 2.5V
V
INCM
= GND
F
O
–1.25–0.75–0.250.250.751.25
REF
VIN (V)
= 2.5V)
TA = 25°C
TA = –45°C
TA = 90°C
Integral Nonlinearity
(VCC = 5V, V
1.5
1.0
)
0.5
REF
0
–0.5
INL (ppm OF V
VCC = 5V
+
= 2.5V
REF
–
= GND
REF
–1.0
–1.5
= 2.5V
V
INCM
= GND
F
O
–1.25–0.75–0.250.250.751.25
REF
VIN (V)
= 2.5V)
TA = 25°C
TA = –45°C
TA = 90°C
2411 G02
2411 G01
Total Unadjusted Error
(VCC = 2.7V, V
10
8
6
)
4
REF
2
0
–2
TUE (ppm OF V
VCC = 2.7V
–4
+
= 2.5V
REF
–
–6
= GND
REF
= 1.25V
V
INCM
–8
= GND
F
O
–10
–1.25
–0.75
Integral Nonlinearity
(VCC = 2.7V, V
10
8
6
)
4
REF
2
0
–2
INL (ppm OF V
VCC = 2.7V
–4
+
= 2.5V
REF
–
–6
= GND
REF
= 1.25V
V
INCM
–8
= GND
F
O
–10
–1.25
–0.75
–0.25
–0.25
= 2.5V)
REF
TA = –45°C
TA = 25°C
VIN (V)
= 2.5V)
REF
TA = –45°C
TA = 25°C
VIN (V)
0.25
0.25
TA = 90°C
0.75
TA = 90°C
0.75
1.25
2411 G03
1.25
2411 G06
Noise Histogram
16
10,000 CONSECUTIVE
READINGS
14
V
= 5V
CC
= 5V
V
REF
12
= 0V
V
IN
= 2.5V
V
INCM
10
= GND
F
O
T
= 25°C
A
8
6
4
NUMBER OF READINGS (%)
2
0
–1.5 –1.00
–2.0
OUTPUT CODE (ppm OF V
6
–0.5
GAUSSIAN
DISTRIBUTION
m = –0.647ppm
σ = 0.287ppm
0.5
)
REF
2411 G07
)
REF
–0.5
–1.0
ADC READING (ppm OF V
–1.5
1
–2.0
Long Term ADC Readings
1.0
VCC = 5V, V
= GND, TA = 25°C, RMS NOISE = 0.29ppm
F
O
0.5
0
0
5
REF
10 15 20
= 5V, VIN = 0V, V
25 30 35 40 45 50 55 60
TIME (HOURS)
INCM
= 2.5V,
2411 G08
RMS Noise
vs Input Differential Voltage
0.5
0.4
)
REF
0.3
0.2
TA = 25°C
= 5V
V
CC
RMS NOISE (ppm OF V
0.1
= 5V
V
REF
= 2.5V
V
INCM
= GND
F
O
0
–2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 2.5
INPUT DIFFERENTIAL VOLTAGE (V)
2411 G09
UW
VCC (V)
2.7
RMS NOISE (µV)
1.50
1.55
1.60
3.94.7
2411 G12
1.45
1.40
3.1 3.5
4.35.1 5.5
1.35
1.30
REF+ = 2.5V
REF
–
= GND
V
IN
= 0V
F
O
= GND
T
A
= 25°C
TEMPERATURE (°C)
–45
–3
FULL-SCALE ERROR (ppm OF V
REF
)
–2
0
1
2
–15
15
3090
2411 G18
–1
–300
45
60
75
3
VCC = 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 2.5V
IN
–
= GND
F
O
= GND
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2411/LTC2411-1
RMS Noise vs V
1.60
VCC = 5V
+
= 5V
REF
REF
–1
–
= GND
01
RMS NOISE (µV)
1.55
1.50
1.45
1.40
1.35
1.30
RMS Noise vs V
1.60
VCC = 5V
–
= GND
REF
1.55
= 0V
V
IN
= GND
F
O
= 25°C
T
A
1.50
1.45
RMS NOISE (µV)
1.40
1.35
1.30
0
INCM
= 0V
V
IN
= GND
F
O
= 25°C
T
A
356
24
V
(V)
INCM
2411 G10
REF
1234
V
(V)
REF
2411 G13
1.60
1.55
1.50
1.45
1.40
RMS NOISE (µV)
1.35
1.30
–0.1
)
–0.2
REF
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
OFFSET ERROR (ppm OF V
–0.9
5
–1.0
RMS Noise vs TemperatureRMS Noise vs V
VCC = 5V
V
= 5V
REF
= 0V
V
IN
= GND
V
INCM
= GND
F
O
–300
–15
–45
Offset Error vs V
0
VCC = 5V
+
REF
= 5V
–
REF
= GND
V
= 0V
IN
F
= GND
O
= 25°C
T
A
025
–1
15
TEMPERATURE (°C)
INCM
1
V
INCM
60
3090
3
(V)
75
45
2411 G11
46
2411 G14
Offset Error vs Temperature
0
VCC = 5V
–0.1
V
= 5V
REF
)
V
= 0V
IN
–0.2
V
INCM
F
= GND
O
–300
–45
= GND
–15
TEMPERATURE (°C)
REF
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
OFFSET ERROR (ppm OF V
–0.9
–1.0
CC
3090
45
15
60
75
2411 G15
Offset Error vs V
0
REF+ = 2.5V
–
0.8
REF
)
REF
–0.2
–0.4
–0.6
OFFSET ERROR (ppm OF V
–0.8
–1.0
= GND
V
= 0V
IN
0.6
V
INCM
F
= GND
0.4
O
= 25°C
T
A
0.2
0
3.13.95.1
2.7
CC
= GND
3.5
VCC (V)
4.3
4.75.5
2411 G16
Offset Error vs V
0
0.8
)
0.6
REF
0.4
0.2
0
–0.2
–0.4
–0.6
OFFSET ERROR (ppm OF V
–0.8
–1.0
1
0
REF
2
V
(V)
REF
VCC = 5V
REF– = GND
V
= 0V
IN
V
= GND
INCM
F
= GND
O
= 25°C
T
A
34
2411 G17
+Full-Scale Error vs Temperature
5
7
LTC2411/LTC2411-1
FREQUENCY AT VCC (Hz)
7600
–60
–40
0
7750
2411 G24
–80
–100
765077007800
–120
–140
–20
REJECTION (dB)
VCC = 4.1V DC ±0.7V
P-P
REF+ = 2.5V
REF
–
= GND
IN
+
= GND
IN
–
= GND
F
O
= GND
T
A
= 25°C
FREQUENCY AT VCC (Hz)
6880
–60
–40
0
7030
2411 G33
–80
–100
693069807080
–120
–140
–20
REJECTION (dB)
VCC = 4.1V DC ±0.7V
REF
+
= 2.5V
REF
–
= GND
IN
+
= GND
IN
–
= GND
F
O
= GND
T
A
= 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
+Full-Scale Error vs Temperature
5
VCC = 2.7V
+
4
REF
3
2
1
0
–1
–2
–3
–4
–5
–45
= 2.5V
–
= GND
REF
+
IN
= 1.25V
–
= GND
IN
F
= GND
O
–300
–15
3090
45
15
TEMPERATURE (°C)
)
REF
FULL-SCALE ERROR (ppm OF V
PSRR vs Frequency at V
(LTC2411)
0
VCC = 4.1V DC
+
= 2.5V
REF
–20
–
REF
= GND
+
= GND
IN
–
–40
= GND
IN
= GND
F
O
= 25°C
T
A
–60
CC
–Full-Scale Error vs Temperature
3
)
2
REF
1
0
VCC = 5V
–1
+
= 5V
REF
–
= GND
REF
+
IN
= GND
–2
–
= 2.5V
IN
–FULL-SCALE ERROR (ppm OF V
= GND
F
O
60
75
2411 G19
–3
–300
–15
–45
15
TEMPERATURE (°C)
PSRR vs Frequency at V
60
3090
75
45
2411 G20
CC
(LTC2411)
0
VCC = 4.1V DC ±1.4V
+
= 2.5V
REF
–40
–60
REF
+
IN
–
IN
= GND
F
O
= 25°C
T
A
–
= GND
= GND
= GND
–20
–Full-Scale Error vs Temperature
5
4
)
REF
3
2
1
0
–1
VCC = 2.7V
+
–2
= 2.5V
REF
–
REF
= GND
–3
+
= GND
IN
–
–FULL-SCALE ERROR (ppm OF V
–4
–5
–45
= 1.25V
IN
= GND
F
O
–300
–15
3090
45
15
TEMPERATURE (°C)
PSRR vs Frequency at V
(LTC2411)
CC
60
75
2411 G21
–80
REJECTION (dB)
–100
–120
–140
1
10100
FREQUENCY AT VCC (Hz)
PSRR vs Frequency at V
(LTC2411-1)
0
VCC = 4.1V DC
+
REF
1
REF
IN
IN
F
O
T
A
–
+
= GND
–
= GND
= GND
= 25°C
= 2.5V
= GND
10100
FREQUECY AT VCC (Hz)
–20
–40
–60
–80
REJECTION (dB)
–100
–120
–140
10k1M
1k100k
CC
10k1M
1k100k
2411 G22
2411 G31
–80
REJECTION (dB)
–100
–120
–140
0
30 60
90
FREQUENCY AT VCC (Hz)
PSRR vs Frequency at V
(LTC2411-1)
0
VCC = 4.1V DC ±1.4V
+
= 2.5V
REF
–20
–
= GND
REF
+
= GND
IN
–
–40
= GND
IN
= GND
F
O
= 25°C
T
A
–60
–80
REJECTION (dB)
–100
–120
–140
0
40 60120160
20100140
80200180220
FREQUENCY AT VCC (Hz)
150210
120180
CC
2411 G23
2411 G32
240
PSRR vs Frequency at V
(LTC2411-1)
CC
8
UW
OUTPUT DATA RATE (READINGS/SEC)
10
RESOLUTION (BITS)
14
18
22
12
16
20
20406080
2411 G30
10010030507090
VCC = 5V
REF
–
= GND
V
INCM
= 2.5V
V
IN
= 0V
F
O
= EXT OSC
RES = LOG
2(VREF
/INL
MAX
)
T
A
= 25°C
V
REF
= 2.5V
V
REF
= 5V
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2411/LTC2411-1
Conversion Current
vs Temperature
240
FO = GND
CS = GND
230
SCK = NC
SDO = NC
220
210
200
190
180
CONVERSION CURRENT (µA)
170
160
–3090
–45
–15
0
TEMPERATURE (°C)
VCC = 5.5V
VCC = 2.7V
15
30
Offset Error vs Output Data Rate
40
20
)
REF
0
–20
–40
–60
VCC = 5V
–
= GND
REF
–80
OFFSET ERROR (ppm OF V
–100
–120
= 2.5V
V
INCM
V
= 0V
IN
= EXT OSC
F
O
= 25°C
T
A
20406080
OUTPUT DATA RATE (READINGS/SEC)
V
REF
V
VCC = 5V
VCC = 3V
45
= 2.5V
= 5V
REF
Conversion Current
vs Output Data Rate
650
REF+ = V
600
550
500
450
400
350
300
SUPPLY CURRENT (µA)
250
200
75
60
2411 G25
150
CC
REF– = GND
+
IN
= GND
–
= GND
IN
T
= 25°C
A
SCK = NC
SDO = NC
CS = GND
F
= EXT OSC
O
2010
0
OUTPUT DATA RATE (READINGS/SEC)
4030
Resolution (NOISE
= 5V
V
CC
VCC = 3V
60 7090
50
RMS
80
≤ 1LSB)
100
2411 G26
vs Output Data Rate
22
V
= 5V
REF
21
V
= 2.5V
REF
20
VCC = 5V
–
= GND
REF
10010030507090
2411 G28
RESOLUTION (BITS)
19
18
= 2.5V
V
INCM
= 0V
V
IN
= EXT OSC
F
O
RES = LOG
T
= 25°C
A
10
0
OUTPUT DATA RATE (READINGS/SEC)
/NOISE
2(VREF
20
40
30
)
RMS
50
60
80
70
90
2411 G29
100
Sleep Mode Current
vs Temperature
5
4
3
2
SLEEP MODE CURRENT (µA)
1
0
–3090
–45
–15
Resolution (INL
15
30
0
TEMPERATURE (°C)
MAX
vs Output Data Rate
FO = GND
CS = V
SCK = NC
SDO = NC
VCC = 5.5V
VCC = 5V
VCC = 3V
VCC = 2.7V
45
60
≤ 1LSB)
CC
75
2411 G27
PI FU CTIO S
VCC (Pin 1): Positive Supply Voltage. Bypass to GND
(Pin␣ 6) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.REF+ (Pin 2), REF– (Pin 3): Differential Reference Input.
The voltage on these pins can have any value between GND
and VCC as long as the reference positive input, REF+, is
more positive than the reference negative input, REF–, by
at least 0.1V.
IN+ (Pin 4), IN– (Pin 5): Differential Analog Input. The
voltage on these pins can have any value between
U
UU
GND – 0.3V and VCC + 0.3V. Within these limits, the
converter bipolar input range (VIN = IN+ – IN–) extends
from –0.5 • (V
range, the converter produces unique overrange and
underrange output codes.
GND (Pin 6): Ground. Connect this pin to a ground plane
through a low impedance connection.
CS (Pin 7): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion the ADC automatically enters
) to 0.5 • (V
REF
). Outside this input
REF
9
LTC2411/LTC2411-1
U
UU
PI FU CTIO S
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 8): Three-State Digital Output. During the Data
Output period, this pin is used as the serial data output.
When the chip select CS is HIGH (CS = VCC), the SDO pin
is in a high impedance state. During the Conversion and
Sleep periods, this pin is used as the conversion status
output. The conversion status can be observed by pulling
CS LOW.
SCK (Pin 9): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as the digital
output for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as the digital input for the external serial
interface clock during the Data Output period. A weak
internal pull-up is automatically activated in Internal Serial
Clock Operation mode. The Serial Clock Operation mode is
determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
FO (Pin 10): Frequency Control Pin. Digital input that
controls the ADC’s notch frequencies and conversion
time. For the LTC2411, when the FO pin is connected to V
CC
(FO = VCC), the converter uses its internal oscillator and the
digital filter first null is located at 50Hz. When the FO pin is
connected to GND (FO = OV), the converter uses its internal
oscillator and the digital filter first null is located at 60Hz.
For the LTC2411-1, the converter provides simultaneous
50Hz/60Hz rejection with the FO pin connected to GND.
When FO is driven by an external clock signal with a
frequency f
, the converters use this signal as their
EOSC
system clock and the digital filter first null is located at a
frequency f
EOSC
/2560.
UU
W
FU CTIO AL BLOCK DIAGRA
V
CC
GND
+
REF
REF
IN
–
IN
+
–
+
–
–+
DAC
∫∫∫
TEST CIRCUITS
SDO
1.69k
Hi-Z TO V
VOL TO V
VOH TO Hi-Z
C
= 20pF
LOAD
2411 TA03
OH
OH
∑
Figure 1
ADC
AUTOCALIBRATION
AND CONTROL
DECIMATING FIR
V
SDO
Hi-Z TO V
VOH TO V
VOL TO Hi-Z
INTERNAL
OSCILLATOR
F
O
(INT/EXT)
SDO
SERIAL
INTERFACE
CC
1.69k
= 20pF
C
LOAD
2411 TA04
OL
OL
SCK
CS
2411 FD
10
WUUU
APPLICATIO S I FOR ATIO
LTC2411/LTC2411-1
CONVERTER OPERATION
Converter Operation Cycle
The LTC2411/LTC2411-1 are low power, delta-sigma analog-to-digital converters with an easy-to-use 3-wire serial
interface (see Figure 1). Their operation is made up of three
states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with
the data output (see Figure 2). The 3-wire interface consists
of serial data output (SDO), serial clock (SCK) and chip
select (CS).
Initially, the LTC2411/LTC2411-1 perform a conversion.
Once the conversion is complete, the devices enter the
sleep state. While in this sleep state, power consumption
is reduced by an order of magnitude. The parts remain in
the sleep state as long as CS is HIGH. The conversion
result is held indefinitely in a static shift register while the
converter is in the sleep state.
Once CS is pulled LOW, the devices begin outputting the
conversion result. There is no latency in the conversion
result. The data output corresponds to the conversion just
performed. This result is shifted out on the serial data out
pin (SDO) under the control of the serial clock (SCK). Data
is updated on the falling edge of SCK allowing the user to
reliably latch data on the rising edge of SCK (see Figure 3).
The data output state is concluded once 32 bits are read
out of the ADC or when CS is brought HIGH. The devices
automatically initiate a new conversion and the cycle
repeats.
CONVERT
SLEEP
FALSE
CS = LOW
AND
SCK
TRUE
DATA OUTPUT
2411 F02
Figure 2. LTC2411/LTC2411-1 State Transition Diagram
Through timing control of the CS and SCK pins, the
LTC2411/LTC2411-1 offer several flexible modes of operation (internal or external SCK and free-running conversion modes). These various modes do not require
programming configuration registers; moreover, they do
not disturb the cyclic operation described above. These
modes of operation are described in detail in the Serial
Interface Timing Modes section.
Conversion Clock
A major advantage the delta-sigma converter offers over
conventional type converters is an on-chip digital filter
(commonly implemented as a Sinc or Comb filter). For
high resolution, low frequency applications, this filter is
typically designed to reject line frequencies of 50 or 60Hz
plus their harmonics. The filter rejection performance is
directly related to the accuracy of the converter system
clock. The LTC2411/LTC2411-1 incorporate a highly accurate on-chip oscillator. This eliminates the need for
external frequency setting components such as crystals or
oscillators. Clocked by the on-chip oscillator, the LTC2411
achieves a minimum of 110dB rejection at the line frequency (50Hz or 60Hz ±2%) and the LTC2411-1 achieves
a minimum of 87dB rejection over 49Hz to 61.2Hz.
Ease of Use
The LTC2411/LTC2411-1 data output has no latency,
filter settling delay or redundant data associated with the
conversion cycle. There is a one-to-one correspondence
between the conversion and the output data. Therefore,
multiplexing multiple analog voltages is easy.
The LTC2411/LTC2411-1 perform offset and full-scale
calibrations in every conversion cycle. This calibration is
transparent to the user and has no effect on the cyclic
operation described above. The advantage of continuous
calibration is extreme stability of offset and full-scale readings with respect to time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2411/LTC2411-1 automatically enter an internal
reset state when the power supply voltage VCC drops
below approximately 1.9V. This feature guarantees the
11
LTC2411/LTC2411-1
WUUU
APPLICATIO S I FOR ATIO
integrity of the conversion result and of the serial interface
mode selection. (See the 2-wire I/O sections in the Serial
Interface Timing Modes section.)
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 1ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2411/LTC2411-1 start a normal conversion
cycle and follow the succession of states described above.
The first conversion result following POR is accurate
within the specifications of the device if the power supply
voltage is restored within the operating range (2.7V to
5.5V) before the end of the POR time interval.
Reference Voltage Range
The LTC2411/LTC2411-1 accept a truly differential external reference voltage. The absolute/common mode voltage specification for the REF+ and REF– pins covers the
entire range from GND to VCC. For correct converter
operation, the REF+ pin must always be more positive than
the REF– pin.
The LTC2411/LTC2411-1 can accept a differential reference voltage from 0.1V to VCC. The converter output noise
is determined by the thermal noise of the front-end circuits, and, as such, its value in nanovolts is nearly constant
with reference voltage. A decrease in reference voltage will
not significantly improve the converter’s effective resolution. On the other hand, a reduced reference voltage will
improve the converter’s overall INL performance. A reduced
reference voltage will also improve the converter performance when operated with an external conversion clock
(external FO signal) at substantially higher output data rates.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN+ and IN– input pins
extending from GND – 0.3V to VCC + 0.3V. Outside
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2411/LTC2411-1 convert the bipolar differential input signal, VIN = IN+ – IN–,
from –FS = –0.5 • V
REF+ – REF–. Outside this range the converter indicates
to +FS = 0.5 • V
REF
where V
REF
REF
=
the overrange or the underrange condition using distinct
output codes.
Input signals applied to IN+ and IN– pins may extend by
300mV below ground and above VCC. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN+ and IN– pins without affecting the performance of the device. In the physical layout, it is important
to maintain the parasitic capacitance of the connection
between these series resistors and the corresponding pins
as low as possible; therefore, the resistors should be
located as close as practical to the pins. In addition, series
resistors will introduce a temperature dependent offset
error due to the input leakage current. A 1nA input leakage
current will develop a 1ppm offset error on a 5k resistor if
V
= 5V. This error has a very strong temperature
REF
dependency.
Output Data Format
The LTC2411/LTC2411-1 serial output data stream is 32
bits long. The first 3 bits represent status information indicating the sign and conversion state. The next 24 bits are
the conversion result, MSB first. The remaining 5 bits are
sub LSBs beyond the 24-bit level that may be included in
averaging or discarded without loss of resolution. The third
and fourth bits together are also used to indicate an
underrange condition (the differential input voltage is below –FS) or an overrange condition (the differential input
voltage is above +FS).
Bit 31 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 30 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 29 (third output bit) is the conversion result sign indicator (SIG). If VIN is >0, this bit is HIGH. If VIN is <0, this
bit is LOW.
Bit 28 (fourth output bit) is the most significant bit (MSB)
of the result. This bit in conjunction with Bit 29 also
provides the underrange or overrange indication. If both
Bit 29 and Bit 28 are HIGH, the differential input voltage is
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