LINEAR TECHNOLOGY LTC2356-12, LTC2356-14 Technical data

FEATURES
FREQUENCY (MHz)
0.1
–80
THD, 2nd, 3rd (dB)
–74
–68
–62
–56
1 10 100
2356 G02
–86
–92
–98
–104
–50
THD 2nd
3rd
LTC2356-12/LTC2356-14
Serial 12-Bit/14-Bit, 3.5Msps
Sampling ADCs with Shutdown
U
DESCRIPTIO
3.5Msps Conversion Rate
74.1dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits
Low Power Dissipation: 18mW
3.3V Single Supply Operation
2.5V Internal Bandgap Reference can be Overdriven
3-Wire SPI-Compatible Serial Interface
Sleep (13µW) Shutdown Mode
Nap (4mW) Shutdown Mode
80dB Common Mode Rejection
±1.25V Bipolar Input Range
Tiny 10-Lead MSOP Package
U
APPLICATIO S
Communications
Data Acquisition Systems
Uninterrupted Power Supplies
Multiphase Motor Control
Multiplexed Data Acquisition
RFID
The LTC®2356-12/LTC2356-14 are 12-bit/14-bit, 3.5Msps serial ADCs with differential inputs. The devices draw only 5.5mA from a single 3.3V supply and come in a tiny 10-lead MSOP package. A Sleep shutdown feature further reduces power consumption to 13µW. The combination of speed, low power and tiny package makes the LTC2356-12/ LTC2356-14 suitable for high speed, portable applications.
The 80dB common mode rejection allows users to elimi­nate ground loops and common mode noise by measuring signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs differ­entially. The absolute voltage swing for A
A
extends from ground to the supply voltage.
IN
IN
+
and
The serial interface sends out the conversion results during the 16 clock cycles following a CONV rising edge for compatibility with standard serial interfaces. If two addi­tional clock cycles for acquisition time are allowed after the data stream in between conversions, the full sampling rate of 3.5Msps can be achieved with a 63MHz clock.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
BLOCK DIAGRA
10µF
LTC2356-14
+
A
IN
A
IN
+
1
S & H
2
V
REF
3
GND
4
5 6 11
2.5V
REFERENCE
W
14-BIT ADC
EXPOSED PAD
3.3V10µF
THD, 2nd and 3rd vs Input Frequency
for Differential Input Signals
7
V
DD
THREE-
14-BIT LATCH
14
STATE
SERIAL
OUTPUT
PORT
TIMING
LOGIC
SDO
8
CONV
10
SCK
9
2356 BD
2356f
1
LTC2356-12/LTC2356-14
1 2 3 4 5
A
IN
+
A
IN
V
REF
GND GND
10 9 8 7 6
CONV SCK SDO V
DD
GND
TOP VIEW
11
MSE PACKAGE
10-LEAD PLASTIC MSOP
WWWU
ABSOLUTE AXI U RATI GS
(Notes 1, 2)
Supply Voltage (VDD) ................................................. 4V
Analog and V
(Note 3) ....................................– 0.3V to (V
Digital Input Voltages ................. – 0.3V to (V
Digital Output Voltage .................. – 0.3V to (V
Power Dissipation.............................................. 100mW
Operation Temperature Range
LTC2356C-12/LTC2356C-14 ................... 0°C to 70°C
LTC2356I-12/LTC2356I-14 ................ – 40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Input Voltages
REF
+ 0.3V)
DD
+ 0.3V)
DD
+ 0.3V)
DD
UU
W
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
LTC2356CMSE-12 LTC2356IMSE-12 LTC2356CMSE-14 LTC2356IMSE-14
MSE PART MARKING
T
= 125°C, θJA = 150°C/ W
JMAX
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/
Consult factory for parts specified with wider operating temperature ranges.
LTCWN LTCWN LTCVF LTCVF
CO VERTER CHARACTERISTICS
temperature range, otherwise specifications are at T
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes)
Integral Linearity Error (Notes 4, 5, 18)
Offset Error (Notes 4, 18)
Gain Error (Note 4, 18)
Gain Tempco Internal Reference (Note 4) ±15 ±15 ppm/°C
A ALOG I PUT
otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
V
I
C
t
t
t
CMRR Analog Input Common Mode Rejection Ratio fIN = 1MHz, VIN = 0V to 3V –60 dB
2
U
UU
IN
CM
IN
IN
ACQ
AP
JITTER
Analog Differential Input Range (Notes 3, 8, 9) 3.1V ≤ VDD 3.6V
Analog Common Mode + Differential 0 to V Input Range (Note 10)
Analog Input Leakage Current
Analog Input Capacitance (Note 19) 13 pF
Sample-and-Hold Acquisition Time (Note 6)
Sample-and-Hold Aperture Delay Time 1 ns
Sample-and-Hold Aperture Delay Time Jitter 0.3 ps
The ● denotes the specifications which apply over the full operating
= 25°C. With internal reference. VDD = 3.3V
A
LTC2356-12 LTC2356-14
12 14 Bits
–2 ±0.25 2 –4 ±0.5 4 LSB
–10 ±1 10 –30 ±230 LSB
–40 ±5 40 –80 ±10 80 LSB
External Reference ±1 ±1 ppm/°C
The ● denotes the specifications which apply over the full operating temperature range,
= 25°C. With internal reference. VDD = 3.3V
A
f
= 100MHz, VIN = 0V to 3V –15 dB
IN
–1.25 to 1.25 V
DD
1 µA
39 ns
V
2356f
LTC2356-12/LTC2356-14
U
W
DY A IC ACCURACY
otherwise specifications are at T DC. Differential signal drive with V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
SINAD Signal-to-Noise Plus 100kHz Input Signal (Note 19) 71.1 74.1 dB
Distortion Ratio 1.4MHz Input Signal (Note 19)
THD Total Harmonic 100kHz First 5 Harmonics (Note 19) –86 –86 dB
Distortion 1.4MHz First 5 Harmonics (Note 19)
SFDR Spurious Free 100kHz Input Signal (Note 19) 86 86 dB
Dynamic Range 1.4MHz Input Signal (Note 19) 82 82 dB
IMD Intermodulation 0.625V
Distortion 1.56MHz into A
Code-to-Code V Transition Noise
Full Power Bandwidth VIN = 2.5V Full Linear Bandwidth S/(N + D) 68dB 5 5 MHz
= 25°C with external reference = 2.55V. VDD = 3.3V. Single-ended A
A
REF
The ● denotes the specifications which apply over the full operating temperature range,
= 1.5V at A
CM
1.4MHz Summed with 0.625V
P-P
= 2.5V (Note 18) 0.25 1 LSB
P-P
+
and A
IN
+
and Inverted into A
IN
, SDO = 11585LSB
IN
LTC2356-12 LTC2356-14
68 71.1 70 72.3 dB
P-P
IN
(Note 15) 50 50 MHz
P-P
–82 –76 –82 –78 dB
–82 –82 dB
+
signal drive with A
IN
IN
= 1.5V
RMS
UU U
I TER AL REFERE CE CHARACTERISTICS
full operating temperature range, otherwise specifications are at T
= 25°C. VDD = 3.3V
A
The ● denotes the specifications which apply over the
PARAMETER CONDITIONS MIN TYP MAX UNITS
V
Output Voltage I
REF
V
Output Tempco 15 ppm/°C
REF
V
Line Regulation VDD = 3.1V to 3.6V, V
REF
V
Output Resistance Load Current = 0.5mA 0.2
REF
V
Settling Time C
REF
External V
Input Range 2.55 V
REF
= 0 2.5 V
OUT
= 2.5V 600 µV/V
REF
= 10µF2ms
REF
DD
UU
DIGITAL I PUTS A D DIGITAL OUTPUTS
full operating temperature range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
High Level Input Voltage VDD = 3.6V
Low Level Input Voltage VDD = 3.1V
Digital Input Current VIN = 0V to V
Digital Input Capacitance 5pF
High Level Output Voltage VDD = 3.3V, I
Low Level Output Voltage VDD = 3.1V, I
= 3.1V, I
V
DD
Hi-Z Output Leakage D
Hi-Z Output Capacitance D
Output Short-Circuit Source Current V
Output Short-Circuit Sink Current V
OUT
OUT
V
OUT
OUT
OUT
= 25°C. VDD = 3.3V
A
DD
OUT
OUT OUT
= 0V to V
= 0V, VDD = 3.3V 20 mA
= VDD = 3.3V 15 mA
DD
The ● denotes the specifications which apply over the
2.4 V
= – 200µA
= 160µA 0.05 V = 1.6mA
2.5 2.9 V
0.10 0.4 V
1pF
0.6 V
± 10 µA
± 10 µA
V
2356f
3
LTC2356-12/LTC2356-14
WU
POWER REQUIRE E TS
range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
I
DD
P
D
Supply Voltage 3.1 3.3 3.6 V Supply Current Active Mode
Power Dissipation Active Mode with SCK in Fixed State (Hi or Lo) 18 mW
= 25°C. (Note 17)
A
The ● denotes the specifications which apply over the full operating temperature
Nap Mode
Sleep Mode (LTC2356-12) 4 15 µA Sleep Mode (LTC2356-14) 4 12 µA
5.5 8 mA
1.1 1.5 mA
WU
TI I G CHARACTERISTICS
range, otherwise specifications are at T
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
f
SAMPLE(MAX)
t
THROUGHPUT
t
SCK
t
CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
12
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: All voltage values are with respect to GND. Note 3: When these pins are taken below GND or above V
clamped by internal diodes. This product can handle input currents greater than 100mA below GND or greater than V
Note 4: Offset and full-gain specifications are measured for a single-ended
+
A
input with A
IN
Note 5: Integral linearity is tested with an external 2.55V reference and is defined as the deviation of a code from the straight line passing through the actual endpoints of a transfer curve. The deviation is measured from the center of quantization band.
Note 6: Guaranteed by design, not subject to test. Note 7: Recommended operating conditions. Note 8: The analog input range is defined for the voltage difference
between A driving A
Note 9: The absolute voltage at A Note 10: If less than 3ns is allowed, the output data will appear one clock
cycle later. It is best for CONV to rise half a clock before SCK, when running the clock at rated speed.
Maximum Sampling Rate per Channel (Conversion Rate)
Minimum Sampling Period (Conversion + Acquisiton Period) Clock Period (Note 16) Conversion Time (Note 6) 16 18 SCLK cycles Minimum High or Low SCLK Pulse Width (Note 6) 2 ns CONV to SCK Setup Time (Notes 6, 10) 3 ns Nearest SCK Edge Before CONV (Note 6) 0 ns Minimum High or Low CONV Pulse Width (Note 6) 4 ns SCK↑ to Sample Mode (Note 6) 4 ns CONV to Hold Mode (Notes 6, 11) 1.2 ns 16th SCK to CONV Interval (Affects Acquisition Period) (Notes 6, 7, 13) 45 ns Delay from SCK to Valid Data (Notes 6, 12) 8 ns SCK↑ to Hi-Z at SDO (Notes 6, 12) 6 ns Previous SDO Bit Remains Valid After SCK (Notes 6, 12) 2 ns V
Settling Time After Sleep-to-Wake Transition (Note 14) 2 ms
REF
grounded and using the internal 2.5V reference.
IN
+
IN
+
.
IN
and A
. Performance is specified with A
IN
+
and A
IN
= 25°C. VDD = 3.3V
A
without latchup.
DD
must be within this range.
IN
The ● denotes the specifications which apply over the full operating temperature
3.5 MHz
, they will be
DD
= 1.5V DC while
IN
15.872 10000 ns
Note 11: Not the same as aperture delay. Aperture delay is smaller (1ns) because the 2.2ns delay through the sample-and-hold is subtracted from the CONV to Hold mode delay.
Note 12: The rising edge of SCK is guaranteed to catch the data coming out into a storage latch.
Note 13: The time period for acquiring the input signal is started by the 16th rising clock and it is ended by the rising edge of convert.
Note 14: The internal reference settles in 2ms after it wakes up from Sleep mode with one or more cycles at SCK and a 10µF capacitive load.
Note 15: The full power bandwidth is the frequency where the output code swing drops to 3dB with a 2.5V
input sine wave.
P-P
Note 16: Maximum clock period guarantees analog performance during conversion. Output data can be read with an arbitrarily long clock.
Note 17: V
= 3.3V, f
DD
SAMPLE
= 3.5Msps.
Note 18: The LTC2356-14 is measured and specified with 14-bit resolution (1LSB = 152µV) and the LTC2356-12 is measured and specified with 12-bit resolution (1LSB = 610µV).
Note 19: The sampling capacitor at each input accounts for 4.1pF of the input capacitance.
286 ns
2356f
4
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2356-12/LTC2356-14
= 25°C, VDD = 3.3V (LTC2356-14).
T
A
SINAD vs Input Frequency
77
74
71
68
65
62
SINAD (dB)
59
56
53
50
0.1
1 10 100
FREQUENCY (MHz)
SFDR vs Input Frequency
92
86
80
74
68
SFDR (dB)
62
56
50
0.1
1 10 100
FREQUENCY (MHz)
2356 G01
2356 G03
THD, 2nd and 3rd vs Input Frequency
–50
–56
–62
–68
–74
–80
–86
THD, 2nd, 3rd (dB)
–92
–98
–104
0.1
THD 2nd
3rd
1 10 100
FREQUENCY (MHz)
SNR vs Input Frequency
77
74
71
68
65
62
SNR (dB)
59
56
53
50
0.1
1 10 100
FREQUENCY (MHz)
2356 G02
2356 G04
100kHz Sine Wave 8192 Point FFT Plot
0
–10
–20 –30
–40
–50
–60
–70
MAGNITUDE (dB)
–80
–90
–100 –110 –120
250K
500K
0
1M
750K
FREQUENCY (Hz)
1.25M
1.5M
1.75M
2356 G05
1.4MHz Sine Wave 8192 Point FFT Plot
0
–10
–20 –30
–40
–50
–60 –70
MAGNITUDE (dB)
–80
–90
–100 –110 –120
250K
500K
0
1M
750K
FREQUENCY (Hz)
1.25M
1.5M
1.75M
2356 G06
2356f
5
Loading...
+ 11 hidden pages