LINEAR TECHNOLOGY LTC2258-12, LTC2257-12, LTC2256-12 Technical data

LTC2258-12

LTC2257-12/LTC2256-12

12-Bit, 65/40/25Msps

Ultralow Power 1.8V ADCs

FEATURES

n

71.1dB SNR

n

88dB SFDR

n

Low Power: 79mW/47mW/34mW

n

Single 1.8V Supply

n

CMOS, DDR CMOS or DDR LVDS Outputs

n

Selectable Input Ranges: 1V

n

800MHz Full-Power Bandwidth S/H

n

Optional Data Output Randomizer

n

Optional Clock Duty Cycle Stabilizer

n

Shutdown and Nap Modes

n

Serial SPI Port for Confi guration

n

Pin Compatible 14-Bit and 12-Bit Versions

n

40-Pin (6mm × 6mm) QFN Package

P-P

to 2V

P-P

APPLICATIONS

n

Communications

n

Cellular Base Stations

n

Software Defi ned Radios

n

Portable Medical Imaging

n

Multi-Channel Data Acquisition

n

Nondestructive Testing

DESCRIPTION

®

The LTC
pling 12-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 71.1dB SNR and 88dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17ps
allows undersampling of IF frequencies with excellent
noise performance.

DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL
(typical) and no missing codes over temperature. The
transition noise is a low 0.3LSB

The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.

The ENC
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al­lows high performance at full speed for a wide range of
clock duty cycles.

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.

2258-12/LTC2257-12/LTC2256-12 are sam-

RMS

.

RMS

+

and ENC– inputs may be driven differentially

TYPICAL APPLICATION

ANALOG

INPUT

65MHz
CLOCK

+

INPUT

S/H

–

CLOCK/DUTY

CYCLE

CONTROL

12-BIT
PIPELINED
ADC CORE

1.8V
V

DD

GND

CORRECTION

LOGIC

OUTPUT

DRIVERS

225812 TA01a

1.2V

TO 1.8V

D11

•

•

•

D0

OV

DD

CMOS
OR
LVDS

OGND

LTC2258-12 2-Tone FFT,
fIN = 68MHz and 69MHz

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0

10

FREQUENCY (MHz)

20 30

225812 TA01b

225812f

1

LTC2258-12
LTC2257-12/LTC2256-12

ABSOLUTE MAXIMUM RATINGS

(Notes 1, 2)

Supply Voltages (VDD, OVDD) ....................... –0.3V to 2V

+

–

, A

Analog Input Voltage (A

IN

PAR/SER, SENSE) (Note 3) ...........–0.3V to (V

Digital Input Voltage (ENC

,

IN

+

, ENC–, CS,

+ 0.2V)

DD

SDI, SCK) (Note 4) .................................... –0.3V to 3.9V

SDO (Note 4) ............................................ –0.3V to 3.9V

PIN CONFIGURATIONS

FULL-RATE CMOS OUTPUT MODE

VDDSENSE

3940 38 37 36 35 34 33 32 31

+

A

1

IN

–

A

2

IN

GND

3

REFH

4

REFH

5

REFL

6

REFL

7

PAR/SER

8
9

V

DD

V

10

DD

12 13 14 15

11 20

+

ENC

40-LEAD (6mm × 6mm) PLASTIC QFN

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

TOP VIEW

REFVCM

V

–

CS

SCK

ENC

UJ PACKAGE

T

= 150°C, θJA = 32°C/W

JMAX

OF

DNC

D11

41

16 17 18 19

SDI

SDO

DNC

D10D9D8

D0

DNC

30

D7

29

D6
CLKOUT
CLKOUT
OV

DD

OGND
D5
D4
D3
D2

+

–

28

27
26
25

24
23
22
21

D1

Digital Output Voltage ................ –0.3V to (OVDD + 0.3V)

Operating Temperature Range:

LTC2258C, LTC2257C, LTC2256C............. 0°C to 70°C

LTC2258I, LTC2257I, LTC2256I ............ –40°C to 85°C

Storage Temperature Range ................... –65°C to 150°C

DOUBLE DATA RATE CMOS OUTPUT MODE

VDDSENSE

3940 38 37 36 35 34 33 32 31

+

A

1

IN

–

A

2

IN

GND

3

REFH

4

REFH

5

REFL

6

REFL

7

PAR/SER

8
9

V

DD

V

10

DD

12 13 14 15

11 20

+

ENC

40-LEAD (6mm × 6mm) PLASTIC QFN

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

TOP VIEW

REFVCM

V

–

CS

SCK

ENC

UJ PACKAGE

T

= 150°C, θJA = 32°C/W

JMAX

OF

DNC

D10_11

41

16 17 18 19

SDI

SDO

DNC

DNC

DNC

D8_9

DNC

DNC

30
29
28

27
26
25

24
23
22
21

D0_1

D6_7
DNC
CLKOUT
CLKOUT
OV

DD

OGND
D4_5
DNC
D2_3
DNC

+

–

2

DOUBLE DATA RATE LVDS OUTPUT MODE

VDDSENSE

+

A

1

IN

–

A

2

IN

GND

3

REFH

4

REFH

5

REFL

6

REFL

7

PAR/SER

8
9

V

DD

V

10

DD

11 20

ENC+ENC

40-LEAD (6mm × 6mm) PLASTIC QFN

EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB

TOP VIEW

REFVCM

V

3940 38 37 36 35 34 33 32 31

12 13 14 15

–

T

OF+OF–D10_11+D10_11–D8_9+D8_9

41

16 17 18 19

CS

SDI

SCK

SDO

UJ PACKAGE

= 150°C, θJA = 32°C/W

JMAX

DNC

DNC

–

D0_1

–

+

30
29
28

27
26
25

24
23
22
21

D0_1

D6_7
D6_7
CLKOUT
CLKOUT
OV

DD

OGND
D4_5
D4_5
D2_3
D2_3

+

–

+

–

+

–

+

–

225812f

LTC2258-12

LTC2257-12/LTC2256-12

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC2258CUJ-12#PBF LTC2258CUJ-12#TRPBF LTC2258UJ-12 40-Lead (6mm × 6mm) Plastic QFN 0°C to 70°C
LTC2258IUJ-12#PBF LTC2258IUJ-12#TRPBF LTC2258UJ-12 40-Lead (6mm × 6mm) Plastic QFN –40°C to 85°C
LTC2257CUJ-12#PBF LTC2257CUJ-12#TRPBF LTC2257UJ-12 40-Lead (6mm × 6mm) Plastic QFN 0°C to 70°C
LTC2257IUJ-12#PBF LTC2257IUJ-12#TRPBF LTC2257UJ-12 40-Lead (6mm × 6mm) Plastic QFN –40°C to 85°C
LTC2256CUJ-12#PBF LTC2256CUJ-12#TRPBF LTC2256UJ-12 40-Lead (6mm × 6mm) Plastic QFN 0°C to 70°C
LTC2256IUJ-12#PBF LTC2256IUJ-12#TRPBF LTC2256UJ-12 40-Lead (6mm × 6mm) Plastic QFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to:

For more information on tape and reel specifi cations, go to:

CONVERTER CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. (Note 5)

PARAMETER CONDITIONS

Resolution (No Missing Codes)
Integral Linearity Error Differential Analog Input (Note 6)
Differential Linearity Error Differential Analog Input
Offset Error (Note 7)
Gain Error Internal Reference

Offset Drift ±20 ±20 ±20 µV/°C
Full-Scale Drift Internal Reference

Transition Noise External Reference 0.32 0.32 0.32 LSB

External Reference

External Reference

http://www.linear.com/leadfree/

http://www.linear.com/tapeandreel/

LTC2261-12 LTC2260-12 LTC2259-12

l

12 12 12 Bits

l

–1 ±0.3 1 –1 ±0.3 1 –1 ±0.3 1 LSB

l

–0.4 ±0.1 0.4 –0.4 ±0.1 0.4 –0.4 ±0.1 0.4 LSB

l

–9 ±1.5 9 –9 ±1.5 9 –9 ±1.5 9 mV

l

±1.5

–1.5

±0.4 1.5 –1.5

±30
±10

±1.5
±0.4 1.5 –1.5

±30
±10

±1.5
±0.4 1.5

±30
±10

UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX

%FS
%FS

ppm/°C
ppm/°C

RMS

225812f

3

LTC2258-12
LTC2257-12/LTC2256-12

ANALOG INPUT

The l denotes the specifi cations which apply over the full operating temperature range, otherwise
specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IN

V

IN(CM)

V

SENSE

I

INCM

I

IN1

I

IN2

I

IN3

t

AP

t

JITTER

CMRR Analog Input Common Mode Rejection Ratio 80 dB
BW-3B Full-Power Bandwidth Figure 6 Test Circuit 800 MHz

Analog Input Range (A
Analog Input Common Mode (A
External Voltage Reference Applied to SENSE External Reference Mode
Analog Input Common Mode Current Per Pin, 65Msps

Analog Input Leakage Current 0 < A
PAR/SER Input Leakage Current 0 < PAR/SER < V
SENSE Input Leakage Current 0.625V < SENSE < 1.3V
Sample-and-Hold Acquisition Delay Time 0 ns
Sample-and-Hold Acquisition Delay Jitter 0.17 ps

= 25°C. (Note 5)

A

+

– A

IN

IN

–

) 1.7V < VDD < 1.9V

+

–

+ A

IN

)/2 Differential Analog Input (Note 8)

IN

Per Pin, 40Msps
Per Pin, 25Msps

+

–

, A

< VDD, No Encode

IN

IN

DD

l

l

VCM – 100mV V

l

l

l

l

0.625 1.250 1.300 V

–1 1 µA
–3 3 µA
–6 6 µA

1 to 2 V

CM

VCM + 100mV V

81
50
31

P-P

µA
µA
µA

RMS

DYNAMIC ACCURACY

The l denotes the specifi cations which apply over the full operating temperature range,
otherwise specifi cations are at TA = 25°C. AIN = –1dBFS. (Note 5)

LTC2258-12 LTC2257-12 LTC2256-12

SYMBOL PARAMETER CONDITIONS

SNR Signal-to-Noise Ratio 5MHz Input

30MHz

l

70MHz Input
140MHz Input

SFDR Spurious Free Dynamic Range

2nd or 3rd Harmonic

5MHz Input
30MHz

l

70MHz Input
140MHz Input

Spurious Free Dynamic Range
4th Harmonic or Higher

5MHz Input
30MHz

l

70MHz Input
140MHz Input

S/(N+D) Signal-to-Noise Plus

Distortion Ratio

5MHz Input
30MHz

l

70MHz Input
140MHz Input

INTERNAL REFERENCE CHARACTERISTICS

The l denotes the specifi cations which apply over the

71.1

69

71

70.9

70.7

789090

90
84

839090

90
90

69.17171

70.9

70.3

69.6

799090

839090

68.9

70.8

70.7

70.6

70.4

90
84

90
90

70.7

70.6

70.6

70.2

69

799090

839090

68.3

70.5

70.5

70.1

69.9

90
84

90
84

70.5

70.4
70

69.5

UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX

full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 5)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Output Voltage I

V

CM

VCM Output Temperature Drift ±25 ppm/°C

Output Resistance –600µA < I

V

CM

Output Voltage I

V

REF

Output Temperature Drift ±25 ppm/°C

V

REF

Output Resistance –400µA < I

V

REF

V

Line Regulation 1.7V < VDD < 1.9V 0.6 mV/V

REF

= 0 0.5 • VDD – 25mV 0.5 • V

OUT

< 1mA 4 

OUT

= 0 1.225 1.250 1.275 V

OUT

< 1mA 7 

OUT

DD

0.5 • VDD + 25mV V

225812f

dB
dB
dB
dB

dB
dB
dB
dB

dB
dB
dB
dB

dB
dB

DB

dB

4

LTC2258-12

LTC2257-12/LTC2256-12

DIGITAL INPUTS AND OUTPUTS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

+

–

, ENC

ENCODE INPUTS (ENC

Differential Encode Mode (ENC

V

ID

V

ICM

V

IN

R

IN

C

IN

Differential Input Voltage (Note 8)
Common Mode Input Voltage Internally Set

Input Voltage Range ENC+, ENC– to GND
Input Resistance (See Figure 10) 10 k
Input Capacitance (Note 8) 3.5 pF

Single-Ended Encode Mode (ENC

V

IH

V

IL

V

IN

R

IN

C

IN

High Level Input Voltage VDD = 1.8V
Low Level Input Voltage VDD = 1.8V
Input Voltage Range ENC+ to GND
Input Resistance (See Figure 11) 30 k
Input Capacitance (Note 8) 3.5 pF

DIGITAL INPUTS (CS, SDI, SCK)

V

IH

V

IL

I

IN

C

IN

High Level Input Voltage VDD = 1.8V
Low Level Input Voltage VDD = 1.8V
Input Current VIN = 0V to 3.6V
Input Capacitance (Note 8) 3 pF

SDO OUTPUT (Open-Drain Output. Requires 2k Pull-Up Resistor if SDO is Used)

R

OL

I

OH

C

OUT

Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 
Logic High Output Leakage Current SDO = 0V to 3.6V
Output Capacitance (Note 8) 4 pF

DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE)

= 1.8V

OV

DD

V
V

OV

V
V

OV

V
V

OH

OL

OH

OL

OH

OL

High Level Output Voltage IO = –500µA
Low Level Output Voltage IO = 500µA

= 1.5V

DD

High Level Output Voltage IO = –500µA 1.488 V
Low Level Output Voltage IO = 500µA 0.010 V

= 1.2V

DD

High Level Output Voltage IO = –500µA 1.185 V
Low Level Output Voltage IO = 500µA 0.010 V

DIGITAL DATA OUTPUTS (LVDS MODE)

V

V

R

OD

OS

TERM

Differential Output Voltage 100 Differential Load, 3.5mA Mode

Common Mode Output Voltage 100 Differential Load, 3.5mA Mode

On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 

)

–

Not Tied to GND)

–

Tied to GND)

= 25°C. (Note 5)

A

Externally Set (Note 8)

100 Differential Load, 1.75mA Mode

100 Differential Load, 1.75mA Mode

l

0.2 V

1.2

l

1.1

l

0.2 3.6 V

l

1.2 V

l

l

l

l

l

l

l

l

l

0 3.6 V

1.3 V

–10 10 µA

–10 10 µA

1.750 1.790 V

0.010 0.050 V

247 350

175

l

1.125 1.250

1.375 V

1.250

1.6

0.6 V

0.6 V

454 mV

mV

V
V

V

225812f

5

LTC2258-12
LTC2257-12/LTC2256-12

POWER REQUIREMENTS

The l denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS

CMOS Output Modes: Full Data Rate and Double Data Rate

V

DD

OV
I

VDD

I

OVDD

P

DISS

LVDS Output Mode

V

DD

OV
I

VDD

I

OVDD

P

DISS

All Output Modes

P

SLEEP

P

NAP

P

DIFFCLK

Analog Supply Voltage (Note 10)
Output Supply Voltage (Note 10)

DD

Analog Supply Current DC Input

Digital Supply Current Sine Wave Input, OVDD=1.2V 2.3 1.5 0.9 mA
Power Dissipation DC Input

Analog Supply Voltage (Note 10)
Output Supply Voltage (Note 10)

DD

Analog Supply Current Sine Wave Input
Digital Supply Current

(0V

= 1.8V)

DD

Power Dissipation Sine Input, 1.75mA Mode

Sleep Mode Power 0.5 0.5 0.5 mW
Nap Mode Power 9 9 9 mW

Power Increase with Differential Encode Mode Enabled

(No increase for Nap or Sleep Modes)

= 25°C. (Note 9)

A

Sine Wave Input

Sine Wave Input, OV

DD

=1.2V

Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode

Sine Input, 3.5mA Mode

LTC2258-12 LTC2257-12 LTC2256-12

l

1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V

l

1.1 1.9 1.1 1.9 1.1 1.9 V

l

l

l

l

l

l
l

l
l

43.6

44.2

78.5

82.3

49 26.3

27.2

89 47.3

50.8

30 18.9

19.1

54 34

35.5

21 mA

38 mW

1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V

1.7 1.9 1.7 1.9 1.7 1.9 V

48.1 54 30.6 35 22.7 26 mA

18.8

36.72140

120.4

152.6

135
170

18.8

36.72140

88.9

121.1

101
135

18.8

36.72140

74.7

106.985119

10 10 10 mW

UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX

mA

mW

mA
mA

mW
mW

TIMING CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at TA = 25°C. (Note 5)

LTC2258-12 LTC2257-12 LTC2256-12

SYMBOL PARAMETER CONDITIONS

f

S

t

L

Sampling Frequency (Note 10)
ENC Low Time (Note 8) Duty Cycle Stabilizer Off

Duty Cycle Stabilizer On

t

H

ENC High Time (Note 8) Duty Cycle Stabilizer Off

Duty Cycle Stabilizer On

t

AP

Sample-and-Hold

l

1 65 1 40 1 25 MHz

l

7.3

7.69

500

l

11.88

2.0

7.69

500

l

7.3

7.69

500

l

2.0

7.69

11.88

500

2.00

2.00

12.5

12.5

12.5

12.5

500

500192.002020
500

500192.002020

000ns

Acquisition Delay Time

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Digital Data Outputs (CMOS Modes: Full Data Rate and Double Data Rate)

t

D

t

C

t

SKEW

ENC to Data Delay CL = 5pF (Note 8)
ENC to CLKOUT Delay CL = 5pF (Note 8)
DATA to CLKOUT Skew tD – tC (Note 8)
Pipeline Latency Full Data Rate Mode

Double Data Rate Mode

l

1.1 1.7 3.1 ns

l

l

1 1.4 2.6 ns
0 0.3 0.6 ns

5.0

5.5

500
500

500
500

UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX

ns
ns

ns
ns

Cycles
Cycles

225812f

6

LTC2258-12

LTC2257-12/LTC2256-12

TIMING CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating temperature
range, otherwise specifi cations are at T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Digital Data Outputs (LVDS Mode)

t

D

t

C

t

SKEW

SPI Port Timing (Note 8)

t

SCK

t

S

t

H

t

DS

t

DH

t

DO

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: All voltage values are with respect to GND with GND and OGND
shorted (unless otherwise noted).

Note 3: When these pin voltages are taken below GND or above V
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V

Note 4: When these pin voltages are taken below GND they will be
clamped by internal diodes. When these pin voltages are taken above V
they will not be clamped by internal diodes. This product can handle input
currents of greater than 100mA below GND without latchup.

Note 5: V
40MHz (LTC2257), or 25MHz (LTC2256), LVDS outputs with internal

ENC to Data Delay CL = 5pF (Note 8)
ENC to CLKOUT Delay CL = 5pF (Note 8)
DATA to CLKOUT Skew tD – tC (Note 8)
Pipeline Latency 5.5 Cycles

SCK Period Write Mode

CS to SCK Setup Time
SCK to CS Setup Time
SDI Setup Time
SDI Hold Time
SCK Falling to SDO Valid Readback Mode, C

= OVDD

DD

= 1.8V, f

= 65MHz (LTC2258),

SAMPLE

= 25°C. (Note 5)

A

Readback Mode, C

without latchup.

DD

DD

SDO

SDO

, they

DD

l

1.1 1.8 3.2 ns

l

l

l

= 20pF, R

= 20pF, R

PULLUP

PULLUP

= 2k

= 2k

l

l

l

l

l

l

termination disabled, differential ENC+/ENC– = 2V
range = 2V

with differential drive, unless otherwise noted.

P-P

1 1.5 2.7 ns
0 0.3 0.6 ns

40

250

5ns
5ns
5ns
5ns

125 ns

sine wave, input

P-P

Note 6: Integral nonlinearity is defi ned as the deviation of a code from a
best fi t straight line to the transfer curve. The deviation is measured from
the center of the quantization band.

Note 7: Offset error is the offset voltage measured from –0.5 LSB when
the output code fl ickers between 0000 0000 0000 and 1111 1111 1111 in
2’s complement output mode.

Note 8: Guaranteed by design, not subject to test.
Note 9: V

25MHz (LTC2256), ENC
input range = 2V

DD

= 1.8V, f

P-P

= 65MHz (LTC2258), 40MHz (LTC2257), or

SAMPLE

+

= single-ended 1.8V square wave, ENC– = 0V,

with differential drive, 5pF load on each digital output

unless otherwise noted.
Note 10: Recommended operating conditions.

ns
ns

TIMING DIAGRAMS

ANALOG

INPUT

–

ENC

+

ENC

D0-D11, OF

+

CLKOUT

–

CLKOUT

Full-Rate CMOS Output Mode Timing

All Outputs Are Single-Ended and Have CMOS Levels

t

AP

N

t

H

t

t

N + 1

t

L

D

N – 5 N – 4 N – 3 N – 2 N – 1

C

N + 2

N + 3

N + 4

225812 TD01

225812f

7

LTC2258-12
LTC2257-12/LTC2256-12

TIMING DIAGRAMS

Double Data Rate CMOS Output Mode Timing

All Outputs Are Single-Ended and Have CMOS Levels

t

AP

ANALOG

INPUT

ENC

ENC

D0_1

•

•

•

D10_11

–

+

N

t

H

t

L

t

D

D0

D10

N-5

N-5

D1

D11

N + 1

N-5D0N-4

D10

N-5

N-4

D1

D11

N-4

t

N-4

N + 2

D

D0

D10

N-3

N-3

D1

D11

N + 3

N-3

N-3

D0

D10

N-2

N-2

D1

D11

N + 4

N-2

N-2

CLKOUT

CLKOUT

ANALOG

INPUT

ENC

ENC

D0_1

D0_1

D10_11

D10_11

CLKOUT

CLKOUT

OF

+

–

OF

N-5

t

C

OF

N-4

t

C

OF

N-3

OF

N-2

225812 TD02

Double Data Rate LVDS Output Mode Timing

All Outputs Are Differential and Have LVDS Levels

t

AP

N + 4

D1

N-2

D11

N-2

OF

N-3

225812 TD03

D1

D11

N-4

N-4

t

D

t

C

N + 2

D0

D10

N-3

N-3

N + 3

D1

D0

N-3

D11

OF

N-3

N-3

D10

N-2

N-2

N

t

H

–

+

t

D0

D10

N-5

N-5

t

D

C

+

–

•

•

•

+

–

+

OF

–

OF

+

–

OF

N-5

t

L

D1

D11

N + 1

N-5D0N-4

D10

N-5

OF

N-4

N-4

8

225812f

TIMING DIAGRAMS

LTC2258-12

LTC2257-12/LTC2256-12

SPI Port Timing (Readback Mode)

SCK

SDI

SDO

CS

t

S

R/W

HIGH IMPEDANCE

t

DS

A6

A5 A4 A3 A2 A1 A0 XX

t

DH

t

DO

XX XX XX XX XX XX XX

D7 D6 D5 D4 D3 D2 D1 D0

SPI Port Timing (Write Mode)

CS

SCK

SDI

SDO

R/W

HIGH IMPEDANCE

A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

TYPICAL PERFORMANCE CHARACTERISTICS

t

SCK

t

H

225812 TD04

LTC2258-12: Integral
Nonlinearity (INL)

1.0

0.8

0.6

0.4

0.2

0

–0.2

INL ERROR (LSB)

–0.4

–0.6

–0.8

–1.0

0

1024

2048 3072 4096

OUTPUT CODE

225812 G01

LTC2258-12: Differential
Nonlinearity (DNL)

1.0

0.8

0.6

0.4

0.2

0

–0.2

DNL ERROR (LSB)

–0.4

–0.6

–0.8

–1.0

0

1024

OUTPUT CODE

2048 3072 4096

225812 G02

LTC2258-12: 8k Point FFT, fIN = 5MHz
–1dBFS, 65Msps

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0102030

FREQUENCY (MHz)

225812 G03

225812f

9

LTC2258-12
LTC2257-12/LTC2256-12

TYPICAL PERFORMANCE CHARACTERISTICS

LTC2258-12: 8k Point FFT, fIN = 30MHz
–1dBFS, 65Msps

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0

10 20 30

FREQUENCY (MHz)

LTC2258-12: 8k Point 2-Tone FFT,

= 68MHz, 69MHz, –1dBFS,

f

IN

65Msps

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0

10

FREQUENCY (MHz)

20 30

LTC2258-12: SFDR vs Input
Frequency, –1dB, 2V Range,
65Msps

95

90

85

80

SFDR (dBFS)

75

70

65

0

100 150 200 250 300 350

50

INPUT FREQUENCY (MHz)

225812 G04

225812 G07

225812 G10

LTC2258-12: 8k Point FFT, fIN = 70MHz
–1dBFS, 65Msps

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0

10

FREQUENCY (MHz)

20 30

LTC2258-12: Shorted Input
Histogram

18000

16000

14000

12000

10000

COUNT

8000

6000

4000

2000

0

2049

2051 2053

OUTPUT CODE

LTC2258-12: SFDR vs Input Level,
fIN = 70MHz, 2V Range, 65Msps

110

100

90

80

70

60

50

40

SFDR (dBc AND dBFS)

30

20

10

0

–80

–60 –50 –40 –30 –20 –10 0

–70

dBFS

dBc

INPUT LEVEL (dBFS)

225812 G05

225812 G08

225812 G12

LTC2258-12: 8k Point FFT, fIN = 140MHz
–1dBFS, 65Msps

0

–10

–20

–30

–40

–50

–60

–70

–80

AMPLITUDE (dBFS)

–90
–100

–110
–120

0

10

FREQUENCY (MHz)

20 30

LTC2258-12: SNR vs Input
Frequency, –1dB, 2V Range,
65Msps

72

71

70

69

SNR (dBFS)

68

67

66

0

LTC2258-12: I

100 150 200 250 300 350

50

INPUT FREQUENCY (MHz)

vs Sample Rate,

VDD

5MHz Sine Wave Input, –1dB

50

LVDS OUTPUTS

45

(mA)

40

VDD

I

35

30

0

CMOS OUTPUTS

20 40 60

SAMPLE RATE (Msps)

225812 G06

225812 G09

225812 G13

10

225812f