LINEAR TECHNOLOGY LTC1922-1 Technical data

查询LTC1922EG-1供应商

FEATURES

LTC1922-1

Synchronous Phase

Modulated Full-Bridge Controller

U

DESCRIPTIO

■

Adaptive DirectSenseTM Zero Voltage Switching

■

Integrated Synchronous Rectification Control for
Highest Efficiency

■

Output Power Levels from 50W to Kilowatts

■

Very Low Start-Up and Quiescent Currents

■

Compatible with Voltage Mode and Current Mode
Topologies

■

Programmable Slope Compensation

■

Undervoltage Lockout Circuitry with 4.2V Hysteresis
and Integrated 10.3V Shunt Regulator

■

Fixed Frequency Operation to 1MHz

■

50mA Outputs for Bridge Drive and Secondary Side
Synchronous Rectifiers

■

Soft-Start, Cycle-by-Cycle Current Limiting and
Hiccup Mode Short-Circuit Protection

■

5V, 15mA Low Dropout Regulator

■

20-Pin PDIP and SSOP Packages

U

APPLICATIO S

■

Telecommunications, Infrastructure Power Systems

■

Distributed Power Architectures

■

Server Power Supplies

■

High Density Power Modules

The LTC®1922-1 phase shift PWM controller provides all
of the control and protection functions necessary to imple­ment a high performance, zero voltage switched, phase
shift, full-bridge power converter with synchronous recti­fication. The part is ideal for developing isolated, low
voltage, high current outputs from a high voltage input
source. The LTC1922-1 combines the benefits of the full­bridge topology with fixed frequency, zero voltage switch­ing operation (ZVS). Adaptive ZVS circuity controls the
turn-on signals for each MOSFET independent of internal
and external component tolerances for optimal perfor­mance.

The LTC1922-1 also provides secondary side synchro­nous rectifier control. The device uses peak current mode
control with programmable slope comp and leading edge
blanking.

The LTC1922-1 features extremely low operating and
start-up currents to simplify off-line start-up and bias
circuitry. The LTC1922-1 also includes a full range of
protection features and is available in 20-pin through hole
(N) and surface mount (G) packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

DirectSense is a trademark of Linear Technology Corporation.

TYPICAL APPLICATIO

BIAS

SUPPLY

LTC1922-1

U

V

48V

IN

VIN = 48V

10

Efficiency

VIN = 36V

20

LOAD CURRENT (A)

30

40

1922 • TA01b

ISOLATED
FEEDBACK

1922 TA01a

V

3.3V

OUT

100

90

80

EFFICIENCY (%)

70

60

0

1

LTC1922-1

WW

W

ABSOLUTE AXI U RATI GS

U

PACKAGE/ORDER I FOR ATIO

(Note 1)

VCC to GND

Low Impedance Source .........................–0.3V to 10V

(Chip Self Regulates at 10.3V)

All Other Pins to GND

(Low Impedance Source) .....................–0.3V to 5.5V

V

(Current Fed).................................................. 25mA

CC

V

Output Current ................................ Self Regulated

REF

Outputs (A, B, C, D, E, F) Current ..................... ±100mA

Operating Temperature Range (Note 5)

LTC1922E........................................... –40°C to 85°C

LTC1922I............................................ – 40°C to 85°C

Storage Temperature Range ................. –65°C to 125°C

Lead Temperature (Soldering, 10 sec)..................300°C

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

SYNC

RAMP

CS

COMP

R

LEB

FB

SS
PDLY
SBUS
ADLY

G PACKAGE

20-LEAD PLASTIC SSOP

T

JMAX

T

Consult factory for parts specified with wider operating temperature ranges.

temperature range, otherwise specifications are at VCC = 9.5V, CT = 180pF, TA = T

TOP VIEW

1
2
3
4
5
6
7
8
9

10

N PACKAGE

20-LEAD PDIP

= 125°C, θJA = 110°C/W (G)

= 125°C,θJA = 62°C/W (N)

JMAX

MIN

to T

unless other wise noted.

MAX

UUW

ORDER PART

C

20

T

GND

19

OUTA

18

OUTB

17

OUTC

16

V

15

CC

OUTD

14

OUTE

13

OUTF

12

V

11

REF

NUMBER

LTC1922EG-1
LTC1922IG-1
LTC1922EN-1
LTC1922IN-1

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supply

UVLO Undervoltage Lockout Measured on V
UVHY UVLO Hysteresis Measured on V
I

CCST

I

CCRN

V

SHUNT

R

SHUNT

Delay Blocks

DTHR Delay Pin Threshold SBUS = 1.5V 1.38 1.50 1.62 V

DHYS Delay Hysteresis Current SBUS = 1.5V, ADLY/PDLY = 1.6V 1.1 1.3 1.45 mA

DTMO Delay Time-Out SBUS = 1.5V 600 ns

DZRT Zero Delay Threshold Measured on SBUS 3 4.15 5 V

Phase Modulator

ROS RAMP Offset Voltage Measured on COMP, RAMP = 0V 0.4 V
I

RMP

I

SLP

DCMX Maximum Phase Shift COMP = 4V ● 95 99.5 %
DCMN Minimum Phase Shift COMP = 0V ● 0.1 0.6 %

Start-Up Current VCC = V
Operating Current 47 mA
Shunt Regulator Voltage Current Into VCC = 10mA 10.2 10.8 V
Shunt Resistance Current Into VCC = 7mA to 17mA –1.5 2 Ω

ADLY and PDLY SBUS = 2.25V 2.08 2.25 2.42 V

ADLY and PDLY

SBUS = 2.25V 900 ns

RAMP Discharge Current RAMP = 1V, COMP = 0V 30 50 mA
Slope Compensation Current Measured on CS, CT = 1.5V 35 55 75 µA

CC

CC

– 0.3V ● 145 250 µA

UVLO

= 3V 70 110 150 µA

C

T

3.8 4.2 V

10.25 10.7 V

2

LTC1922-1

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at VCC = 9.5V, CT = 180pF, TA = T

The ● denotes the specifications which apply over the full operating

MIN

to T

unless other wise noted.

MAX

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Oscillator

OSCT Total Variation VCC = 6.5V to 9.5V ● 236 277 319 kHz
OSCV CT RAMP Amplitude Measured on C

T

3.6 3.85 4.2 V
OSYT SYNC Threshold Measured on SYNC 1.6 1.8 2.2 V
OSYW Minimum SYNC Pulse Width Measured at Outputs (Note 2) 6 ns
OSYWX Maximum SYNC Pulse Width Measured on Outputs, CT = 180pF 1.3 µs
OSOP SYNC Output Pulse Width Measured on SYNC, R

= 5.1k 170 ns

SYNC

Error Amplifier

V

FB

FB Input Voltage COMP = 2.5V (Note 3) 1.179 1.204 1.229 V
FBI FB Input Range Measured on FB (Note 4) –0.3 2.5 V
AVOL Open-Loop Gain COMP = 1V to 3V (Note 3) 70 90 dB
I

IB

V

OH

V

OL

I

SOURCE

I

SINK

Input Bias Current COMP = 2.5V (Note 3) 5 50 nA

Output High Load on COMP = –100µA 4.7 4.92 V

Output Low Load on COMP = 100µA 0.18 0.4 V

Output Source Current COMP = 2.5V –400 –800 µA

Output Sink Current COMP = 2.5V 3 7 mA

Reference

V

REF

Initial Accuracy TA = 25°C, Measured on V

REF

4.925 5 5.075 V

REFTV Total Variation Line, Load and Temperature ● 4.9 5 5.1 V
REFLD Load Regulation Load on V

= 100µA to 5mA 2 15 mV

REF

REFLN Line Regulation VCC = 6.5V to 9.5V 0.1 10 mV
REFSC Short-Circuit Current V

Shorted to GND 18 30 45 mA

REF

Outputs

OUTH(X) Output High Voltage I
OUTL(X) Output Low Voltage I
R
R
t
t

r(X)

f(X)

HI(X)

LO(X)

Pull-Up Resistance I

Pull-Down Resistance I

Rise Time C

Fall Time C

= –50mA 7.9 8.4 V

OUT(X)

= 50mA 0.6 1 V

OUT(X)

= –50mA to –10mA 22 30 Ω

OUT(X)

= –50mA to –10mA 12 20 Ω

OUT(X)

= 50pF 5 15 ns

OUT(X)

= 50pF 5 15 ns

OUT(X)

Current Limit and Shutdown

CLPP Pulse-by-Pulse Current Limit Threshold Measured on CS 0.34 0.415 0.48 V
CLSD Shutdown Current Limit Threshold Measured on CS 0.55 0.64 0.73 V
SSI Soft-Start Current SS = 2.5V 7 12 17 µA
SSR Soft-Start Reset Threshold Measured on SS 0.7 0.4 0.1 V
FLT FAULT Reset Threshold Measured on SS 4.4 4.1 3.8 V

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

COMP

),

OSC

for these

Note 2: SYNC pulse width is valid from >20ns and <0.4 • (1/f

= 0V to 5V.

V

SYNC

Note 3: FB is driven by a servo loop amplifier to control V
tests.

Note 4: Set FB to –0.3V, 2.5 and insure that COMP does not phase invert.
Note 5: The LTC1922-1E is guaranteed to meet performance specifications

from 0°C to 85°C. Specification over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC1922-1I is guaranteed and tested
over the – 40°C to 85°C operating temperature range.

3

LTC1922-1

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Start-Up ICC vs V

200

TA = 25°C

150

100

(µA)

CC

I

50

0

0

2

CC

6

8

4

VCC (V)

10

1922 • G01

Leading Edge Blanking Time
vs R

LEB

350

TA = 25°C

300

250

200

150

BLANK TIME (ns)

100

50

10.50

10.25

(V)

10.00

CC

V

9.75

9.50

VCC vs I

TA = 25°C

0

SHUNT

10

20

I

SHUNT

30

(mA)

40

(V)

REF

V

5.05

5.00

4.95

4.90

4.85

1922 • G02

V

50

vs I

REF

TJ = 25°C

Oscillator Frequency vs
Temperature

280

CT = 180pF

270

260

FREQUENCY (kHz)

250

240

–40–60 –20 200 40 60 100

TEMPERATURE (°C)

REF

TJ = 85°C

TJ = –40°C

80

1922 • G03

4

(V)

REF

V

0

0

V

vs Temperature

REF

5.01

5.00

4.99

4.98

4.97
–40–60 –20 200 40 60 100

40

2010 30 50 70 90

R

(kΩ)

LEB

TEMPERATURE (°C)

60 80

1922 • G04

80

1922 • G03

100

4.80
0

510

20

15 25 40

I

(mA)

REF

Error Amplifier Gain/Phase

100

80
60
40

GAIN (dB)PHASE (DEG)

20

0

–180

–270

–360

10 1k100 10k 100k 10M

FREQUENCY (Hz)

30 35

1922 • G05

TA = 25°C

1M

1922 • G07

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Delay Hysteresis Current vs

Start-Up ICC vs Temperature

160

150

140

130

120

(µA)

110

CC

I

100

90

80

70

–25 5 35 95 12565

–55

TEMPERATURE (°C)

1922 • G10

Temperature

1.278
SBUS = 1.5V

1.276

1.274

1.272

1.270

1.268

1.266

1.264

1.262

HYSTERESIS CURRENT (mA)

1.260

1.258

1.256

–25 5 35 95 12565

–55

TEMPERATURE (°C)

1922 • G11

LTC1922-1

Slope Current vs Temperature

130

120

110

100

90

80

CURRENT (µA)

70

CT = 1.5V

60

50

40

–55

–25 5 35 95 12565

TEMPERATURE (°C)

CT = 3.0V

1922 • G12

VCC Shunt Voltage vs Temperature

10.5
ICC = 10mA

10.4

10.3

10.2

10.1

SHUNT VOLTAGE (V)

10.0

9.9

9.8
–55

–25 5 35 95 12565

TEMPERATURE (°C)

FB Input Voltage vs Temperature

1.202

1.201

1.200

1.199

1.198

1.197

FB VOLTAGE (V)

1.196

1.195

1.194
–25 5 35 95 12565

–55

TEMPERATURE (°C)

1922 • G13

1922 • G15

Delay Pin Threshold vs
Temperature

2.4

2.3

SBUS = 2.25V

2.2

2.1

2.0

1.9

1.8

THRESHOLD (V)

1.7

1.6

1.5

1.4
–25 5 35 95 12565

–55

TEMPERATURE (°C)

Ramp Offset Voltage vs
Temperature

390

385

380

375

370

OFFSET (mV)

365

360

355

350

–25 5 35 95 12565

–55

TEMPERATURE (°C)

SBUS = 1.5V

1922 • G14

1922 • G16

5

LTC1922-1

UUU

PIN FUNCTIONS

SYNC (Pin 1): Synchronization Input/Output for the
Oscillator. Terminate SYNC with a 5.1k resistor to GND.

RAMP (Pin 2): Input to Phase Modulator Comparator. The
voltage on RAMP is internally level shifted by 400mV.

CS (Pin 3): Input to Current Limit Comparators, Output of
Slope Compensation Circuitry.

COMP (Pin 4): Error Amplifier Output, Input to Phase
Modulator.

R

(Pin 5): Timing Resistor for Leading Edge Blanking.

LEB

Use a 10k to 100k resistor to program from 40ns to 310ns
of leading edge blanking. A ±1% tolerance resistor is
recommended. Leading edge blanking may be defeated by
connecting R

FB (Pin 6): Error Amplifier Inverting Input. This is the
voltage feedback input for the LTC1922-1.

SS (Pin 7): Soft-Start/Restart Delay Circuitry Timing
Capacitor.

PDLY (Pin 8): Passive Leg Delay Circuit Input.

LEB

to V

REF

.

V

(Pin 11): 5V Reference Output. V

REF

supplying up to 15mA to external circuitry. Bypass V
with a 1µF (minimum) ceramic capacitor to GND.

OUTF (Pin 12): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.

OUTE (Pin 13): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.

OUTD (Pin 14): 50mA Driver Output for Active Leg Low
Side.

VCC (Pin 15): Chip Power Supply Input, 10.3V Shunt
Regulator. Bypass VCC with a 0.1µF or larger ceramic
capacitor to GND.

OUTC (Pin 16): 50mA Driver Output for Active Leg High
Side.

OUTB (Pin 17): 50mA Driver Output for Passive Leg Low
Side.

OUTA (Pin 18): 50mA Driver Output for Passive Leg High
Side.

is capable of

REF

REF

SBUS (Pin 9): Input (Bus) Voltage Sensing Input.
ADLY (Pin 10): Active Leg Delay Circuit Input.

GND (Pin 19): All Voltages on the LTC1922-1 Are Referred

to GND.
CT (Pin 20): Timing Capacitor for Oscillator. Use ±5% or

better multilayer NPO ceramic for best results.

6

BLOCK DIAGRA

LTC1922-1

W

COMP

RAMP

R

REF AND LDO

1.2V

50k

14.9k

SLOPE

COMPENSATION

V

REF

5V

PHASE

MODULATOR

–
+

QB

Q

FAULT
LOGIC

C

/R

T

V

CC

15 11 20 1 9

UVLO

SHUNT REG

10.25V “ON”
6V “0FF”

ERROR

1.2V

AMPLIFIER

–
+

6

FB

4

+

0.4V

600mV

CURRENT LIMIT

400mV

PULSE BY PULSE

–

V

REF

12µA

+

–

SHUTDOWN

+

–

CURRENT LIMIT

2

BLANK

7

SS

5

LEB

CS

3

BLANK

C

OSC

R

S

SYNC SBUS

T

Q

T

QB

R

QB

S

19

GND

PASSIVE

DELAY

SYNC

RECTIFIER

DRIVE
LOGIC

ACTIVE
DELAY

PDLY

8

OUTA

18

OUTB

17

OUTE

13

OUTF

12

OUTC

16

OUTD

14

ADLY

10

1922 • BD

UWW

TI I G DIAGRA

ACTIVE DELAY

OUTA

OUTB

OUTC

OUTD

RAMP

COMP

CURRENT DOUBLER
OUTE

OUTF

NOTE: SHADED AREAS CORRESPOND TO POWER DELIVERY PULSES

PASSIVE DELAY

1922 TD

7

LTC1922-1

OPERATIO

U

Phase Shift Full-Bridge PWM

Conventional full-bridge switching power supply topolo­gies are often employed for high power, isolated DC/DC
and off-line converters. Although they require two addi­tional switching elements, substantially greater power and
higher efficiency can be attained for a given transformer
size compared to the more common single-ended forward
and flyback converters. These improvements are realized
since the full-bridge converter delivers power during both
parts of the switching cycle, reducing transformer core
loss and lowering voltage and current stresses. The full­bridge converter also provides inherent automatic trans­former flux reset and balancing due to its bidirectional
drive configuration. As a result, the maximum duty cycle
range is extended, further improving efficiency. Soft switch­ing variations on the full-bridge topology have been pro­posed to improve and extend its performance and
application. These zero voltage switching (ZVS) tech­niques exploit the generally undesirable parasitic ele­ments present within the power stage. The parasitic
elements are utilized to drive near lossless switching
transitions for all of the external power MOSFETs.

LTC1922-1 phase shift PWM controller provides enhanced
performance and simplifies the design task required for a
ZVS phase shifted full-bridge converter. The primary
attributes of the LTC1922-1 as compared to currently
available solutions include:

1) Truly adaptive and accurate (DirectSense technology)
ZVS switching delays.

Benefit: higher efficiency, higher duty cycle capability,
eliminates external trim.

2) Internally generated drive signals for current doubler
synchronous rectifiers.

Benefit: eliminates external glue logic, drivers, optimal
timing for highest efficiency.

3) Programmable (single resistor) leading edge blanking.
Benefit: prevents spurious operation, reduces external

filtering required on CS.

4) Programmable (single resistor) slope compensation.
Benefit: eliminates external glue circuitry.

5) Optimized current mode control architecture.
Benefit: eliminates glue circuitry, less overshoot at start-

up, faster recovery from system faults.

6) Proven reference circuits and design tools.
Benefit: substantially reduced learning curve, more time

for optimization.
As a result, the LTC1922-1 makes the ZVS topology

feasible for a wider variety of applications, including those
at lower power levels.

The LTC1922-1 controls four external power switches in
a full-bridge arrangement. The load on the bridge is the
primary winding of a power transformer. The diagonal
switches in the bridge connect the primary winding be­tween the input voltage and ground every oscillator cycle.
The pair of switches that conduct are alternated by an
internal flip-flop in the LTC1922-1. Thus, the voltage
applied to the primary is reversed in polarity on every
switching cycle and each output drive signal is 1/2 the
frequency of the oscillator. The on-time of each driver
signal is slightly less that 50%. The actual percentage is
adaptively modulated by the LTC1922-1. The on-time
overlap of the diagonal switch pairs is controlled by the
LTC1922-1 phase modulation circuitry. (Refer to Block
and Timing Diagrams) This overlap sets the approximate
duty cycle of the converter. The LTC1922-1 driver output
signals (OUTA to OUTF) are optimized for interface with an
external gate driver IC or buffer. External power MOSFETs
A and C require high side driver circuitry, while B and D are
ground referenced and E and F are ground referenced but
on the secondary side of the isolation barrier. Methods for
providing drive to these elements are detailed in the data
sheet. The secondary voltage of the transformer is the
primary voltage divided by the transformer turns ratio.
Similar to a buck converter, the secondary square wave is
applied to an output filter inductor and capacitor to pro­duce a well regulated DC output voltage.

Switching Transitions

The phase shifted full-bridge can be described by four
primary operating states. The key to understanding how
ZVS occurs is revealed by examining the states in detail.

8