Demonstration circuit DC290 is a constant-frequency
step-down converter using an LTC®1877 or an LTC1878
monolithic synchronous regulator. The LTC1878 has an
input voltage range of 2.65V < VIN < 6V and the LTC1877
has an input voltage range of 2.65V < VIN < 10V. The
LTC1878 is optimized for low voltage operation and is
ideally suited for single Li-Ion cell or 3-NiCd/NiMH cell
applications. The LTC1877, with its higher voltage capability, is ideally suited for two Li-Ion cells or 4- to 6-NiCd/
NiMH cell applications.
The exclusive use of low profile surface mount components on this demo board results in a highly efficient
application in a small volume. The output voltage can be
selected from 1.5V, 2.5V, 3.3V or a user programmable
UW
WW
voltage, by means of a jumper. The frequency is internally
set at 550kHz or can be synchronized with an external
clock. The internal switches allow up to 600mA of output
current in an MSO8 package, providing a space-efficient
solution for battery-powered applications. The DC supply
current is typically only 10µA at no load and less than 1µA
in shutdown. In switching-noise sensitive applications,
Burst ModeTM operation can be inhibited by grounding the
SYNC/MODE pin with a jumper or synchronizing it with an
external clock. Gerber files for this circuit board are
available. Call the LTC factory.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
PERFORmANCE SUARY
SYMBOL PARAMETERCONDITIONSJUMPER POSITIONVALUE
V
IN
V
OUT
Input Voltage RangeLTC1877All (Note 1)2.65V to 10V
LTC1878All2.65V to 6V
Output VoltageV
= 5V, SYNC/MODE = 0V, RUN = 5V, I
IN
V
= 5V, SYNC/MODE = 0V, RUN = 5V, I
IN
= 5V, SYNC/MODE = 0V, RUN = 5V, I
V
IN
V
= 5V, SYNC/MODE = 0V, RUN = 5V, I
IN
= 0mA JP1 = U, JP2 = L, JP3 = “1.5V”1.51V ± 0.05V
OUT
= 0mA JP1 = U, JP2 = L, JP3 = “2.5V”2.52V ± 0.08V
OUT
= 0mA JP1 = U, JP2 = L, JP3 = “3.3V”3.33V ± 0.10V
OUT
= 0mA JP1 = U, JP2 = L, JP3 = “OPEN”(Note 2)
OUT
W
TYPICAL PERFORMANCE CHARACTERISTICS AND BOARD PHOTO
EFFICIENCY CURVE
100
VIN = 3.6V
95
90
85
80
75
VIN = 5V
70
EFFICIENCY (%)
65
60
55
50
0.1
1.0100
OUTPUT CURRENT (mA)
VIN = 10V
VIN = 7.2V
V
OUT
L = 10µH
Burst Mode OPERATION
10
= 3.3V
U
U
DEMO BOARD
1000
290A • TA01
1
Page 2
DEMO MANUAL DC290
NO-DESIGN SWITCHER
UWWW
PERFOR A CE SU ARY
SYMBOL PARAMETERCONDITIONSJUMPER POSITIONVALUE
I
Q
I
OUT
f
OSC
V
RIPPLE
V
OUT
V
SYNC
V
RUN
NOTE 1: JP1 and JP2 connect RUN (E1) and SYNC/MODE (E7) to either
GND (E3) or V
RUN or SYNC/MODE is connected to V
the upper position (U), then RUN or SYNC/MODE is connected to GND. If
external sources drive RUN or SYNC/MODE, then JP1, JP2 or both must
be removed.
Burst Mode Operation EnabledV
= 5V, SYNC/MODE = RUN = 5V, I
IN
= 0mAJP1 = JP2 = L, JP3 = “1.5V” 10µA (Note 3)
OUT
Supply Current
Pulse Skipping Mode Supply CurrentV
Shutdown CurrentV
Maximum Output CurrentV
= 5V, SYNC/MODE = 0V, RUN = 5V, I
IN
= 5V, RUN = 0VJP2 = U<1µA
IN
IN
V
IN
= 5V, V
= 4V, V
= 2.5V (LTC1877)JP2 = L, JP3 = “1.5V”600mA
OUT
= 2.5V (LTC1878)JP2 = L, JP3 = “1.5V”600mA
OUT
= 0mAJP1 = U, JP2 = L230µA
OUT
Operating FrequencyUnsynchronizedJP2 = L550kHz
SynchronizedJP1 = OPEN, JP2 = L400kHz to 700kHz
Typical Output RippleI
Typical Load Regulation0mA < I
This demonstration board is easily set up to evaluate the
performance of the LTC1877 or LTC1878 IC. Please
follow the procedure outlined below for proper operation.
• Refer to Figure 5 for proper connection of monitoring
equipment to ensure correct measurement.
• Connect the input power supply to the VIN and GND
terminals on the left-hand side of the board. Do not
increase VIN over its rated maximum supply voltage or
the part will be damaged. For the LTC1877 the maximum VIN is 10V and for the LTC1878 the maximum
VIN is 6V.
• Connect the load between the V
on the right side of the board.
• Select the desired operating mode using JP1 and JP2,
as shown in Table 1. JP1 connects SYNC/MODE to
GND in the upper position, and connects it to VIN in the
lower position. JP2 connects RUN to GND in the upper
and GND terminals
OUT
position, and connects it to VIN in the lower position.
If a signal is applied at RUN (E1) or SYNC/MODE (E7),
then jumper JP1 or JP2, respectively, must be removed.
• Set the desired output voltage with jumper JP3 as
shown in Figure 2.
Table 1. Operating Mode Selection With Jumpers JP1 and JP2
JP2JP1OPERATING MODE
UPPERXSHUTDOWN
LOWERUPPERPULSE SKIPPING
LOWERLOWERBURST MODE
LOWEROPENEXTERNAL CLOCK AT SYNC/MODE
OPENXEXTERNAL SIGNAL AT RUN
JP3
OPEN
2.5V
3.3V
1.5V
Figure 2. Output Voltage Selection (JP3)
(3.3V Position Shown)
3
Page 4
DEMO MANUAL DC290
NO-DESIGN SWITCHER
U
OPERATIO
INTRODUCTION
The circuit in Figure 1 highlights the capabilities of the
LTC1877 and the LTC1878. The LTC1877 and the LTC1878
are high efficiency monolithic synchronous step-down
regulators using a fixed-frequency architecture.
This demo board is set up for a variety of output voltages.
Output voltages including 1.5V, 2.5V and 3.3V or user
programmable voltages can be obtained by selecting the
appropriate jumper position. For other output voltages,
select the “OPEN” position and add the appropriate resistor value in the space provided. The output voltage must
never exceed 3.3V because the output capacitor may be
damaged. The input supply can range from 2.65V to 10V
for the LTC1877 and 2.65V to 6V for the LTC1878.
The operating frequency of this demo circuit is 550kHz.
For other frequencies, JP1 must be removed and SYNC/
MODE (E7) synchronized with an external clock. Burst
Mode operation is automatically disabled when SYNC/
MODE is externally driven. Grounding SYNC/MODE also
disables Burst Mode operation, potentially reducing noise
and RF interference.
This demonstration board is intended for the evaluation of
the LTC1877 and the LTC1878 switching regulator ICs and
was not designed for any other purpose.
Main Control Loop (Refer to Functional Diagram)
The LTC1877 and the LTC1878 use a constant frequency,
current mode step-down architecture. Their main and
synchronous switches, consisting of a top (main)
P-channel and a bottom (synchronous) N-channel power
MOSFET, are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the
oscillator sets the RS latch, and turned off when the
current comparator, I
inductor current at which I
controlled by the voltage on the ITH pin, which is the output
of error amplifier EA. The VFB pin allows EA to receive an
output feedback voltage from an external resistive divider.
When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.8V reference, which, in turn, causes the I
, resets the RS latch. The peak
COMP
resets the RS latch is
COMP
voltage to increase
TH
until the average inductor current matches the new load
current. While the top MOSFET is off, the bottom MOSFET
is turned on until either the inductor current starts to
reverse, as indicated by the current reversal comparator,
I
, or until the beginning of the next clock cycle.
RCMP
Comparator OVDET guards against transient overshoots
as well as other more serious conditions that may cause
an overvoltage condition on the output (> 6.25%). When
this condition is sensed, both MOSFETs are turned off until
the fault is removed.
Burst Mode Operation
The LTC1877 and the LTC1878 are capable of Burst Mode
operation, in which the internal power MOSFETs operate
intermittently based on load demand. To enable Burst
Mode operation, simply position jumper JP1 in the lower
position to connect SYNC/MODE to V
Mode operation and enable PWM pulse skipping mode,
position JP1 in the upper position to connect SYNC/MODE
to GND (see Figure 5). In this mode, the efficiency is lower
at light loads, but becomes comparable to Burst Mode
operation when the output load exceeds 50mA. The
advantage of pulse skipping mode is lower output ripple
and less interference to audio circuitry.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 250mA,
even though the voltage at the I
value. The voltage at the I
average current is greater than the load requirement. As
the I
BURST comparator trips, causing the internal sleep line to
go high and turn off both power MOSFETs. The I
then disconnected from the output of the EA amplifier and
parked a diode above ground.
In sleep mode, both power MOSFETs are held off and the
internal circuitry is partially turned off, reducing the quiescent current to 10µA. The load current is now being
supplied from the output capacitor. When the output
voltage drops, the I
EA amplifier and the top MOSFET is again turned on and
this process repeats.
voltage drops below approximately 0.45V, the
TH
TH
pin drops when the inductor’s
TH
pin reconnects to the output of the
. To disable Burst
IN
pin indicates a lower
TH
TH
pin is
4
Page 5
OPERATIO
BURST
DEFEAT
PLL LPF
8
U
Y = “0” ONLY WHEN X IS A CONSTANT “1”
Y
X
DEMO MANUAL DC290
NO-DESIGN SWITCHER
V
IN
SYNC/MODE
7
0.6V
3
V
FB
RUN
1
–
+
V
0.8V REF
IN
SHUTDOWN
VCO
FREQ
SHIFT
0.85V
0.8V
–
OVDET
+
SLOPE
COMP
OSC
–
+
EA
–
+
0.45V
SLEEP
V
IN
V
IN
I
2
TH
EN
–
+
BURST
Q
S
R
Q
RS LATCH
SLEEP
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
0.8V
–
I
COMP
ANTI
SHOOT-
THRU
I
RCMP
V
6
IN
+
+
–
6Ω
5
4
dc290A BD
SW
GND
Figure 3. Functional Block Diagram
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 80kHz, one-seventh of the
nominal frequency. This frequency foldback ensures that
the inductor current has more time to decay, thereby
preventing runaway. The oscillator’s frequency will
progressively increase to 550kHz (or the synchronized
frequency) when V
rises above 0.3V.
FB
Frequency Synchronization
A phase-locked loop (PLL) is available on the LTC1877
and the LTC1878 to allow the oscillator to be synchronized
to an external source connected to the SYNC/MODE pin.
The output of the phase detector at the PLL LPF pin
operates over a 0V to 2.4V range, corresponding to
400kHz to 700kHz. When locked, the PLL aligns the
turn-on of the MOSFETs to the rising edge of the synchronizing signal.
When the LTC1877 or the LTC1878 is clocked by an
external source, Burst Mode operation is disabled; the
LTC1877 or the LTC1878 then operates in PWM pulse
skipping mode. In this mode, when the output load is very
low, the current comparator, I
, may remain tripped
COMP
for several cycles and force the main switch to stay off for
the same number of cycles. Increasing the output load
slightly allows constant frequency PWM operation to
resume.
Frequency synchronization is inhibited when the feedback
voltage, VFB, is below 0.6V. This prevents the external
clock from interfering with the frequency foldback for
short-circuit protection.
5
Page 6
DEMO MANUAL DC290
NO-DESIGN SWITCHER
U
OPERATIO
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage
forces the main switch to remain on for more than one
cycle until it reaches 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the P-channel MOSFET and the
inductor.
Low Supply Operation
The LTC1877 and the LTC1878 can function on an input
supply voltage as low as 2.65V. The maximum allowable
output current is reduced at this low voltage because the
R
user should calculate the power dissipation when the
LTC1877 or the LTC1878 is used at 100% duty cycle with
low VIN. See the LTC1877 or the LTC1878 data sheet for
additional information.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished by internally
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. As a result, the
maximum inductor peak current is reduced for duty
cycles >40%. See the inductor peak current as a function
of duty cycle graph in Figure 4.
of the P-channel switch increases. Therefore, the
DS(ON)
1100
1000
900
800
700
MAXIMUM INDUCTOR PEAK CURRENT (mA)
600
20
0
LTC1877 @ VIN = 5V
LTC1878 @ V
60
40
DUTY CYCLE (%)
IN
80
= 3.3V
100
dc290A F04
Figure 4. Maximum Inductor Peak Current vs Duty Cycle
How To Measure Voltage Regulation
When trying to measure voltage regulation, remember
that all measurements must be taken at the point of
regulation. This point is where the LTC1877’s and
LTC1878’s control loop looks for the information to keep
the output voltage constant. In this demonstration board,
this point occurs between V
(E6) and GND (E4).
OUT
Measurements should be taken at these points and not at
the end of test leads at the load. Refer to Figure 5 for the
proper monitoring equipment configuration.
This applies to line regulation (input-to-output voltage
regulation) as well as load regulation tests. In doing the
line regulation tests, always look at the input voltage
across the input terminals, VIN (E2) and GND (E3) .
UPPER POSITION (U)
I
IN
LOWER POSITION (L)
+
A
+
V
IN
6
LTC1877/LTC1878
High Efficiency Monolithic Synchronous
E1
E2
IN
E3
Step-Down Regulator
JP1JP2
JP3
JP3JP3
2.5V
3.3V
0PEN
1.5V
DEMO CIRCUIT DC290A
(408) 432-1900
RUN
V
+
V
GND
Figure 5. Proper Measurement Setup
SYNC/MODE
E7
V
OUT
E6
GND
E5
GND
E4
I
OUT
+
A
+
V
LOAD
V
OUT
Page 7
DEMO MANUAL DC290
NO-DESIGN SWITCHER
For the purposes of these tests, the demonstration circuit
should be powered from a regulated DC bench supply, so
that variations on the DC input do not add errors to the
regulation measurements.
Another source of error may be the use of small springclip leads when testing this circuit. Small spring-clip leads
are very convenient for small-signal bench testing and
voltage measurements, but should not be used with this
circuit. Soldered wire connections are required to properly ascertain the performance of the PC board.
Checking Transient Response
Switching regulators take several cycles to respond to a
step in DC (resistive) load current. When a load step
occurs, V
where ESR is the effective series resistance of C
∆I
LOAD
shifts by an amount equal to (∆I
OUT
also begins to charge or discharge C
OUT
LOAD
until the
)(ESR),
OUT
.
regulator loop adapts to the current change and returns
V
to its steady-state value. During this recovery time,
OUT
V
can be monitored for overshoot or ringing, which
OUT
would indicate a stability problem. The external components shown in Figure 1 will prove adequate for most
applications.
Long supply leads connected to V
ringing at VIN and V
resembling loop instability. This is
OUT
and GND may induce
IN
actually caused by the inductance of the long wires
resonating with the input ceramic capacitor. This phenomenon is particularly pronounced when a ceramic
output capacitor is used. When using short leads to
connect VIN and GND is impractical, a 100µF electrolytic
bulk capacitor can be soldered onto the board between V
IN
and GND. This should eliminate all ringing associated with
long V
and GND leads. Space is provided on the PC board
IN
for this purpose, as shown in Figure 6.
LTC1877/LTC1878
High Efficiency Monolithic Synchronous
E1
E2
IN
E3
Step-Down Regulator
JP1JP2
2.5V
3.3V
OPEN
1.5V
DEMO CIRCUIT DC290A
RUN
V
SOLDER BULK
CAPACITOR HERE
Figure 6. Space Provided for a Bulk Capacitor
GND
SYNC/MODE
JP3
JP3JP3
(408) 432-1900
E7
V
OUT
E6
GND
E5
GND
E4
Component Manufacturers
Table 2 is a partial list of manufacturers of components
that can be used in LTC1877 and LTC1878 applications.
Using components other than the ones supplied on the
demonstration board will require careful analysis to verify
that all component specifications are not exceeded.
Finally, recharacterizing the circuit for efficiency is
necessary.
Table 2. List of Alternative Component Manufacturers
MANUFACTURERDEVICEPHONEFAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
[81] 03-3607-5111[81] 03-3607-5114
7
Page 8
DEMO MANUAL DC290
NO-DESIGN SWITCHER
UW
PCB LAYOUT A D FIL
Silkscreen TopComponent SideSolder Mask Top
Paste Mask TopSolder SideSolder Mask Bottom
U
PC FAB DRAWI G
2.000
C
B
D
A
B
NOTES: UNLESS OTHERWISE SPECIFIED
1. MATERIAL; FR4 OR EQUIVALENT EPOXY, 2 OZ COPPER CLAD
THICKNESS 0.031 ± 0.006 TOTAL OF 2 LAYERS
2. FINISH: ALL PLATED HOLES 0.001 MIN/0.0015 MAX COPPER PLATE
ELECTRODEPOSITED TIN-LEAD COMPOSITION
BEFORE REFLOW, SOLDER MASK OVER BARE COPPER (SMOBC)
3. SOLDER MASK; BOTH SIDES USING GREEN PC-401 OR EQUIVALENT
4. SILKSCREEN; USING WHITE NONCONDUCTIVE EPOXY INK
5. ALL DIMENSIONS ARE IN INCHES
6. SCORING:
D
2.000
C
0.017
SYMBOL
A
B
C
D
DIAMETER
0.020
0.040
0.072
0.095
NUMBER
OF HOLES
10
14
2
7
PLATED
YES
YES
NO
YES
Linear Technology Corporation
8
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
dc290 LT/TP 0500 500 • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2000
Page 9
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.: DC290A-BDC290A-A
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