LINEAR TECHNOLOGY LTC1698 Technical data

FEATURES
High Efficiency Over Wide Load Current Range
±0.8% Output Voltage Accuracy
Dual N-Channel MOSFET Synchronous Drivers
Pulse Transformer Synchronization
Optocoupler Feedback Driver
Programmable Current Limit Protection
±5% Margin Output Voltage Adjustment
Adjustable Overvoltage Fault Protection
Power Good Flag
Auxiliary 3.3V Logic Supply
Available in 16-Lead SSOP and SO Packages
U
APPLICATIO S
48V Input Isolated DC/DC Converters
Isolated Telecommunication Power Systems
Distributed Power Step-Down Converters
Industrial Control Systems
Automotive and Heavy Equipment
LTC1698
Isolated Secondary
Synchronous Rectifier Controller
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DESCRIPTIO
The LTC®1698 is a precision secondary-side forward converter controller that synchronously drives external N-channel MOSFETs. It is designed for use with the LT®3781 primary-side synchronous forward converter controller to create a completely isolated power supply. The LT3781 synchronizes the LTC1698 through a small pulse transformer and the LTC1698 drives a feedback optocoupler to close the feedback loop. Output accuracy of ±0.8% and high efficiency over a wide range of load currents are obtained.
The LTC1698 provides accurate secondary-side current limit using an external current sense resistor. The input voltage at the MARGIN pin provides ±5% output voltage adjustment. A power good flag and overvoltage input are provided to ensure proper power supply conditions. An auxiliary 3.3V logic supply is included that supplies up to 10mA of output current.
, LTC and LT are registered trademarks of Linear Technology Corporation.
V
IN
36V to 72V
TG BG
LT3781
+ –
V
C
R
F
U
L1
+
C
OUT
+
110
V
PWRGD
DD
28
CG
16
FG
12
I
SNS
11
I
SNSGND
15
SYNC
5
OPTODRV
PGND GND
V
LTC1698
V
COMP
I
COMP
OVPIN
MARGIN V
V
AUX
34
Q2
R
REF
C
D1
PRISEN
SG
V
FB
F
Q1
T1
C
SG
T2
D2
R
E
ISOLATION BOUNDARY
R
Q4 Q3
SECSEN
VDD BIAS
C
SYNC
R
SYNC
R
K
C
K
PLEASE REFER TO FIGURE 12 IN THE TYPICAL APPLICATIONS SECTION FOR THE COMPLETE 3.3V/15A APPLICATION SCHEMATIC
Figure 1. Simplified 2-Transistor Isolated Forward Converter
R2
R1
R
FB
6
13
9
7
14
C
C
C
C
FB
C
CILM
R
CILM
MARGIN
V
AUX
3.3V 10mA
O.1µF
1681 F01
V
OUT
R5
R4
1698f
1
LTC1698
WW
W
ABSOLUTE MAXIMUM RATINGS
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PACKAGE/ORDER INFORMATION
(Note 1)
VDD, PWRGD ....................................................... 13.2V
Input Voltage
MARGIN, VFB, OVPIN, I
SNSGND
, I
... –0.3V to 5.3V
SNS
SYNC ..................................................... –14V to 14V
Output Voltage
V
COMP
, I
(Note 2)......................... – 0.3V to 5.3V
COMP
Power Dissipation.............................................. 500mW
Operating Temperature Range
LTC1698E (Note 3)............................ –40°C to 85°C
LTC1698I........................................... – 40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ELECTRICAL CHARACTERISTICS
The indicates specifications which apply over the full operating
V
DD
CG
PGND
GND
OPTODRV
V
COMP
MARGIN
V
FB
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
T
JMAX
Consult LTC Marketing for parts specified with wider operating temperature ranges.
TOP VIEW
1 2 3 4 5 6 7 8
16-LEAD PLASTIC SO
= 125°C, θJA = 130°C/W (GN) = 125°C, θJA = 110°C/W (SO)
FG
16
SYNC
15
V
14
I
13
I
12
I
11
PWRGD
10
OVPIN
9
S PACKAGE
AUX
COMP
SNS
SNSGND
temperature range, otherwise specifications are at TA = 25°C. VDD = 8V, unless otherwise noted. (Note 4)
U
W
ORDER PART
NUMBER
LTC1698EGN LTC1698ES LTC1698IGN LTC1698IS
GN PART MARKING
1698 1698I
U
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
DD
V
UVLO
I
VDD
MARGIN and Error Amplifier
V
FB
I
VFB
V
MARGIN
R
MARGIN
V
FB
G
ERR
BW
ERR
V
CLAMP
I
VCOMP
OPTODRV
G
OPTO
BW
OPTO
V
OPTOHIGH
I
OPTOSC
Supply Voltage 6 8 12.6 V Undervoltage Lockout 4V VDD Supply Current VFB, OVPIN, V
C
= CCG = 1000pF, C
FG
V
= 0V 1.8 4 mA
SYNC
f
= 100kHz (Note 5) 5.0 mA
SYNC
Feedback Voltage MARGIN = Open, V
Feedback Input Current VFB = 1.233V 0.05 1 µA MARGIN Voltage MARGIN = Open 1.65 V MARGIN Input Resistance 16.5 k Feedback Voltage Adjustment V
Error Amplifier Open-Loop DC Gain V Error Amplifier Unity-Gain Bandwidth No Load (Note 6) 2 MHz Error Amplifier Output Clamp Voltage VFB = 0V 2 V Error Amplifier Source Current VFB = 0V –25 –10 mA
Error Amplifier Sink Current V
Opto Driver DC Gain OVPIN, V Opto Driver Unity-Gain Bandwidth No Load (Note 6) 1 MHz Opto Driver Output High Voltage VFB, OVPIN, V
Opto Driver Output Short-Circuit Current OVPIN, V
= 3.3V 456 %
MARGIN
V
= 0V –6 –5 –4 %
MARGIN
= 0.8V to 1.2V, Load = 2k, 100pF 65 90 dB
COMP
= 5V, V
FB
I
= –10mA 45 V
OPTODRV
, V
ISNS
COMP
= 1.233V 37 mA
COMP
, V
ISNS
ISNSGND
ISNSGND
, V
ISNSGND
ISNS
= 0V,
ISNSGND
= 0.1µF,
VAUX
= 1V (Note 7) 1.223 1.233 1.243 V
1.215 1.233 1.251 V
= 0V 4.75 5 5.25 V/V
= 0V, V
= 0V, VFB = 1.233V –50 –25 –10 mA
= –50mV,
ISNS
2
1698f
LTC1698
ELECTRICAL CHARACTERISTICS
The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 8V, unless otherwise noted. (Note 4)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V
AUX
V
AUX
Current Limit Amplifier
I
ISNSGNDISNSGND
I
ISNS
V
ILIMTH
I
ICOMPICOMP
g
mILIM
G
ICOMP
PWRGD and OVP Comparators
V
PWRGD
I
PWRGD
V
OL
V
OVPREF
I
OVPIN
t
PWRGD
t
OVP
SYNC and Drivers
V
PT
V
NT
I
SYNC
f
SYNC
t
d
t
SYNC
tr, t
t
DDIS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. All voltages refer to GND.
Note 2: The LTC1698 incorporates a 5V linear regulator to power internal circuitry. Driving these pins above 5.3V may cause excessive current flow. Guaranteed by design and not subject to test.
Note 3: The LTC1698E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. For guaranteed performance to specifications over the –40°C to 85°C range, the LTC1698I is available.
Note 4: All currents into device pins are positive; all currents out of the device pins are negative. All voltages are referenced to ground unless otherwise specified. For applications with V Performance Characteristics.
Auxiliary Supply Voltage C
Input Current V
I
Input Current V
SNS
Current Limit Threshold V (V
ISNS
– V
) –27.5 –25 –22.5 mV
ISNSGND
Source Current V
I
Sink Current V
COMP
Current Limit Amplifier V
= 0.1µF, I
VAUX
= 0V 0.05 1 µA
ISNSGND
= 0V 0.05 1 µA
ISNS
= 2.5V, V
ICOMP
= 0V, V
ISNSGND
= 0V, V
ISNSGND
= 0V, V
ISNSGND
= 0mA to 10mA, VDD = 7V to 12.6V 3.135 3.320 3.465 V
LOAD
= 0V –27.0 –25 –23.0 mV
ISNSGND
= –0.3V, V
ISNS
= 0.3V, V
ISNS
ICOMP
= 2.5V, I
= 2.5V (Note 8) –280 –200 – 120 µA
ICOMP
= 2.5V (Note 8) 120 200 280 µA
ICOMP
= ±10µA 2.2 3.5 5 millimho
ICOMP
–370 – 200 – 80 µA
80 200 370 µA
Transconductance Current Limit Amplifier V
= 2.5V, No Load 48 60 dB
ICOMP
Open-Loop DC Gain
Percent Below V
FB
V
, MARGIN = Open (Note 9) –9 –6 –3 %
FB
Power Good Sink Current VFB = 2V 10 µA
VFB = 0V 10 mA Power Good Output Low Voltage I OVPIN Threshold VFB = V OVPIN Input Bias Current V
= 3mA, VFB = 0V 0.4 V
PWRGD
= V
ISNS
= 1.233V 0.1 1 µA
OVPIN
= 0V, OVPIN (Note 9) 1.18 1.233 1.28 V
ISNSGND
Power Good Response Time VFB 125 ms Power Bad Response Time VFB 0.5 1 2.5 ms
Overvoltage Response Time V
OVPIN
, C
= 0.1µF 520 µs
OPTODRV
SYNC Input Positive Threshold 1 1.6 2.2 V SYNC Input Negative Threshold – 2.2 –1.6 –1 V SYNC Input Current V SYNC Frequency Range CFG = CCG = 1000pF, V SYNC Input to Driver Output Delay CFG = CCG = 1000pF, f Minimum SYNC Pulse Width f Driver Rise and Fall Time CFG = CCG = 1000pF, f
f
= ±10V 150 µA
SYNC
= ±5V 50 400 kHz
SYNC
= 100kHz, V
SYNC
= 100kHz, V
SYNC
= ±10V (Note 6) 75 ns
SYNC
= 100kHz, V
SYNC
= ±5V 40 90 ns
SYNC
= ±5V, 10 40 ns
SYNC
10% to 90% Driver Disable Time-Out CFG = CCG = 1000pF, f
= 100kHz, V
SYNC
SYNC
= ±5V
Measured from CG (Note 10) 10 15 20 µs
Note 5: Supply current in active operation is dominated by the current needed to charge and discharge the external FET gates. This will vary with the LTC1698 operating frequency, supply voltage and the external FETs used.
Note 6: This parameter is guaranteed by correlation and is not tested. Note 7: VFB is tested in an op amp feedback loop which servos VFB to the
internal bandgap voltage. Note 8: The current comparator output current varies linearly with
temperature. Note 9: The PWRGD and OVP comparators incorporate 10mV of
hysteresis.
< 7V, refer to the Typical
DD
Note 10: The driver disable time-out is proportional to the SYNC period within the frequency synchronization range.
1698f
3
LTC1698
TEMPERATURE (°C)
–50
g
mILIM
(millimho)
3.8
4.2
4.6
100 125
1698 G06
3.4
3.0
–25 250 50 75 150
2.6
2.2
5.0 VDD = 8V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
VFB vs Temperature
1.248 VDD = 8V
1.242
1.236
(V)
FB
V
1.230
1.224
1.218
–50
–25 0
I
Threshold vs Temperature I
SNS
–22.5
VDD = 8V
–23.0 –23.5 –24.0
–24.5
–25.0 –25.5
THRESHOLD (mV)
–26.0
SNS
I
–26.5 –27.0
–27.5
–50
–25 25
50
25 75 150
TEMPERATURE (°C)
0
50
TEMPERATURE (°C)
75
100 125
100
1698 G01
125
1698 G04
150
VFB vs V
1.248 TA = 25°C
1.242
1.236
(V)
FB
V
1.230
1.224
1.218 5
–22.5 –23.0 –23.5 –24.0 –24.5 –25.0 –25.5
THRESHOLD (mV)
–26.0
SNS
I
–26.5 –27.0 –27.5
DD
68
7
Threshold vs V
SNS
TA = 25°C
5
69
10 14
9
VDD (V)
87
VDD (V)
VFB vs V
1.295
1.282
1.270
1.258
1.245
(V)
1.233
FB
V
1.221
1.208
1.196
1.184
13
1698 G05
1.171 0
14
12
11
13
1698 G02
DD
12
10
11
MARGIN
VDD = 8V
= 25°C
T
A
0.660.33
1.320.99 V
MARGIN
1.65
1.98 2.31 2.97 (V)
Current Limit Amplifier g vs Temperature
2.64
1698 G03
m
3.3
5 4 3 2
V
1
FB
(%)
0 –1 –2 –3 –4 –5
OVPIN Threshold vs Temperature OVPIN Threshold vs V
1.28 VDD = 8V
1.26
1.24
1.22
OVPIN THRESHOLD (V)
1.20
1.18
–50
–25 0
4
50
25 75 150
TEMPERATURE (°C)
100 125
1698 G07
1.28 TA = 25°C
1.26
1.24
1.22
OVPIN THRESHOLD (V)
1.20
1.18
68
7
5
DD
12
10 14
11
9
VDD (V)
13
1698 G08
Power Good Threshold vs Temperature
1.196 VDD = 8V
1.181
1.166
1.152
1.137
POWER GOOD THRESHOLD (V)
1.122
–50
–25 0
25 75 150
TEMPERATURE (°C)
–3.0
–4.2
V
–5.4
FB
(%)
–6.6
–7.8
50
100 125
–9.0
1698 G09
1698f
UW
TYPICAL PERFOR A CE CHARACTERISTICS
V
vs Temperature V
AUX
3.465 VDD = 8V
= 0mA
I
LOAD
3.424
3.383
3.341
(V)
3.300
AUX
V
3.259
3.218
3.176
3.135
–25
–50
V
0
Short-Circuit Current
AUX
50
25
TEMPERATURE (°C)
vs Temperature
0
VDD = 8V
–10
–20
–30
SHORT-CIRCUIT CURRENT (mA)
–40
AUX
V
–50
–50
–25 0
50
25 75 150
TEMPERATURE (°C)
75
100
125
100 125
1698 G10
1698 G13
3.465
3.424
3.383
3.341
(V)
3.300
AUX
V
3.259
3.218
3.176
150
3.135
V
AUX
vs V
0
TA = 25°C
–10
–20
–30
SHORT-CIRCUIT CURRENT (mA)
–40
AUX
V
–50
5
vs Line Voltage V
AUX
VDD = 8V
= 0mA
I
LOAD
10
6
5
78
9
VDD (V)
11
12
Short-Circuit Current
DD
9
67
810 14
11 12 13
VDD (V)
1698 G14
AUX
3.465 VDD = 8V
= 25°C
T
A
3.424
3.383
3.341
(V)
3.300
AUX
V
3.259
3.218
3.176
13
1698 G11
14
3.135
0
Opto Driver Load Regulation
3.030 VDD = 8V
3.024
= 25°C
T
A
3.018
3.012
3.006
3.000
2.994
2.988
2.982
OPTO DRIVER OUTPUT VOLTAGE (V)
2.976
2.970
21
0
vs Load Current
1
23
4
LOAD CURRENT (mA)
67 9
43
5
LOAD CURRENT (mA)
LTC1698
5
6
7
8
1698 G12
1.0
0.8
0.6
0.4
0.2 0 –0.2 –0.4 –0.6 –0.8
1698 G15
–1.0
10
8
109
PERCENT (%)
Maximum OPTO Driver Output Voltage vs Load Current
8
6
4
2
TA = 25°C V
= 0V
COMP
MAXIMUM OPTO DRIVER OUTPUT VOLTAGE (V)
0
2
1
0
5
4
3
LOAD CURRENT (mA)
6
VDD = 10V
VDD = 8V
VDD = 7V
VDD = 6V VDD = 5V
7
8
9
1698 G22
Maximum OPTO Driver Output Voltage vs Temperature
8
6
4
2
= 0V
V
COMP
I
= –10mA
OPTODRV
MAXIMUM OPTO DRIVER OUTPUT VOLTAGE (V)
0
–50
10
–25 0 25 50
TEMPERATURE (°C)
VDD = 10V
VDD = 8V
VDD = 7V
VDD = 6V
VDD = 5V
75 100 125 150
1698 G23
Opto Driver Short-Circuit Current vs Temperature
–10
VDD = 8V
= 1.233V
V
OPTODRV
–15
–20
–25
–30
–35
–40
–45
OPTO DRIVER SHORT-CIRCUIT CURRENT (mA)
–50
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
125
1698 G16
150
1698f
5
LTC1698
VDD (V)
5
1.00
SYNC POSITIVE THRESHOLD (V)
1.24
1.72
1.96
2.20
7
9
10 14
1698 G21
1.48
68
11
12
13
TA = 25°C
UW
TYPICAL PERFOR A CE CHARACTERISTICS
I
vs SYNC Frequency
VDD
50
VDD = 8V
45
T
= 25°C
(mA)
VDD
I
A
40 35 30 25 20 15 10
5 0
50
CFG = CCG = 2200pF
150100
CFG = CCG = 4700pF
CFG = CCG = 3300pF
CFG = CCG = 1000pF
350 400
250200
300
f
(kHz)
SYNC
Opto Driver Short-Circuit Current vs V
DD
0
TA = 25°C
= 1.233V
V
OPTODRV
–10
–20
–30
–40
OPTO DRIVER SHORT-CIRCUIT CURRENT (mA)
–50
5
67
9
810 14
11 12 13
VDD (V)
450
1698 G19
1698 G17
500
SYNC Positive Threshold vs Temperature
2.25 VDD = 8V
2.00
1.75
1.50
1.25
SYNC POSITIVE THRESHOLD (V)
1.00
(mA)
VDD
I
20 18 16 14 12 10
8 6 4 2 0
–50
I
VDD
TA = 25°C f
SYNC
5
–25 0
vs V
= 100kHz
CFG = CCG = 3300pF
CFG = CCG = 1000pF
76
50
25 75 150
TEMPERATURE (°C)
DD
CFG = CCG = 4700pF
98
VDD (V)
100 125
1698 G20
CFG = CCG = 2200pF
11 12
10
13
1698 G18
SYNC Positive Threshold vs V
DD
Undervoltage Lockout Threshold vs Temperature
5
4
3
(V)
UVLO
V
2
1
0
–50
14
–25 0
50
25 75 150
TEMPERATURE (°C)
100 125
1698 G24
Driver Rise, Fall and Propagation Delay vs Driver Load
90
VDD = 8V
= 25°C
T
80
A
70
60
50
40
TIME (ns)
30
20
10
0
0
6
CG, FG t
2000 6000
CG, FG t
PLH
t
f
PHL
4000
DRIVER LOAD (pF)
t
SYNC Input to Driver Output Delay vs Temperature
90
VDD = 8V C
= CFG = 1000pF
80
CG
= 100kHz
f
SYNC
70
60
CG, FG t
r
10000
8000
1698 G25
50
(ns)
d
t
40
30
20
10
0
–50 –25 0 25 50 75 100 125 150
PLH
CG, FG t
TEMPERATURE (°C)
PHL
1698 G26
Driver Disable Time-Out vs SYNC Frequency
30
VDD = 8V
= 25°C
T
A
25
(µs)
DISS
20
15
10
5
DRIVER DISABLE TIME-OUT t
0
100 200
150
50
t
DISS
t
DISS
300 500
350
250
f
(kHz)
SYNC
2.2
NORMALIZED DRIVER DISABLE TIME-OUT
2.0
× f
SYNC
400
450
1698 G27
1.8
1.6
1.4
1.2
1.0
t
DISS
× f
SYNC
1698f
LTC1698
U
UU
PI FU CTIO S
VDD (Pin 1): Power Supply Input. For isolated applica­tions, a simple rectifier from the power transformer is used to power the chip. This pin powers the opto driver, the V regulator powers the remaining circuitry. VDD requires an external 4.7µF bypass capacitor.
CG (Pin 2): Catch Gate Driver. If SYNC slews positive, CG pulls high to drive an external N-channel MOSFET. CG draws power from the VDD pin and swings between V and PGND.
PGND (Pin 3): Power Ground. Connect PGND to a low impedance ground plane in close proximity to the ground terminal of the external current sensing resistor.
GND (Pin 4): Logic and Signal Ground. GND is referenced to the internal low power circuitry. Careful board layout techniques must be used to prevent corruption of signal ground reference. Connect GND and PGND together di­rectly at the LTC1698.
OPTODRV (Pin 5): Optocoupler Driver Output. This pin drives a ground referenced optocoupler through an exter­nal resistor. If VFB is low, OPTODRV pulls low. If VFB is high, OPTODRV pulls high. This optocoupler driver has a DC gain of 5. During overvoltage or overcurrent condi­tions, OPTODRV pulls high. The output is capable of sourcing 10mA of current and will drive an external 0.1µF capacitive load and is short-circuit protected.
V
COMP
is able to drive more than 2k and 100pF of load. The internal diode connected from VFB to V OPTODRV recovery time under start-up conditions.
MARGIN (Pin 7): Current Input to Adjust the Output Voltage Linearly. The MARGIN pin connects to an internal
16.5k resistor. The other end of this resistor is regulated to 1.65V. Connecting MARGIN to a 3.3V logic supply sources 100µA of current into the chip and moves the output voltage 5% higher. Connecting MARGIN to 0V sinks 100µA out of the pin and moves the regulated output voltage 5% lower. The MARGIN pin voltage does not affect the PWRGD and OVPIN trip points.
VFB (Pin 8): Feedback Voltage. VFB senses the regulated output voltage through an external resistor divider. The VFB pin is servoed to the reference voltage of 1.233V under closed-loop conditions. An RC network from VFB to V
supply and the FG and CG drivers. An internal 5V
AUX
DD
(Pin 6): Error Amplifier Output. This error amplifier
reduces
COMP
COMP
compensates the feedback loop. If VFB goes low, V pulls high and OPTODRV goes low.
OVPIN (Pin 9): Overvoltage Input. OVPIN is a high imped­ance input to an internal comparator. The threshold of this comparator is set to 1.233V. If the OVPIN potential is higher than the threshold voltage, OPTODRV pulls high immediately. Use an external RC lowpass filter to prevent noisy signals from triggering this comparator.
PWRGD (Pin 10): Power Good Output. This is an open­drain output. PWRGD floats if VFB is above 94% of the nominal value for more than 2ms. PWRGD pulls low if V is below 94% of the nominal value for more than 1ms. The PWRGD threshold is independent of the MARGIN pin potential.
I
SNSGND
positive side of the sense resistor, normally grounded.
I
SNS
tive side of the sense resistor through an external RC lowpass filter. This pin normally sees a negative voltage, which is proportional to the average load current. If current limit is exceeded, OPTODRV pulls high.
I
COMP
at this pin compensates the current limit feedback loop. Referencing the RC to V shoot on start-up. This pin can float if current limit loop compensation is not required.
V
AUX
requires a 0.1µF or greater bypass capacitor. This auxiliary power supply can power external devices and sources 10mA of current. Internal current limiting is provided.
SYNC (Pin 15): Drivers Synchronization Input. A negative voltage slew at SYNC forces FG to pull high and CG to pull low. A positive voltage slew at SYNC resets the FG pin and CG pulls high. If SYNC loses its synchronization signal for more than the driver disable time-out interval, both the forward and catch drivers output are forced low. The SYNC circuit accepts pulse and square wave signals. The mini­mum pulse width is 75ns. The synchronization frequency range is between 50kHz to 400kHz.
FG (Pin 16): Forward Gate Driver. If SYNC slews negative, FG goes high. FG draws power from VDD and swings between VDD and PGND.
(Pin 11): Current Sense Ground. Connect to the
(Pin 12): Current Sense Input. Connect to the nega-
(Pin 13): Current Amplifier Output. An RC network
controls output voltage over-
OUT
(Pin 14): Auxiliary 3.3V Logic Supply. This pin
COMP
FB
1698f
7
LTC1698
BLOCK DIAGRA
V
14
SYNC
15
MARGIN
7
W
AUX
1
V
DD
AUX GEN VCC GEN
V
SYNC IN
R
MARGIN
I-TO-V CONVERTER
CC
CG
FG
16
2
OPERATIO
OPTODRV
5
PWRGD
10
V
U
(Refer to Block Diagram)
M
PWRGD
PWRGD
FB
BANDGAP
100k
+
0.94V
REF
OPTO
V
REF
±5% V
REF
+
20k
M
ILIM
R
ILIM
3k
R
OVP
3k
+
ERR
+
I
LIM 25mV
+
+
OVP
V
FB
8
V
COMP
6
I
SNSGND
11
I
SNS
12
I
COMP
13
V
REF
OVPIN
9
1698 BD
The LTC1698 is a secondary-side synchronous rectifier controller designed to work with the LT3781 primary-side synchronous controller chip to form an isolated synchro­nous forward converter. This chip set uses a dual transis­tor forward topology that is predominantly used in distrib­uted power supply systems where isolated low voltages are needed to power complex electronic equipment. The primary stage is a current mode, fixed frequency forward converter and provides the typical PWM operation. A power transformer is used to provide the functions of input/output isolation and voltage step-down to achieve the required low output voltage. Instead of using typical
8
Schottky diodes, synchronous rectification on the sec­ondary offers isolation with high efficiency. It supplies high power without the need of bulky heat sinks, which is often a problem in any space constrained application.
The LTC1698 not only provides synchronous drivers for the external MOSFETs, it comes with other housekeeping functions performed on the secondary side of the power supply, all within a single integrated controller. Figure 1 shows the typical chip-set application. Upon power up, the LTC1698’s VDD input is low, the gate drivers TG and BG are both at the ground potential. The secondary forward and
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