Datasheet LTC1629 Datasheet (LINEAR TECHNOLOGY)

Application Note 77

September 1999

High Efficiency, High Density, PolyPhase Converters
for High Current Applications

Wei Chen

INTRODUCTION

As logic systems get larger and more complex, their
supply current requirements continue to rise. Systems
requiring 100A are fairly common. A high current power
supply to meet such requirements usually requires paral­leling several power regulators to alleviate the thermal
stress on the individual power components. A power
supply designer is left with the choice of how to drive these
paralleled regulators: brute-force single-phase or smart
PolyPhaseTM.

A PolyPhase converter interleaves the clock signals of the
paralleled power stages, reducing input and output ripple
current without increasing the switching frequency. The
decreased power loss from the ESR of the input capacitor
and the low switching losses associated with MOSFETs at
relatively low switching frequencies help achieve high
power conversion efficiency. The size and cost of the input
capacitors are also greatly reduced as a result of input
ripple current cancellation. Since output ripple current
cancellation also occurs, lower value inductors can be
used. This results in improved dynamic response to load
transients. A combination of lower current rating and
decreased inductance also allows the use of smaller­sized, low profile, surface mounted inductors. For
multioutput applications, PolyPhase converters may also
provide the benefit of smaller input capacitors.

Previously, the implementation of multiphase designs
was difficult and expensive because of complex timing and
current-sharing requirements. The newly developed
LTC1629 solves these problems for high current, single
output designs, while the LTC1628 addresses dual-output
applications. Both ICs are dual, current mode, PolyPhase
controllers that can drive two synchronous buck stages
simultaneously. The features of the LTC1629 include a
unity-gain differential amplifier for true remote sensing,

low impedance gate drives, current-sharing, overvoltage
protection, optional overcurrent latch-off and foldback
current limit. Additionally, the LTC1629 can be configured
for 2-, 3-, 4-, 6- and 12-phase operation with a simple
phase selection signal (high, low or open). Optimizing the
number of phases can help achieve the smallest and the
most cost-effective power supply design.

This application note analyzes the performance of
PolyPhase converters and provides guidelines for select­ing the phase number and designing a PolyPhase con­verter using the LTC1629. The following questions will be
answered as the discussion goes on:

• How much do I gain by using a PolyPhase architecture?

• How many phases do I need for my application?

• How do I design a PolyPhase converter?

HOW DO POLYPHASE TECHNIQUES EFFECT CIRCUIT
PERFORMANCE?

In general, PolyPhase operation improves the large signal
performance of a switched mode power converter, by
such means as reducing ripple current and ripple voltage.
A synchronous buck converter is used as an example in
this application note to analyze the effects of PolyPhase
techniques on circuit performance.

High current outputs usually require paralleling several
regulators. The single-regulator approach is not feasible
because of the unacceptable thermal stress on the indi­vidual power components. Paralleled regulators are syn­chronized to have the same switching frequency to eliminate
beat frequency noise at both the input and output termi­nals. Based on the phase relationship between the paral-

, LTC and LT are registered trademarks of Linear Technology Corporation.

PolyPhase is a trademark of Linear Technology Corporation.

AN77-1

Application Note 77

leled regulators, these converters can be divided into two
types: single-phase and PolyPhase. To balance the ther­mal stress in each component, paralleled regulators must
also share the load current.

In this application note, the number of channels refers to
the number of the paralleled regulators in one supply. The
following symbols are defined to facilitate reference:

•VO: DC output voltage

•IO: DC output current

•VIN: DC input voltage

• T: switching period

• mc: number of paralleled channels

• m: number of phases. The possible phase numbers are
usually determined by the channel number, mc. For
example, if mc = 6, the possible phase numbers are
m␣ =␣ 1, 2, 3, 6.

•CO: output capacitor

• ESR: equivalent series resistance of C

O

•Lf: output inductor

• D: duty cycle, approximated by VO/VIN in buck circuits

Current-Sharing

The current-sharing can be easily achieved by implement­ing peak current mode control. In a current mode control
regulator, the load current is proportional to the error
voltage in the voltage feedback loop. If the paralleled
regulators see the same error voltage, they will source
equal currents. A 2-channel circuit is used as the example
to explain this current-sharing mechanism.

As shown in Figure 1, peak current mode control requires
that the high side switch turn off when the peak inductor
current (IL1, IL2) intersects the error voltage, VER, result­ing in the same peak inductor currents. If the inductors are
identical, the peak-to-peak ripple currents of the inductors
will be the same. The DC currents of two inductors, which
are the peak current less half of the peak-to-peak ripple
current, will be equivalent. Two modules therefore share
the load current equally. The same current-sharing mecha­nism can be extended to any number of channels in
parallel. This current-sharing scheme will prevent an
individual module from suffering excessive current stress
in steady state operation and during line/load transient
conditions. Note that the sharing mechanism is open loop,
so no oscillations will occur due to current-sharing.

IN+

IN–

V

GS(MAIN SWITCH OF MODULE 1)

I

IN

+

C

IN

I

IN1

V

MODULE #1

I

L1

L1

I

IN2

MODULE #2

I

L2

L2

+

OUT+

I

C

C

O

OUT–

AN77 F01a

GS(MAIN SWITCH OF MODULE 2)

I

C

(a)

O TDT

(b)

V

ER

I

O/2

I

I

L2

L1

∆I

O

AN77 F01b

Figure 1. 2-Channel Converter: (a) Schematic and (b) Typical Waveforms

AN77-2

Application Note 77

Output Ripple Current Cancellation and Reduced
Output Ripple Voltage

The phase relationship of Figure 1(b) shows how ripple
current cancellation at the output works. Because of the
180 degree phase difference between the two converters,
the two inductor ripple currents in the two-phase con­verter tend to cancel each other, resulting in a smaller
ripple current flowing into the output capacitor. The fre­quency of the output ripple current is doubled as well. All
of these factors contribute to a smaller output capacitor
for the same ripple voltage requirement.

Figure 2 shows the measured waveforms of the inductor
currents and output ripple currents in a 2-channel con­verter. The output ripple cancellation reduces the output
ripple current from 14A

(single-phase) to 6A

P-P

P-P

(dual­phase). The ripple frequency in the dual-phase circuit is
twice the switching frequency.

To quantify the output ripple current amplitude in an m­phase circuit, a closed-form expression was developed.
The derivation starts with the 2-phase circuit shown in
Figure 1. During the interval [from DT, T] when the high
side switch in module 1 is off and the high side switch of
module 2 is on, the inductor current in module 1 decreases

and the inductor current in module 2 increases. The net
ripple current flowing into the output capacitors is smaller.
The output ripple current for the 2-phase circuit is derived
as:

−

12

D

−+

12 1

D

(1)

∆I

VDT

21

O

=

O

−

()

L

f

See Appendix A for the detailed derivation procedure. By
extending the same derivation procedure to an m-phase
configuration, the output ripple current for an m-phase
circuit is obtained.

Output ripple current peak-to-peak amplitude in m-phase
circuit:

∆I

O








=



mc V T








•

L

f

O

•

VT D

−

1

O

()

L

f

m

∏

m

=

1

i

−

1

m



i

∏



m



=

1

i

m

,

i

D

−

D

−+

m

1

=

1

=

m

, , ,...

23






(2)

I

L1

5A/DIV

I

L2

5A/DIV

I

C

5A/DIV

(a) Single-Phase (b) Dual-Phase

Figure 2. Output Ripple Current Waveforms In a 2-Channel Circuit. IL1 and IL2 Are the Inductor Currents In Two Channels
and IC Is the Net Ripple Current Flowing Into Output Capacitor. Test Conditions: VIN = 12V, VO = 2V, IO = 20A

AN77 F02a AN77 F02b

I

5A/DIV

I

5A/DIV

5A/DIV

L1

L2

I

C

AN77-3

Application Note 77

The output ripple voltage is estimated to be:

∆∆VIT

∆

OPP

O

<+•

mC

8

O

I ESR

O,

(3)

The first term in equation (3) represents the ripple voltage
on the pure capacitive components of CO and the second
term represents the ripple voltage generated on the ESR of
CO. Intuitively, a higher phase number helps reduce the
ripple component in the first term, and therefore, the
overall ripple voltage amplitude at the output. Another
interesting fact that can be observed is that the output
ripple current and voltage will reach zero if the duty cycle
is equal to one of the following critical points:

D

i

==−, , ,...,12 1

crit

m

im

(4)

In a buck converter, the duty cycle is the ratio of the output
voltage and input voltage. By interpreting equation (4) in
terms of VIN and VO, the zero output ripple conditions can

be rewritten as:

V

V

i

O

==−, , ,...,12 1

m

IN

im

(5)

The plots in Figure 3 demonstrate the influence of phase
number and duty cycle on the output ripple current. In this
plot, the output ripple current is normalized against the
inductor ripple current at zero duty cycle (DIr = VOT/Lf).
The following assumptions are made: the number of
channels equals the phase number, the output voltage is
fixed and the power conversion efficiency is assumed to be
100%. This plot can be used to estimate the output ripple
current without tedious calculations.

The output ripple current approaches zero when the duty
cycle is near the critical points for the selected phase
number. For a buck circuit, the duty cycle is approximately
the ratio of VO/VIN. Therefore, if the input and output
voltages are relatively fixed, there exists an optimum
phase number to minimize the output ripple voltage.

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

DIr

0.45

0.40

0.35

0.30

PEAK-TO-PEAK OUTPUT RIPPLE CURRENT

0.25

0.20

0.15

0.10

0.05
0

0.1 0.15 0.2 0.25 0.350.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85
DUTY CYCLE (VO/VIN)

Figure 3. Normalized Output Ripple Current vs Duty Cycle, DIr =

1-PHASE
2-PHASE
3-PHASE
4-PHASE

6-PHASE

VOT

L

0.9

AN77 F03

f

AN77-4

Application Note 77

Assuming that the maximum available phase number is
six and the efficiency is 100%, the optimum phase num­bers for some common input and output voltages are
shown in Table 1.

Table 1. Optimum Phase Number for Minimizing the Ripple
Currents (Assuming That the Maximum Phase Number Is 6 and
the Efficiency Is 100%)

VO = 1.2V VO = 1.5V VO = 2.0V VO = 2.5V

VIN = 5V 4 6 5 2, 4, 6
VIN = 12V 6 6 6 5

1

6 is the optimum phase number for minimum input ripple current.

1

For high step-down ratio or low duty cycle applications
(for example, VIN = 12V, VO = 1.2V, D = 0.1), a high phase
number helps reduce the maximum ripple current. For
wide duty cycle range applications, high phase number
tends to, but does not necessarily, yield lower output

I

L1

5A/DIV

ripple current. The optimum phase number needs to be
evaluated over the complete operating duty cycle range.
The reduction in the ripple current by increasing phase
number is not significant above four phases in most duty
cycle ranges.

Figure 4 shows the measured output ripple current near
the critical duty cycle point, which is D

= 0.5 for a

crit

2-phase circuit. The test conditions were VIN = 5V, VO = 2V,
IO = 20A, fs = 250kHz. Because of the voltage drop across
the MOSFET switches, the operating duty cycle was very
close to 50%. The dual-phase technique was able to
reduce the output ripple current considerably, from 10A
(in the single-phase circuit) to 2.5A

. As a result, the

P-P

P-P

output ripple voltage near the critical duty cycle point is
negligible, as shown in Figure 5.

I

L1

5A/DIV

I

5A/DIV

5A/DIV

L2

I

C

AN77 F04a AN77 F04b

5A/DIV

5A/DIV

I

L2

I

C

(a) Single-Phase (b) Dual-Phase

Figure 4. Experimental Waveforms of Output Ripple Current Near Critical Duty Cycle Point (VIN = 5V, VO = 2V, IO = 20A, fs = 250kHz):
Top Trace, Inductor 1 Current; Middle Trace, Inductor 2 Current; Bottom Trace, Output Ripple Current

V

OAC

10mV/DIV

V

SW1

10mV/DIV

V

SW2

10mV/DIV

(a) Single-Phase

AN77 F05a AN77 F05b

V

OAC

10mV/DIV

V

SW1

10mV/DIV

V

SW2

10mV/DIV

(b) Dual-Phase

Figure 5 Measured Output Ripple Voltage (Top Trace) near Critical Duty Cycle Point (VIN = 5V, VO = 2V,
IO = 20A, fs = 250kHz, V

SW1

and V

are the switch node voltages across the bottom FETs)

SW2

AN77-5

Application Note 77

Improved Load Transient Response

The influences of PolyPhase techniques on the load tran­sient performance are numerous. First, the reduced out­put ripple voltage allows more room for voltage variations
during the load transient because the ripple voltage will
consume a smaller portion of the total error budget. With
the same number of capacitors on the output terminals of
the power supply, the sum of the overshoot and under­shoot can be reduced dramatically. Second, the reduced
ripple current allows the use of lower value inductors. This
speeds up the output current slew rate of the power
supply. Consequently, PolyPhase helps improve the load
transient performance of the power supply. Figure 6
shows the output voltages during a load transient. It is
noted that the two circuits have the same electrical design.
The dual-phase technique reduces the voltage variation
from 69mV

to 58mV

P-P

, a 16% reduction with no

P-P

changes in component values. The inductor values could
be reduced while still achieving lower output ripple voltage
than the single-phase design, and further improvement in
the peak-to-peak voltage variations for the load transient
response could be realized.

Input Ripple Current Cancellation

The input current of a buck converter is discontinuous.
With the input supply mainly sourcing DC current, the
input capacitor supplies a pulsating current to the buck
converter. In a single-phase circuit, the high side switches
of the paralleled buck modules turn on simultaneously.
The input capacitor needs to provide the sum of the pulsed

currents. In a PolyPhase circuit, however, the paralleled
buck stages switch at different times and the pulsating
current flowing through the input capacitor is reduced
dramatically.

Figure 7 shows the measured input ripple current in a
2-channel converter. The PolyPhase converter reduces
the peak amplitude of the input ripple current by half and
doubles the ripple frequency. The reduced ripple current
amplitude results in a much smaller RMS current in the
input capacitor. Because the power loss on the ESR of the
input capacitor is proportional to the square of the RMS
current, the loss reduction can be significant. The size of
the input capacitor is reduced and the life of the capacitor
will likely be improved. The increased ripple frequency and
the reduced ripple amplitude also facilitate EMI filtering.

In order to quantitatively evaluate the input ripple current
in an m-phase circuit, a close-form expression is derived
by using some mathematical manipulations on the input
ripple current waveforms.

Input ripple current RMS value:

2



•





f

I

irms



D

−





=




kD

+

()





kmk















2

1





m

2



1

VDT

−

1

+



DI

−





3

k



−





m

mc

2

+

o

12

mD

1

k

+



2

k

+





m

()

o



2

−

L



3







D









(6)

where k = FLOOR(m•D), m = 1, 2, …

V

OAC

20mV/DIV

AN77-6

V

OAC

20mV/DIV

(a) Single-Phase (b) Dual-Phase

Figure 6. Measured Output Voltage During Load Transients (VIN = 12V, VO = 2V, fs = 250kHz.

Load steps: 5A to 20A and 20A to 5A, 50µs rise and fall times. Time scale: 500µs/DIV)

AN77 F06a AN77 F06b

Application Note 77

The variable k is determined by the phase number (m) and
the duty cycle (D). For example, in a five-phase converter,
at 45% duty cycle, k = FLOOR(5 • 0.45) = 2. The FLOOR(x)
function provides a greatest integer that is smaller than or
equal to x.

As indicated in equation (6), the input ripple current of a
PolyPhase converter consists of two major factors: the DC
load current (first term) and the inductor ripple current
(second term). Since the inductor ripple current is almost
unaffected by the load conditions, the maximum RMS
input ripple current is reached at full load.

I

IN1

10A/DIV

I

IN2

10A/DIV

TOTAL I

IN

10A/DIV

Usually, the size of the input capacitor is determined by the
power dissipation on its ESR. The full load condition
contributes to a maximum RMS input ripple current, and
therefore, determines the size of the input capacitor.

Figure 8 plots the RMS input ripple current against the
duty cycle for different phase configurations. In this plot,
the RMS input ripple current is normalized against the DC
load current. The output voltage is assumed fixed at 5V
and the input voltage is varied, resulting in a duty cycle
range from 0.1 to 0.9. Several facts can be observed from
the curves.

I

IN1

10A/DIV

I

IN2

10A/DIV

TOTAL I

IN

10A/DIV

AN77 F07a AN77 F07b

(a) Single-Phase (b) Dual-Phase

Figure 7 Measured Input Ripple Current: I

in1

and I

are the ripple currents into the paralleled modules.

in2

Total Iin is the net ripple current into the input capacitor. (VIN = 12V, VO = 2V, IO = 20A, fs = 250kHz)

0.60
1-PHASE

0.55

0.50

0.45

0.40

0.35

0.30

0.25

DC LOAD CURRENT

RMS INPUT RIPPLE CURRNET

0.20

0.15

0.10

0.05

2-PHASE
3-PHASE
4-PHASE
6-PHASE

0

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
DUTY FACTOR (VO/VIN)

Figure 8. Normalized RMS Input Ripple Current

0.85 0.9

AN77 F08

AN77-7

Application Note 77

When the duty cycles are close to the critical duty cycle
points (determined in equation (4)), the first term in
equation (6) is zero. The RMS input ripple current reaches
the local minimum values. These values are not zero due
to the output inductor ripple current. Consequently, there
exists an optimum phase number to achieve the minimum
RMS input ripple current for a fixed input and output
application. For some common input and output voltages,
the optimum phase numbers for minimizing the input
ripple current are shown in Table 1. Note that these are the
same as the values for the minimum output ripple voltage.
For a wide duty cycle range application, higher phase
number helps reduce the maximum input ripple current.
But the reduction in the input ripple current by increasing
phase number may not be significant at higher phase
numbers in certain duty cycle ranges. The optimum phase
number needs to be evaluated over the complete operating
duty cycle range.

Figure 9 shows the experimental waveform of the input
ripple currents in a 2-channel circuit. The circuit operated
at close to 50% duty cycle, which is the critical duty cycle
point for the two-phase circuit. Compared to the single­phase technique, the PolyPhase technique reduced the
ripple current in the input capacitor dramatically.

DESIGN CONSIDERATIONS

Similar to the design of conventional paralleled regulators,
the design of a PolyPhase converter involves the choice of
the number of paralleled channels and the selection of the
power components (MOSFETs, inductors, capacitors, etc.).

Usually, the number of phases is set to be equal to the
number of channels. However, the number of channels
and the number of phases may be different. The number
of channels is usually determined by the total load current
and the acceptable current stress in each channel. For
example, if the required load current is 60A and the
maximum current stress per channel is 15A, 4 channels
need to be paralleled. The number of phases, on the other
hand, can be selected to minimize the input and output
filter capacitors. Note that each phase must have an equal
number of channels. In this example, a 4-channel configu­ration, one, two or four phases may be used.

Selection of phase number

As discussed in the previous section, the selection of a
different number of phases will greatly affect the input and
output ripple current.

For a narrow input and output range, the duty cycle range
is relatively narrow. The optimum phase number should
be chosen such that the circuit operates at or near one of
the critical duty cycle points (determined by equation 4).
For some practical input voltages and output voltages, the
optimum phase numbers for the minimum input ripple
currents and the lowest output ripple voltage are listed in
Table 1. For wide input or output voltage range, the phase
number should be chosen such that the worst-case RMS
input ripple current and the worst-case output ripple
voltage are minimized for the complete operating duty
cycle range.

I

IN1

10A/DIV

I

IN2

10A/DIV

TOTAL I

IN

10A/DIV

AN77-8

I

IN1

10A/DIV

I

IN2

10A/DIV

TOTAL I

IN

10A/DIV

(a) Single-Phase (b) Dual-Phase

Figure 9. Input Current Near Critical Duty Cycle In a 2-Channel (VIN = 5V, VO = 2V, IO = 20A, fs = 250kHz)

AN77 F09a AN77 F09b

Application Note 77

PolyPhase Converters using the LTC1629

The LTC1629 integrates proprietary phase-locked-loop­based phasing circuitry. Each IC can be synchronized to an
external signal at the PLLIN pin and produce a CLKOUT
signal to synchronize other ICs. Table 2 shows the phase
function table of the LTC1629. By applying the command
signal (INTVCC, open or SGND) to the PHASMD pin and
connecting the CLKOUT pin of one IC to the PLLIN pin of
the next one, different numbers of phases can be achieved.
Figure 11 shows 2-phase, 3-phase, 4-phase, 6-phase and
12-phase configurations using the LTC1629.

A higher number of phases is usually needed for very high
output current or multioutput applications. For example,
in a 2-output system, 3.3V/90A and 5V/60A, if each output

U1

PHASMD TG1
PLLIN TG2

(a) 2-PHASE

Table 2. Phase Function Table for LTC1629

PHASMD 0V OPEN INTV

PLLIN 0° 0° 0°
CONTROLLER 1 0° 0° 0°
CONTROLLER 2 180° 180° 240°
CLKOUT 60° 90° 120°

CC

is provided by a 6-phase power supply, the two power
supplies can be interleaved by using a 12-phase configu­ration. As shown in Figure 12, U1, U2 and U3 are used to
produce the 3.3V output, and U4, U5, and U6 are used for
the 5V output. The resulting input ripple current frequency
is twelve times the switching frequency and the ripple
current amplitude is reduced.

0°0
180°

CC

U1

PHASMD TG1
PLLIN TG2

CLKOUT

0°INTV
240°

120

(b) 3-PHASE

U2

120°0 PHASMD TG1

PLLIN TG2

CLKOUT

TOP VIEW

RUN/SS
SENSE1
SENSE1

EAIN

PLLFLTR

PLLIN

PHASMD

I

SGND

V

DIFFOUT

V

OS

V

OS

SENSE2
SENSE2

1

+

2

–

3
4
5
6
7
8

TH

9

10

–

11

+

12

–

13

+

14

28
27
26
25
24
23
22
21
20
19
18
17
16
15

CLKOUT
TG1
SW1
BOOST1
V

IN

BG1
EXTV
INTV
PGND
BG2
BOOST2
SW2
TG2
AMPMD

Figure 10. Pinouts of LTC1629

U1

PHASMD TG1
PLLIN TG2

CLKOUT

U1

PHASMD TG1
PLLIN TG2

CC

CC

CLKOUT

U1

PHASMD TG1
PLLIN TG2

CLKOUT

U4

PHASMD TG1
PLLIN TG2

CLKOUT

0°0
180°

60°

0°0
180°

60°

210°0
30°

270°

0°OPEN

0

180°
90°

(c) 4-PHASE

U2

PHASMD TG1
PLLIN TG2

CLKOUT

(d) 6-PHASE

U2

PHASMD TG1
PLLIN TG2

CLKOUT

U5

PHASMD TG1
PLLIN TG2

CLKOUT

(e) 12-PHASE

U2

PHASMD TG1
PLLIN TG2

CLKOUT

60°0
240°

120°

60°0
240°

120°

270°0
90°

330°

90°
270°

U3

PHASMD TG1
PLLIN TG2

CLKOUT

U3

PHASMD TG1
PLLIN TG2

CLKOUT

U6

PHASMD TG1
PLLIN TG2

CLKOUT

120°0
300°

120°OPEN
300°

210°

330°0
150°

AN77 F11

Figure 11. Configuration of Different Phases Using the LTC1629

AN77-9

Application Note 77

A1

F

AN77 F13

A2

A

B1

B2

E1

E

D

E2

OUT+

OUT–

IN+

IN–

B

C

+

C

O

C

IN

+

The LTC1629 includes a unity gain differential amplifier,
enabling true remote sensing of the output voltage. This is
particularly useful for maintaining tight output voltage
regulation for high current applications. Each LTC1629
based regulator consists of two synchronous buck stages
and two or more power regulators can be paralleled
directly. The inherent peak current mode control permits
automatic current-sharing. When several LTC1629-based
regulators are in parallel, the LTC1629 of the master
regulator senses the output voltage (VO+, VO–) via its
on-chip differential amplifier and divides this voltage
(V

DIFFOUT

) down through the resistor divider to utilize the
built-in 0.8V reference for output voltage regulation. This
control voltage is then fed to the EAIN pins (error amplifier
input) of each LTC1629. Since the error amplifier inside
the LTC1629 is a gm transconductance amplifier, directly
paralleling the ITH pins (error amplifier outputs) and the
EAIN pins is allowed. The paralleled regulators now share
the same error voltage. Because the load current of a
current mode regulator is proportional to the error volt­age, the paralleled regulators must source equal currents.

across the individual modules’ inputs and outputs (such
as A1B1, A2B2, etc.). The traces (AA1, AA2, BB1, BB2,
etc.) between modules should be the shortest and widest
possible to balance the current stress in each capacitor.
The impedance of the traces highlighted in Figure 13
should be minimized. It is preferable that these traces be
large copper planes. It is also important that the sources
of bottom MOSFETs (B1, B2, etc.) be connected to the
input filter capacitors before joining the ground plane
(CD). Otherwise, the ground noise generated by the pul­sating current through the trace inductance will be seen on
the output terminals as spikes.

Layout Considerations

To take full advantage of the ripple cancellation of the
PolyPhase technique, the input capacitors and output
capacitors are ideally placed at the summation points of all
the input ripple currents and all the output ripple currents,
respectively. Figure 13 shows the layout for a 2-phase
converter. In practice, the filter capacitors may be placed

U1

0°0
180°

60°

210°0
30°

270°

AN77-10

PHASMD TG1
PLLIN TG2

0°

CLKOUT

U4

PHASMD TG1
PLLIN TG2

CLKOUT

Figure 12. 2-Output System Using 12-Phase Configuration

Figure 13. Layout Diagram of Power Stage for 2-Phase Converter

OUTPUT #1

U2

PHASMD TG1
PLLIN TG2

CLKOUT

U5

PHASMD TG1
PLLIN TG2

CLKOUT

OUTPUT #2

60°0
240°

120°

270°0
90°

330°

U3

PHASMD TG1
PLLIN TG2

CLKOUT

U6

PHASMD TG1
PLLIN TG2

CLKOUT

120°OPEN
300°

210°

330°0
150°

AN77 F12

Application Note 77

DESIGN EXAMPLE: 100A POLYPHASE POWER
SUPPLY

The specifications for a high current PolyPhase power
supply are as follows:

• Input: 12V (±10%)

• Outputs: 3.3V at 90A nominal, 100A maximum

• Load regulation: <20mV from 0A to full load

• Switching Noise: peak-to-peak voltage <1% of DC

voltage

• Efficiency:

• >89% at VIN = 12V, VO = 3.3V, IO = 90A;

Design Details

To utilize off-the-shelf, surface mount inductors and to
avoid the use of very thick PCB copper traces, it is
desirable to limit the individual module current to about
16A. Six channels are needed for this application. The
design now becomes only a 15A regulator which gets
repeated six times.

MOSFETs

The selection of MOSFETs is determined by the current
requirement and switching frequency. Low R
MOSFETs usually drive down the conduction losses but
tend to introduce high switching related losses at high
switching frequencies because of the large gate charge
and parasitic capacitances. For a given current require­ment and selected switching frequency, both R
gate charge (Qg) should be evaluated to minimize the sum
of the conduction losses, driving losses and the switching
loss. For the specified application, a number of MOSFETs
can be good choices: Si4420 (Siliconix), FDS6670A

DS(ON)

DS(ON)

and

(Fairchild), FDS7760A (Fairchild) and IRF7811 or IRF7805
(International Rectifier). In this application, we need two
MOSFETs for each high side switch and three MOSFETs
for each low side switch. The power dissipation in the
MOSFETs includes the conduction loss, switching loss
and reverse recovery loss of the body diodes in the low
side MOSFETs. The gate driving loss is seen by the
controller IC. In this design, if Si4420s are used, each top
MOSFET dissipates about 0.5W and each low side MOSFET
consumes about 0.9W. Based on the thermal resistance
provided in the datasheet, 30°C/W junction-to-ambient,
the maximum junction temperature of the MOSFETs is
about 30°C above the ambient temperature. Refer to the
LTC1629 data sheet and the literature from the MOSFET
vendors for more information on estimating the power
loss of MOSFETs.

Inductors

The selection of inductors is driven by the load current
amplitude and the switching frequency. The LTC1629
senses the inductor current with a current sense resistor.
The inductor ripple current must be large enough to
produce a reasonable AC sense voltage on the small value
sense resistor required for a high current application. A
reasonable starting point is to choose an inductor such
that its ripple current amplitude is about 40% of the
maximum channel current. It is estimated that an inductor
value between 1.0µH and 1.6µH will be suitable for 3.3V
output at a frequency of 200kHz. A number of off-the­shelf, surface mount inductors are available for the speci­fied application: P1608 (Pulse), PE53691 (Pulse),
ETQP6F1R3L (Panasonic) and CEPH149-1R6MC
(Sumida). Any inductor of similar inductance value and
current capability should work correctly.

AN77-11

Application Note 77

The maximum available phase number is six and the
possible phase number options are 1, 2, 3 and 6. By using
equations (1~6), the ripple currents at the input and output
for different-phase configuration are estimated as in
Table␣ 3.

A six-phase configuration minimizes both the input ca­pacitor size and output ripple voltage. Compared to the
single-phase technique, the six-phase technique reduces
the input ripple current by more than 81%, and the output
ripple by more than 96%. Therefore, the six-phase con­figuration was adopted for this design.

Capacitors

The selection of the input capacitors is driven by the RMS
value of the input ripple current. Large capacitor ripple
currents introduce high power losses due to the ESR of the
capacitor. The resulting internal heating tends to reduce
the capacitor life. Low ESR capacitors must be used. This
design uses Sanyo OS-CON capacitors (16SA150M 150µF/
16V) whose maximum allowable ripple current is rated at
about 3.26A
phase configuration is estimated to be about 8.5A

. The input RMS ripple current for the six-

RMS

RMS

.
Therefore, a minimum of three OS-CON capacitors are
needed. If a conventional single-phase technique were
used instead, the input RMS ripple current would be about

46.8A

. A minimum of fifteen OS-CON capacitors would

RMS

then be needed. Therefore, the use of an LTC1629 based
PolyPhase design saves at least twelve (15 – 3 = 12)
OS-CON capacitors.

The output capacitors are KEMET (T510X477M006AS
470µF/6.3V), ultralow ESR (30mohm), surface mount
tantulum capacitors. The peak-to-peak ripple current is
estimated to be 2.1A

. It would be 57.1A

P-P

if a conven-

P-P

tional single-phase approach were taken instead.

Test results

The complete schematic diagram is shown in Figure 14.
The power supply consists of six buck channels and three
LTC1629s. Figure 15 shows the measured waveforms of
gate voltages and switch-node voltages in a typical six­phase converter. The gate voltages and switch-node volt­ages of six buck stages are interleaved 60 degrees output
of phase. Since the inductor current is driven by the
difference between the switch-node voltage and the DC
output voltage, the ripple currents in the six inductors are
also 60 degrees out of phase. As a result, the amplitude of
the net ripple current flowing into the output capacitor
decreases substantially and the ripple frequency increases
to six times the switching frequency. The output switching
noise and the power loss from the ESR are greatly attenu­ated.

Figure 16 shows the output voltage, which was measured
at the output capacitor (C14 in the schematics). The output
ripple voltage is less than 10mV

at 90A output current

P-P

and the ripple frequency is six times the switching fre­quency.

Efficiency was measured under different loading condi­tions. Figure 17 shows the efficiency curve. For most of the
load range, the efficiency was about 90%. At 100A, the
efficiency was measured 89.4%.

AN77-12

Table 3. Input and Output Ripple Current for Different Phase Configurations

Channels 6 6 6 6
Phases 1 2 3 6
Input Ripple Current (A
Output Ripple Current (A

Assuming that the efficiency is 100%, the inductance is 1.3µH, frequency is 200kHz

) 46.8 25.7 15.2 8.5

RMS

) 57.1 19.0 6.3 2.1

P-P

C1
1µF

C8, 1nF

R4

8.06k

C7, 47pF

R3, 47k

C11

470pF

R5

25.5k

C2

1nF

INTV

Application Note 77

+

V

R8
51Ω

IN

VIN–

VO+

VO–

V

OSENSE

V

OSENSE

+

–

1

RUN/SS

2

+

SENSE1

3

–

SENSE1

4

EAIN

5

PLLFLTR

CC

6

PLLIN

7

PHASMD

8

I

TH

9

SGND

10

V

DIFFOUT

11

–

V

OS

12

+

V

OS

13

–

SENSE2

14

+

SENSE2

U1, LTC1629

C15
1nF

28

CLKOUT CLK1

27

TG1

26

SW1

25

BOOST1

24

V

IN

23

BG1

22

EXTV

CC

21

INTV

CC

20

PGND

19

BG2

18

BOOST2

17

SW2

16

TG2

15

AMPMD

INTV

CC

C6, 1µF

C9

2.2µF

+

R1, 10Ω

0.47µF

3

C10
10µF

C12, 0.47µF

C5

2

D2

1

BAT54A

4

4

3× Si4420

Q4

4

4

Q2
3×

Si4420

Q3
2× Si4420

Q1
2× Si4420

D3
MBRS340T3

L1

1.3µH

D1
MBRS340T3

L2

1.3µH

R2

0.003Ω

R6

0.003Ω

+

+

C3

C4

2µF

C13

470µF

× 9

+

C14
10µF

R7

51Ω

C17, 47pF

C20, 47pF

R15, 10k

C35, 1nF

C26, 47pF

C29, 47pF

R16, 10k

C37, 1nF

C34

0.01µF

C36

0.01µF

C16

C25

1nF

1nF

CLK1

CLK2

10
11
12
13
14

10
11
12
13
14

1
2
3
4
5
6
7
8
9

1
2
3
4
5
6
7
8
9

RUN/SS
SENSE1
SENSE1
EAIN
PLLFLTR
PLLIN
PHASMD
I

TH

SGND
V

DIFFOUT

–

V

OS

+

V

OS

SENSE2
SENSE2

C24
1nF

RUN/SS
SENSE1
SENSE1
EAIN
PLLFLTR
PLLIN
PHASMD
I

TH

SGND
V

DIFFOUT

–

V

OS

+

V

OS

SENSE2
SENSE2

C33
1nF

+
–

–
+

U2, LTC1629

+
–

–
+

U3, LTC1629

CLKOUT

TG1

SW1

BOOST1

BG1

EXTV

INTV

PGND

BG2

BOOST2

SW2

TG2

AMPMD

CLKOUT

TG1

SW1

BOOST1

BG1

EXTV

INTV

PGND

BG2

BOOST2

SW2

TG2

AMPMD

28

CLK2

27
26
25
24

V

IN

23
22

CC

21

CC

20
19
18
17
16
15

28
27
26
25
24

V

IN

23
22

CC

21

CC

20
19
18
17
16
15

C19, 1µF

C21

2.2µF

C28, 1µF

C30

2.2µF

+

+

R9, 10Ω

C18

0.47µF

3

C22
10µF

C23, 0.47µF

R12, 10Ω

C27

0.47µF

3

C31
10µF

C32, 0.47µF

2
1

3× Si4420

2
1

3× Si4420

D5
BAT54A

4

4

D8
BAT54A

4

4

Q12

Q8

4

4

Q6
3×

Si4420

Q7
2× Si4420

4

4

Q10

3×

Si4420

Q11
2× Si4420

Q5
2× Si4420

D6
MBRS340T3

Q9
2× Si4420

D9
MBRS340T3

L3

1.3µH

D4
MBRS340T3

L4

1.3µH

L5

1.3µH

D7
MBRS340T3

L6

1.3µH

R10

0.003Ω

R11

0.003Ω

R13

0.003Ω

R14

0.003Ω

C4: THREE SANYO OS-CON 16SA150M
C13: NINE KEMET T510E477M006AS
L1 – L6: PANASONIC ETQP6F1R3L

AN77 F14

Figure 14. Schematic Diagram of 3.3V/100A Six-Phase Converter

AN77-13

Application Note 77

C1 FREQUENCY

206.72kHz

(a) Voltage Scale: 5V/DIV, Time Scale: 1µs/DIV

Figure 15. Typical Waveforms of 6-phase Converter: (a) Gate Voltages,
(b) Switch-Node Voltages (Drain-to-Source Voltage of the Synchronous Switch)

10V/DIV

C1 FREQUENCY

196.96kHz

AN77 F15a AN77 F15b

(b) Voltage Scale: 10V/DIV, Time Scale: 1µs/DIV

10mV/DIV

AN77 F16

Figure 16. Output Ripple Voltage Waveforms (Time Scale: 1us/DIV): VIN = 12V, VO = 3.3V, IO = 90A

100

90

80

70

EFFICIENCY (%)

60

50

0

10 20 30 40 50 60 70 80 90 100

12VIN, 3.3V

LOAD CURRENT (A)

O

AN77 F17

AN77-14

Figure 17. Measured Efficiency at Different Load

Application Note 77

SUMMARY

PolyPhase converters reduce the input and output ripple
currents by interleaving the clock signals of paralleled
power stages. With a proper choice of phase number, the
output ripple voltage and the input capacitor size can be
minimized without increasing the switching frequency.
Lower output ripple voltage and smaller output inductors
help improve the circuit’s dynamic performance during
load transients. The low switching losses and driving
losses of MOSFETs at relatively low switching frequency,
and the reduced power losses due to ESRs of the capaci­tors, help achieve high efficiency.

The LTC1629 dual, PolyPhase current mode controller is
able to achieve the benefits of the PolyPhase technique
without complicating the control circuit. The LTC1629
helps minimize the external component count and simplify

the complete power supply design by integrating two
PWM current mode controllers, true remote sensing,
selectable phasing control, current-sharing capability,
high current MOSFET drivers and protection features
(such as overvoltage protection, optional overcurrent
latch-off and foldback current limit) into one IC. The
resulting manufacturing simplicity helps improve power
supply reliability. The high current MOSFET drivers allow
the use of low R

MOSFETs to minimize the conduc-

DS(ON)

tion losses for high current applications. Lower current
ratings on the individual inductors and MOSFETs also
make it possible to use low profile, surface mount com­ponents. Therefore, an LTC1629-based PolyPhase high
current converter can achieve high efficiency, small size
and low profile simultaneously. The savings on the input
and output capacitors, inductors and heat sinks minimize
the overall cost and size of the complete power supply.

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

AN77-15

Application Note 77

APPENDIX A

DERIVATION OF OUTPUT RIPPLE CURRENT IN A
2-PHASE CIRCUIT

During the interval from DT to T as shown in Figure 1, the
high side switch in module 1 is off and the high side switch
of module 2 is on. The inductor current in module 1
decreases and the inductor current in module 2 increases.
The variations of these inductors are estimated to be:

∆I

∆I

where

L

1

=

L

2

L

f

−−()()

VV DT

IN O

L

V

O

D

=

V

IN

1

f

(A1)

(A2)

(A3)

1

−−()

VDT

O

=

The net output ripple current is the sum of these inductor
ripple currents:

12

−

D

(A4)

D

∆∆∆III

=+=

OLL

12

1

()

VDT

−

O

L

f

Equation (A4) is derived based on the waveform shown in
Figure 1, where D is greater than 0.5. When D is smaller
than 0.5, one can easily derive the output ripple current as:

12

−

D

(A5)

1

−

D

∆∆∆III

=+=

OLL

12

()

1

VDT

−

O

L

f

By combining equations (A4) and (A5), we can derive the
output ripple current for the 2-phase configuration as:

−

12

D

−+

12 1

D

(A6)

∆∆∆III

=+=

OLL

12

VDT

−

21

()

O

L

f

AN77-16

Linear Technology Corporation

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