FEATURES
LTC1564
10kHz to 150kHz
Digitally Controlled
Antialiasing Filter and 4-Bit P.G.A.
U
DESCRIPTIO
■
4-Bit Digitally Controlled 8th-Order Lowpass Filter
–f
Adjustable from 10kHz to 150kHz in 10kHz
CUTOFF
Steps
– 100dB Attenuation at 2.5 × f
■
4-Bit Digitally Controlled Programmable Gain
CUTOFF
Amplifier
– G = 1 to 16 in 1V/V Steps
■
Miniature 16-Pin SSOP Package
■
No External Components
■
122dB Total System Dynamic Range
■
Rail-to-Rail Input and Output Range
■
2.7V to 10V Operation
■
Low Noise Mute Mode
■
Low Power Shutdown Mode
■
Available in 16-Lead Plastic SSOP Package
U
APPLICATIO S
■
Antialias or Reconstruction Filtering
■
DSP Systems
■
Communications Systems
■
Scientific Instruments
■
High Resolutions (16 Bits to 20 Bits)
■
Processing Signals Buried in Noise
■
Audio Signal Processing
■
Programmable Data Rates
■
Automatic Gain Control (AGC)
■
Single Part Replacing Multiple Filters
The LTC®1564 is a new type of continuous time filter for
antialiasing, reconstruction and other band-limiting applications. No other analog components or filter expertise are
needed to use it. There is one analog input pin and one
analog output pin. The cutoff frequency (f
) and gain are
C
programmable while the shape of the lowpass response is
fixed. A latching digital interface stores f
and gain settings
C
or it can be bypassed for control directly from the pins. The
LTC1564 operates from 2.7V to 10V total (single or split
supplies) and comes in a 16-pin surface mount SSOP.
The LTC1564 is a rail-to-rail high resolution 8th-order
lowpass filter with two stopband notches, giving approximately 100dB attenuation at 2.5 times the passband cutoff
frequency fC (a de-facto standard for DSP front ends).
Signals with low or variable levels can be normalized with
the built-in variable gain that reduces input-referred noise
with increasing gain for a typical dynamic range (maximum signal level to minimum noise) of 122dB (20 equivalent bits) with 20kHz fC and 118dB at 100kHz fC on a ±5V
supply.
Other frequency-response shapes can be provided upon
request. Please contact LTC Marketing.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
Low Noise Programmable Filter with Variable Gain
ANALOG
IN
IN AGND V+RST G3
OUT V
ANALOG
OUT
+
V
0.1µF
GAIN CODE
16 15 14 13 12 11
–
EN
HOLD F3 F2 F1 F0
1234567
0.1µF
–
V
G2 G1 G0
LTC1564
CS/
FREQUENCY CODE
1564 TA01
U
10 9
+
V
AND V– SUPPLIES CAN BE FROM
1.35V TO 5.25V EACH
TIE F AND G PINS TO V
SET FREQUENCY AND GAIN
DYNAMIC RANGE 118dB TO 122dB
AT ± 5V DEPENDING ON FREQUENCY CODE
8
+
OR V– TO
LTC1564 Programmable Range
30
20
10
0
–10
–20
–30
–40
–50
GAIN (dB)
–60
–70
–80
–90
–100
–110
–120
5
fC = 10kHz
GAIN = 1V/V
10 100 500
fC = 150kHz
GAIN = 16V/V
FREQUENCY (kHz)
1564 TA02
1564fa
1
LTC1564
G PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
OUT
V
–
EN
CS/HOLD
F3
F2
F1
F0
IN
AGND
V
+
RST
G3
G2
G1
G0
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Total Supply Voltage (V+ to V–) .............................. 11V
Input Voltage ............................. V
Output Short-Circuit Duration .......................... Indefinite
Operating Temperature Range
LTC1564C .............................................. 0°C to 70°C
LTC1564I.......................................... –40°C TO 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
+
+ 0.3V to V– – 0.3V
UU
W
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
LTC1564CG
LTC1564IG
T
= 125°C, θJA = 130°C/ W
JMAX
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are at T
PARAMETER CONDITIONS MIN TYP MAX UNITS
Total Supply Voltage 2.7 10.5 V
Supply Current VS = ±1.35V, VIN = 0V
Output Voltage Swing RL = 10k to 0V
Output Short-Circuit Current VS = ±5V
DC Offset Voltage Magnitude (Referred to Input) Gain = 1, 0°C to 70°C
DC AGND Reference Voltage VS = Single 5V Supply 2.5 V
Passband Gain fC = 50kHz, fIN = 10kHz, Gain = 1
Passband Ripple fC = 10kHz, 0 ≤ fIN ≤ 9kHz (Notes 2, 3)
Roll Off at Cutoff Frequency (fC) (Note 3) fC = 10kHz (F = 0001)
Roll Off at 2fC (Note 3) fC = 10kHz
Roll Off at 2.5fC (Note 3) fC = 10kHz –99 dB
Wideband Noise (Referred to Input) BW = 20kHz, fC = 10kHz, Gain = 1 33 µV
Total Harmonic Distortion fC = 100kHz, fIN = 10kHz, VIN = 1V
2
= 25°C. VS = ± 2.375V, fC = 10kHz, gain = 1, RL = 10k, unless otherwise noted.
A
V
V
Gain = 1, – 40°C to 85°C
Gain = 10, 0°C to 70°C
Gain = 10, –40°C to 85°C
f
C
f
C
f
C
BW = 20kHz, fC = 10kHz, Gain = 16 2.5 µV
BW = 200kHz, fC = 100kHz, Gain = 1 50 µV
The ● denotes specifications that apply over the full operating temperature
= ±2.375V, VIN = 0V
S
= ±5V, VIN = 0V
S
= 50kHz, fIN = 10KHz, Gain = 16
= 150kHz, 0 ≤ fIN ≤ 135kHz (Notes 2, 3)
= 150kHz (F = 1111)
RMS
●
●
●
●
4.5 4.65 V
●
●
●
●
●
●
– 0.1 0.3 0.8 dB
●
23.5 24.2 25.3 dB
●
–0.5 0.5 dB
●
– 0.6 1.6 dB
●
–1.2 –0.7 –0.3 dB
●
–1.5 –0.5 0.6 dB
●
–67 –63 –59 dB
15 17 mA
16 18.5 mA
22 25 mA
±10 mA
313 mV
316 mV
15 mV
16 mV
–86 dB
P-P
RMS
RMS
RMS
1564fa
LTC1564
FREQUENCY (kHz)
50
–10
GAIN (dB)
–5
0
85°C
5
62.5 75 87.5 100
1564 G03
112.5
125
fC = 100kHz
SINGLE 5V SUPPLY
–40°C
25°C
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are at T
= 25°C. VS = ± 2.375V, fC = 10kHz, gain = 1, RL = 10k, unless otherwise noted.
A
The ● denotes specifications that apply over the full operating temperature
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Impedance Gain = 1, DC VIN = 0V 10 kΩ
Gain = 16, DC V
= 0V 625 Ω
IN
Output Impedance fC = 10kHz, f = 10kHz 30 Ω
Mute State (F = 0000) Gain F = 0000, fIN = 20kHz, VIN = 1V
RMS
Mute State Output Noise F = 0000, BW = 200kHz 5.4 µV
Shutdown Supply Current VS = ±1.35V, EN to V
= ±1.35V, EN to V
V
S
VS = ±2.375V, EN to V
V
= ±2.375V, EN to V
S
+
+
+
+
●
●
–103 dB
RMS
45 75 µA
150 µA
100 150 µA
180 µA
VS = ±5V, EN to V+ (Note 4) 175 µA
Digital Input “High” Voltage VS = ±1.35V 1.08 V
V
= ±2.375V 1.90 V
S
= ±5V 4.50 V
V
S
Digital Input “Low” Voltage VS = ±1.35V –1.08 V
= ±2.375V –1.90 V
V
S
V
= ±5V 0.50 V
S
Digital Input Pull-Up or Pull-Down Current (Note 5) VS = ±1.35V
(Digital Inputs Other than EN) V
= ±5V
S
Digital Input Pull-Up Current (EN Input) VS = ±1.35V
= ±5V
V
S
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Response is tested in production at discrete frequencies f
0.5, 0.8 and 0.9 times f
.
C
of 0.1,
IN
Note 3: Relative to gain at 0.1fC.
Note 4: All digital inputs driven rail-to-rail. When driving digital inputs with
Note 5: Each digital input includes a small positive or negative current
source to float the CMOS input to V
The table shows the current due to this source when the input is driven at
the supply voltage opposite from the float potential. Pins CS/HOLD, F3, F2,
F0 and G3 to G0 float to the V
voltage. See “Floatable Digital Inputs” in Applications Information section.
●
●
●
●
+
or V– potential if it is unconnected.
–
voltage, pins RST, EN and F1 to the V
3.5 6 µA
13 20 µA
12 µA
10 20 µA
+
0V and 5V levels, the shutdown current will increase to 3.5mA (typ).
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Overall Frequency Response
(Frequency Scales Normalized to f
10
0
–10
–20
–30
–40
–50
–60
–70
GAIN (dB)
–80
–90
–100
–110
–120
–130
0.1
fC = 50kHz
fC = 10kHz
1
fIN/f
C
VS = SINGLE 5V
UNITY GAIN
(G CODE 0000)
fC = 150kHz
1564 G01
)
C
10
Roll-Offs Over Temperature
(fC = 10kHz)
5
fC = 10kHz
SINGLE 5V SUPPLY
0
GAIN (dB)
–5
–10
5
–40°C, 25°C, 85°C
6.25 7.5 8.75 10
FREQUENCY (kHz)
11.25
Roll-Offs Over Temperature
(fC = 100kHz)
12.5
1564 G02
1564fa
3
LTC1564
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Roll-Off at fIN = f
vs f
0
VS = SINGLE 5V
T
A
–0.25
–0.50
–0.75
GAIN (dB)
–1.00
–1.25
–1.50
10
Detail of Stopband Response
–40
–50
–60
–70
–80
–90
GAIN (dB)
–100
–110
–120
–130
–140
25
15
35
FREQUENCY (kHz)
C
= 25°C
30 50
45
70 110
fC = 10kHz
= ±5V
V
S
= 25°C
T
A
55
1564 G05
90 130 150
fC (kHz)
65
C
1564 G04
Rectangular Pulse Response Short-Pulse Response
2V/DIV
Triangular-Wave Time Response SNR vs Input Voltage
5V/DIV
INPUT
OUTPUT
200µs/DIV
fC = 10kHz
= 1kHz
f
IN
UNITY GAIN
= ± 5V
V
S
1564 G09
140
130
120
110
100
90
80
70
60
50
SIGNAL/NOISE (dB)
40
30
20
10
LIMIT FOR 10V TOTAL SUPPLY
LIMIT FOR 5V TOTAL SUPPLY
GAIN = 16
= 100kHz
f
C
GAIN = 16
= 20kHz
f
C
0
0.001 0.1 1 10
0.01
INPUT VOLTAGE (V
200µs/DIV
GAIN = 1
f
Passband Gain, Phase
and Group Delay
5
f
= 10kHz
C
0
–5
–10
–15
–20
GAIN (dB)
–25
–30
–35
–40
–45
f
UNITY GAIN
V
INPUT
OUTPUT
GAIN = 1
= 100kHz
f
C
= 20kHz
C
PASSBAND INPUT
< fC)
(f
IN
)
P-P
2
= 10kHz
C
= ±5V
S
4
1564 G07
1564 G10
GAIN
GROUP DELAY
6
FREQUENCY (kHz)
(THD + NOISE)/SIGNAL (dB)
–100
500
90
450
0
400
–90
PHASE (DEGREES)
350
PHASE
8
10
INPUT, 1V/DIV (PULSE WIDTH 10µs)
–180
300
–270
250
–360
200
–450
150
–540
100
–630
50
–720
0
–810
12
1546 G06
OUTPUT, 100mV/DIV
100µs/DIV
DELAY (µs)
fC = 10kHz
UNITY GAIN
= ± 5V
V
S
THD + Noise vs Input Voltage
= 10kHz)
(f
C
–20
–30
–40
–50
–60
–70
–80
–90
fC = 10kHz
= 1kHz
f
IN
0.001 0.1 1 10
0.01
INPUT VOLTAGE (V
3V SUPPLY
5V SUPPLY
±5V SUPPLY
)
P-P
1564 G08
1564 G11
4
1564fa
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LTC1564
THD + Noise vs Input Voltage
= 100kHz)
(f
C
–20
–30
–40
–50
–60
–70
–80
(THD + NOISE)/SIGNAL (dB)
–90
fC = 100kHz
= 10kHz
f
IN
–100
0.001 0.1 1 10
0.01
INPUT VOLTAGE (V
U
3V SUPPLY
5V SUPPLY
±5V SUPPLY
)
P-P
UU
1564 G12
Noise vs Frequency
and Gain Settings
100
)
RMS
10
INPUT-REFERRED NOISE (µV
1
1
2
BASEBAND GAIN SETTING
fC = 10kHz
PI FU CTIO S
OUT (Pin 1): Analog Output. In normal filtering, this is the
output of an internal operational amplifier and is capable
of swinging essentially to any voltage between the power
supply rails (that is, between V+ and V–). This output is
designed to drive a nominal load of 5k and 50pF. For
lowest signal distortion it should be loaded as lightly as
possible. The output can drive lower resistances than 5k,
but distortion may increase, and the output current will
limit at approximately ±10mA. Capacitances higher than
50pF should be isolated by a series resistor of 500Ω to
preserve AC stability. In the Mute state (F code 0000 or
RST = 0), the output operates as in normal filtering but the
gain from the IN pin becomes zero and the output noise is
reduced. In the shutdown state (EN = 1 or EN open
circuited), most of the circuitry in the LTC1564 shuts off
and the OUT pin assumes a high impedance state.
V–, V+ (Pins 2, 14): Power Supply Pins. The V+ and V
pins should be bypassed with 0.1µF capacitors to an
adequate analog ground plane using the shortest possible
wiring. Electrically clean supplies and a low impedance
ground are important for the high dynamic range and high
stopband suppression available from the LTC1564 (see
further details under AGND). Low noise linear power
supplies are recommended. Switching supplies are not
recommended because of the inevitable risk of their
–
Power Supply Rejection
vs Frequency
10
fC = 10kHz
= ±2.5V
V
0
S
NEGATIVE SUPPLY
+
SUPPLY BYPASS = 0.1µF
V
–
SUPPLY BYPASS = NONE
V
POSITIVE SUPPLY
+
SUPPLY BYPASS = NONE
V
–
SUPPLY BYPASS = 0.1µF
V
1k
FREQUENCY (Hz)
1564 G14
fC = 100kHz
4
–10
–20
–30
–40
GAIN (dB)
–50
–60
–70
–80
8
16
1564 G13
0.1k 10k 100k 1M
switching noise coupling into the signal path, reducing
dynamic range.
EN (Pin 3): CMOS-Level Digital Chip Enable Input. Logic 1
or open circuiting this pin causes a shutdown mode with
reduced supply current. The active circuitry in the LTC1564
shuts off and its output assumes a high impedance state.
If F and G bits are latched (CS/HOLD = 1) during the
shutdown state, the latch will retain its contents.
A small pull-up current source at the EN input causes the
LTC1564 to be in shutdown state if the EN pin is left open.
Therefore, the user must connect the EN pin to logic 0 (V
–
or optionally 0V with ±5V supplies) for normal filter
operation.
CS/HOLD (Pin 4): CMOS-Level Digital Enable Input for the
Latch Holding F and G Bits. Logic 0 makes the latch
transparent so that the F and G inputs directly control the
filter’s cutoff frequency and gain. Logic 1 holds the last
values of these inputs prior to the transition. This pin floats
to logic 0 (V–) when open circuited because of a small
current source (see Electrical Characteristics, Note 5).
F3, F2, F1, F0 (Pins 5, 6, 7, 8): CMOS-Level Digital
Frequency Control (“F Code”) Inputs. F3 is the most
significant bit (MSB). These pins program the LTC1564’s
cutoff frequency fC through the internal latch, which
1564fa
5
LTC1564
U
UU
PI FU CTIO S
passes the bits directly when the CS/HOLD input is at logic
0. When CS/HOLD changes to logic 1, the F pins cease to
have effect and the latch holds the previous values. The F
code controls the filter’s cutoff frequency fC in 10kHz steps
up to 150kHz, as summarized in Table 1.
Table 1
F3 F2 F1 F0 NOMINAL F
(AT OUTPUT OF INTERNAL LATCH) (CUTOFF FREQUENCY)
0000 0 (Mute State: Filter Gain is Zero)
0001 10kHz
0010 20kHz
0011 30kHz
0100 40kHz
0101 50kHz
0110 60kHz
0111 70kHz
1000 80kHz
1001 90kHz
1010 100kHz
1011 110kHz
1100 120kHz
1101 130kHz
1110 140kHz
1111 150kHz
Thus fC is proportional to the binary value of the F code.
Note that small current sources pull F1 to V
–
and F0 to V
when these pins are left unconnected (see
Electrical Characteristics, Note 5). This sets an F code
input of 0010 (2, in decimal form) by default, giving an f
of 20kHz in normal filtering operation, if CS/HOLD is logic
0 or is open circuited.
C
+
and F3, F2
C
G0, G1, G2, G3 (Pins 9, 10, 11, 12): CMOS-Level Digital
Gain Control (“G Code”) Inputs. G3 is the most significant
bit (MSB). These pins program the LTC1564’s passband
gain through the internal latch, which passes the bits
directly when the CS/HOLD input is at logic 0. When
CS/HOLD changes to logic 1, the G pins cease to have
effect and the latch retains the previous input values. This
gain control is linear in amplitude: nominal passband gain
of the LTC1564 is the binary value of the G code, plus one
as shown in Table 2.
–
Note that small current sources pull the G pins to V
when
these pins are left unconnected (see Electrical Characteristics, Note 5). This sets a G code input of 0000 by default,
giving unity passband gain in normal filtering operation, if
CS/HOLD is logic 0 or is open circuited.
RST (Pin 13): CMOS-Level Asynchronous Reset Input.
Logic 0 on this pin immediately resets the internal F and G
latch to all zeros, regardless of the state of the CS/HOLD
pin or the F or G input pins. This causes the LTC1564 to
enter a mute state (powered but with zero signal gain)
because of the resulting F = 0000 command. Logic 1
permits the other pins to control F and G. This pin floats to
logic 1 (V
+
) when open circuited because of a small
current source (see Electrical Characteristics, Note 5). A
brief internal reset (shorter than the analog settling time of
the filter) also occurs when power is first applied.
6
Table 2
G3 G2 G1 G0 PASSBAND GAIN (VOLTS PEAK-TO-PEAK) INPUT IMPEDANCE
(AT OUTPUT OF INTERNAL LATCH)
0000 1 0 10 5.0 3.0 10
0001 2 6.0 5 2.5 1.5 5
0010 3 9.5 3.33 1.67 1.0 3.33
0011 4 12 2.5 1.25 0.75 2.5
0100 5 14.0 2 1 0.6 2
0101 6 15.6 1.67 0.83 0.5 1.67
0110 7 16.9 1.43 0.71 0.43 1.43
0111 8 18.1 1.25 0.63 0.38 1.25
1000 9 19.1 1.1 0.56 0.33 1.11
1001 1020.0 1.0 0.50 0.30 1
1010 1120.8 0.91 0.45 0.27 0.91
1011 1221.6 0.83 0.42 0.25 0.83
1100 1322.3 0.77 0.38 0.23 0.77
1101 1422.9 0.71 0.36 0.21 0.71
1110 1523.5 0.67 0.33 0.20 0.66
1111 1624.1 0.63 0.31 0.19 0.63
NOMINAL NOMINAL
(VOLT/VOLT) (dB) DUAL 5V SINGLE 5V SINGLE 3V (kΩ)
MAXIMUM INPUT SIGNAL LEVEL
1564fa
LTC1564
LTC1564
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND PLANE
1
SINGLE-POINT
SYSTEM GROUND
234567
1564 F01
8
16
V
+
/2
REFERENCE
15 14 13 12 11
0.1µF
1µF
V
+
10 9
U
UU
PI FU CTIO S
Table 3. Summary of LTC1564 Digital Controls and Modes
EN RST CS/HOLD F3 F2 F1 F0 G3 G2 G1 G0 FUNCTION
1 1 1 XXXX XXX X Shutdown Mode. Filter Disabled. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
1 1 0 XXXX XXX X Shutdown Mode. Filter Disabled. Latch Accepts F and G Inputs
1 0 X XXXX XXX X Shutdown Mode. Filter Disabled. Latch Contents (F and G) Reset to All Zeros
0 1 0 0000 XXXX Mute Mode. Filter Active, Zero Gain, Reduced Noise
0 0 X XXXX XXX X Mute Mode. Filter Active, Zero Gain, Reduced Noise. Latch Contents
(F and G) Reset to All Zeros
0 1 1 Other Than 0000 X X X X Normal Filtering Operation. Latch Holds F and G Inputs Present
when Last CS/HOLD = 0
0 1 0 Other Than 0000 X X X X Normal Filtering Operation. Filter Responds Directly to F and G Input
Pins (See Separate Pin Descriptions)
X = Doesn’t Matter
ANALOG
GROUND PLANE
V
+
0.1µF
SINGLE-POINT
SYSTEM GROUND
16 15 14 13 12 11
LTC1564
1
234567
0.1µF
–
V
DIGITAL GROUND PLANE
10 9
8
(IF ANY)
Figure 1. Dual Supply Ground Plane Connection
AGND (Pin 15): Analog Ground. The AGND pin is at the
midpoint of an internal resistive voltage divider, developing a potential halfway between the V
an equivalent series resistance to the pin of nominally 7k.
(In the shutdown state, analog switch FETs interrupt the
+
and V– pins, with
voltage-divider resistors and the AGND pin assumes a
high impedance.) AGND also serves as the internal halfsupply reference in the LTC1564, tied to the noninverting
inputs of all internal op amps and establishing the ground
reference voltage for the IN and OUT pins. Because of this,
very “clean” grounding is recommended, including an
1564 F01
Figure 2. Single Supply Ground Plane Connection
analog ground plane surrounding the package. For dual
supply operation, this ground plane will be tied to the 0V
point and the AGND pin should connect directly to the
ground plane (Figure 1). For single supply operation, in
contrast, if the system signal ground is at V
–
plane should tie to V
and the AGND pin should be AC-
–
, the ground
bypassed to the ground plane by at least a 0.1µF high
quality capacitor (at least 1µF for best AC performance)
(Figure 2). As with all high dynamic range analog circuits,
performance in an application will reflect the quality of the
grounding.
1564fa
7
LTC1564
U
UU
PI FU CTIO S
I
N (Pin 16): Analog Input. The filter in the LTC1564 senses
the voltage difference between the IN and AGND pins. In
normal filtering (EN = 0, RST = 1, F code other than 0000),
the IN pin connects within the LTC1564 to a digitally
controlled resistance whose other end is a current-summing point at the AGND potential. At unity gain (G code
0000), the value of this input resistance is nominally 10k
and the IN voltage range is rail-to-rail (V
filtering at gain settings above unity (G code ≠ 0000), the
input resistance falls as (1/gain) to nominally 625Ω at a
gain of 16 (G code 1111) and the linear input range also
falls in inverse proportion to gain. (The variable gain
capability is designed to boost lower level input signals
with good noise performance.) Input resistance does not
vary significantly with the frequency-setting F code except in the mute state (F code 0000). In either the mute
state (F code 0000 or RST = 0) or the shutdown state (EN
= 1 or EN open circuited), analog switches disconnect the
IN pin internally and this pin presents a very high input
+
to V–). When
resistance. Circuitry driving the IN pin must be compatible with the LT1564’s input resistance and with the
variation of this resistance in the event that the LTC1564
is used in multiple modes. Signal sources with significant
output resistance may introduce a gain error as the
source’s output resistance and the LTC1564’s input resistance form a voltage divider. This is especially true at the
higher gain or G code settings where the LTC1564’s input
resistance is lowest.
In single supply voltage applications with elevated gain
settings (G code ≠ 0000) it is important to keep in mind
that the LTC1564’s ground reference point is AGND, not
–
V
. With increasing gains, the LTC1564’s linear input
voltage range is no longer rail-to-rail but converges
toward AGND. Similarly the OUT pin swings positive or
negative with respect to AGND. At unity gain (G code
0000), both IN and OUT voltages can swing from rail-torail.
BLOCK DIAGRA
IN
+
V
–
V
EN
W
+
V
SHUTDOWN
SWITCH
R
R
SHUTDOWN
SWITCH
–
V
VARIABLE
GAIN
AMPLIFIER
PROGRAMMABLE FILTER
CMOS LATCH
G3AGND
G2 G1 G0 F3
Figure 3. Block Diagram
OUT
CS/HOLD
RST
1564 F03
F2 F1 F0
8
1564fa
WUUU
APPLICATIO S I FOR ATIO
LTC1564
Functional Description
The LTC1564 is a self-contained, continuous time, variable gain, high order analog lowpass filter. The gain
magnitude between IN and OUT pins is approximately
constant for signal frequency components up to the cutoff
frequency f
and falls off rapidly for frequencies above fC.
C
The pins IN, OUT and AGND (analog ground) are the sole
analog signal connections on the LTC1564; the others are
power supplies and digital control inputs to select fC (and
to select gain if desired). The f
range is 10kHz to 150kHz
C
in 10kHz steps. The form of the lowpass frequency response is an 8-pole elliptic type with two stopband notches
(Figure 4). This response rolls off by approximately 100dB
from f
to 2.5fC. The LTC1564 is laser trimmed for f
C
C
accuracy, passband ripple, gain and offset. It delivers a
combination of 100+dB stopband attenuation, 100+dB
signal-to-noise ratio (SNR) and 100+kHz f
100dB
GAIN (dB)
.
C
Digital Control
Logic levels for the LTC1564 digital inputs are nominally
rail-to-rail CMOS. (Logic 1 is V
+
, logic 0 is V– or alternatively 0V with ±5V supplies). The part is tested with 10%
and 90% of full excursion on the inputs, thus ±1.08V at
±1.35V supplies, ±1.9V at ± 2.375V and 0.5V and 4.5V at
± 5V.
and gain settings are always controlled by the out-
The f
C
put of an on-chip CMOS latch. Inputs to this latch are the
pins F3 through F0, G3 through G0, the latch-enable control CS/HOLD and the asynchronous reset input RST. A
logic-0 input to CS/HOLD makes the latch transparent so
that the F and G input pins pass directly to the latch outputs
and therefore control the filter directly. Raising CS/HOLD
to logic 1 freezes the latch’s output so that the F and G input
pins have no effect. Logic 0 at the RST input at any time
resets the latch outputs to all zeros. The all-zero state, in
turn, imposes a mute mode with zero gain and low output
noise if the filter is powered on (EN = 0). The all-zeros
condition will persist until RST is returned to logic 1, nonzero F and G inputs are set up and the latch outputs are
updated by CS/HOLD = 0. EN is a chip-enable input causing a shutdown state. Specific details on the digital controls appear in the Pin Functions section of this data sheet.
f
2.5f
C
FREQUENCY (Hz)
Figure 4. General Shape of Frequency Response
C
1564 F04
Figure 3 is a block diagram showing analog signal path,
digital control latch, and analog ground (AGND) circuitry.
A proprietary active-RC architecture filters the analog
signal. This architecture limits internal noise sources to
near the fundamental “kT/C” bounds for a filter of this
order and power consumption. The variable gain capability
at the input is an integral part of the filter, and allows
boosting of low level input signals with little increase in
output referred noise. This permits the input noise floor to
drop steadily with increasing gain, enhancing the SNR at
lower signal levels. Such a property is difficult to achieve
in practice by combining separate variable gain amplifier
and filter circuits.
Floatable Digital Inputs
Every digital input of the LTC1564 includes a small current
+
source (roughly 10µA) to float the CMOS input to V
or V
–
potential if the pin is unconnected. Table 4 summarizes the
open-circuit default levels.
Table 4. Open-Circuit Default Input Levels
INPUT FLOATING LOGIC LEVEL EFFECT
EN 1 Shutdown State
CS/HOLD 0 F and G Pins Enabled
RST 1 Latch Not Reset
F3 F2 F1 F0 0 0 1 0 fC = 20kHz
G3 G2 G1 G0 0 0 0 0 Unity Passband Gain
Note particularly that the pull-up current source at the EN
pin forces the LTC1564 to the shutdown state if this pin is
left open. Therefore the user
must
connect EN deliberately
to a logic-0 level (V–, or optionally 0V with ±5V supplies)
for normal filter operation. The other digital inputs float to
1564fa
9
LTC1564
WUUU
APPLICATIO S I FOR ATIO
levels that program the part for enabled F and G pins
(CS/HOLD = 0), 20kHz f
fore six connections (power pins, EN to logic 0, AGND, IN
and OUT) are enough to set up a working 20kHz lowpass
filter, and additional pins can be connected as necessary
to select different f
This feature of floatable logic inputs is intended for rapid
prototyping and experimentation. Floating the logic inputs
is not recommended for production designs because,
depending on construction details, the high impedances
of these inputs may permit unwanted interference coupling and consequent erroneous digital inputs to the
LTC1564.
Also, it may be necessary to consider the effect of the pullup and pull-down current sources on the logic that drives
the LTC1564. In particular, if the LTC1564 operates from
± 5V but receives digital inputs from logic using 5V and 0V,
CMOS logic levels will be compatible but the possibility
exists of the LTC1564 pulling current out of the driving logic
at those LTC1564 inputs that are capable of floating to logic
0. That is because the small current sources at these inputs return to V
high impedance or three-state output, the LTC1564’s input current may pull this output below 0V, although the
current is limited to about 10µA. The system designer
should be aware of this possibility and ensure that any such
current flow is compatible with the driving logic.
Mute State
The Mute mode keeps the filter powered as in normal
filtering but “turns off” the signal path for minimal signal
transmission (approximately –100dB) and reduced output noise. This feature may be useful for gating a signal
source on and off, or for system calibration procedures.
Note however that the DC output in the Mute state may
shift by some millivolts compared to normal filtering
because the internal signal path changes. Recovery from
Mute, like other transient responses in a filter, proceeds at
the time scale of the filter’s pole-zero time constants and
therefore is faster at the higher f
higher F codes).
The LTC1564 enters the Mute state when the F bits at the
latch output (Figure 3) become 0000. (It can be remem-
–
, not to 0V. If the driving logic presents a
and unity passband gain. There-
C
or gain.
C
settings (that is, at the
C
bered as a “zero-bandwidth” frequency setting.) This is
achieved either by presenting a 0000 code to the F inputs
and lowering the CS/HOLD input to enable the latch, or
alternatively at any time by lowering RST, which immediately resets the latch contents to all zeroes. Such a reset
also occurs normally at the application of power, unless
CS/HOLD is low and a nonzero pattern at the F inputs
overrides the brief power-on reset. In the Mute state, the
G gain-control inputs have no effect.
Output noise in Mute is largely thermal and wideband
(unlike in normal filtering, where the filter’s response
affects the noise spectrum). Typical Mute-state output
noise is 5.4µV
and less than 3µV
sionally happened elsewhere in the electronics industry
that someone would characterize a circuit or system by
comparing its output level in normal operation to the noise
level in a Mute state as though this were a normal signalto-noise ratio (SNR), which it is not, because this signal
and noise exist only at different times. A scrupulous name
for such a measure is SMR, signal-to-mute ratio. Accordingly in a 40kHz bandwidth, the LTC1564 can exhibit an
SMR exceeding 120dB.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range or high stopband rejection
of the LTC1564. Short, direct wiring will minimize parasitic
capacitance and inductance. High quality supply bypass
capacitors of 0.1µF near the chip provide good decoupling
from a clean, low inductance power source. But several
inches of wire (i.e., a few microhenrys of inductance) from
the power supplies, unless decoupled by substantial capacitance (≥ 10µF) near the chip, can cause a high-Q LC
resonance in the hundreds of kHz in the chip’s supplies or
ground reference. This may impair stopband rejection and
other specifications at those frequencies. In stringent filter
applications we have often found that a compact, carefully
laid out printed circuit board with good ground plane
makes a difference in both stopband rejection and distortion. Finally, equipment to measure filter performance can
itself introduce distortion or noise floors. Checking for
these limits with a wire replacing the filter is a prudent
routine procedure.
in 200kHz measurement bandwidth
RMS
in 40kHz bandwidth. It has occa-
RMS
1564fa
10
TYPICAL APPLICATIO S
LTC1564
U
2-Chip Flexible DSP Front End with Amplification,
Antialias Filtering and A/D Conversion
INPUT
*C1 IS A 1000pF NPO, SURFACE MOUNT DEVICE
PLACE AS CLOSE AS POSSIBLE TO THE LTC1608 INPUT PINS
–5V
16
+
–
5V
0.1µF
f
C
V+EN V
LTC1564
IN
A
V
A
V
CS/
HOLD RST F
4 5 6 7 8 9 10 11 12
13
FILTER CONTROL
ANTIALIAS FILTER/AMP ADC
0.1µF
2314
–
OUT
AGND
G
16-Bit Output, Sampling Rate to 500ksps, Analog Bandwidth to 150kHz, Gain to 24dB.
(For More Information, See
249Ω
1% METAL FILM
1
249Ω
1% METAL FILM
15
+
22µF
C1*
DIFFERENTIAL
ANALOG INPUT
± 2.5V
+
AGND
1.75X
16-BIT
SAMPLING
–
5
1µF
ADC
AGND
REFCOMP
4
1
A
2
2.2µF
3
V
REF
+
A
IN
–
IN
Linear Technology
1µF
5V
10Ω
36
AV
AV
DD
DD
LTC1608
7.5k
2.5V
REF
B15 TO B0
AGND
AGND
6
7
5V
35
8
V
–5V
BUFFERS
SS
34
9
DVDDDGND
CONTROL
LOGIC
TIMING
OUTPUT
Magazine, May 2001)
1µF
AND
1µF
10
D15 TO D0
SHDN
CONVST
BUSY
OV
OGND
1564 TA03
CS
RD
DD
33
32
31
30
27
29
28
16-BIT
PARALLEL
BUS
11 TO 26
µP
CONTROL
LINES
1µF
5V OR
3V
Boosting a 100mV
LTC1608 f
= 204.8ksps, LTC1564 is Set for fC = 50kHz and Gain of 16 (F = 0101, G = 1111). Measured THD
SAMPLE
is 86dB, HD
4096-Point FFT Spectrum
with Low Level Input
0
–20
–40
–60
–80
AMPLITUDE (dB)
–100
–120
–140
Input Signal to Nearly Fill the Input Range of the LTC1608 ADC. Input Frequency of 40kHz,
RMS
= –88dB, SNR = 85dB with 100mV
2
25.6 51.2 102.4
0
FREQUENCY (kHz)
Input. Dynamic Range of Approximately 115dB
RMS
76.8
1564 TA04
1564fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1564
IN AGND V+RST G3
LTC1564
G2 G1 G0
OUT V
–
1234567
1564 TA06
8
2.49k
16 15 14 13 12 11
GAIN CODE
FREQUENCY CODE
V
+
SUPPLY FROM 4.5V TO 10.5V
TIE F AND G PINS TO V
+
OR GROUND
TO SET FREQUENCY AND GAIN.
OUTPUTS DRIVE 100Ω/1000pF LOADS
0.1µF
1µF
V
IN
V
+
10 9
EN
CS/
HOLD F3 F2 F1 F0
2.49k
6
5
4
7
V
OUT
–
2.49k
2.49k
–
+
1/2 LT1813
2
8
V
+
3
1
0.1µF
V
OUT
+
2.49k
–
+
1/2 LT1813
TYPICAL APPLICATIO S
U
Single Supply, Very Low Noise Input Buffer for High Impedance
Source Driving the Input of LTC1564
+
V
2
V
SOURCE
–
LT1677
IN
3
+
R
SOURCE
≤10k
+
V
+
V
SUPPLY FROM 2.7V TO 10.5V
TIE F AND G PINS TO V
TO SET FREQUENCY AND GAIN
7
4
+
OR GROUND
0.1µF
1µF
6
IN AGND V+RST G3
OUT V
V
OUT
+
V
0.1µF
GAIN CODE
16
15 14 13 12 11
LTC1564
CS/
–
EN
HOLD F3 F2 F1 F0
1234567
FREQUENCY CODE
10 9
G2 G1 G0
8
1564 TA05
U
PACKAGE DESCRIPTIO
5.00 – 5.60**
(.197 – .221)
16-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
0° – 8°
G Package
7.8 – 8.2
Single Supply Differential Output Driver
5.90 – 6.50*
(.232 – .256)
1.25 ±0.12
5.3 – 5.7
14 13 12 11 10 91516
7.40 – 8.20
(.291 – .323)
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1560-1 1MHz/500kHz Continuous Time, Lowpass Elliptic Filter f
LTC1562/LTC1562-2 Universal 8th Order Active RC Filters f
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters f
LTC1565-31 650kHz Continuous Time, Linear Phase Lowpass Filter 7th Order, Differential Inputs and Outputs
LTC1566-1 2.3MHz Continuous Time Lowpass Filter 7th Order, Differential Input and Outputs
LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
(408) 432-1900 ● FAX: (408) 434-0507
0.09 – 0.25
(.0035 – .010)
0.65
(.0256)
BSC
0.22 – 0.38
(.009 – .015)
TYP
0.55 – 0.95
(.022 – .037)
0.42 ±0.03 0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
MILLIMETERS
(INCHES)
CUTTOFF
3. DRAWING NOT TO SCALE
*
**
= 500kHz or 1MHz
0.05
(.002)
MIN
2.0
(.079)
MAX
CUTOFF(MAX)
f
CUTOFF(MAX)
CUTOFF(MAX)
CLK/fCUTOFF
f
CLK/fCUTOFF
●
www.linear.com
12345678
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD
FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH.
INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010")
PER SIDE
G16 SSOP 0204
= 150kHz (LTC1562),
= 300kHz (LTC1562-2)
= 256kHz
= 64/1, f
= 32/1, f
CUTOFF(MAX)
CUTOFF(MAX)
= 75kHz (LTC1569-6),
= 300kHz (LTC1569-7)
LT/TP 0905 REV A • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2001
1564fa
Loading...