The LTC®1391 is a high performance CMOS 8-to-1 analog
multiplexer. It features a serial digital interface that allows
several LTC1391s to be daisy-chained together, increasing the number of MUX channels available using a single
digital port.
The LTC1391 features a typical RON of 45Ω, a typical
switch leakage of 50pA and guaranteed break-beforemake operation. Charge injection is ±10pC maximum. All
digital inputs are TTL and CMOS compatible when operated from single or dual supplies. The inputs can withstand 100mA fault current.
The LTC1391 is available in 16-pin PDIP, SSOP and
narrow SO packages. For applications requiring 2-way
serial data transmission, see the LTC1390 data sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
3V, 8-Channel 12-Bit ADC
ANALOG
INPUTS
SERIAL INTERFACE
TO MUX AND ADC
1
S0
2
S1
3
S2
4
S3
LTC1391
5
S4
6
S5
7
S6
8
S7
DATA IN
DATA OUT
D
GND
CLK
OUT
D
CLK
CS
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
U
0.1µF
OPTIONAL A/D
INPUT FILTER
On-Resistance vs
3V
300
1391 TA01
1µF
250
200
150
100
ON-RESISTANCE (Ω)
50
0
–5 –4–2024
1
V
REF
2
+IN
LTC1285
3
–IN
4
GND
CS/SHDN
8
V
CC
7
CLK
6
D
OUT
5
Analog Input Voltage
TA = 25°C
V+ = 5V
–
= –5V
V
–3–113
ANALOG INPUT VOLTAGE (V)
V+ = 2.7V
–
= 0V
V
5
1391 TA02
sn1391 1391fas
1
LTC1391
WWWU
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
UU
W
(Note 1)
Total Supply Voltage (V+ to V–) .............................. 15V
Input Voltage
Analog Inputs/Outputs ..... (V– – 0.3V) to (V+ + 0.3V)
Digital Inputs .........................................– 0.3V to 15V
Digital Outputs ..........................–0.3V to (V+ + 0.3V)
Power Dissipation.............................................. 500mW
Operating Temperature Range
LTC1391C ............................................... 0°C to 70°C
LTC1391I........................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
S0
S1
S2
S3
S4
S5
S6
S7
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
T
JMAX
T
JMAX
Consult LTC Marketing for parts specified with wider operating temperature ranges.
TOP VIEW
1
2
3
4
5
6
7
8
S PACKAGE
16-LEAD PLASTIC SO
= 125°C, θJA = 110°C/ W (GN)
= 125°C, θJA = 70°C/W (N)
= 125°C, θJA = 100°C/ W (S)
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V+ = 2.7V, V– = GND = 0V, unless otherwise specified.
SYMBOL PARAMETERCONDITIONSMINTYPMAXUNITS
Switch
V
ANALOG
R
ON
I
S(OFF)
I
D(OFF)
I
D(ON)
Digital
V
INH
V
INL
I
INL
V
OH
V
OL
Analog Signal Range(Note 2)●02.7V
On-ResistanceVS = 1.2V, IO = 1mAT
= 0°C (LTC1391C)300Ω
MIN
T
= –40°C (LTC1391I)
MIN
25°C250300Ω
T
= 70°C (LTC1391C)350Ω
MAX
= 85°C (LTC1391I)
T
MAX
∆RON vs V
S
20%
∆RON vs Temperature0.5%/°C
Off Input LeakageVS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3)±0.05±5nA
Channel Off
●±20nA
Off Output LeakageVS = 2.5V, VD = 0.5V; VS = 0.5V, VD = 2.5V (Note 3)±0.05±5nA
Channel Off
●±20nA
On Channel LeakageVS = VD = 0.5V, 2.5V (Note 3)±0.05±5nA
DIN (Pin 12): Digital Input (TTL/CMOS Compatible). Input
for the channel selection bits.
GND (Pin 9): Digital Ground. Connect to system ground.
CLK (Pin 10): System Clock (TTL/CMOS Compatible). The
clock synchronizes the channel selection bits and the
serial data transfer from DIN to D
OUT
.
CS (Pin 11): Channel Select Input (TTL/CMOS Compatible). A logic high on this input enables the LTC1391 to
read in the channel selection bits and allows digital data
transfer from DIN to D
D
into three-state and enables the selected channel for
OUT
. A logic low on this input puts
OUT
analog signal transmission.
D
(Pin 13): Digital Output (TTL/CMOS Compatible).
OUT
Output from the internal shift register.
V– (Pin 14): Negative Supply. For ±5V dual supply appli-
cations, |V– | should not exceed |V+|by more than 20% for
proper channel selection.
D (Pin 15): Analog Multiplexer Output.
V+ (Pin 16): Positive Supply.
sn1391 1391fas
5
LTC1391
U
WUU
APPLICATIONS INFORMATION
Multiplexer Operation
Figure 1 shows the block diagram of the components
within the LTC1391 required for MUX operation. The
LTC1391 uses DIN to select the active channel and the chip
select input, CS, to switch on the selected channel as
shown in Figure 2.
When CS is high, the input data on the DIN pin is latched
into the 4-bit shift register on the rising clock edge. The
input data consists of the “EN” bit and a string of three bits
for channel selection. If “EN” bit is logic high as illustrated
in the first input data sequence, it enables the selected
channel. After the clocking in of the last channel selection
bit B0, the CS pin must be pulled low before the next rising
clock edge to ensure correct operation. Once CS is pulled
low, the previously selected channel is switched off to
ensure a break-before-make interval. After a delay of tON,
the selected channel is switched on allowing signal transmission. The selected channel remains on until the next
falling edge of CS. After a delay of t
terminates the analog signal transmission and allows the
CLK
D
IN
CS
CONTROL
LOGIC
4-BIT SHIFT
REGISTER
, the LTC1391
OFF
selection of next channel. If the “EN” bit is logic low, as
illustrated in the second data sequence, it disables all
channels and there will be no analog signal transmission.
Table 1 shows the various bit combinations for channel
selection.
The block diagram of Figure 3 shows the components
within the LTC1391 required for serial data transfer. When
CS is held high, data is fed into the 4-bit shift register and
then shifted to D
. Data appears at D
OUT
after the fourth
OUT
rising edge of the clock as shown in Figure 4. The last four
ANALOG INPUTS
(S0 TO S7)
MUX
BLOCK
ANALOG
OUTPUT (D)
1391 • F01
Figure 1. Simplified Block Diagram of the MUX Operation
CLK
CS
D
ANY ANALOG
INPUT
IN
D
EN
HIGH
B2
t
ON
Figure 2. Multiplexer Operation
CLK
D
IN
CS
CONTROL
LOGIC
4-BIT SHIFT
REGISTER
Figure 3. Simplified Block Diagram of the
Digital Data Transfer Operation
EN LO
B2B1B0B1B0
t
OFF
D
OUT
1391 F03
1391 • F02
sn1391 1391fas
6
LTC1391
U
WUU
APPLICATIONS INFORMATION
bits clocked into the LTC1391 shift register before CS is
taken low select the MUX channel that is turned on. This
allows a series of devices, with the D
connected to the DIN of the next device, to be programmed
with a single data stream.
D
CLK
D
OUT
IN
1234
D3D4D5
D2D1
D2D1
Figure 4. Digital Data Transfer Operation
Multiplexer Expansion
Several LTC1391s can be daisy-chained to expand the
number of multiplexer inputs. No additional interface
ports are required for the expansion. Figure 5 shows two
LTC1391s connected at their analog outputs to form a
16-to-1 multiplexer at the input to an LTC1400 A/D converter.
of one device
OUT
D3D4D5
1391 • F04
To ensure that only one channel is switched on at any one
time, two sets of channel selection bits are needed for
DATA as shown in Figure 6. The first data sequence is used
to switch off one MUX and the second data sequence is
used to select one channel from the other MUX or
vice versa. In other words, if bit “ENA” is high and bit
“ENB” is low, one channel of MUX A is switched on and all
channels of MUX B are switched off. If bit “ENA” is low and
bit “ENB” is high, all channels at MUX A are switched off
and one channel of MUX B is switched on. Care should be
taken to ensure that only one LTC1391 is enabled at any
one time to prevent two channels from being enabled
simultaneously.
CLK
D
CS
IN
12345678
ENAA2A1A0ENB
B2B1B0
Figure 6. Data Sequence for MUX Expansion
1391 • F06
ANALOG
INPUTS
ANALOG
INPUTS
5V
0.1µF
1
S0
2
S1
3
S2
4
S3
LTC1391
5
S4
S5
S6
S7
S0
S1
S2
S3
S4
S5
S6
S7
A
LTC1391
B
6
7
8
1
2
3
4
5
6
7
8
D
CLK
GND
D
CLK
GND
OUT
D
OUT
D
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
–5V
0.1µF
OPTIONAL A/D
INPUT FILTER
+
0.1µF
1
V
CC
2
A
IN
LTC1400
3
V
+
10µF
0.1µF
REF
4
GND
V
CONV
CLK
D
OUT
8
SS
7
6
5
10µF
+
5V
10µF
–5V
0.1µF
DATA
OUT
DATA IN
CS
CLK
1391 • F05
Figure 5. Daisy-Chaining Two LTC1391s for Expansion
sn1391 1391fas
7
LTC1391
U
TYPICAL APPLICATIONS
Daisy-Chaining Five LTC1391s
ANALOG
INPUTS
ANALOG
INPUTS
ANALOG
INPUTS
0.1µF BYPASS CAPACITORS FROM
+
TO GND FOR EACH LTC1391
V
1
S0
2
S1
3
S2
LTC1391
4
S3
S4
S5
S6
S7
S0
S1
S2
S3
S4
S5
S6
S7
S0
S1
S2
S3
S4
S5
S6
S7
A
LTC1391
B
LTC1391
C
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
D
CLK
GND
D
CLK
GND
D
CLK
GND
OUT
D
OUT
D
OUT
D
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
5V
1
V
REF
2
+IN
LTC1286
3
–IN
4
GND
8
V
CC
7
CLK
6
D
OUT
5
CS
0.1µF
DATA
OUT
8
ANALOG
INPUTS
ANALOG
INPUTS
1
S0
2
S1
3
S2
LTC1391
4
S3
S4
S5
S6
S7
S0
S1
S2
S3
S4
S5
S6
S7
D
LTC1391
E
5
6
7
8
1
2
3
4
5
6
7
8
D
CLK
GND
D
CLK
GND
OUT
D
OUT
D
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
16
+
V
15
D
14
–
V
13
12
IN
11
CS
10
9
DATA IN
CS
CLK
1391 TA04
sn1391 1391fas
PACKAGE DESCRIPTIO
U
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
0.189 – 0.196*
16
15
(4.801 – 4.978)
14
12 11 10
13
LTC1391
0.009
(0.229)
9
REF
0.015
± 0.004
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0° – 8° TYP
× 45°
0.229 – 0.244
(5.817 – 6.198)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
12
0.150 – 0.157**
(3.810 – 3.988)
5
4
3
678
0.0250
(0.635)
BSC
0.004 – 0.0098
(0.102 – 0.249)
GN16 (SSOP) 1098
sn1391 1391fas
9
LTC1391
PACKAGE DESCRIPTIO
U
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
16
0.255 ± 0.015*
(6.477 ± 0.381)
1
0.770*
(19.558)
MAX
14
15
2
3
12
13
4
11
6
5
910
8
7
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.020
(0.508)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.100
(2.54)
BSC
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
N16 1098
10
sn1391 1391fas
PACKAGE DESCRIPTIO
U
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
13
16
14
15
12
LTC1391
11
10
9
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.228 – 0.244
(5.791 – 6.197)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.150 – 0.157**
(3.810 – 3.988)
4
5
0.050
(1.270)
BSC
3
2
1
7
6
8
0.004 – 0.010
(0.101 – 0.254)
S16 1098
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
sn1391 1391fas
11
LTC1391
TYPICAL APPLICATIO
U
Interfacing LTC1391 with LTC1257 for Demultiplex Operation
Compatible
LTC12865V 12-Bit ADCMicropower, Auto Shutdown, SO-8 Package, SPI, QSPI + MICROWIRE Compatible
LTC1380/LTC1393SMBus-Controlled Analog MultiplexerLow RON and Low Charge Injection
LTC1390Serial-Controlled 8-to-1 Analog MultiplexerLow RON, Bidirectional Serial Interface, Low Power, 16-Pin SO
LTC14013V, 12-Bit, 200ksps Serial ADC15mW, Internal Reference, SO-8 Package
LTC140212-Bit, 2.2Msps Serial ADC90mW with Nap and Sleep Modes, 5V or ±5V, Internal Reference
LTC140412-Bit, 600ksps Serial ADC5V or ±5V, Internal Reference and Shutdown
LTC141714-Bit, 400ksps Serial ADC20mW, Single 5V or ±5V Supply
LTC14515V 12-Bit Voltage Output DACComplete V
LTC14525V and 3V 12-Bit Voltage Output DACMultiplying V
LTC14533V 12-Bit Voltage Output DACComplete V
DAC, SO-8 Package, Daisy-Chainable, Low Power
OUT
DAC, SO-8 Package, Rail-to-Rail Output, Low Power
OUT
DAC, SO-8 Package, Daisy-Chainable, Low Power
OUT
LT1460-2.5Micropower, Precision Bandgap Reference130µA Supply Current, 10ppm/°C, Available in SOT-23
LT1461-2.5Micropower, Low Dropout Reference50µA Supply Current, 300mV Dropout, 3ppm/°C Drift
LTC1655/LTC1655L 16-Bit, Voltage Output DAC, 5V/3VSO-8 Package, Micropower, Serial I/O
LTC165814-Bit, Voltage Output DACMicropower, Multiplying V
MICROWIRE is a trademark of National Semiconductor.
Linear Technology Corporation
12
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
, Swings from GND to V
OUT
REF
sn1391 1391fas
LT/TP 0701 1.5K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1995
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