LINEAR TECHNOLOGY LTC1155 Technical data

LTC1155

Dual High Side

Micropower MOSFET Driver

EATU

F

■

Fully Enhances N-Channel Power MOSFETs

■

8µA Standby Current

■

85µA ON Current

■

Short-Circuit Protection

■

Wide Power Supply Range: 4.5V to 18V

■

Controlled Switching ON and OFF Times

■

No External Charge Pump Components

■

Replaces P-Channel High Side MOSFETs

■

Compatible with Standard Logic Families

■

Available in 8-Pin SO Package

PPLICATI

A

■

Laptop Power Bus Switching

■

SCSI Termination Power Switching

■

Cellular Phone Power Management

■

P-Channel Switch Replacement

■

Relay and Solenoid Drivers

■

Low Frequency Half H-Bridge

■

Motor Speed and Torque Control

RE

S

O

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S

DUESCRIPTIO

The LTC®1155 dual high side gate driver allows using low
cost N-channel FETs for high side switching applications.
An internal charge pump boosts the gate above the posi­tive rail, fully enhancing an N-channel MOSFET with no
external components. Micropower operation, with 8µA
standby current and 85µA operating current, allows use in
virtually all systems with maximum efficiency.

Included on-chip is overcurrent sensing to provide auto­matic shutdown in case of short circuits. A time delay can
be added in series with the current sense to prevent false
triggering on high in-rush loads such as capacitors and
incandescent lamps.

The LTC1155 operates off of a 4.5V to 18V supply input
and safely drives the gates of virtually all FETs. The
LTC1155 is well suited for low voltage (battery-powered)
applications, particularly where micropower “sleep” op­eration is required.

The LTC1155 is available in both 8-pin PDIP and 8-pin SO
packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

U

O

A

PPLICATITYPICAL

Laptop Computer Power Bus Switch with Short Circuit Protection

VS = 4.5V TO 5.5V

+

DS2V

S

G2

IN2

*SURFACE MOUNT

10µF

TTL, CMOS INPUT

DISK

DRIVE

DISPLAY

MAX

5A

R



SEN

0.02Ω

R



DLY

100k

*IRLR034

TTL, CMOS INPUT

POWER BUS

SYSTEM



C

DLY

0.1µF

DS1

G1

LTC1155

IN1

GND

µP

GND

C



DLY

0.1µF

R

DLY

100k

*IRLR034



PRINTER,

ETC.

R

SEN

0.02Ω

5A
MAX



1155 TA01

Switch Voltage Drop

0.25

0.20

0.15

0.10

VOLTAGE DROP (V)

0.05

0.00
0

123

OUTPUT CURRENT (A)

1155 TA02

1

LTC1155

A

W

O

LUTEXI T

S

A

WUW

ARB

U
G

I

(Note 1)

S

Supply Voltage ........................................................ 22V

Input Voltage ...................... (VS +0.3V) to (GND – 0.3V)

Gate Voltage .........................(VS +24V) to (GND – 0.3V)

Current (Any Pin).................................................. 50mA

Storage Temperature Range ................. – 65°C to 150°C

WU

/

PACKAGE

1

DS1

2

G1

3

GND

4

IN1

J8 PACKAGE

8-LEAD CERDIP

T

= 150°C, θJA = 100°C/W (J8)

JMAX

= 100°C, θJA = 130°C/W (N8)

T

JMAX

O

TOP VIEW

N8 PACKAGE
8-LEAD PDIP

RDER I FOR ATIO

ORDER PART

8

DS2

7

G2



6

V

S

IN2

5



NUMBER

LTC1155CN8
LTC1155CJ8
LTC1155IN8
LTC1155MJ8

Operating Temperature Range

LTC1155C................................................ 0°C to 70°C

LTC1155I........................................... –40°C to 85°C

LTC1155M........................................ – 55°C to 125°C

Lead Temperature Range (Soldering, 10 sec.)...... 300°C

U

ORDER PART

NUMBER

LTC1155CS8
LTC1155IS8

S8 PART MARKING

1155
1155I

DS1

1

G1

2

GND

3

IN1

4

S8 PACKAGE

8-LEAD PLASTIC SO

T

= 100°C, θJA = 150°C/W

JMAX

TOP VIEW

DS2

8

G2

7

V



6

S

IN2

5

LECTRICAL C CHARA TERIST

E

ICS

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 4.5V to 18V, unless otherwise noted.

LTC1155M LTC1155C/LTC1155I

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

V

S

I

Q

V

INH

V

INL

I

IN

C

IN

V

SEN

I

SEN

V

GATE-VS

t

ON

Supply Voltage ● 4.5 18 4.5 18 V
Quiescent Current OFF VIN = 0V, VS = 5V (Note 2) 8 20 8 20 µA
Quiescent Current ON VS = 5V, VIN = 5V (Note 3) 85 120 85 120 µA
Quiescent Current ON VS = 12V, VIN = 5V (Note 3) 180 400 180 400 µA
Input High Voltage ● 2.0 2.0 V
Input Low Voltage ● 0.8 0.8 V
Input Current 0V < VIN < V
Input Capacitance 5 5 pF
Drain Sense Threshold Voltage 80 100 120 80 100 120 mV

Drain Sense Input Current 0V < V
Gate Voltage Above Supply VS = 5V ● 6.0 6.8 9.0 6.0 6.8 9.0 V

= 6V ● 7.5 8.5 15 7.5 8.5 15 V

V

S

VS = 12V ● 15 18 25 15 18 25 V

Turn ON Time VS = 5V, C

Time for V
Time for V

VS = 12V, C
Time for V
Time for V

SEN

S

< V

S

= 1000pF

GATE

> VS + 2V 50 250 750 50 250 750 µs

GATE

> VS + 5V 200 1100 2000 200 1100 2000 µs

GATE

= 1000pF

GATE

> VS + 5V 50 180 500 50 180 500 µs

GATE

> VS + 10V 120 450 1200 120 450 1200 µs

GATE

● ±1.0 ±1.0 µA

● 75 100 125 75 100 125 mV

±0.1 ±0.1 µA

2

LTC1155

SUPPLY VOLTAGE (V)

0

4

V – V (V)

16

18

20

22

24

510 20

1155 TPC03

6

8

10

12

14

15

S

GATE

SUPPLY VOLTAGE (V)

0

0

V

GATE

(V)

18

21

24

27

30

24 10

1155 G06

3

6

9

12

15

6

8

LECTRICAL C CHARA TERIST

E

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 4.5V to 18V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

t

OFF

t

SC

Turn OFF Time VS = 5V, C

Short-Circuit Turn OFF Time VS = 5V, C

ICS

Time for V
VS = 12V, C

Time for V

Time for V
VS = 12V, C

Time for V

LTC1155M LTC1155C/LTC1155I

= 1000pF

GATE

< 1V 10 36 60 10 36 60 µs

GATE

= 1000pF

GATE

< 1V 10 26 60 10 26 60 µs

GATE

= 1000pF

GATE

< 1V 5 16 30 5 16 30 µs

GATE

= 1000pF

GATE

< 1V 5 16 30 5 16 30 µs

GATE

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: Quiescent current OFF is for both channels in OFF condition.
Note 3: Quiescent current ON is per driver and is measured independently.

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LPER

F

O

R

ATYPICA

Standby Supply Current Supply Current/Side (ON) High Side Gate Voltage

50

V

= V

= 0V

IN1

0

IN2

= 25°C

T

J

510 20

SUPPLY VOLTAGE (V)

15

1155 G01

45
40
35

µ

30

25
20
15

SUPPLY CURRENT ( A)

10

5
0

Input Threshold Voltage Drain Sense Threshold Voltage Low Side Gate Voltage

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

INPUT THRESHOLD VOLTAGE (V)

0.6

0.4
0

V

ON

V

OFF

15

1155 G04

510 20

SUPPLY VOLTAGE (V)

CCHARA TERIST

E

C

1000

V

OR V

IN1

900

= 25°C

T

J

800
700

µ

600

500
400
300

SUPPLY CURRENT ( A)

200
100

0

0

150
140
130
120
110

100

90
80
70
60

DRAIN SENSE THRESHOLD VOLTAGE (V)

50

0

510 20

510 20

ICS

= 2V

IN2

SUPPLY VOLTAGE (V)

SUPPLY VOLTAGE (V)

15

1155 G02

15

1155 G05

3

LTC1155

SUPPLY VOLTAGE (V)

0

0

TURN-OFF TIME (µs)

30

35

40

45

50

510 20

1155 G09

5

10

15

20

25

15

V

SEN

= VS –1V

NO EXTERNAL DELAY

C

GATE

= 1000pF

TIME FOR V

GATE

< 1V

UW

Y

PICA

1000

900
800
700
600

500
400

TURN-ON TIME (µs)

300
200
100

0

50
45

40
35

30
25
20
15

SUPPLY CURRENT (µA)

10

5
0

–50

LPER

F

O

R

AT

CCHARA TERIST

E

C

ICS

Turn ON Time Turn OFF Time Short-Circuit Turn OFF Delay Time

C

= 1000pF

GATE

VGS = 5V

V

= 2V

GS

0

510 20

SUPPLY VOLTAGE (V)

15

1155 G07

50

C

= 100pF

GATE

45

TIME FOR V

40
35

µ

30

25
20

TURN OFF TIME ( s)

15
10

5
0

0

< 1V

GATE

510 20

SUPPLY VOLTAGE (V)

15

1155 G08

Standby Supply Current Supply Current Per Side (ON) Input ON Threshold

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

INPUT THRESHOLD (V)

0.8

0.6

0.4
–50

–25 0 25 50

TEMPERATURE (°C)

VS = 5V

VS = 18V

VS = 18V

VS = 5V

–25 0 25 50

TEMPERATURE (°C)

75 100 125

1155 G10

1000

900

800
700

600
500
400
300

SUPPLY CURRENT (µA)

200
100

VS = 5V

0

–50

–25 0 25 50

VS = 12V

75 100 125

TEMPERATURE (°C)

1155 G11

75 100 125

1155 G12

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PIN FUNCTIONS

Input Pin

The LTC1155 logic input is a high impedance CMOS gate
and should be grounded when not in use. These input pins
have ESD protection diodes to ground and supply and,
therefore, should not be forced beyond the power supply
rails.

Gate Drive Pin

The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a

4

few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.

Supply Pin

The supply pin of the LTC1155 serves two vital purposes.
The first is obvious: it powers the input, gate drive,
regulation and protection circuitry. The second purpose is
less obvious: it provides a Kelvin connection to the top of
the two drain sense resistors for the internal 100mV
reference. The supply pin should be connected directly to
the power supply source as close as possible to the top of
the two sense resistors.

UUU

PIN FUNCTIONS

LTC1155

The supply pin of the LTC1155 should not be forced below
ground as this may result in permanent damage to the
device. A 300Ω resistor should be inserted in series with
the ground pin if negative supply voltages are anticipated.

Drain Sense Pin

As noted previously, the drain sense pin is compared
against the supply pin voltage. If the voltage at this pin is
more than 100mV below the supply pin, the input latch will
be reset and the MOSFET gate will be quickly discharged.
Cycle the input to reset the short-circuit latch and turn the
MOSFET back on.

W

BLOCK

IDAGRA

V

S

LOW STANDBY

CURRENT

REGULATOR

ANALOG SECTION

100mV

REFERENCE

COMP

10µs

DELAY

This pin is also a high impedance CMOS gate with ESD
protection and, therefore, should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.

Some loads, such as large supply capacitors, lamps or
motors require high inrush currents. An RC time delay
must be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false trigger during start-up. This time constant can be set
from a few microseconds to many seconds. However, very
long delays may put the MOSFET in risk of being destroyed
by a short-circuit condition (see Applications Information
section).

DRAIN
SENSE

ANALOG DIGITAL

IN

TTL-TO-CMOS

CONVERTER

GND

VOLTAGE

REGULATORS

ONE

SHOT

U

OPERATIO

The LTC1155 contains two independent power MOSFET
gate drivers and protection circuits (refer to the Block
Diagram for details). Each half of the LTC1155 consists of
the following functional blocks:

TTL and CMOS Compatible Inputs

Each driver input has been designed to accommodate a
wide range of logic families. The input threshold is set at

1.3V with approximately 100mV of hysteresis.
A voltage regulator with low standby current provides

continuous bias for the TTL to CMOS converters. The TTL

GATE CHARGE
AND DISCHARGE
CONTROL LOGIC

R

INPUT
LATCH

S

OSCILLATOR

AND CHARGE

PUMP

GATE CHARGE

GATE

FAST/SLOW

LOGIC

1155 BD

to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.

Internal Voltage Regulation

The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.

5