The LT®8611 is a compact, high efficiency, high speed
synchronous monolithic step-down switching regulator
that consumes only 2.5µA of quiescent current. Top and
bottom power switches are included with all necessary
circuitry to minimize the need for external components.
The built-in current sense amplifier with monitor and
control pins allows accurate input or output current
regulation and limiting. Low ripple Burst Mode operation
enables high efficiency down to very low output currents
while keeping the output ripple below 10mV
. A SYNC
P-P
pin allows synchronization to an external clock. Internal
compensation with peak current mode topology allows
the use of small inductors and results in fast transient
response and good loop stability. The EN/UV pin has an
accurate 1V threshold and can be used to program V
IN
undervoltage lockout or to shut down the LT8611 reducing the input supply current to 1µA. A capacitor on the
TR/SS pin programs the output voltage ramp rate during
start-up. The PG flag signals when V
is within ±9% of
OUT
the programmed output voltage as well as fault conditions.
The LT8611 is available in a small 24-lead 3mm × 5mm
QFN package with exposed pad for low thermal resistance.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
5V Step-Down Converter with 2.5A Output Current Limit
SYNC Voltage . ............................................................6V
Operating Junction Temperature Range (Note 2)
LT8611E ................................................. –40 to 125°C
LT8611I .................................................. –40 to 125°C
Storage Temperature Range ......................–65 to 150°C
, IMON, ICTRL. ........................4V
CC
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
TOP VIEW
ICTRL
IMON
ISN
ISP
24 23 22 21
1
SYNC
2
TR/SS
3
RT
4
EN/UV
5
V
IN
6
V
IN
7
PGND
PGND
8
24-LEAD (3mm × 5mm) PLASTIC QFN
θ
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
JA
9 10
NCNCNC
UDD PACKAGE
= 40°C/W, θ
25
GND
11 12
JC(PAD)
20
19
18
17
16
15
14
13
NC
= 5°C/W
FB
PG
BIAS
INTV
BST
SW
SW
SW
CC
ORDER INFORMATION
http://www.linear.com/product/LT8611#orderinfo
LEAD FREE FINISHTAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LT8611EUDD#PBFLT8611EUDD#TRPBFLGBR24-Lead (3mm × 5mm) Plastic QFN–40°C to 125°C
LT8611IUDD#PBFLT8611IUDD#TRPBFLGBR24-Lead (3mm × 5mm) Plastic QFN–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETERCONDITIONSMINTYPMAXUNITS
Minimum Input Voltage
Quiescent CurrentV
V
IN
Current in RegulationV
V
IN
Feedback Reference VoltageV
Feedback Voltage Line Regulation
Feedback Pin Input CurrentV
VoltageI
INTV
CC
l
= 0V, V
EN/UV
= 2V, Not Switching, V
V
EN/UV
= 2V, Not Switching, V
V
EN/UV
= 0.97V, VIN = 6V, Output Load = 100µA
OUT
V
= 0.97V, VIN = 6V, Output Load = 1mA
OUT
= 6V, I
IN
V
= 6V, I
IN
= 4.0V to 42V, I
V
IN
= 1V–2020nA
FB
= 0mA, V
LOAD
I
= 0mA, V
LOAD
LOAD
LOAD
= 0V
SYNC
= 0.5A
= 0.5A
LOAD
= 0V
BIAS
= 3.3V
BIAS
= 0.5A
= 0V
SYNC
= 2V0.462mA
SYNC
l
l
l
l
l
l
0.967
0.956
3.23
3.25
2.93.4V
1.0
1.0
1.7
1.7
24
210
0.970
0.970
3
8
4
10
50
350
0.973
0.984
µA
µA
µA
µA
µA
µA
0.0040.02%/V
3.4
3.29
3.57
3.35
8611fa
V
V
V
V
2
For more information www.linear.com/LT8611
Page 3
LT8611
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
= 1.5V, V
= 1.5V, V
= 800mV, V
= 800mV, V
= 200mV, V
= 200mV, V
= 50mV, V
= 50mV, V
= 10mV, V
= 10mV, V
ISP, ISN Pin Bias Current
= 1A, 2MHz8.5mA
LOAD
l
30
l
30
50
45
70
65
80110ns
= 1A
LOAD
= 1A
LOAD
= 1A
LOAD
= 1A65mΩ
SW
= 3.3V
ISN
= 0V
ISN
= 3.3V
ISN
= 0V
ISN
= 3.3V
ISN
= 0V
ISN
= 3.3V
ISN
= 0V
ISN
= 3.3V
ISN
= 0V
ISN
l
180
l
665
l
1.85
l
3.54.85.8A
l
0.941.01.06V
l
69.012%
l
–6–9.0–12%
l
0.8
1.6
l
1.223.2µA
l
48
l
46
l
38
l
37
l
5
l
4
l
0.960
l
0.890
l
130
l
110
l
–2020µA
210
700
2.00
240
735
2.15
6802000Ω
1.1
2.0
50
50.5
41
42
10
10.5
1.00
0.99
220
205
1.4
2.4
52
56
46
47
15
17
1.040
1.090
320
300
kHz
kHz
MHz
mV
mV
mV
mV
mV
mV
mV
mV
ns
ns
V
V
V
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT8611E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT8611I is guaranteed over the full –40°C to 125°C operating junction
For more information www.linear.com/LT8611
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
8611fa
3
Page 4
LT8611
8611 G07
8611 G03
8611 G04
CHANGE IN V
(%)
0.10
8611 G09
45
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency at 5V
100
95
90
85
80
75
70
EFFICIENCY (%)
65
60
55
50
0.5
0
Efficiency at 3.3V
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0.0010.0001
OUT
fSW = 700kHz
VIN = 12V
= 24V
V
IN
1.5
2
1
LOAD CURRENT (A)
2.5
8611 G01
OUT
VIN = 12V
VIN = 24V
fSW = 700MHz
0.01 0.1110 100 1000
LOAD CURRENT (mA)
Efficiency at 3.3V
100
95
90
85
80
75
70
EFFICIENCY (%)
65
60
55
50
0.5
0
OUT
1.5
1
LOAD CURRENT (A)
fSW = 700kHz
VIN = 12V
= 24V
V
IN
2
8611 G02
2.5
Efficiency at 5V
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0.01 0.1101100 1000 10000
0.001
Efficiency vs FrequencyReference Voltage
96
V
OUT
94
92
90
88
EFFICIENCY (%)
86
84
82
0.25
= 3.3V
VIN = 12V
= 24V
V
IN
0.751.252.25
SWITCHING FREQUENCY (MHz)
1.75
8611 G05
0.985
0.982
0.979
0.976
0.973
0.970
0.967
0.964
REFERENCE VOLTAGE (V)
0.961
0.958
0.955
–55
–25
OUT
VIN = 12V
LOAD CURRENT (mA)
65
35
5
TEMPERATURE (°C)
VIN = 24V
fSW = 700MHz
95 125
8611 G06
155
EN Pin ThresholdsLoad RegulationLine Regulation
1.04
1.03
1.02
1.01
1.00
0.99
0.98
EN THRESHOLD (V)
0.97
0.96
0.95
–55
4
5
–25
TEMPERATURE (°C)
EN RISING
EN FALLING
35155
65
95 125
0.25
V
= 3.3V
OUT
0.20
0.15
0.10
(%)
0.05
OUT
–0.05
–0.10
CHANGE IN V
–0.15
–0.20
–0.25
= 12V
V
IN
0
0.5
0
1.52
1
LOAD CURRENT (A)
2.5
For more information www.linear.com/LT8611
8611 G08
0.08
0.06
0.04
0.02
OUT
0
–0.02
–0.04
–0.06
–0.08
–0.10
3
V
= 3.3V
OUT
= 0.5A
I
LOAD
105
0
INPUT VOLTAGE (V)
30 35
2015
25
40
8611fa
Page 5
TYPICAL PERFORMANCE CHARACTERISTICS
8611 G10
8611 G11
8611 G17
8611 G18
8611 G12
CURRENT LIMIT (A)
5.0
8611 G13
125
CURRENT LIMIT (A)
3.6
8611 G14
125
SWITCH DROP (mV)
250
8611 G15
SWITCH DROP (mV)
450
8611 G16
LT8611
No Load Supply CurrentNo Load Supply Current
5.0
V
= 3.3V
OUT
4.5
IN REGULATION
4.0
3.5
3.0
2.5
2.0
1.5
INPUT CURRENT (µA)
1.0
0.5
0
515
10
0
INPUT VOLTAGE (V)
Top FET Current Limit
4.5
4.0
3.5
2545
30
20
30% DC
70% DC
35
40
25
V
= 3.3V
OUT
= 12V
V
IN
IN REGULATION
20
15
10
INPUT CURRENT (µA)
5
0
–55 –25
5
TEMPERATURE (°C)
Bottom FET Current Limit
3.4
3.2
3.0
2.8
Top FET Current Limit vs Duty Cycle
6.0
5.5
5.0
4.5
4.0
3.5
CURRENT LIMIT (A)
3.0
2.5
65
35
95
125
155
2.0
0.20.40.8
0
DUTY CYCLE
0.6
1.0
Switch Drop
SWITCH CURRENT = 1A
200
150
100
TOP SW
BOT SW
3.0
2.5
400
350
300
250
200
150
100
2.6
2.4
–55
53565
–25
TEMPERATURE (°C)
95
–55
53565
–25
TEMPERATURE (°C)
95
Minimum On-TimeSwitch Drop
80
75
70
65
60
TOP SW
BOT SW
50
0
0
1
0.5
SWITCH CURRENT (A)
1.53
2
2.5
55
50
45
MINIMUM ON-TIME (ns)
40
35
30
–55
I
LOAD
I
LOAD
I
LOAD
I
LOAD
5
–25
TEMPERATURE (°C)
= 1A, V
= 1A, V
= 2.5A, V
= 2.5A, V
35
SYNC
SYNC
SYNC
SYNC
65
= 0V
= 3V
= 0V
= 3V
95 125
155
50
0
–55 –25
5
TEMPERATURE (°C)
Minimum Off-Time
100
VIN = 3.3V
= 0.5A
I
LOAD
95
90
85
80
75
MINIMUM OFF-TIME (ns)
70
65
60
–25565
–50
TEMPERATURE (°C)
65
35
35
95
95 125 155
125
155
8611fa
For more information www.linear.com/LT8611
5
Page 6
LT8611
SWITCHING FREQUENCY (kHz)
8611 G21
800
LOAD CURRENT (mA)
100
45
8611 G22
SWITCHING FREQUENCY (kHz)
8611 G23
800
FB VOLTAGE (V)
1.2
8611 G24
SS PIN CURRENT (µA)
8611 G25
2.4
155
PG THRESHOLD OFFSET FROM V
(%)
12.0
8611 G26
155
PG THRESHOLD OFFSET FROM V
(%)
–7.0
8611 G27
155
TYPICAL PERFORMANCE CHARACTERISTICS
Dropout VoltageSwitching FrequencyBurst Frequency
800
700
600
500
400
300
200
DROPOUT VOLTAGE (mV)
100
0
0
12
0.5
LOAD CURRENT (A)
1.52.5
3
8611 G19
Minimum Load to Full Frequency
(SYNC DC High)Soft-Start Tracking
SYNC (Pin 1): External Clock Synchronization Input.
Ground this pin for low ripple Burst Mode operation at low
output loads. Tie to a clock source for synchronization to
an external frequency. Apply a DC voltage of 3V or higher
or tie to INTV
skipping mode, the I
for pulse-skipping mode. When in pulse-
CC
will increase to several hundred
Q
µA. When SYNC is DC high or synchronized, frequency
foldback will be disabled. Do not float this pin.
TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This
pin allows user control of output voltage ramp rate during
start-up. A TR/SS voltage below 0.97V forces the LT8611
to regulate the FB pin to equal the TR/SS pin voltage. When
TR/SS is above 0.97V, the tracking function is disabled
and the internal reference resumes control of the error
amplifier. An internal 2.2μA pull-up current from INTV
CC
on
this pin allows a capacitor to program output voltage slew
rate. This pin is pulled to ground with an internal 230Ω
MOSFET during shutdown and fault conditions; use a series
resistor if driving from a low impedance output. This pin
may be left floating if the tracking function is not needed.
RT (Pin 3): A resistor is tied between RT and ground to
set the switching frequency.
EN/UV (Pin 4): The LT8611 is shut down when this pin
is low and active when this pin is high. The hysteretic
threshold voltage is 1.00V going up and 0.96V going
down. Tie to V
external resistor divider from V
threshold below which the LT8611 will shut down.
a V
IN
(Pins 5, 6): The VIN pins supply current to the LT8611
V
IN
if the shutdown feature is not used. An
IN
can be used to program
IN
internal circuitry and to the internal topside power switch.
These pins must be tied together and be locally bypassed.
Be sure to place the positive terminal of the input capaci
tor as close as possible to the V
pins, and the negative
IN
-
capacitor terminal as close as possible to the PGND pins.
PGND (Pins 7, 8): Power Switch Ground. These pins are
the return path of the internal bottom-side power switch
and must be tied together. Place the negative terminal of
the input capacitor as close to the PGND pins as possible.
NC (Pins 9, 10, 11, 12): No Connect. These pins are not
connected to internal circuitry. It is recommended that
these be connected to GND so that the exposed pad GND
can be run to the top level GND copper to enhance thermal
performance.
SW (Pins 13, 14, 15): The SW pins are the outputs of the
internal power switches. Tie these pins together and con
nect them to the inductor and boost capacitor. This node
should be kept small on the PCB for good performance.
BST (Pin 16)
: This pin is used to provide a drive voltage,
higher than the input voltage, to the topside power switch.
Place a 0.1µF boost capacitor as close as possible to the IC.
INTV
(Pin 17): Internal 3.4V Regulator Bypass Pin.
CC
The internal power drivers and control circuits are pow-
ered from this voltage. INTV
rent is 20mA. Do not load the INTV
circuitry. INTV
> 3.1V, otherwise current will be drawn from VIN.
V
BIAS
Voltage on INTV
is between 3.0V and 3.6V. Decouple this pin to power
V
BIAS
current will be supplied from BIAS if
CC
will vary between 2.8V and 3.4V when
CC
maximum output cur-
CC
pin with external
CC
ground with at least a 1μF low ESR ceramic capacitor
placed close to the IC.
BIAS (Pin 18): The internal regulator will draw current from
BIAS instead of V
when BIAS is tied to a voltage higher
IN
than 3.1V. For output voltages of 3.3V and above this pin
should be tied to V
than V
use a 1µF local bypass capacitor on this pin.
OUT
. If this pin is tied to a supply other
OUT
PG (Pin 19): The PG pin is the open-drain output of an
internal comparator. PG remains low until the FB pin is
within ±9% of the final regulation voltage, and there are
no fault conditions. PG is valid when V
is above 3.4V,
IN
regardless of EN/UV pin state.
FB (Pin 20): The LT8611 regulates the FB pin to 0.970V.
Connect the feedback resistor divider tap to this pin. Also,
connect a phase lead capacitor between FB and V
OUT
.
Typically, this capacitor is 4.7pF to 10pF.
ISP (Pin 21): Current Sense (+) Pin. This is the noninvert
ing input to the current sense amplifier.
For more information www.linear.com/LT8611
8611fa
9
Page 10
LT8611
PIN FUNCTIONS
ISN (Pin 22): Current Sense (–) Pin. This is the inverting
input to the current sense amplifier.
IMON (Pin 23): Proportional-to-Current Monitor Output.
This pin sources a voltage 20 times the voltage between
the ISP and ISN pins such that:
V
IMON
= 20 • (V
ISP-VISN
).
IMON can source 200µA and sink 10µA. Float IMON if
unused.
BLOCK DIAGRAM
V
V
IN
R3
OPT
R4
OPT
V
OUT
R2
C
SS
(OPT)
R
T
IN
5, 6
C
IN
INTERNAL 0.97V REF
–
+
1V
EN/UV
4
PG
19
R1C1
FB
20
TR/SS
2
RT
3
SYNC
1
+
–
±9%
SHDN
TSD
INTV
VIN UVLO
2.2µA
CC
SHDN
UVLO
ERROR
AMP
+
+
–
SLOPE COMP
OSCILLATOR
200kHz TO 2.2MHz
V
C
SHDN
TSD
V
UVLO
IN
ICTRL (Pin 24): Current Adjustment Pin. ICTRL adjusts
the maximum ISP-ISN drop before the LT8611 reduces
output current. Connect directly to INTV
or float for
CC
full-scale ISP-ISN threshold of 50mV or apply values
between GND and 1V to modulate current limit. There is
an internal 1.4µA pull-up current on this pin. Float or tie
to INTV
when unused.
CC
GND (Exposed Pad Pin 25): Ground. The exposed pad
must be connected to the negative terminal of the input
capacitor and soldered to the PCB in order to lower the
thermal resistance.
BURST
DETECT
1.4µA
THROUGH
–
+
1.0V
+
SWITCH
LOGIC
AND
ANTI-
SHOOT
20R
3.4V
REG
+
–
1×
M1
M2
INTV
R
R
BIAS
BST
SW
13-15
PGND
7, 8
ISP
ISN
18
CC
17
6
21
22
C
VCC
C
BST
L
R
C
SEN
F
V
C
OUT
OUT
10
GND
2425
For more information www.linear.com/LT8611
ICTRL
23
IMON
8611 BD
8611fa
Page 11
OPERATION
LT8611
The LT8611 is a monolithic, constant frequency, current
mode step-down DC/DC converter. An oscillator, with
frequency set using a resistor on the RT pin, turns on
the internal top power switch at the beginning of each
clock cycle. Current in the inductor then increases until
the top switch current comparator trips and turns off the
top power switch. The peak inductor current at which
the top switch turns off is controlled by the voltage on
the internal VC node. The error amplifier servos the VC
node by comparing the voltage on the V
internal 0.97V reference. When the load current increases
it causes a reduction in the feedback voltage relative to
the reference leading the error amplifier to raise the VC
voltage until the average inductor current matches the new
load current. When the top power switch turns off, the
synchronous power switch turns on until the next clock
cycle begins or inductor current falls to zero. If overload
conditions result in more than 3.3A flowing through the
bottom switch, the next clock cycle will be delayed until
switch current returns to a safe level.
The LT8611 includes a current control and monitoring
loop using the ISN, ISP, IMON and ICTRL pins. The ISP/
ISN pins monitor the voltage across an external sense
resistor such that the V
by limiting the peak inductor current controlled by the VC
node. The current sense amplifier inputs (ISP/ISN) are railto-rail such that input, output, or other system currents
may be monitored and regulated. The IMON pin outputs
a ground-referenced voltage equal to 20 times the voltage
between the ISP-ISN pins for monitoring system currents.
The ICTRL pin can be used to override the internal 50mV
limit between the ISP, ISN pin to a lower set point for the
current control loop.
ISP-VISN
does not exceed 50mV
pin with an
FB
To optimize efficiency at light loads, the LT8611 operates
in Burst Mode operation in light load situations. Between
bursts, all circuitry associated with controlling the output
switch is shut down, reducing the input supply current to
1.7μA. In a typical application, 2.5μA will be consumed
from the input supply when regulating with no load. The
SYNC pin is tied low to use Burst Mode operation and can
be tied to a logic high to use pulse-skipping mode. If a
clock is applied to the SYNC pin the part will synchronize to
an external clock frequency and operate in pulse-skipping
mode. While in pulse-skipping mode the oscillator operates
continuously and positive SW transitions are aligned to
the clock. During light loads, switch pulses are skipped
to regulate the output and the quiescent current will be
several hundred µA.
To improve efficiency across all loads, supply current to
internal circuitry can be sourced from the BIAS pin when
biased at 3.3V or above. Else, the internal circuitry will draw
current from V
if the LT8611 output is programmed at 3.3V or above.
V
OUT
Comparators monitoring the FB pin voltage will pull the
PG pin low if the output voltage varies more than ±9%
(typical) from the set point, or if a fault condition is present.
The oscillator reduces the LT8611’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the inductor current when the
output voltage is lower than the programmed value which
occurs during start-up or overcurrent conditions. When
a clock is applied to the SYNC pin or the SYNC pin is
held DC high, the frequency foldback is disabled and the
switching frequency will slow down only during overcur
rent conditions.
. The BIAS pin should be connected to
IN
-
If the EN/UV pin is low, the LT8611 is shut down and draws
1µA from the input. When the EN/UV pin is above 1V, the
switching regulator will become active.
For more information www.linear.com/LT8611
8611fa
11
Page 12
LT8611
APPLICATIONS INFORMATION
Achieving Ultralow Quiescent Current
To enhance efficiency at light loads, the LT8611 operates
in low ripple Burst Mode operation, which keeps the out
put capacitor charged to the desired output voltage while
minimizing the input quiescent current and minimizing
output voltage ripple. In Burst Mode operation the LT8611
delivers single small pulses of current to the output capaci
tor followed by sleep periods where the output power is
supplied by the output capacitor. While in sleep mode the
LT8611 consumes 1.7μA.
As the output load decreases, the frequency of single cur
rent pulses decreases (see Figure
of time the LT8611
800
700
600
500
400
300
200
SWITCHING FREQUENCY (kHz)
100
Minimum Load to Full Frequency (SYNC DC High)
100
80
60
is in sleep mode increases, resulting in
Burst Frequency
VIN = 12V
= 3.3V
V
OUT
0
0
5V
OUT
700kHz
50
LOAD CURRENT (mA)
(1a)
1a) and the percentage
100
150
200
8611 F01a
-
much higher light load efficiency than for typical converters. By maximizing the time between pulses, the converter
u
iescent current approaches 2.5µA for a typical application
q
when there is no output load. Therefore, to optimize the
quiescent current performance at light loads, the current
in the feedback resistor divider must be minimized as it
appears to the output as load current.
While in Burst Mode operation the current limit of the top
switch is approximately 400mA resulting in output voltage
ripple shown in Figure 2. Increasing the output capacitance
will decrease the output ripple proportionally. As load ramps
upward from zero the switching frequency will increase
but only up to the switching frequency programmed by
the resistor at the RT pin as shown in Figure 1a. The out
put load at which the LT8611 reaches the programmed
frequency varies based on input voltage, output voltage,
and inductor choice.
For some applications it is desirable for the LT8611
operate in pulse-skipping mode, offering two major differ
to
ences from Burst Mode operation. First is the clock stays
at
awake
all times and all switching cycles are aligned to
the clock. In this mode much of the internal circuitry is
awake at all times, increasing quiescent current to several
hundred µA. Second is that full switching frequency is
reached at lower output load than in Burst Mode operation
(see Figure 1b). To enable pulse-skipping mode, the SYNC
pin is tied high either to a logic output or to the INTV
CC
pin. When a clock is applied to the SYNC pin the LT8611
will also operate in pulse-skipping mode.
I
L
200mA/DIV
40
LOAD CURRENT (mA)
20
0
510
20
152540 45
INPUT VOLTAGE (V)
(1b)
30 35
8611 F01b
Figure 1. SW Frequency vs Load Information in
Burst Mode Operation (1a) and Pulse-Skipping Mode (1b)
12
For more information www.linear.com/LT8611
V
OUT
10mV/DIV
SYNC
= 0V
5µs/DIVV
Figure 2. Burst Mode Operation
8611 F02
8611fa
Page 13
APPLICATIONS INFORMATION
V
R1+R2
V
IN
n
46.5
SW
V
+ V
LT8611
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
R1=R2
OUT
0.970V
– 1
(1)
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
If low input quiescent current and good light-load efficiency
are desired, use large resistor values for the FB resistor
divider. The current flowing in the divider acts as a load
current, and will increase the no-load input current to the
converter, which is approximately:
IQ= 1.7µA +
V
OUT
V
OUT
1
(2)
where 1.7µA is the quiescent current of the LT8611 and
the second term is the current in the feedback divider
reflected to the input of the buck operating at its light
load efficiency n. For a 3.3V application with R1 = 1M and
R2 = 412k, the feedback divider draws 2.3µA. With V
IN
=
12V and n = 80%, this adds 0.8µA to the 1.7µA quiescent
current resulting in 2.5µA no-load current from the 12V
supply. Note that this equation implies that the no-load
current is a function of V
; this is plotted in the Typical
IN
Performance Characteristics section.
When using large FB resistors, a 4.7pF to 10pF phase-lead
capacitor should be connected from V
OUT
to FB.
Setting the Switching Frequency
The LT8611 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2.2MHz
by using a resistor tied from the RT pin to ground. A table
showing the necessary R
value for a desired switching
T
frequency is in Table 1.
where RT is in kΩ and fSW is the desired switching fre-
quency in MHz.
Table 1. SW Frequency vs RT Value
(MHz)RT (kΩ)
f
SW
0.2232
0.3150
0.4110
0.588.7
0.671.5
0.760.4
0.852.3
1.041.2
1.233.2
1428.0
1.623.7
1.820.5
2.018.2
2.215.8
Operating Frequency Selection and Trade-Offs
Selection of the operating frequency is a trade-off between
efficiency, component size, and input voltage range. The
advantage of high frequency operation is that smaller induc
tor and capacitor values may be used. The disadvantages
are lower efficiency and a smaller input voltage range.
The highest switching frequency (f
SW(MAX)
) for a given
application can be calculated as follows:
f
SW(MAX )
where V
IN
voltage, V
=
t
ON(MIN)
OUT
VIN– V
()
is the typical input voltage, V
SW(TOP)
and V
SW(BOT)
SW(BOT)
SW( TOP)
+ V
SW(BOT)
is the output
OUT
(4)
are the internal switch
drops (~0.3V, ~0.15V, respectively at maximum load)
and t
ON(MIN)
is the minimum top switch on-time (see the
Electrical Characteristics). This equation shows that a
slower switching frequency is necessary to accommodate
a high V
IN/VOUT
ratio.
resistor required for a desired switching frequency
The R
T
can be calculated using:
For transient operation, V
lute maximum rating of 42V regardless of the R
may go as high as the abso-
IN
value,
T
however the LT8611 will reduce switching frequency as
RT=
– 5.2
f
For more information www.linear.com/LT8611
(3)
necessary to maintain control of inductor current to as
sure safe operation.
-
8611fa
13
Page 14
LT8611
V
+ V
V
+ V
SW
1
2
∆I
2
APPLICATIONS INFORMATION
The LT8611 is capable of a maximum duty cycle of greater
than 99%, and the V
R
of the top switch. In this mode the LT8611 skips
DS(ON)
IN
-to-V
dropout is limited by the
OUT
switch cycles, resulting in a lower switching frequency
than programmed by RT.
For applications that cannot allow deviation from the pro
grammed switching frequency at low V
IN/VOUT
ratios use
-
the following formula to set switching frequency:
V
IN(MIN)
where V
OUT
=
1– fSW• t
IN(MIN)
skipped cycles, V
V
SW(BOT)
are the internal switch drops (~0.3V, ~0.15V,
respectively at maximum load), f
quency (set by RT), and t
SW(BOT)
OFF(MIN)
– V
SW(BOT)
+ V
SW( TOP)
(5)
is the minimum input voltage without
is the output voltage, V
OUT
is the switching fre-
SW
OFF(MIN)
is the minimum switch
SW(TOP)
and
off-time. Note that higher switching frequency will increase
the minimum input voltage below which cycles will be
dropped to achieve higher duty cycle.
Inductor Selection and Maximum Output Current
where ∆I
Equation 9 and I
is the inductor ripple current as calculated in
L
LOAD(MAX)
is the maximum output load
for a given application.
As a quick example, an application requiring 1A output
should use an inductor with an RMS rating of greater than
1A and an I
of greater than 1.3A. During long duration
SAT
overload or short-circuit conditions, the inductor RMS is
greater to avoid overheating of the inductor. To keep the
efficiency high, the series resistance (DCR) should be less
than 0.04Ω, and the core material should be intended for
high frequency applications.
The LT8611 limits the peak switch current in order to
protect the switches and the system from overload faults.
The top switch current limit (I
) is at least 3.5A at low
LIM
duty cycles and decreases linearly to 2.8A at DC = 0.8. The
inductor value must then be sufficient to supply the desired
maximum output current (I
OUT(MAX)
of the switch current limit (I
I
OUT(MAX )
=I
LIM
L
–
LIM
), which is a function
) and the ripple current.
(8)
The LT8611 is designed to minimize solution size by
allowing the inductor to be chosen based on the output
load requirements of the application. During overload or
short-circuit conditions the LT8611 safely tolerates opera
tion with a saturated inductor through the use of a high
speed peak-current mode architecture.
A good first choice for the inductor value is:
OUT
L =
where f
SW
the output voltage, V
SW(BOT)
f
is the switching frequency in MHz, V
SW(BOT)
OUT
is the bottom switch drop
(6)
is
(~0.15V) and L is the inductor value in μH.
To avoid overheating and poor efficiency, an inductor must
be chosen with an RMS current rating that is greater than
the maximum expected output load of the application. In
addition, the saturation current (typically labeled I
SAT
)
rating of the inductor must be higher than the load current
plus 1/2 of in inductor ripple current:
I
L(PEAK)
=I
LOAD(MAX )
+
∆I
L
(7)
The peak-to-peak ripple current in the inductor can be
calculated as follows:
∆IL=
where f
V
OUT
L • f
SW
• 1–
SW
is the switching frequency of the LT8611, and
V
OUT
V
IN(MAX )
(9)
L is the value of the inductor. Therefore, the maximum
output current that the LT8611 will deliver depends on
the switch current limit, the inductor value, and the input
and output voltages. The inductor value may have to be
increased if the inductor ripple current does not allow
sufficient maximum output current (I
OUT(MAX)
) given the
switching frequency, and maximum input voltage used in
the desired application.
The optimum inductor for a given application may differ
from the one indicated by this design guide. A larger value
inductor provides a higher maximum load current and
reduces the output voltage ripple. For applications requir
ing smaller load currents, the value of the inductor may
be lower and the LT8611
may operate with higher ripple
8611fa
14
For more information www.linear.com/LT8611
Page 15
APPLICATIONS INFORMATION
LT8611
current. This allows use of a physically smaller inductor,
or one with a lower DCR resulting in higher efficiency. Be
aware that low inductance may result in discontinuous
mode operation, which further reduces maximum load
current.
For more information about maximum output current
and discontinuous operation, see Linear Technology’s
Application Note 44.
Finally, for duty cycles greater than 50% (V
a minimum inductance is required to avoid sub-harmonic
oscillation. See Application Note 19.
Input Capacitor
Bypass the input of the LT8611 circuit with a ceramic ca
pacitor of X7R or X5R type placed as close as possible to
VIN and PGND pins. Y5V types have poor performance
the
over temperature and applied voltage, and should not be
used. A 4.7μF to 10μF ceramic capacitor is adequate to
bypass the LT8611 and will easily handle the ripple current.
Note that larger input capacitance is required when a lower
switching frequency is used. If the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a low performance
electrolytic capacitor.
Step-down regulators draw current from the input sup
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage
ripple at the
switching current into a tight local loop, minimizing EMI.
A 4.7μF capacitor is capable of this task, but only if it is
placed close to the LT8611 (see the PCB Layout section).
A second precaution regarding the ceramic input capacitor
concerns the maximum input voltage rating of the LT8611.
LT8611 and to force this very high frequency
OUT/VIN
> 0.5),
-
-
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank cir
cuit. If the LT8611 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT8611’
easily avoided (see Linear Technology Application Note 88).
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated
by the LT8611 to produce the DC output. In this role it
determines the output ripple, thus low impedance at the
switching frequency is important. The second function
is to store energy in order to satisfy transient loads and
stabilize the LT8611’s control loop. Ceramic capacitors
have very low equivalent series resistance (ESR) and
provide the best ripple performance. For good starting
values, see the Typical Applications section.
Use X5R or X7R types. This choice will provide low output
ripple and good transient response. Transient performance
can be improved with a higher value output capacitor and
the addition of a feedforward capacitor placed between
and FB. Increasing the output capacitance will also
V
OUT
decrease the output voltage ripple. A lower value of output
capacitor can be used to save space and cost but transient
performance will suffer and may cause loop instability. See
the Typical Applications in this data sheet for suggested
capacitor values.
When choosing a capacitor, special attention should be
given to the data sheet to calculate the effective capacitance
under the relevant operating conditions of voltage bias and
temperature. A physically larger capacitor or one with a
higher voltage rating may be required.
s voltage rating. This situation is
-
For more information www.linear.com/LT8611
8611fa
15
Page 16
LT8611
APPLICATIONS INFORMATION
Enable Pin
The LT8611 is in shutdown when the EN pin is low and
active when the pin is high. The rising threshold of the EN
comparator is 1.0V, with 40mV of hysteresis. The EN pin
can be tied to V
if the shutdown feature is not used, or
IN
tied to a logic level if shutdown control is required.
Adding a resistor divider from V
LT8611 to regulate the output only when V
to EN programs the
IN
is above a
IN
desired voltage (see the Block Diagram). Typically, this
threshold, V
, is used in situations where the input
IN(EN)
supply is current limited, or has a relatively high source
resistance. A switching regulator draws constant power
from the source, so source current increases as source
voltage drops. This looks like a negative resistance load
to the source and can cause the source to current limit or
latch low under low source voltage conditions. The V
IN(EN)
threshold prevents the regulator from operating at source
voltages where the problems might occur. This threshold
can be adjusted by setting the values R3 and R4 such that
they satisfy the following equation:
V
IN(EN)
R3
=
+1
R4
• 1.0V
where the LT8611 will remain off until V
is above V
IN
(10)
IN(EN)
.
Due to the comparator’s hysteresis, switching will not stop
until the input falls slightly below V
IN(EN)
.
When operating in Burst Mode operation for light load
currents, the current through the V
resistor network
IN(EN)
can easily be greater than the supply current consumed
by the LT8611. Therefore, the V
resistors should be
IN(EN)
large to minimize their effect on efficiency at low loads.
output capacitor to sense the output current or may be
placed between the V
bypass capacitor and the input
IN
power source to sense input current. The current loop
modulates the internal cycle-by-cycle switch current limit
such that the average voltage across ISP-ISN pins does
not exceed 50mV.
Care must be taken and filters should be used to assure
the signal applied to the ISN and ISP pins has a peak-topeak ripple of less than 30mV for accurate operation. In
addition to high crest factor current waveforms such as
the input current of DC/DC regulators, another cause of
high ripple voltage across the sense resistor is excessive
resistor ESL. Typically the problem is solved by using a
small ceramic capacitor across the sense resistor or using
a filter network between the ISP and ISN pins.
The ICTRL pin allows the ISP-ISN set point to be linearly
controlled from 50mV to 0mV as the ICTRL pin is ramped
from 1V down to 0V, respectively and as shown in Figure3.
When this functionality is unused the ICTRL pin may be
tied to INTV
or floated. In addition the ICTRL pin includes
CC
a 2µA pull-up source such that a capacitor may be added
for soft-start functionality.
The IMON pin is a voltage output proportional to the voltage
across the current sense resistor such that V
IMON
= 20 •
(ISP-ISN) as shown in Figure 4. This output can be used
to monitor the input or output current of the LT8611 or
may be an input to an ADC for further processing.
60
50
40
Current Control Loop
In addition to regulating the output voltage the LT8611
includes a current regulation loop for setting the average
input or output current limit as shown in the Typical Ap
-
plications section.
The LT8611 measures voltage drop across an external
current sense resistor using the ISP and ISN pins. This
resistor may be connected between the inductor and the
16
For more information www.linear.com/LT8611
VOLTAGE (mV)
30
ISN
-V
ISP
20
MAX V
10
0
0
500100015002000
ICTRL VOLTAGE (mV)
8611 F03
Figure 3. LT8611 Sense Voltage vs ICTRL Voltage
8611fa
Page 17
APPLICATIONS INFORMATION
LT8611
1200
V
= 3.3V
SYNC
1000
800
(mV)
600
IMON
V
400
200
0
0
10203040
V
(mV)
ISP-VISN
Figure 4. LT8611 Sense Voltage vs IMON Voltage
50
8611 G45
INTVCC Regulator
An internal low dropout (LDO) regulator produces the 3.4V
supply from V
bias circuitry. The INTV
that powers the drivers and the internal
IN
can supply enough current for
CC
the LT8611’s circuitry and must be bypassed to ground
with a minimum of 1μF ceramic capacitor. Good bypassing
is necessary to supply the high transient currents required
by the power MOSFET gate drivers. To improve efficiency
the internal LDO can also draw current from the BIAS
pin when the BIAS pin is at 3.1V or higher. Typically the
BIAS pin can be tied to the output of the LT8611, or can
be tied to an external supply of 3.3V or above. If BIAS is
connected to a supply other than V
, be sure to bypass
OUT
with a local ceramic capacitor. If the BIAS pin is below
3.0V, the internal LDO will consume current from V
IN
.
Applications with high input voltage and high switching
frequency where the internal LDO pulls current from V
IN
will increase die temperature because of the higher power
dissipation across the LDO. Do not connect an external
load to the INTV
CC
pin.
Output Voltage Tracking and Soft-Start
T
he LT8611 allows the user to program its output voltage
ramp rate by means of the TR/SS pin. An internal 2.2μA
pulls up the TR/SS pin to INTV
. Putting an external
CC
capacitor on TR/SS enables soft starting the output to prevent current surge on the input supply. During the soft-start
ramp the output voltage will proportionally track the TR/SS
in voltage. For output tracking applications, TR/SS can
p
be externally driven by another voltage source. From 0V to
0.97V, the TR/SS voltage will override the internal 0.97V
reference input to the error amplifier, thus regulating the
FB pin voltage to that of TR/SS pin. When TR/SS is above
0.97V, tracking is disabled and the feedback voltage will
regulate to the internal reference voltage. The TR/SS pin
may be left floating if the function is not needed.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the EN/UV pin transitioning low, V
voltage
IN
falling too low, or thermal shutdown.
Output Power Good
When the LT8611’s output voltage is within the ±9%
window of the regulation point, which is a V
voltage in
FB
the range of 0.883V to 1.057V (typical), the output voltage
is considered good and the open-drain PG pin goes high
impedance and is typically pulled high with an external
resistor. Otherwise, the internal pull-down device will pull
the PG pin low. To prevent glitching both the upper and
lower thresholds include 1.3% of hysteresis.
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTV
low, V
is too low, or thermal shutdown.
IN
has fallen too
CC
Synchronization
To select low ripple Burst Mode operation, tie the SYNC pin
below 0.4V (this can be ground or a logic low output). To
synchronize the LT8611 oscillator to an external frequency
connect a square wave (with 20% to 80% duty cycle) to
the SYNC pin. The square wave amplitude should have val
-
leys that are below 0.4V and peaks above 2.4V (up to 6V).
For more information www.linear.com/LT8611
8611fa
17
Page 18
LT8611
APPLICATIONS INFORMATION
The LT8611 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LT8611
may be synchronized over a 200kHz to 2.2MHz range. The
resistor should be chosen to set the LT8611 switching
R
T
frequency equal to or below the lowest synchronization
input. For example, if the synchronization signal will be
500kHz and higher, the R
The slope compensation is set by the R
should be selected for 500kHz.
T
value, while the
T
minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size,
input voltage, and output voltage. Since the synchronization frequency will not change the slopes of the inductor
current waveform, if the inductor is large enough to avoid
subharmonic oscillations at the frequency set by R
, then
T
the slope compensation will be sufficient for all synchronization frequencies.
For some applications it is desirable for the
LT8611
operate in pulse-skipping mode, offering two major differ
to
ences from Burst Mode operation. First is the clock stays
awake at all times and all switching cycles are aligned to
the clock. Second is that full switching frequency is reached
at lower output load than in Burst Mode operation. These
two differences come at the expense of increased quiescent
current. To enable pulse-skipping mode, the SYNC pin is
tied high either to a logic output or to the INTVCC pin.
The LT8611 does not operate in forced continuous mode
regardless of SYNC signal. Never leave the SYNC pin
floating.
Shorted and Reversed Input Protection
Frequency foldback behavior depends on the state of the
SYNC pin: If the SYNC pin is low the switching frequency
will slow while the output voltage is lower than the pro
-
grammed level. If the SYNC pin is connected to a clock
our
ce or tied high, the LT8611 will stay at the programmed
s
frequency without foldback and only slow switching if the
inductor current exceeds safe levels.
There is another situation to consider in systems where
the output will be held high when the input to the LT8611
is absent. This may occur in battery charging applications
or in battery-backup systems where a battery or some
other supply is diode ORed with the LT8611’s output. If
the V
(either by a logic signal or because it is tied to V
pin is allowed to float and the EN pin is held high
IN
), then
IN
the LT8611’s internal circuitry will pull its quiescent current
through its SW pin. This is acceptable if the system can
tolerate several μA in this state. If the EN pin is grounded
the SW pin current will drop to near 1µA. However, if the
pin is grounded while the output is held high, regard-
V
IN
less of EN, parasitic body diodes inside the LT8611 can
pull current from the output through the SW pin and
the V
EN/UV pins that will allow the LT8611
pin. Figure 5 shows a connection of the VIN and
IN
to run only when
the input voltage is present and that protects against a
shorted or reversed input.
D1
V
IN
V
IN
LT8611
EN/UV
GND
8611 F05
The LT8611 will tolerate a shorted output. Several features
are used for protection during output short-circuit and
brownout conditions. The first is the switching frequency
will be folded back while the output is lower than the set
point to maintain inductor current control. Second, the
bottom switch current is monitored such that if inductor
current is beyond safe levels switching of the top switch
will be delayed until such time as the inductor current
falls to safe levels.
18
For more information www.linear.com/LT8611
Figure 5. Reverse VIN Protection
8611fa
Page 19
APPLICATIONS INFORMATION
LT8611
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 6 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT8611’s V
pins, PGND pins, and the input ca-
IN
pacitor (C1). The loop formed by the input capacitor should
be as small as possible by placing the capacitor adjacent
to the V
and PGND pins. When using a physically large
IN
input capacitor the resulting loop may become too large
in which case using a small case/value capacitor placed
close to the V
and PGND pins plus a larger capacitor
IN
further away is preferred. These components, along with
the inductor and output capacitor, should be placed on
the same side of the circuit board, and their connections
should be made on that layer. Place a local, unbroken ground
plane under the application circuit on the layer closest to
the surface layer. The SW and BOOST nodes should be
as small as possible. Finally, keep the FB and RT nodes
small so that the ground traces will shield them from the
SW and BOOST nodes. The exposed pad on the bottom of
the package must be soldered to ground so that the pad
is connected to ground electrically and also acts as a heat
sink thermally. To keep thermal resistance low, extend the
ground plane as much as possible, and add thermal vias
under and near the LT8611 to additional ground planes
within the circuit board and on the bottom side.
SYNC
EN/UV
V
IN
GND
V
LINE TO BIAS
OUT
LINE TO ISN
V
OUT
TR/SS
RT
IMON
ICTRL
24
1
2
3
4
5
6
7
8
9101112
LINE TO ISP
VIAS TO GROUND PLANE
ISNISP
212223
GND
FB
20
19PG
18
BIAS
17
INTV
CC
BST
16
15
14
13
V
OUT
OUTLINE OF LOCAL
GROUND PLANE
SW
V
OUT
8611 F06
High Temperature Considerations
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT8611. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should be
tied to large copper layers below with thermal vias; these
layers will spread heat dissipated by the LT8611. Placing
additional vias can reduce thermal resistance further. The
maximum load current should be derated as the ambient
For more information www.linear.com/LT8611
Figure 6. Recommended PCB Layout for the LT8611
temperature approaches the maximum junction rating.
Power dissipation within the LT8611 can be estimated
by calculating the total power loss from an efficiency
measurement and subtracting the inductor loss. The
die temperature is calculated by multiplying the LT8611
power dissipation by the thermal resistance from junction
to ambient. The LT8611 will stop switching and indicate
a fault condition if safe junction temperature is exceeded.
8611fa
19
Page 20
LT8611
TYPICAL APPLICATIONS
V
IN
5.5V TO 42V
5V Step-Down with 1A Output Current Limit
LT8611
GND
BSTV
0.1µF
4.7µH
SW
ISP
ISN
BIAS
PG
FB
243k
4.7µF
f
= 800kHz
SW
1µF
0.1µF
52.3k
IN
EN/UVON OFF
SYNC
IMON
ICTRL
INTV
TR/SS
RT
CC
PGND
3.3V Step-Down with 1A Input Current Limit
0.050Ω
1µF
10pF
1M
8611 TA02
V
5V
1A
47µF
OUT
3.8V TO 42V
V
3.8V TO 42V
1µF
0.050Ω
V
IN
4.7µF
0.1µF
f
SW
1µF
= 1MHz
41.2k
ISNISP
IN
EN/UVON OFF
SYNC
IMON
ICTRL
INTV
CC
TR/SS
RT
PGND GND
LT8611
BSTV
SW
BIAS
PG
0.10µF
4.7µH
4.7pF
FB
1M
412k
8611 TA03
V
3.3V
47µF
OUT
3.3V Step-Down with 1A Input Current Limit and 7V VIN Undervoltage Lockout
0.050Ω
IN
1µF
4.7µF
f
1µF
= 700kHz
SW
604k
100k
0.1µF
60.4k
ISNISP
IN
EN/UV
SYNC
IMON
ICTRL
INTV
CC
TR/SS
RT
PGND GND
LT8611
BSTV
SW
BIAS
PG
0.1µF
4.7µH
4.7pF
FB
1M
412k
8611 TA04
V
3.3V
47µF
OUT
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20
For more information www.linear.com/LT8611
Page 21
TYPICAL APPLICATIONS
V
IN
3.8V TO 42V
D1
V
3.8V TO 42V
IN
Digitally Controlled Current/Voltage Source
LT8611
BSTV
SW
ISP
ISN
BIAS
PG
FB
GND
4.7µF
µC
f
SW
ADC
DAC
1µF
= 700kHz
60.4k
IN
EN/UVON OFF
SYNC
IMON
ICTRL
INTV
TR/SS
RT
CC
PGND
CCCV Battery Charger
LT8611
GND
BSTV
SW
ISP
ISN
BIAS
PG
FB
f
SW
4.7µF
1µF
= 700kHz
0.1µF
60.4k
IN
EN/UVON OFF
SYNC
IMON
ICTRL
INTV
TR/SS
RT
CC
PGND
0.1µF
4.7µH
0.1µF
4.7µH
412k
10pF
100k
0.025Ω
1µF
4.7pF
1M
8611 TA05
0.050Ω
1µF
324k
V
3.3V
2A
47µF
47µF
8611 TA06
OUT
+
V
4.1V
1A
Li-Ion
BATTERY
LT8611
OUT
V
3.8V TO 38V
–3.3V Negative Converter with 1A Output Current Limit
IN
4.7µF
0.1µF
4.7µF
f = 700kHz
60.4k
0.1µF
1µF
60.4k
IN
EN/UV
SYNC
IMON
ICTRL
INTV
TR/SS
RT
LT8611
CC
PGND
For more information www.linear.com/LT8611
GND
BSTV
SW
ISP
ISN
BIAS
PG
0.1µF
4.7µH
1µF
10pF
412k
1M
47µF
0.05Ω
8611 TA07
V
OUT
–3.3V
1A
8611fa
FB
21
Page 22
LT8611
TYPICAL APPLICATIONS
2MHz, 3.3V Step-Down with Power Good without Current Sense
V
IN
3.8V TO 42V
4.7µF
1µF
ON OFF
0.1µF
18.2k
IN
EN/UV
SYNC
IMON
ICTRL
INTV
TR/SS
RT
LT8611
CC
PGND
GND
BSTV
SW
ISP
ISN
BIAS
PG
0.1µF
2.2µH
4.7pF
FB
1M
412k
150k
V
OUT
3.3V
2.5A
PGOOD
47µF
V
3.8V TO 42V
f = 2MHz
8611 TA08
1V Step-Down with 2A Output Current Limit
IN
10µF
ON OFF
0.1µF
1µF
150k
f = 300kHz
IN
EN/UV
SYNC
IMON
ICTRL
INTV
TR/SS
RT
CC
PGND
LT8611
GND
BSTV
SW
ISP
ISN
BIAS
PG
0.1µF
10µH
0.025Ω
1µF
FB
8611 TA09
V
OUT
0.97V
2A
100µF
22
8611fa
For more information www.linear.com/LT8611
Page 23
TYPICAL APPLICATIONS
V
12.5V TO 42V
IN
12V Step-Down with 1A Output Current Limit
LT8611
GND
BSTV
SW
ISP
ISN
BIAS
0.1µF
10µH
1µF
PG
FB
88.7k
10µF
1µF
ON OFF
0.1µF
60.4k
IN
EN/UV
SYNC
IMON
ICTRL
INTV
TR/SS
RT
CC
PGND
0.05Ω
10pF
1M
V
12V
1A
22µF
LT8611
OUT
V
3.8V TO 42V
IN
4.7µF
1µF
f = 700kHz
D1: LUMINUS CBT-40
ON OFF
0.1µF
60.4k
f = 700kHz
2A LED Driver
IN
EN/UV
SYNC
IMON
ICTRL
INTV
CC
TR/SS
RT
PGND
LT8611
GND
BSTV
SW
ISP
ISN
BIAS
PG
8611 TA10
0.1µF
4.7µH
0.025Ω
1µF
10pF
FB
420k
100k
D1
4.7µF
8611 TA11
2A
For more information www.linear.com/LT8611
8611fa
23
Page 24
LT8611
R = 0.20 OR 0.25
3.50 ±0.05
UDD Package
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT8611#packaging for the most recent package drawings.
24-Lead Plastic QFN (3mm×5mm)
(Reference LTC DWG # 05-08-1833 Rev Ø)
0.70 ±0.05
2.10 ±0.05
1.50 REF
3.65 ±0.05
1.65 ±0.05
0.25 ±0.05
0.50 BSC
3.50 REF
4.10 ±0.05
5.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
3.00 ±0.10
PIN 1
TOP MARK
(NOTE 6)
5.00 ±0.10
PACKAGE OUTLINE
0.75 ±0.05
R = 0.05 TYP
3.50 REF
1.50 REF
2324
3.65 ±0.10
1.65 ±0.10
PIN 1 NOTCH
× 45° CHAMFER
0.40 ±0.10
1
2
24
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
R = 0.115
TYP
BOTTOM VIEW—EXPOSED PAD
For more information www.linear.com/LT8611
(UDD24) QFN 0808 REV Ø
0.25 ±0.05
0.50 BSC
8611fa
Page 25
LT8611
REVISION HISTORY
REVDATEDESCRIPTIONPAGE NUMBER
A01/17Clarified Current Sense Voltage and IMON Monitor Pin Voltage Parameters3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Formoreinformationwww.linear.com/LT8611
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25
Page 26
LT8611
TYPICAL APPLICATION
Coincident Tracking Step-Downs Each with 2A Output Current Limit