Linear Technology LT8302 Operation

Page 1
42VIN Micropower No-Opto
8302 TA01b
Isolated Flyback Converter
with 65V/3.6A Switch
FeaTures DescripTion
LT8302
n
2.8V to 42V Input Voltage Range
n
3.6A, 65V Internal DMOS Power Switch
n
Low Quiescent Current: 106µA in Sleep Mode 380µA in Active Mode
n
Quasi-Resonant Boundary Mode Operation at
Heavy Load
n
Low Ripple Burst Mode® Operation at Light Load
n
Minimum Load < 0.5% (Typ) of Full Output
n
No Transformer Third Winding or Opto-Isolator
Required for Output Voltage Regulation
n
Accurate EN/UVLO Threshold and Hysteresis
n
Internal Compensation and Soft-Start
n
Temperature Compensation for Output Diode
n
Output Short-Circuit Protection
n
Thermally Enhanced 8-Lead SO Package
applicaTions
n
Isolated Automotive, Industrial, Medical Power
Supplies
n
Isolated Auxiliary/Housekeeping Power Supplies
The LT®8302 is a monolithic micropower isolated flyback converter. By sampling the isolated output voltage directly from the primary-side flyback waveform, the part requires no third winding or opto-isolator for regulation. The output voltage is programmed with two external resistors and a third optional temperature compensation resistor. Bound
­ary mode operation provides a small magnetic solution with excellent load regulation. Low ripple Burst Mode operation maintains high efficiency at light load while minimizing the output voltage ripple. A 3.6A, 65V DMOS power switch is integrated along with all the high voltage circuitry and control logic into a thermally enhanced 8-lead SO package.
The LT8302 operates from an input voltage range of 2.8V to 42V and delivers up to 18W of isolated output power. The high level of integration and the use of boundary and low ripple burst modes result in a simple to use, low component count, and high efficiency application solution for isolated power delivery.
L, LT, LTC , LT M, Linear Technology, the Linear logo and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5438499, 7463497, 7471522.
Typical applicaTion
2.8V to 32VIN/5V
V
IN
2.8V TO 32V
10µF
EN/UVLO
LT8302
GND
INTV
CC
1µF
Isolated Flyback Converter
OUT
V
IN
SW
R
FB
R
REF
115k 10k
TC
+
V
220µF
= 5V)
IN
= 12V)
IN
= 24V)
IN
OUT
5V
V
OUT
3:1
470pF
39Ω
154k
8302 TA01a
For more information www.linear.com/LT8302
1µH
9µH
10mA TO 1.1A (V 10mA TO 2.0A (V 10mA TO 2.9A (V
Efficiency vs Load Current
90
FRONT PAGE APPLICATION
85
80
75
EFFICIENCY (%)
70
65
60
0
0.5 1.0
2.0 3.0
1.5 2.5
LOAD CURRENT (A)
VIN = 5V
= 12V
V
IN
= 24V
V
IN
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LT8302
(Note 1)
pin conFiguraTionabsoluTe MaxiMuM raTings
SW (Note 2) ..............................................................65V
............................................................................42V
V
IN
EN/UVLO ....................................................................V
RFB ........................................................V
– 0.5V to V
IN
IN IN
Current Into RFB ....................................................200µA
, R
INTV
CC
, TC ......................................................... 4V
REF
Operating Junction Temperature Range (Notes 3, 4)
LT8302E, LT8302I.............................. –40°C to 125°C
LT8302H ............................................ –40°C to 150°C
EN/UVLO
INTV
CC
V
GND
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
TOP VIEW
1
2
3
IN
4
S8E PACKAGE
8-LEAD PLASTIC SO
= 33°C/W
θ
JA
9
GND
TC
8
R
7
REF
R
6
FB
SW
5
LT8302MP ......................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT8302ES8E#PBF LT8302ES8E#TRPBF 8302 8-Lead Plastic SO –40°C to 125°C LT8302IS8E#PBF LT8302IS8E#TRPBF 8302 8-Lead Plastic SO –40°C to 125°C LT8302HS8E#PBF LT8302HS8E#TRPBF 8302 8-Lead Plastic SO –40°C to 150°C LT8302MPS8E#PBF LT8302MPS8E#TRPBF 8302 8-Lead Plastic SO –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
2
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For more information www.linear.com/LT8302
Page 3
LT8302
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
V
IN
I
Q
I
HYS
V
INTVCC
I
INTVCC
V
TC
I
TC
f
MIN
t
ON(MIN)
t
OFF(MAX)
I
SW(MAX)
I
SW(MIN)
R
DS(ON)
I
LKG
t
SS
VIN Voltage Range VIN Quiescent Current V
V
EN/UVLO EN/UVLO
= 0.3V
= 1.1V Sleep Mode (Switch Off) Active Mode (Switch On)
EN/UVLO Shutdown Threshold For Lowest Off I
Q
EN/UVLO Enable Threshold Falling EN/UVLO Enable Hysteresis 14 mV EN/UVLO Hysteresis Current V
V V
INTVCC Regulation Voltage I INTVCC Current Limit V
UVLO Threshold Falling 2.39 2.47 2.55 V
INTV
CC
UVLO Hysteresis 105 mV
INTV
CC
– VIN) Voltage I
(R
FB
Regulation Voltage
R
REF
Regulation Voltage Line Regulation 2.8V ≤ VIN ≤ 42V –0.01 0 0.01 %/V
R
REF
= 0.3V
EN/UVLO
= 1.1V
EN/UVLO
= 1.3V
EN/UVLO
= 0mA to 10mA 2.85 3 3.1 V
INTVCC
= 2.8V 10 13 16 mA
INTVCC
= 75µA to 125µA –50 50 mV
RFB
TC Pin Voltage 1.00 V TC Pin Current VTC = 1.2V
V
= 0.8V
TC
Minimum Switching Frequency 11.3 12 12.7 kHz Minimum Switch-On Time 160 ns Maximum Switch-Off Time Backup Timer 170 µs Maximum Switch Current Limit 3.6 4.5 5.4 A Minimum Switch Current Limit 0.78 0.87 0.96 A Switch On-Resistance ISW = 1.5A 80 mΩ Switch Leakage Current VSW = 65V 0.1 0.5 µA Soft-Start Timer 11 ms
EN/UVLO
= VIN, C
l
l
l
l
= 1µF to GND, unless otherwise noted.
INTVCC
2.8 42 V
0.5
2 µA
53 106 380
0.3 0.75 V
1.178 1.214 1.250 V
–0.1
2.3
–0.1
0
2.5 0
0.1
2.7
0.1
0.98 1.00 1.02 V
12 15
18 µA
–200
µA µA µA
µA µA µA
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The SW pin is rated to 65V for transients. Depending on the leakage inductance voltage spike, operating waveforms of the SW pin should be derated to keep the flyback voltage spike below 65V as shown in Figure 5.
Note 3: The LT8302E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The
LT8302I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT8302H is guaranteed over the full –40°C to 150°C operating junction temperature range. The LT8302MP is guaranteed over the full –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperature greater than 125°C.
Note 4: The LT8302 includes overtemperature protection that is intended to protect the device during momentary temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
For more information www.linear.com/LT8302
overload conditions. Junction
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LT8302
8302 G07
Typical perForMance characTerisTics
Output Load and Line Regulation Output Temperature Variation
5.20
5.15
5.10
5.05
5.00
4.95
OUTPUT VOLTAGE (V)
4.90
4.85
4.80
0.5 1.0 2.0
0
LOAD CURRENT (A)
1.5
VIN = 5V
= 12V
V
IN
= 24V
V
IN
2.5 3.0
8302 G01
Boundary Mode Waveforms Discontinuous Mode Waveforms Burst Mode Waveforms
5.3 FRONT PAGE APPLICATION
= 12V
V
IN
5.2
= 1A
I
OUT
5.1
RTC = 115k
5.0
4.9
OUTPUT VOLTAGE (V)
4.8
4.7
–50
RTC = OPEN
–25 0
50 100 150125
25 75
TEMPERATURE (°C)
= 25°C, unless otherwise noted.
T
A
Switching Frequency vs Load Current
500
FRONT PAGE APPLICATION
400
300
200
FREQUENCY (kHz)
100
8302 G02
0
0 0.5
1.0
LOAD CURRENT (A)
1.5
2.0
VIN = 5V
= 12V
V
IN
= 24V
V
IN
2.5
3.0
8302 G03
V
SW
20V/DIV
V
OUT
50mV/DIV
FRONT PAGE APPLICATION
= 12V
V
IN
= 2A
I
OUT
VIN Shutdown Current
10
8
6
(µA)
Q
I
4
2
0
0
V
SW
20V/DIV
V
OUT
50mV/DIV
2µs/DIV
8302 G04
FRONT PAGE APPLICATION
= 12V
V
IN
= 0.5A
I
OUT
2µs/DIV
8302 G05
VIN Quiescent Current, Sleep Mode
TJ = 150°C
= 25°C
T
J
= –55°C
T
J
10
20
VIN (V)
30
40
50
140
130
120
110
(µA)
Q
I
100
TJ = 150°C
TJ = 25°C
TJ = –55°C
90
80
0
10 20 30 40
VIN (V)
50
8302 G08
V
20V/DIV
V
OUT
50mV/DIV
420
400
380
(µA)
Q
I
360
340
320
SW
FRONT PAGE APPLICATION
= 12V
V
IN
= 10mA
I
OUT
20µs/DIV
VIN Quiescent Current, Active Mode
TJ = 150°C
TJ = 25°C
TJ = –55°C
10
0
20
VIN (V)
8302 G06
30
40
50
8302 G09
4
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For more information www.linear.com/LT8302
Page 5
= 25°C, unless otherwise noted.
8302 G12
8302 G13
8302 G14
8302 G16
8302 G17
Typical perForMance characTerisTics
T
A
EN/UVLO Enable Threshold EN/UVLO Hysteresis Current INTVCC Voltage vs Temperature
1.240
1.235
1.230
1.225
(V)
1.220
EN/UVLO
V
1.215
1.210
1.205
1.200 –50
–25
0
RISING
FALLING
50
25
TEMPERATURE (°C)
75
100
125
150
8302 G10
(µA)
HYST
I
5
4
3
2
1
0
–50
–25 0
50
25 75 150
TEMPERATURE (°C)
100 125
8302 G11
3.10
3.05
3.00
(V)
2.95
INTVCC
V
2.90
2.85
2.80 –50
I
0 50
–25 25
TEMPERATURE (°C)
I
INTVCC
INTVCC
LT8302
= 0mA
= 10mA
100
75
125
150
INTVCC Voltage vs V
3.10
3.05
3.00
(V)
2.95
INTVCC
V
2.90
2.85
1.010
1.008
1.006
1.004
1.002
(V)
1.000
RREF
V
0.998
0.996
0.994
0.992
0.990
2.80 10 15 45
5
R
Regulation Voltage R
REF
–50
–25 25
I
= 0mA
INTVCC
I
= 10mA
INTVCC
VIN (V)
0
50
TEMPERATURE (°C)
IN
35 4020 25 30
125
100
75
150
INTVCC UVLO Threshold (RFB-VIN) Voltage
2.8
2.7
2.6
2.5
INTVCC (V)
V
2.4
2.3
2.2
1.010
1.008
1.006
1.004
1.002
(V)
1.000
RREF
V
0.998
0.996
0.994
0.992
0.990
RISING
FALLING
100
20
VIN (V)
75
30
150
125
40
50
–50
REF
0
TEMPERATURE (°C)
Line Regulation TC Pin Voltage
10
0 50
–25 25
40
30
20
10
0
–10
VOLTAGE (mV)
–20
–30
–40
–25
–50
1.5
1.4
1.3
1.2
(V)
1.1
TC
V
1.0
0.9
0.8
0.7 –25
–50
I
= 125µA
RFB
I
= 100µA
RFB
I
= 75µA
RFB
0
0
50
25
TEMPERATURE (°C)
50
25
TEMPERATURE (°C)
75
100
75
100
125
125
150
8302 G15
150
8302 G18
For more information www.linear.com/LT8302
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LT8302
Typical perForMance characTerisTics
R
DS(ON)
200
160
120
80
RESISTANCE (mΩ)
40
0
–50
–25 0
50
25 75 150
TEMPERATURE (°C)
100 125
8302 G19
Switch Current Limit Maximum Switching Frequency
5
MAXIMUM CURRENT LIMIT
MINIMUM CURRENT LIMIT
50
–25 0
25 75 150
TEMPERATURE (°C)
(A)
SW
I
4
3
2
1
0
–50
TA = 25°C, unless otherwise noted.
500
400
300
200
FREQUENCY (kHz)
100
0
–50
100 125
8302 G20
–25 0
Minimum Switching Frequency Minimum Switch-On Time Minimum Switch-Off Time
20
16
12
8
FREQUENCY (kHz)
4
400
300
200
TIME (ns)
100
400
300
200
TIME (ns)
100
50
25 75 150
TEMPERATURE (°C)
100 125
8302 G21
0
–50
–25 0
50
25 75 150
TEMPERATURE (°C)
100 125
8302 G22
0
–50
–25 0 25 50
TEMPERATURE (°C)
75 100 125 150
8302 G23
0
–50
–25 0 25 50
TEMPERATURE (°C)
75 100 125 150
8302 G24
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For more information www.linear.com/LT8302
Page 7
pin FuncTions
LT8302
EN/UVLO (Pin 1): Enable/Undervoltage Lockout. The EN/UVLO pin
is used to enable the LT8302. Pull the pin below 0.3V to shut down the LT8302. This pin has an ac­curate 1.214V threshold
and can be used to program a VIN undervoltage lockout (UVLO) threshold using a resistor divider from V allows the programming of V function is used, tie this pin directly to V
INTV
INTV
(Pin 2): Internal 3V Linear Regulator Output. The
CC
pin is supplied from VIN and powers the internal
CC
to ground. A 2.5µA current hysteresis
IN
UVLO hysteresis. If neither
IN
.
IN
control circuitry and gate driver. Do not overdrive the INTV
pin with any external supply, such as a third winding
CC
supply. Locally bypass this pin to ground with a minimum 1µF ceramic capacitor.
(Pin 3): Input Supply. The VIN pin supplies current to
V
IN
the internal circuitry and serves as a reference voltage for the feedback circuitry connected to the R
pin. Locally
FB
bypass this pin to ground with a capacitor. GND (Pin 4, Exposed Pad Pin 9): Ground. The exposed
pad provides both electrical contact to ground and good thermal contact to the printed circuit board
. Solder the
exposed pad directly to the ground plane.
(Pin 5): Drain of the Internal DMOS Power Switch.
SW
Minimize trace area at this pin to reduce EMI and voltage spikes.
(Pin 6): Input Pin for External Feedback Resistor.
R
FB
Connect a resistor from this pin to the transformer primary SW pin. The ratio of the R
resistor to the R
FB
resistor,
REF
times the internal voltage reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). Minimize trace area at this pin.
(Pin 7): Input Pin for External Ground Referred Ref-
R
REF
erence Resistor.
The resistor at this pin should be in the range of 10k, but for convenience in selecting a resistor divider ratio, the value may range from 9.09k to 11.0k.
TC (Pin 8): Output Voltage Temperature Compensation. The voltage at this pin is proportional to absolute temperature (PTAT) with temperature coefficient equal to 3.35mV/°K, i.e., equal to 1V at room temperature 25°C. The TC pin
REF
-
pin
voltage can be used to estimate the LT8302 junction tem perature. Connect
a resistor from this pin to the R
to compensate the output diode temperature coefficient.
For more information www.linear.com/LT8302
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Page 8
LT8302
block DiagraM
V
IN
INTV
CC
C
INTVCC
R
R
EN1
EN2
2
1
EN/UVLO
LDO
2.5µA
M4
D
OUT
T1
C
IN
R
FB
3
V
IN
M3
25µA
1.214V
A1
6
R
FB
1:4
M2
BOUNDARY DETECTOR
OSCILLATOR
A3
+
+
1V
+
VOLTAGE
g
PTAT
m
S
R M1
Q
V
IN
START-UP,
REFERENCE,
CONTROL
INTV
CC
DRIVER
A2
+
N:1
L1A L1B C
5
SW
R
SENSE
+
V
OUT
OUT
V
OUT
R
REF
7
R
R
REF
TC
8
TC
4, EXPOSED PAD PIN 9
GND
8302 BD
8
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For more information www.linear.com/LT8302
Page 9
operaTion
LT8302
The LT8302 is a current mode switching regulator IC designed specially for the isolated flyback topology. The key problem in isolated topologies is how to communicate the output voltage information from the isolated secondary side of the transformer to the primary side for regulation. Historically, opto-isolators or extra transformer windings communicate this information across the isolation bound ary. Opto-isolator circuits waste output power, and the
components increase the cost and physical size of
extra the power supply. Opto-isolators can also cause system issues due to limited dynamic response, nonlinearity, unit­to-unit variation and aging over lifetime. Circuits employing extra transformer windings also exhibit deficiencies, as using an extra winding adds to the transformer’s physical size and cost, and dynamic response is often mediocre.
The LT8302 samples the isolated output voltage through the primary-side flyback pulse waveform. In this manner, neither opto-isolator nor extra transformer winding is re quired for boundar mode, the output voltage is always sampled on the SW pin when the secondary current is zero. This method im proves load regulation without the need of external load compensation components.
The back converter housed in a thermally enhanced 8-lead SO package. The output voltage is programmed with two external resistors. An optional TC resistor provides easy
regulation. Since the LT8302 operates in either
y conduction mode or discontinuous conduction
LT8302 is a simple to use micropower isolated fly
-
-
-
-
output diode temperature compensation. By integrating the loop compensation and soft-start inside, the part reduces the number of external components. As shown in the Block Diagram, many of the blocks are similar to those found in traditional switching regulators including reference, regulators, oscillator, logic, current amplifier, current comparator, driver, and power switch. The novel sections include a flyback pulse sense circuit, a sample­and-hold error amplifier, and a boundary mode detector, as well as the additional logic for boundary conduction mode, discontinuous conduction mode, and low ripple Burst Mode operation.
Quasi-Resonant Boundary Mode Operation
The LT8302 features quasi-resonant boundary conduction mode operation at heavy load, where the chip turns on the primary power switch when the secondary current is zero and the SW rings to its valley. Boundary conduction mode is a variable frequency, variable peak-current switching scheme. The power switch turns on and the transformer primary current increases until an internally controlled peak current limit. After
the SW pin rises to the output voltage multiplied by
on the primary-to-secondary transformer turns ratio plus the input voltage. When the secondary current through the output diode falls to zero, the SW pin voltage collapses and rings around V this event and turns the power switch back on at its valley.
the power switch turns off, the voltage
. A boundary mode detector senses
IN
For more information www.linear.com/LT8302
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Page 10
LT8302
operaTion
Boundary conduction mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. Boundary conduc tion mode also allows the use of smaller transformers compared to continuous conduction mode and does not exhibit subharmonic oscillation.
Discontinuous Conduction Mode Operation
As the load gets lighter, boundary conduction mode in creases the peak frequency up to several MHz increases switching and gate charge losses. To avoid this scenario, the LT8302 has an additional internal oscillator, which clamps the maximum switching frequency to be less than 380kHz. Once the switching frequency hits the internal frequency clamp, the part starts to delay the switch turn-on and operates in discontinuous conduction mode.
switching frequency and decreases the switch
current at the same ratio. Running at a higher switching
-
-
Low Ripple Burst Mode Operation
Unlike traditional flyback converters, the LT8302 has to turn on and off at least for a minimum amount of time and with a minimum frequency to allow accurate sampling of the output voltage. The inherent minimum switch cur rent limit and minimum switch-off time are necessary to guarantee the correct operation of specific applications.
As the load gets very light the
switching frequency while keeping the minimum switch current limit. So the load current is able to decrease while still allowing minimum switch-off time for the sample-and­hold error amplifier. Meanwhile, the part switches between sleep mode and active mode, thereby reducing the effec tive quiescent current to improve light load efficiency. In this condition, the LT8302 runs in low ripple Burst Mode operation. The typical 12kHz minimum switching frequency determines how often the output voltage is sampled and also the minimum load requirement.
, the LT8302 starts to fold back
-
-
10
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For more information www.linear.com/LT8302
Page 11
applicaTions inForMaTion
( )
LT8302
Output Voltage
The R
and R
FB
resistors as depicted in the Block Diagram
REF
are external resistors used to program the output voltage. The LT8302 operates similar to traditional current mode switchers, except in the use of a unique flyback pulse sense circuit and a sample-and-hold error amplifier, which sample and therefore regulate the isolated output voltage from the flyback pulse.
Operation is as follows: when the power switch M1 turns off, the SW pin voltage rises above the V
supply. The
IN
amplitude of the flyback pulse, i.e., the difference between the SW pin voltage and V
V
FLBK
= (V
OUT
+ VF + I
supply, is given as:
IN
ESR) • N
SEC
PS
VF = Output diode forward voltage I
= Transformer secondary current
SEC
ESR = Total impedance of secondary circuit NPS = Transformer effective primary-to-secondary
turns ratio
The flyback voltage is then converted to a current, I by the R (M2 and M3). This current, I R
REF
resistor and the flyback pulse sense circuit
FB
, also flows through the
RFB
resistor to generate a ground-referred voltage. The
RFB
resulting voltage feeds to the inverting input of the sample­and-hold error amplifier. Since the sample-and-hold error amplifier samples the voltage when the secondary current is zero, the (I
ESR) term in the V
SEC
equation can be
FLBK
assumed to be zero. The internal reference voltage, V
, 1.00V, feeds to the
REF
noninverting input of the sample-and-hold error ampli­fier. The voltage reference voltage V V
FLBK
V
relatively high gain in the overall loop causes the
at the R
and V
REF
⎛ ⎜
V
V
FLBK
R
FB
= V
FLBK
= Internal reference voltage 1.00V
REF
pin to be nearly equal to the internal
REF
. The resulting relationship between
REF
can be expressed as:
R
REF
REF
⎛ ⎜
= V
R
R
FB
REF
REF
or
⎞ ⎟
Combination with the previous V equation for V
, in terms of the RFB and R
OUT
equation yields an
FLBK
resistors,
REF
transformer turns ratio, and diode forward voltage:
= V
OUT
REF
V
R
R
FB
REF
1
– V
N
PS
F
Output Temperature Compensation
The first term in the V ture dependence,
equation does not have tempera-
OUT
but the output diode forward voltage, VF, has a significant negative temperature coefficient (–1mV/°C to –2mV/°C). Such a negative temperature coefficient pro duces approximately 200
mV to 300mV voltage variation
on the output voltage across temperature. For higher voltage outputs, such as 12V and 24V, the
output diode temperature coefficient has a negligible ef fect on the output voltage regulation. For lower voltage outputs,
such as 3.3V and 5V, however, the output diode temperature coefficient does count for an extra 2% to 5% output voltage regulation.
,
The LT8302 junction temperature usually tracks the output diode junction temperature to the first order. To compensate the negative temperature coefficient of the output diode, a resistor, R
, connected between the TC and R
TC
generates a proportional-to-absolute-temperature (PTAT) current. The PTAT current is zero at 25°C, flows into the
pin at hot temperature, and flows out of the R
R
REF
at cold temperature. With the R
resistor in place, the
TC
output voltage equation is revised as follows:
V
OUT
= V
REF
T –TO
( )
R
FB
R
REF
R
R
FB
TC
1
N
PS
N
1
PS
– VFTO
( )
VF/ T
( )
VTC/ T
( )
T–TO
TO=Room temperature 25°°C
VF/ T
( )
= Output diode forward voltage
temperature coefficient
VTC/ T
= 3.35mV/ C
pins
REF
pin
REF
( )
-
-
For more information www.linear.com/LT8302
8302fb
11
Page 12
LT8302
( )
( )
REF
V
V
T1
( )
– V
T2
( )
T1– T2
( )
applicaTions inForMaTion
To cancel the output diode temperature coefficient, the following two equations should be satisfied:
V
OUT
VTC/ T
( )
= V
REF
R
FB
R
TC
Selecting Actual R
R
FB
R
REF
, RFB, RTC Resistor Values
REF
N
1
N
PS
1
– VFTO
PS
= – VF/ T
( )
( )
The LT8302 uses a unique sampling scheme to regulate the isolated output voltage. Due to the sampling nature, the scheme contains repeatable delays and error sources, which will affect the output voltage and force a re-evaluation of the R
and RTC resistor values. Therefore, a simple
FB
2-step sequential process is recommended for selecting resistor values.
Rearrangement of the expression for V sections yields the starting value for R
R
RFB=
V
REF
= Output voltage
OUT
NPS• V
V
OUT
+ VFTO
in the previous
OUT
:
FB
VF (TO) = Output diode forward voltage at 25°C = ~0.3V NPS = Transformer effective primary-to-secondary
turns ratio
The equation shows that the R dent of the R between the TC and R
resistor value. Any RTC resistor connected
TC
pins has no effect on the output
REF
resistor value is indepen-
FB
voltage setting at 25°C because the TC pin voltage is equal to the R
The R
regulation voltage at 25°C.
REF
resistor value should be approximately 10k
REF
because the LT8302 is trimmed and specified using this value. If the R
resistor value varies considerably from
REF
10k, additional errors will result. However, a variation in
up to 10% is acceptable. This yields a bit of freedom
R
REF
in selecting standard 1% resistor values to yield nominal R
FB/RREF
ratios.
First, build and power up the application with the starting
, RFB values (no RTC resistor yet) and other compo-
R
REF
nents connected, age, V
OUT(MEAS)
R
FB(NEW)
and measure the regulated output volt-
. The new RFB value can be adjusted to:
=
OUT
V
OUT(MEAS)
R
FB
Second, with a new RFB resistor value selected, the output diode temperature coefficient in the application can be tested to determine the R resistor, the V
should be measured over temperature
OUT
value. Still without the RTC
TC
at a desired target output load. It is very important for this evaluation that uniform temperature be applied to both the output diode and the LT8302. If freeze spray or a heat gun is used, there can be a significant mismatch in temperature between the two devices that causes sig nificant error.
Attempting to extrapolate the data from a
-
diode data sheet is another option if there is no method to apply uniform heating or cooling such as an oven. With at least two data points spreading across the operating temperature range, the output diode temperature coef
-
ficient can be determined by:
δVF/δT
( )
OUT
=
OUT
Using the measured output diode temperature coefficient, an exact R
value can be selected with the following
TC
equation:
RTC=
δV
δVF/δT
Once the R
( )
REF
tion accuracy
/δT
TC
, RFB, and RTC values are selected, the regula-
from board to board for a given application
R
FB
N
PS
will be very consistent, typically under ±5% when includ­ing device (assuming
variation of all the components in the system
resistor tolerances and transformer windings matching within ±1%). However, if the transformer or the output diode is changed, or the layout is dramatically altered, there may be some change in V
OUT
.
12
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applicaTions inForMaTion
LT8302
Output Power
A flyback converter has a complicated relationship between the input and output currents compared to a buck or a boost converter. A boost converter has a relatively constant maximum input current regardless of input voltage and a buck converter has a relatively constant maximum output current regardless of input voltage. This is due to the continuous non-switching behavior of the two currents. A flyback converter has both discontinuous input and output currents which make it similar to a nonisolated buck-boost converter. The duty cycle will affect the input and output currents, making it hard to predict output power. In ad
­dition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage.
The graphs in Figures 1 to 4 show the typical maximum output power possible for the output voltages 3.3V, 5V,
20
MAXIMUM
OUTPUT POWER
15
10
N = 6:1
N = 4:1
N = 3:1
12V, and 24V. The maximum output power curve is the calculated output power if the switch voltage is 50V dur ing the inductance
switch-off time. 15V of margin is left for leakage
voltage spike. To achieve this power level at
-
a given input, a winding ratio value must be calculated to stress the switch to
50V, resulting in some odd ratio values. The curves below the maximum output power curve are examples of common winding ratio values and the amount of output power at given input voltages.
One design example would be a 5V output converter with a minimum input voltage of 8V and a maximum input volt
­age of 32V. A three-to-one winding ratio fits this design example perfectly and outputs equal to 15.3W at 32V but lowers to 7.7W at 8V.
20
15
10
MAXIMUM
OUTPUT POWER
N = 3:2
N = 2:1
N = 1:1
OUTPUT POWER (W)
5
0
0
10
20
INPUT VOLTAGE (V)
N = 2:1
30
8302 F01
Figure 1. Output Power for 3.3V Output
20
15
10
OUTPUT POWER (W)
OUTPUT POWER
5
0
0
MAXIMUM
10
INPUT VOLTAGE (V)
N = 4:1
N = 3:1
N = 2:1
N = 1:1
20
30
8302 F02
Figure 2. Output Power for 5V Output
OUTPUT POWER (W)
5
40
0
0
10
20
INPUT VOLTAGE (V)
N = 1:2
30
40
8302 F03
Figure 3. Output Power for 12V Output
20
15
10
OUTPUT POWER (W)
40
OUTPUT POWER
5
0
0
MAXIMUM
10
INPUT VOLTAGE (V)
20
N = 1:1
N = 1:2
N = 1:3
N = 2:3
30
40
8302 F04
Figure 4. Output Power for 24V Output
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13
Page 14
LT8302
( )
( )
t
V
applicaTions inForMaTion
The equations below calculate output power: P
= ηVIN • D • I
OUT
SW(MAX)
• 0.5
η = Efficiency = ~85%
+ V
D= Duty Cycle=
I
SW(MAX)
= Maximum switch current limit = 3.6A (MIN)
V
OUT
V
+ V
( )
OUT
F
NPS+ V
F
N
PS
IN
Primary Inductance Requirement
The LT8302 obtains output voltage information from the reflected output voltage on the SW pin. The conduction of secondary current reflects the output voltage on the primary SW pin. The sample-and-hold error amplifier needs a minimum 350ns to settle and sample the reflected output voltage. In order to ensure proper sampling, the second ary winding 350ns.
needs to conduct current for a minimum of
The following equation gives the minimum value
-
for primary-side magnetizing inductance:
L
t I
PRI
OFF(MIN)
SW(MIN)
I
SW(MIN)
V
t
OFF(MIN)•NPS
= Minimum switch-off time = 350ns (TYP)
= Minimum switch current limit = 0.87A (TYP)
OUT
+ V
F
In addition to the primary inductance requirement for the minimum switch-off time, the LT8302 has minimum switch-on time that prevents the chip from turning on
the power switch shorter than approximately 160ns. This minimum switch-on time is mainly for leading-edge blank
­ing the initial switch turn-on current spike. If the inductor current exceeds the desired current limit during that time, oscillation may occur at the output as the current control loop will lose its ability to regulate. Therefore, the following equation relating to maximum input voltage must also be followed in selecting primary-side magnetizing inductance:
t
L
PRI
ON(MIN)
ON(MIN)
= Minimum switch-on time = 160ns (TYP)
I
SW(MIN)
IN(MAX)
In general, choose a transformer with its primary mag­netizing inductance
about 40% to 60% larger than the minimum values calculated above. A transformer with much larger inductance will have a bigger physical size and may cause instability at light load.
Selecting a Transformer
Transformer specification and design is perhaps the most critical part of successfully applying the LT8302. In addition to the usual list of guidelines dealing with high frequency isolated power supply transformer design, the following information should be carefully considered.
Linear Technology has worked with several leading mag netic component
manufacturers to produce pre-designed
-
flyback transformers for use with the LT8302. Table 1 shows the details of these transformers.
Table 1. Predesigned Transformers–Typical Specifications
TRANSFORMER PART NUMBER
750311625 17.75 × 13.46 × 12.70 9 0.35 4:1 43 6 Würth Elektronik 8 to 32 3.3 2.1 750311564 17.75 × 13.46 × 12.70 9 0.12 3:1 36 7 Würth Elektronik 8 to 32 5 1.5 750313441 15.24 × 13.34 x 11.43 9 0.6 2:1 75 18 Würth Elektronik 8 to 32 5 1.3 750311624 17.75 × 13.46 × 12.70 9 0.18 3:2 34 21 Würth Elektronik 8 to 32 8 0.9 750313443 15.24 × 13.34 × 11.43 9 0.3 1:1:1 85 100 Würth Elektronik 8 to 36 ±12 0.3 750313445 15.24 × 13.34 × 11.43 9 0.25 1:2 85 190 Würth Elektronik 8 to 36 24 0.3 750313457 15.24 × 13.34 × 11.43 9 0.25 1:4 85 770 Würth Elektronik 8 to 36 48 0.15 750313460 15.24 × 13.34 × 11.43 12 0.7 4:1 85 11 Würth Elektronik 4 to 18 5 0.9 750311342 15.24 × 13.34 × 11.43 15 0.44 2:1 85 22 Würth Elektronik 4 to 18 12 0.4 750313439 15.24 × 13.34 × 11.43 12 0.6 2:1 115 28 Würth Elektronik 18 to 42 3.3 2.1 750313442 15.24 × 13.34 × 11.43 12 0.75 3:2 150 53 Würth Elektronik 18 to 42 5 1.6
14
DIMENSIONS
(W × L × H) (mm)
L (µH)
L
PRI
LKG
(µH) N
For more information www.linear.com/LT8302
P:NS
R
PRI
(mΩ)
R
SEC
(mΩ) VENDOR
TARGET APPLICATION
V
(V) V
IN
OUT
(V) I
OUT
(A)
8302fb
Page 15
applicaTions inForMaTion
65V – V
– V
OUT
F
LT8302
Turns Ratio
Note that when choosing an R
FB/RREF
resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. In contrast, the use of simple ratios of small integers, e.g., 3:1, 2:1, 1:1, etc., provides more freedom in settling total turns and mutual inductance.
Typically, choose the transformer turns ratio to maximize available output power. For low output voltages (3.3V or 5V), a N:1 turns ratio can be used with multiple pri
­mary windings relative to the secondary to maximize the transformer’s current gain (and output power). However, remember that the SW pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. In addition, leakage inductance will cause a voltage spike (V
LEAKAGE
) on top of this reflected voltage. This total quantity needs to remain below the 65V absolute maximum rating of the SW pin to prevent breakdown of the internal power switch. Together these conditions place an upper limit on the turns ratio,
, for a given application. Choose a turns ratio low
N
PS
enough to ensure
NPS<
IN(MAX)
V
LEAKAGE
+ V
For larger N:1 values, choose a transformer with a larger physical size to deliver additional current. In addition, choose a large enough inductance value to ensure that the switch-off time is long enough to accurately sample the output voltage.
For lower output power levels, choose a 1:1 or 1:N trans
­former for the absolute smallest transformer size. A 1:N transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power. A higher 1:N turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch.
The turns ratio is an important element in the isolated feedback scheme, and directly affects the output voltage accuracy. Make sure the transformer manufacturer speci
-
fies turns ratio accuracy within ±1%.
Saturation
The
current in the transformer windings should not exceed
Current
its rated saturation current. Energy injected once the core is saturated will not be transferred to the secondary and will instead be dissipated in the core. When designing custom transformers to be used with the LT8302, the saturation current should always be specified by the transformer manufacturers.
Winding Resistance
Resistance in either the primary or secondary windings will reduce
overall power
efficiency. Good output voltage regulation will be maintained independent of winding re­sistance due
to the boundary/discontinuous conduction
mode operation of the LT8302.
Leakage Inductance and Snubbers
T
ransformer leakage inductance on either the primary or secondary causes a voltage spike to appear on the primary after the power switch turns off. This spike is increasingly prominent at higher load currents where more stored en
­ergy must be dissipated. It is very important to minimize transformer leakage inductance.
designing an application, adequate margin should
When be kept for the worst-case leakage voltage spikes even
IN
-
under overload conditions. In most cases shown in Fig ure5, the
reflected output voltage on the primary plus V should be kept below 50V. This leaves at least 15V margin for the leakage spike across line and load conditions. A larger voltage margin will be required for poorly wound transformers or for excessive leakage inductance.
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Page 16
LT8302
C
1
applicaTions inForMaTion
<65V
V
t
OFF
> 350ns
TIME
LEAKAGE
8302 F05
<50V
V
SW
tSP < 250ns
then add capacitance until the period of the ringing is 1.5 to 2 times longer. The change in period determines the value of the parasitic capacitance, from which the para
­sitic inductance can be also determined from the initial period. Once the value of the SW node capacitance and inductance is known, a series resistor can be added to the snubber capacitance to dissipate power and critically damp the ringing. The equation for deriving the optimal series resistance using the observed periods ( t t
PERIOD(SNUBBED)
) and snubber capacitance (C
SNUBBER
PERIOD
and
) is:
Figure 5. Maximum Voltages for SW Pin Flyback Waveform
In addition to the voltage spikes, the leakage inductance also causes the SW pin ringing for a while after the power switch turns off. To prevent the voltage ringing falsely trig
­ger boundary mode detector, the LT8302 internally blanks the boundary mode detector for approximately 250ns. Any remaining voltage ringing after 250ns may turn the power switch back on again before the secondary current falls to zero. In this case, the LT8302 enters continuous conduction mode. So the leakage inductance spike ringing should be limited to less than 250ns.
To clamp and damp the leakage voltage spikes, a (RC + DZ) snubber
circuit in Figure6 is recommended. The RC (resistor-capacitor) snubber quickly damps the voltage spike ringing and provides great load regulation and EMI performance. And the DZ (diode-Zener) ensures well defined and consistent clamping voltage to protect SW pin from exceeding its 65V absolute maximum rating.
L
CZ
R
D
Figure 6. (RC + DZ) Snubber Circuit
8302 F06
The recommended approach for designing an RC snub­ber is to measure the period of the ringing on the SW pin
the power switch turns off without the snubber and
when
SNUBBER
PERIOD(SNUBBED)
t
PERIOD
2
2
4π
L
PAR
=
C
PAR
2
C
PAR
L
PAR
R
SNUBBER
=
=
t
⎛ ⎜
t
PERIOD
C
PAR
Note that energy absorbed by the RC snubber will be converted to heat and will not be delivered to the load. In high voltage or high current applications, the snubber needs to be sized for thermal dissipation. A 470pF capaci tor in series with a 39Ω resistor is a good starting point.
the DZ snubber, proper care should be taken when
For choosing both the diode and the Zener diode. Schottky diodes are typically the best choice, but some PN diodes can be used if they turn on fast enough to limit the leak age inductance
spike. Choose a diode that has a reverse­voltage rating higher than the maximum SW pin voltage. The Zener diode breakdown voltage should be chosen to balance power loss and switch voltage protection. The best compromise is to choose the largest voltage breakdown with 5V margin. Use the following equation to make the proper choice:
V
ZENNER(MAX)
≤ 60V – V
IN(MAX)
For an application with a maximum input voltage of 32V, choose a 24V Zener diode, the V
ZENER(MAX)
of which is around 26V and below the 28V maximum. The power loss in the DZ snubber determines the power rating of the Zener diode. A 1.5W Zener diode is typically recommended.
-
-
16
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applicaTions inForMaTion
( )
1
R2
L
I
f
LT8302
Undervoltage Lockout (UVLO)
A resistive divider from V
to the EN/UVLO pin imple-
IN
ments undervoltage lockout (UVLO). The EN/UVLO enable
threshold is set at 1.214V with 14mV hysteresis. In
falling addition, the EN/UVLO pin sinks 2.5µA when the voltage on the pin is below 1.214V. This current provides user programmable hysteresis based on the value of R1. The programmable UVLO thresholds are:
V
V
IN(UVLO+)
IN(UVLO–)
1.228V R1+R2
=
R2
1.214V R1+R2
=
( )
+ 2.5µA R
Figure 7 shows the implementation of external shutdown control while still using the UVLO function. The NMOS grounds the EN/UVLO pin when turned on, and puts the LT8302 in shutdown with quiescent current less than 2µA.
V
IN
R1
EN/UVLO
LT8302
GND
Figure 7. Undervoltage Lockout (UVLO)
R2
RUN/STOP CONTROL (OPTIONAL)
8302 F07
Minimum Load Requirement
The LT8302 samples the isolated output voltage from the primary-side flyback pulse waveform. The flyback pulse occurs once the primary switch turns off and the secondary winding conducts current. In order to sample the output voltage, the LT8302 has to turn on and off for a minimum amount of time and with a minimum frequency. The LT8302 delivers a minimum amount of energy even
during light load conditions to ensure accurate output volt
.
age information
The minimum energy delivery creates a
-
minimum load requirement, which can be approximately estimated as:
I
LOAD(MIN)
L
PRI
I
SW(MIN)
f
MIN
P2RI
=
SW(MIN)
2V
= Transformer primary inductance
= Minimum switch current limit = 0.96A (MAX)
= Minimum switching frequency = 12.7kHz (MAX)
MIN
OUT
The LT8302 typically needs less than 0.5% of its full output power as minimum load. Alternatively, a Zener diode with its breakdown of 10% higher than the output voltage can serve as a minimum load if pre-loading is not acceptable. For a 5V output, use a 5.6V Zener with cathode connected to the output.
Output Short Protection
When the output is heavily overloaded or shorted to ground, the reflected SW pin waveform rings longer than the in ternal blanking
time. After the 350ns minimum switch-off
-
time, the excessive ringing falsely triggers the boundary mode detector and turns the power switch back on again before the secondary current falls to zero. Under this condition, the LT8302 runs into continuous conduction mode at 380kHz maximum switching frequency. If the sampled R
voltage is still less than 0.6V after 11ms
REF
(typ) soft-start timer, the LT8302 initiates a new soft-start cycle. If the sampled R
voltage is larger than 0.6V after
REF
11ms, the switch current may run away and exceed the
4.5A maximum current limit. Once the
switch current
hits
7.2A over current limit, the LT8302 also initiates a new soft-start cycle. Under either condition, the new soft-start cycle throttles back both the switch current limit and switch frequency. The output short-circuit protection prevents the switch current from running away and limits the average output diode current.
For more information www.linear.com/LT8302
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17
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LT8302
65V – V
– V
65V – 32V –15V
5V + 0.3V
( )
( )
0.87A
1
1
IN
applicaTions inForMaTion
Design Example
Use the following design example as a guide to designing applications for the LT8302. The design example involves designing a 5V output with a 1.5A load current and an input range from 8V to 32V.
V
IN(MIN)
V
OUT
= 8V, V
= 5V, I
OUT
IN(NOM)
= 1.5A
= 12V, V
IN(MAX)
= 32V,
Step 1: Select the transformer turns ratio.
NPS<
V
LEAKAGE
= Output diode forward voltage = ~0.3V
V
F
IN(MAX)
V
OUT
= Margin for transformer leakage spike = 15V
+ V
LEAKAGE
F
Example:
NPS<
= 3.4
The choice of transformer turns ratio is critical in determin­ing output current
capability of the converter. Table2 shows the switch voltage stress and output current capability at different transformer turns ratio.
Table 2. Switch Voltage Stress and Output Current Capability vs Turns Ratio
SW(MAX) IN(MAX)
at
(V)
I
OUT(MAX)
V
V
NPS
1:1 37.3 0.92 14-40 2:1 42.6 1.31 25-57 3:1 47.9 1.53 33-67
V
at
(A) DUTY CYCLE (%)
IN(MIN)
Clearly, only NPS = 3 can meet the 1.5A output current requirement, so N
= 3 is chosen as the turns ratio in
PS
this example.
Step 2: Determine the primary inductance.
Primary inductance for the transformer must be set above a minimum value to satisfy the minimum switch-off and switch-on time requirements:
L
L
t t I
PRI
PRI
OFF(MIN) ON(MIN) SW(MIN)
t
OFF(MIN)
t
ON(MIN)
I
SW(MIN)
= 350ns
= 160ns
= 0.87A
NPS• V
I
SW(MIN)
V
IN(MAX)
OUT
+ V
F
Example:
L
L
350ns 3 5V + 0.3V
PRI
PRI
160ns 32V
0.87A
= 6.4µH
= 5.9µH
Most transformers specify primary inductance with a toler­ance of ±20%.
With other component tolerance considered, choose a transformer with its primary inductance 40% to 60% larger than the minimum values calculated above.
= 9µH is then chosen in this example.
L
PRI
Once the primary inductance has been determined, the maximum load switching frequency can be calculated as:
fSW=
ISW=
tON+ t
V
OUT
η V
I
OFF
OUT
D
=
2
L
I
PRI
SW
V
IN
+
NPS• V
L
I
PRI
SW
+ V
( )
OUT
F
18
8302fb
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applicaTions inForMaTion
5V + 0.3V
( )
3
V
PS
32V
3
L
I
2
2
2 5V 0.1V
LT8302
Example:
D =
5V + 0.3V
( )
=
I
SW
fSW= 277kHz
3 + 12V
5V 1.5A 2
0.8 12V 0.57
= 0.57
The transformer also needs to be rated for the correct saturation current level across line and load conditions. A saturation current rating larger than 7A is necessary to work with the LT8302. The 750311564 from Würth is chosen as the flyback transformer.
Step 3: Choose the output diode.
Tw o main criteria for choosing the output diode include forward current rating and reverse-voltage rating. The maximum load requirement is a good first-order guess at the average current requirement for the output diode. Under output short-circuit condition, the output diode needs to conduct much higher current. Therefore, a con servative metric
is 60% of the maximum switch current
limit multiplied by the turns ratio: I
DIODE(MAX)
= 0.6 • I
SW(MAX)
N
PS
Example: I
DIODE(MAX)
= 8.1A
Next calculate reverse voltage requirement using maxi­mum V
IN
V
REVERSE
:
= V
OUT
+
IN(MAX)
N
Example:
V
REVERSE
= 5V +
= 15.7V
The PDS835L (8A, 35V diode) from Diodes Inc. is chosen.
Step 4: Choose the output capacitor.
The output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. Use the following equation
to calculate the output capacitance:
PRI
OUT
SW
ΔV
OUT
C
=
OUT
2 V
Example: Design for output voltage ripple less than ±1% of V
i.e., 100mV.
9µH 4.5A
C
OUT
=
( )
= 182µF
Remember ceramic capacitors lose capacitance with ap­plied voltage. The capacitance can drop to 40% of quoted capacitance
at the maximum voltage rating. So a 220µF,
6.3V rating ceramic capacitor is chosen.
Step 5: Design snubber circuit.
The snubber circuit protects the power switch from leak age inductance
voltage spike. A (RC + DZ) snubber is
recommended for this application. A 470pF capacitor in
-
series with a 39Ω resistor is chosen as the RC snubber. The maximum Zener breakdown voltage is set according
to the maximum V V
ZENNER(MAX)
:
IN
≤ 60V – V
IN(MAX)
Example: V
ZENNER(MAX)
≤ 60V – 32V = 28V
A 24V Zener with a maximum of 26V will provide optimal protection and minimize power loss. So a 24V, 1.5W Zener from Central Semiconductor (CMZ5934B) is chosen.
Choose a diode that is fast and has sufficient reverse voltage breakdown:
V V
REVERSE
SW(MAX)
> V
= V
SW(MAX)
IN(MAX)
+ V
ZENNER(MAX)
Example: V
REVERSE
> 60V
A 100V, 1A diode from Diodes Inc. (DFLS1100) is chosen.
OUT
,
-
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8302fb
19
Page 20
LT8302
( )
( )
REF
10k 3 5V + 0.3V
( )
1.00V
V
5V
5.14V
V
T1
( )
– V
T2
( )
5.189V – 5.041V
1.228V R1+ R2
( )
R2
1
2 5V
applicaTions inForMaTion
Step 6: Select the R
Use the following equation to calculate the starting values
REF
RFB=
R
RFB=
R
FB(NEW)
RFB=
and RFB:
R
NPS• V
REF
= 10k
FB
measure the regulated output voltage. Adjust
=
V
OUT(MEASURED)
158k = 154k
for R
Example:
For 1% standard values, a 158k resistor is chosen.
Step 7: Adjust R
Build and power up the application with application com­ponents and RFB resistor based on the measured output voltage:
Example:
Step 8: Select RTC resistor based on output voltage temperature variation.
Measure output voltage in a controlled temperature envi ronment like an oven to determine the output temperature coefficient. Measure output voltage at a consistent load current and input voltage, across the operating tempera ture range.
and RFB resistors.
REF
+ VFTO
OUT
V
REF
= 159k
resistor based on output voltage.
OUT
R
FB
-
-
Example:
δVF/δT
( )
R
=
TC
Step 9: Select the EN/UVLO resistors.
Determine the amount of hysteresis required and calculate R1 resistor value:
V
IN(HYS)
Example: Choose 2V of hysteresis, R1 = 806k Determine the UVLO thresholds and calculate R2 resistor
value:
V
IN(UVLO+)
Example: Set V R2 = 232k
V V
Step 10: Ensure minimum load.
The theoretical minimum load can be approximately estimated as:
UVLO rising threshold to 7.5V:
IN
IN(UVLO+) IN(UNLO–)
I
LOAD(MIN)
=
100°C – 0°C
3.35mV/°C
1.48mV/°C
= 2.5µAR1
=
= 7.5V = 5.5V
9µH 0.96A
=
( )
154
3
( )
= 1.48mV / °C
= 115k
+ 2.5µA R
2
12.7kHz =10.5mA
Calculate the temperature coefficient of V
δVF/δT
( )
RTC=
3.35mV/°C
δV
20
OUT
=
/δT
( )
F
T1– T2
R
FB
N
PS
OUT
⎞ ⎟
:
F
For more information www.linear.com/LT8302
Remember to check the minimum load requirement in real application. The minimum load occurs at the point where the output voltage begins to climb up as the con verter delivers more energy than what is consumed at the output. The real minimum load for this application is about 10mA. In this example, a 500Ω resistor is selected as the minimum load.
-
8302fb
Page 21
Typical applicaTions
8302 TA02c
LT8302
V
8V TO 32V
8V to 32VIN/12V
IN
C1 10µF
R1 806k
R2 232k
C2 1µF
EN/UVLO
LT8302
GND
INTV
CC
V
IN
SW
R
R
REF
Isolated Flyback Converter
OUT
C3
Z1
470pF
9µH
R3
D1
39Ω
R4
R6 OPEN
121k
R5 10k
8302 TA02a
FB
TC
D2 T1 1:1
9µH
D1: DIODES DFLS1100 D2: DIODES PDS540 T1: WURTH 750313443 Z1: CENTRAL CMZ5934B
C4 47µF
+
V
OUT
12V 5mA TO 0.8A (V 5mA TO 1.1A (V
V
OUT
Efficiency vs Load Current Load and Line Regulation
95
90
85
80
12.4
12.2
12.0
11.8
= 12V)
IN
= 24V)
IN
V
8V TO 32V
10µF
IN
C1
EFFICIENCY (%)
75
70
65
0
200 400 600 800 1000
R1 806k
R2 232k
C2 1µF
LOAD CURRENT (mA)
8V to 32VIN/3.3V
V
IN
LT8302
CC
SW
R
FB
R
REF
TC
EN/UVLO
GND
INTV
VIN = 12V
= 24V
V
IN
1200
8302 TA02b
Isolated Flyback Converter
OUT
D2
T1
4:1
C3
Z1
R6 105k
470pF
R3
D1
39Ω
R4 140k
R5 10k
8302 TA03
9µH
0.56µH
D1: DIODES DFLS1100 D2: DIODES PDS1040L T1: WURTH 750311625 Z1: CENTRAL CMZ5934B
+
V
OUT
3.3V 20mA TO 2.7A (V 20mA TO 3.8A (V
C4 470µF
V
OUT
11.6
OUTPUT VOLTAGE (V)
11.4
11.2 0
200 400 600 800 1000 1200
LOAD CURRENT (mA)
= 12V)
IN
= 24V)
IN
OUTPUT VOLTAGE (V)
VIN = 12V
= 24V
V
IN
Output Temperature Variation
3.50 VIN = 12V
= 1A
I
OUT
3.45
3.40
3.35
RTC = 105k
3.30
3.25
3.20
3.15
3.10
–50
RTC = OPEN
–25
0
AMBIENT TEMPERATURE (°C)
50
25
75
100
125
8302 TA03b
150
For more information www.linear.com/LT8302
8302fb
21
Page 22
LT8302
Typical applicaTions
8V TO 36V
V
8V TO 36V
8V to 36VIN/±12V
V
IN
C1 10µF
R1 806k
R2 232k
C2 1µF
EN/UVLO
LT8302
GND
INTV
CC
V
IN
SW
R
FB
R
REF
TC
8V to 36VIN/24V
IN
C1 10µF
R1 806k
R2 232k
C2 1µF
EN/UVLO
LT8302
GND
INTV
CC
V
IN
SW
R
FB
R
REF
TC
Isolated Flyback Converter
OUT
T1
1:1:1
C3
Z1
470pF
R3
D1
39Ω
R4 121k
9µH
9µH
R5
R6
10k
OPEN
8302 TA04
Isolated Flyback Converter
OUT
C3
Z1
470pF
9µH
R3
D1
39Ω
R4 121k
R5
R6
10k
OPEN
8302 TA05
9µH
D1: DIODES DFLS1100 D2, D3: DIODES PDS360 T1: WURTH 750313443 Z1: CENTRAL CMZ5934B
D2
T1
1:2
36µH
D1: DIODES DFLS1100 D2: DIODES SBR2U150SA T1: WURTH 750313445 Z1: CENTRAL CMZ5934B
+
D2
D3
V
OUT1
12V 5mA TO 0.4A (V 5mA TO 0.55A (V
C4 22µF
V
OUT2
V
OUT2
12V 5mA TO 0.4A (V 5mA TO 0.55A (V
C5 22µF
V
OUT2
+
V
OUT
24V
2.5mA TO 0.4A (V
2.5mA TO 0.55A (V
C4 10µF
V
OUT
= 12V)
IN
= 24V)
IN
– +
= 12V)
IN
= 24V)
IN
= 12V)
IN
= 24V)
IN
V
IN
8V TO 36V
R1
C1
806k
10µF
R2 232k
C2 1µF
22
8V to 36VIN/48V
V
IN
EN/UVLO
GND
INTV
LT8302
CC
SW
R
FB
R
REF
TC
Isolated Flyback Converter
OUT
C3
Z1
470pF
9µH
R3
D1
39Ω
R4 121k
R5
R6
10k
OPEN
8302 TA06
For more information www.linear.com/LT8302
D2
T1
1:4
144µH
D1: DIODES DFLS1100 D2: DIODES SBR1U200P1 T1: WURTH 750313457 Z1: CENTRAL CMZ5934B
V 48V
1.2mA TO 0.2A (V
1.2mA TO 0.27A (V
C4
2.2µF
V
OUT
OUT
+
= 12V)
IN
= 24V)
IN
8302fb
Page 23
Typical applicaTions
8302 TA07b
LT8302
V
8V TO 32V
–4V TO –42V
8V to 32VIN/5V
IN
C1 10µF
R1 806k
R2 232k
C2 1µF
EN/UVLO
LT8302
GND
INTV
CC
V
–4V to –42VIN/12V
C1 10µF
C2
V
IN
1µF
Isolated Flyback Converter with LT8309
OUT
T1
3:1
C3
Z1
IN
SW
R
FB
R
REF
R6 OPEN
TC
D1: DIODES DFLS1100 D2: CENTRAL CMMSH1-60 M1: INFINEON BSC059N04LS T1: WURTH 750311564 Z1: CENTRAL CMZ5934B
OUT
L1
12µH
V
EN/UVLO
INTV
IN
LT8302
CC
GND
SW
R
470pF
R3
D1
39Ω
R4 154k
R5 10k
Buck-Boost Converter
R4 118k
R
FB
REF
R5 10k
8302 TA08a
9µH
1µH
M1
D1
Z1
D1: DIODES PMEG6030EP L1: WÜRTH 744770112 Z1: CENTRAL CMHZ5243B
R8
2.1k
D2
C3 47µF
R7 5Ω
V
CC
DRAIN
LT8309
GATE INTV
CC
GND
V
OUT
12V/0.45A (VIN = –5V) 12V/0.8A (V 12V/1.1A (V 12V/1.3A (V
= –12V)
IN
= –24V)
IN
= –42V)
IN
C4 10µF
C5
4.7µF
+
V
OUT
5V/1.1A (VIN = 5V) 5V/2.0A (V 5V/2.9A (V
C4 220µF
V
OUT
8302 TA07
Efficiency vs Load Current
= 12V)
IN
= 24V)
IN
95
90
85
80
EFFICIENCY (%)
75
70
65
0
0.5 1.0
Efficiency vs Load Current
95
90
85
80
EFFICIENCY (%)
75
70
65
0
200 400 800600 1000 1200 1400
LOAD CURRENT (mA)
2.0 3.0
1.5 2.5
LOAD CURRENT (A)
VIN = –5V
= –12V
V
IN
= –24V
V
IN
= –42V
V
IN
8302 TA08b
–18V to –42VIN/–12V
R1 806k
C1
R2
10µF
232k
C2
V
–18V TO –42V
IN
1µF
Negative Buck Converter
OUT
V
IN
EN/UVLO
EN/UVLO INTV
LT8302
CC
SW
R
R
REF
C3 47µF
D1
R4 118k
FB
R5 10k
8302 TA09a
Z1
V
OUT
–12V
L1 12µH
D1: DIODES PMEG6030EP L1: WÜRTH 744770112 Z1: CENTRAL CMHZ5243B
1.8A
For more information www.linear.com/LT8302
Efficiency vs Load Current
100
95
90
85
EFFICIENCY (%)
80
75
70
0
500 1000 1500 2000
LOAD CURRENT (mA)
VIN = –18V
= –24V
V
IN
= –42V
V
IN
8302 TA09b
8302fb
23
Page 24
LT8302
S8E Package
package DescripTion
Please refer to http://www.linear.com/product/LT8302#packaging for the most recent package drawings.
8-Lead Plastic SOIC (Narrow .150 Inch) Exposed Pad
(Reference LTC DWG # 05-08-1857 Rev C)
.189 – .197
.050
(1.27)
BSC
.045 ±.005
(1.143 ±0.127)
(4.801 – 5.004)
8
NOTE 3
.005 (0.13) MAX
7
6
5
.245
(6.22)
MIN
.030 ±.005
(0.76 ±0.127)
TYP
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010" (0.254mm)
4. STANDARD LEAD STANDOFF IS 4mils TO 10mils (DATE CODE BEFORE 542)
5. LOWER LEAD STANDOFF IS 0mils TO 5mils (DATE CODE AFTER 542)
.118
(2.99)
REF
× 45°
.016 – .050
(0.406 – 1.270)
INCHES
(MILLIMETERS)
.089
(2.26)
REF
0°– 8° TYP
.160 ±.005
(4.06 ±0.127)
(5.791 – 6.197)
.228 – .244
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
1
(2.997 – 3.550)
2
.118 – .139
4
.150 – .157
(3.810 – 3.988)
NOTE 3
5
0.0 – 0.005
(0.0 – 0.130)
.080 – .099
(2.032 – 2.530)
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
S8E 1015 REV C
24
8302fb
For more information www.linear.com/LT8302
Page 25
LT8302
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 11/14 Modified I
Modified L Modified Schematic Updated Related Parts
B 11/15 Revised Package Drawing 24
and I
Q
PRI
Conditions
HYS
Equation
3 14 23 26
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
For more information www.linear.com/LT8302
8302fb
25
Page 26
LT8302
Typical applicaTion
V
4V TO 42V
4V to 42VIN/48V
L1
V
IN
EN/UVLO
LT8302
INTV
CC
22µH
GND
SW
R
R
REF
FB
IN
C1 10µF
C2 1µF
Boost Converter
OUT
D1
R3
R4 464k
R5 10k
Z1
1M
8302 TA10a
V
OUT
48V/1.4A (VIN = 42V) 48V/0.8A (V 48V/0.4A (V 48V/0.15A (V
C3 10µF
D1: DIODES PDS560 L1: WÜRTH 7443551221 Z1: CENTRAL CMHZ5262B
= 24V)
IN
= 12V)
IN
IN
= 5V)
Efficiency vs Load Current
100
95
90
85
EFFICIENCY (%)
80
VIN = 5V
= 12V
V
75
70
0
250 500
LOAD CURRENT (mA)
V V
IN IN IN
= 24V = 42V
1500750 1000 1250
8302 TA10b
relaTeD parTs
PART NUMBER DESCRIPTION COMMENTS
LT8301 42V
LT8300 100V
LT8309 Secondary-Side Synchronous Rectifier Driver 4.5V ≤ V LT3573/LT3574
LT3575 LT3511/LT3512 100V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 240mA/420mA
LT3748 100V Isolated Flyback Controller 5V ≤ V LT3798 Off-Line Isolated No-Opto Flyback Controller with Active PFC V LT3757A/LT3759
LT3758 LT3957/LT3958 40V/80V Boost/Flyback Converters Monolithic with Integrated 5A/3.3A Switch
Linear Technology Corporation
26
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
Micropower Isolated Flyback Converter with 65V/1.2A
IN
Switch
Micropower Isolated Flyback Converter with
IN
150V/260mA Switch
40V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 1.25A/0.65A/2.5A
40V/100V Flyback/Boost Controllers Universal Controllers with Small Package and Powerful Gate Drive
For more information www.linear.com/LT8302
www.linear.com/LT8302
Low IQ Monolithic No-Opto Flyback 5-Lead TSOT-23
Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23
≤ 40V, Fast Turn-On and Turn-Off, 5-Lead TSOT-23
CC
Switch
Switch, MSOP-16(12)
≤ 100V, No-Opto Flyback, MSOP-16(12)
IN
and V
IN
Limited Only by External Components
OUT
LT 1115 REV B • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2013
8302fb
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