LINEAR TECHNOLOGY LT6230, LT6230-10, LT6231, LT6232 Technical data

FEATURES

LT6230/LT6230-10/

LT6230/LT6230-10/

LT6231/LT6232

LT6231/LT6232

215MHz, Rail-to-Rail Output,

1.1nV/√Hz, 3.5mA Op Amp Family

U

DESCRIPTIO

■

Low Noise Voltage: 1.1nV/√Hz

■

Low Supply Current: 3.5mA/Amp Max

■

Low Offset Voltage: 350µV Max

■

Gain Bandwidth Product:
LT6230: 215MHz; AV ≥ 1
LT6230-10: 1450MHz; AV ≥ 10

■

Wide Supply Range: 3V to 12.6V

■

Output Swings Rail-to-Rail

■

Common Mode Rejection Ratio 115dB Typ

■

Output Current: 30mA

■

Operating Temperature Range –40°C to 85°C

■

LT6230 Shutdown to 10µA Maximum

■

LT6230/LT6230-10 in SOT-23 Package

■

Dual LT6231 in 8-Pin SO and Tiny DFN Packages

■

LT6232 in 16-Pin SSOP Package

U

APPLICATIO S

■

Ultrasound Amplifiers

■

Low Noise, Low Power Signal Processing

■

Active Filters

■

Driving A/D Converters

■

Rail-to-Rail Buffer Amplifiers

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LT®6230/LT6231/LT6232 are single/dual/quad low
noise, rail-to-rail output unity gain stable op amps that
feature 1.1nV/√Hz noise voltage and draw only 3.5mA of
supply current per amplifier. These amplifiers combine
very low noise and supply current with a 215MHz gain
bandwidth product, a 70V/µs slew rate and are optimized
for low supply voltage signal conditioning systems. The
LT6230-10 is a single amplifier optimized for higher gain
applications resulting in higher gain bandwidth and slew
rate. The LT6230 and LT6230-10 include an enable pin
that can be used to reduce the supply current to less than
10µA.

The amplifier family has an output that swings within
50mV of either supply rail to maximize the signal dynamic
range in low supply applications and is specified on 3.3V,
5V and ±5V supplies. The en • √I

SUPPLY

product of 1.9 per

amplifier is among the most noise efficient of any op amp.
The LT6230/LT6230-10 is available in the 6-lead SOT-23

package and the LT6231 dual is available in the 8-pin SO
package with standard pinouts. For compact layouts, the
dual is also available in a tiny dual fine pitch leadless
package (DFN). The LT6232 is available in the 16-pin
SSOP package.

TYPICAL APPLICATIO

Low Noise Low Power Instrumentation Amplifier

+

V

S

IN

IN

+

–

+

1/2 LT6231

–

R1
10Ω

–

1/2 LT6231

+

R2

196Ω

R3

196Ω

–

V

S

R4

499Ω

R5

499Ω

AV = 40
BW = 5.1MHz

= ±1.5V to ±5V

V

S

U

R6

499Ω

+

V

S

+

LT6202

–

–

V

S

499Ω

= 10mA

I

S

= 5.8µV

E

N

MEASUREMENT BW = 8MHz

V

OUT

R7

INPUT REFERRED,

RMS

623012 TA01a

Noise Voltage and Unbalanced

Noise Current vs Frequency

6

5

4

3

2

NOISE VOLTAGE (nV/√Hz)

1

0

10 1k 10k 100k

100

FREQUENCY (Hz)

VS = ±2.5V
T

A

V

CM

NOISE CURRENT

NOISE VOLTAGE

= 25°C

= 0V

623012 TA01b

6

UNBALANCED NOISE CURRENT (pA/√Hz)

5

4

3

2

1

0

sn623012 623012fas

1

LT6230/LT6230-10/

TOP VIEW

GN PACKAGE

16-LEAD NARROW PLASTIC SSOP

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

OUT A

–IN A
+IN A

V

+

+IN B
–IN B

OUT B

NC

OUT D
–IN D
+IN D
V

–

+IN C
–IN C
OUT C
NC

+

–

+

–

+
–

+
–

A

D

BC

LT6231/LT6232

WW

W

ABSOLUTE AXI U RATI GS

U

(Note 1)

Total Supply Voltage (V+ to V–) ............................ 12.6V

Input Current (Note 2) ........................................ ±40mA

Output Short-Circuit Duration (Note 3)............ Indefinite

Operating Temperature Range (Note 4) ...–40°C to 85°C

Specified Temperature Range (Note 5)....–40°C to 85°C

UUW

PACKAGE/ORDER I FOR ATIO

ORDER PART

NUMBER

TOP VIEW

OUT 1

–

V

2

+IN 3

S6 PACKAGE

6-LEAD PLASTIC TSOT-23

T

= 150°C, θJA = 250°C/W

JMAX

+

6 V
5 ENABLE
4 –IN

LT6230CS6
LT6230IS6
LT6230CS6-10
LT6230IS6-10

S6 PART

MARKING*

LTAFJ
LTAFK

Junction Temperature...........................................150°C

Junction Temperature (DD Package) ................... 125°C

Storage Temperature Range ..................–65°C to 150°C

Storage Temperature Range

(DD Package) ...................................... – 65°C to 125°C

Lead Temperature (Soldering, 10 sec)..................300°C

ORDER PART

TOP VIEW

V

1OUT A

–IN A

2

–

+IN A

8-LEAD (3mm × 3mm) PLASTIC DFN

UNDERSIDE METAL CONNECTED TO V

+

3

–

V

4

DD PACKAGE

T

= 125°C, θJA = 160°C/W

JMAX

(PCB CONNECTION OPTIONAL)

8

OUT B

7

–IN B

6

–
+

+IN B

5

+

–

NUMBER

LT6231CDD
LT6231IDD

DD PART

MARKING*

LAEU

OUT A

–IN A
+IN A

*The temperature grade is identified by a label on the shipping container.Consult LTC Marketing for parts specified with wider operating temperature ranges.

2

1

2

–
+

3

–

V

4

S8 PACKAGE

8-LEAD PLASTIC SO

T

= 150°C, θJA = 200°C/W

JMAX

TOP VIEW

ORDER PART

NUMBER

+

V

8

OUT B

7

–IN B

6

–
+

+IN B

5

LT6231CS8
LT6231IS8

S8 PART

MARKING

6231
6231I

T

= 150°C, θJA = 135°C/W

JMAX

ORDER PART

NUMBER

LT6232CGN
LT6232IGN

GN PART

MARKING

6232
6232I

sn623012 623012fas

LT6230/LT6230-10/

LT6231/LT6232

ELECTRICAL CHARACTERISTICS

TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

= half supply,

OUT

ENABLE = 0V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

I

B

I

OS

e

n

i

n

C

IN

A

VOL

V

CM

CMRR Common Mode Rejection Ratio VS = 5V, V

PSRR Power Supply Rejection Ratio VS = 3V to 10V 90 115 dB

V

OL

V

OH

I

SC

I

S

Input Offset Voltage LT6230S6, LT6230S6-10 100 500 µV

LT6231S8, LT6232GN 50 350 µV
LT6231DD 75 450 µV

Input Offset Voltage Match 100 600 µV
(Channel-to-Channel) (Note 6)

Input Bias Current 510 µA
IB Match (Channel-to-Channel) (Note 6) 0.1 0.9 µA
Input Offset Current 0.1 0.6 µA
Input Noise Voltage 0.1Hz to 10Hz 180 nV

P-P

Input Noise Voltage Density f = 10kHz, VS = 5V 1.1 1.7 nV/√Hz
Input Noise Current Density, Balanced Source f = 10kHz, VS = 5V, RS = 10k 1 pA/√Hz

Unbalanced Source f = 10kHz, V

= 5V, RS = 10k 2.4 pA/√Hz

S

Input Resistance Common Mode 6.5 MΩ

Differential Mode 7.5 kΩ

Input Capacitance Common Mode 2.9 pF

Differential Mode 7.7 pF

Large-Signal Gain VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 105 200 V/mV

= 1k to VS/2 21 40 V/mV

R

V

= 1V to 4V, RL = 100Ω to VS/2 5.4 9 V/mV

O

L

VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 90 175 V/mV

= 1k to VS/2 16.5 32 V/mV

R

L

Input Voltage Range Guaranteed by CMRR, VS = 5V, 0V 1.5 4 V

= 3.3V, 0V 1.15 2.65 V

V

S

= 1.5V to 4V 90 115 dB

= 3.3V, V

S

CM

= 1.15V to 2.65V 90 115 dB

CM

V

CMRR Match (Channel-to-Channel) (Note 6) VS = 5V, VCM = 1.5V to 4V 84 120 dB

PSRR Match (Channel-to-Channel) (Note 6) VS = 3V to 10V 84 115 dB
Minimum Supply Voltage (Note 7) 3 V
Output Voltage Swing LOW (Note 8) No Load 4 40 mV

= 5mA 85 190 mV

I

SINK

V

= 5V, I

S

= 3.3V, I

V

S

= 20mA 240 460 mV

SINK

= 15mA 185 350 mV

SINK

Output Voltage Swing HIGH (Note 8) No Load 5 50 mV

= 5mA 90 200 mV

I

SOURCE

V

= 5V, I

S

= 3.3V, I

V

S

= 20mA 325 600 mV

SOURCE

= 15mA 250 400 mV

SOURCE

Short-Circuit Current VS = 5V ±30 ±45 mA

= 3.3V ±25 ±40 mA

V

S

Supply Current per Amplifier 3.15 3.5 mA
Disabled Supply Current per Amplifier ENABLE = V

+

– 0.35V 0.2 10 µA

sn623012 623012fas

3

LT6230/LT6230-10/
LT6231/LT6232

ELECTRICAL CHARACTERISTICS

TA = 25°C, VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

= half supply,

OUT

ENABLE = 0V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

I

ENABLE

V

L

V

H

ENABLE Pin Current ENABLE = 0.3V –25 –75 µA
ENABLE Pin Input Voltage LOW 0.3 V
ENABLE Pin Input Voltage HIGH V+ – 0.35V V

Output Leakage Current ENABLE = V+ – 0.35V, VO = 1.5V to 3.5V 0.2 10 µA
t
t

ON

OFF

Turn-On Time ENABLE = 5V to 0V, RL = 1k, VS = 5V 300 ns

Turn-Off Time ENABLE = 0V to 5V, RL = 1k, VS = 5V 41 µs
GBW Gain Bandwidth Product Frequency = 1MHz, VS = 5V 200 MHz

LT6230-10 1300 MHz

SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V 42 60 V/µs

LT6230-10, VS = 5V, AV = –10, RL = 1k, 250 V/µs
V

= 1.5V to 3.5V

O

FPBW Full Power Bandwidth VS = 5V, V

OUT

= 3V

(Note 9) 4.8 6.3 MHz

P-P

LT6230-10, HD2 = HD3 = ≤ 1% 11 MHz

t

S

The ● denotes the specifications which apply over 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

Settling Time (LT6230, LT6231, LT6232) 0.1%, VS = 5V, V

= 2V, AV = –1, RL = 1k 55 ns

STEP

OUT

= half

supply, ENABLE = 0V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

VOS TC Input Offset Voltage Drift (Note 10) V
I

B

I

OS

A

VOL

V

CM

CMRR Common Mode Rejection Ratio VS = 5V, V

PSRR Power Supply Rejection Ratio VS = 3V to 10V ● 85 dB

V

OL

Input Offset Voltage LT6230S6, LT6230S6-10 ● 600 µV

LT6231S8, LT6232GN
LT6231DD

● 450 µV

● 550 µV

Input Offset Voltage Match ● 800 µV
(Channel-to-Channel) (Note 6)

= Half Supply ● 0.5 3 µV/°C

CM

Input Bias Current ● 11 µA
IB Match (Channel-to-Channel) (Note 6) ● 1 µA
Input Offset Current ● 0.7 µA
Large-Signal Gain VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 ● 78 V/mV

= 1k to VS/2 ● 17 V/mV

R

= 1V to 4V, RL = 100Ω to VS/2 ● 4.1 V/mV

V

O

L

VS = 3.3V, VO = 0.65V to 2.65V, RL = 10k to VS/2 ● 66 V/mV

R

= 1k to VS/2 ● 13 V/mV

L

Input Voltage Range Guaranteed by CMRR, VS = 5V, 0V ● 1.5 4 V

V

= 3.3V, 0V ● 1.15 2.65 V

S

= 1.5V to 4V ● 90 dB

CM

= 3.3V, V

V

S

= 1.15V to 2.65V ● 85 dB

CM

CMRR Match (Channel-to-Channel) (Note 6) VS = 5V, VCM = 1.5V to 4V ● 84 dB

PSRR Match (Channel-to-Channel) (Note 6) VS = 3V to 10V ● 79 dB
Minimum Supply Voltage (Note 7) ● 3V
Output Voltage Swing LOW (Note 8) No Load ● 50 mV

= 5mA ● 200 mV

I

SINK

= 5V, I

V

S

V

= 3.3V, I

S

= 20mA ● 500 mV

SINK

= 15mA ● 380 mV

SINK

4

sn623012 623012fas

LT6230/LT6230-10/

LT6231/LT6232

ELECTRICAL CHARACTERISTICS

temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

The ● denotes the specifications which apply over 0°C < TA < 70°C
= half supply, ENABLE = 0V, unless otherwise noted.

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OH

I

SC

I

S

I

ENABLE

V

L

V

H

Output Voltage Swing HIGH (Note 8) No Load ● 60 mV

I

= 5mA ● 215 mV

SOURCE

= 5V, I

V

S

= 3.3V, I

V

S

= 20mA ● 650 mV

SOURCE

= 15mA ● 430 mV

SOURCE

Short-Circuit Current VS = 5V ● ±25 mA

= 3.3V ● ±20 mA

V

S

Supply Current per Amplifier ● 4.2 mA
Disabled Supply Current per Amplifier ENABLE = V

+

– 0.25V ● 1 µA

ENABLE Pin Current ENABLE = 0.3V ● –85 µA
ENABLE Pin Input Voltage LOW ● 0.3 V
ENABLE Pin Input Voltage HIGH ● V+ – 0.25V V

Output Leakage Current ENABLE = V+ – 0.25V, VO = 1.5V to 3.5V ● 1 µA
t
t

ON
OFF

Turn-On Time ENABLE = 5V to 0V, RL = 1k, VS = 5V ● 300 ns

Turn-Off Time ENABLE = 0V to 5V, RL = 1k, VS = 5V ● 65 µs
SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V ● 35 V/µs

LT6230-10, AV = –10, RL = 1k, ● 225 V/µs

= 1.5V to 3.5V

V

O

FPBW Full Power Bandwidth (Note 9) VS = 5V, V

OUT

= 3V

P-P

● 3.7 MHz

LT6230, LT6231, LT6232

The ● denotes the specifications which apply over –40°C < TA < 85°C temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

OUT

= half

supply, ENABLE = 0V, unless otherwise noted. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

VOS TC Input Offset Voltage Drift (Note 10) V
I

B

I

OS

A

VOL

V

CM

CMRR Common Mode Rejection Ratio VS = 5V, V

PSRR Power Supply Rejection Ratio VS = 3V to 10V ● 85 dB

Input Offset Voltage LT6230S6, LT6230S6-10 ● 700 µV

LT6231S8, LT6232GN
LT6231DD

● 550 µV

● 650 µV

Input Offset Voltage Match ● 1000 µV

(Channel-to-Channel) (Note 6)

= Half Supply ● 0.5 3 µV/°C

CM

Input Bias Current ● 12 µA

IB Match (Channel-to-Channel) (Note 6) ● 1.1 µA

Input Offset Current ● 0.8 µA

Large-Signal Gain VS = 5V, VO = 0.5V to 4.5V, RL = 10k to VS/2 ● 72 V/mV

R

= 1k to VS/2 ● 16 V/mV

= 1V to 4V, RL = 100Ω to VS/2 ● 3.6 V/mV

V

O

L

VS = 3.3V, VO = 0.65V to 2.65V,RL = 10k to VS/2 ● 60 V/mV

= 1k to VS/2 ● 12 V/mV

R

L

Input Voltage Range Guaranteed by CMRR, VS = 5V, 0V ● 1.5 4 V

V

= 3.3V, 0V ● 1.15 2.65 V

S

= 1.5V to 4V ● 90 dB

CM

= 3.3V, V

V

S

= 1.15V to 2.65V ● 85 dB

CM

CMRR Match (Channel-to-Channel) (Note 6) VS = 5V, VCM = 1.5V to 4V ● 84 dB

sn623012 623012fas

5

LT6230/LT6230-10/
LT6231/LT6232

ELECTRICAL CHARACTERISTICS

temperature range. VS = 5V, 0V; VS = 3.3V, 0V; VCM = V

The ● denotes the specifications which apply over –40°C < TA < 85°C
= half supply, ENABLE = 0V, unless otherwise noted. (Note 5)

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

PSRR Match (Channel-to-Channel) (Note 6) VS = 3V to 10V ● 79 dB

Minimum Supply Voltage (Note 7) ● 3V
V

OL

V

OH

I

SC

I

S

I

ENABLE

V

L

V

H

Output Voltage Swing LOW (Note 8) No Load ● 60 mV

= 5mA ● 210 mV

I

SINK

= 5V, I

V

S

V

= 3.3V, I

S

= 15mA ● 510 mV

SINK

= 15mA ● 390 mV

SINK

Output Voltage Swing HIGH (Note 6) No Load ● 70 mV

I

= 5mA ● 220 mV

SOURCE

= 5V, I

V

S

= 3.3V, I

V

S

= 20mA ● 675 mV

SOURCE

= 15mA ● 440 mV

SOURCE

Short-Circuit Current VS = 5V ● ±15 mA

V

= 3.3V ● ±15 mA

S

Supply Current per Amplifier ● 4.4 mA

Disabled Supply Current per Amplifier ENABLE = V

+

– 0.2V ● 1 µA

ENABLE Pin Current ENABLE = 0.3V ● –100 µA

ENABLE Pin Input Voltage LOW ● 0.3 V

ENABLE Pin Input Voltage HIGH ● V+ – 0.2V V

Output Leakage Current ENABLE = V+ – 0.2V, VO = 1.5V to 3.5V ● 1 µA
t
t

ON
OFF

Turn-On Time ENABLE = 5V to 0V, RL = 1k, VS = 5V ● 300 ns

Turn-Off Time ENABLE = 0V to 5V, RL = 1k, VS = 5V ● 72 µs
SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 1.5V to 3.5V ● 31 V/µs

LT6230-10, AV = –10, RL = 1k, ● 185 V/µs
V

= 1.5V to 3.5V

O

FPBW Full Power Bandwidth (Note 9) VS = 5V, V

OUT

= 3V

P-P

● 3.3 MHz

LT6230, LT6231, LT6232

TA = 25°C, VS = ±5V, VCM = V

= 0V, ENABLE = 0V, unless otherwise noted.

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage LT6230, LT6230-10 100 500 µV

LT6231S8, LT6232GN 50 350 µV
LT6231DD 75 450 µV

Input Offset Voltage Match 100 600 µV
(Channel-to-Channel) (Note 6)

I

B

Input Bias Current 510 µA
IB Match (Channel-to-Channel) (Note 6) 0.1 0.9 µA

I

OS

e

n

i

n

Input Offset Current 0.1 0.6 µA
Input Noise Voltage 0.1Hz to 10Hz 180 nV

P-P

Input Noise Voltage Density f = 10kHz 1.1 1.7 nV/√Hz
Input Noise Current Density, Balanced Source f = 10kHz, RS = 10k 1 pA/√Hz

Unbalanced Source f = 10kHz, R

= 10k 2.4 pA/√Hz

S

sn623012 623012fas

6

LT6230/LT6230-10/

LT6231/LT6232

ELECTRICAL CHARACTERISTICS

TA = 25°C, VS = ±5V, VCM = V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Resistance Common Mode 6.5 MΩ

C

IN

A

VOL

V

CM

CMRR Common Mode Rejection Ratio V

PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V 90 115 dB

V

OL

V

OH

I

SC

I

S

I

ENABLE

V

L

V

H

t

ON

t

OFF

GBW Gain Bandwidth Product Frequency = 1MHz 150 215 MHz

SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V 50 70 V/µs

FPBW Full Power Bandwidth V

t

S

Input Capacitance Common Mode 2.4 pF

Large-Signal Gain VO = ±4.5V, RL = 10k 140 260 V/mV

Input Voltage Range Guaranteed by CMRR –3 4 V

CMRR Match (Channel-to-Channel) (Note 6) V

PSRR Match (Channel-to-Channel) (Note 6) VS = ±1.5V to ±5V 84 115 dB
Output Voltage Swing LOW (Note 8) No Load 4 40 mV

Output Voltage Swing HIGH (Note 8) No Load 5 50 mV

Short-Circuit Current ±30 mA
Supply Current per Amplifier 3.3 3.9 mA

Disabled Supply Current per Amplifier ENABLE = 4.65V 0.2 µA
ENABLE Pin Current ENABLE = 0.3V –35 –85 µA
ENABLE Pin Input Voltage LOW 0.3 V
ENABLE Pin Input Voltage HIGH 4.65 V
Output Leakage Current ENABLE = V+ – 4.65V, VO = ±1V 0.2 10 µA
Turn-On Time ENABLE = 5V to 0V, RL = 1k 300 ns
Turn-Off Time ENABLE = 0V to 5V, RL = 1k 62 µs

Settling Time (LT6230, LT6231, LT6232) 0.1%, V

= 0V, ENABLE = 0V, unless otherwise noted.

OUT

Differential Mode 7.5 kΩ

Differential Mode 6.5 pF

R

V

= ±2V, RL = 100Ω 8.5 16 V/mV

O

= –3V to 4V 95 120 dB

CM

= –3V to 4V 89 125 dB

CM

I

= 5mA 85 190 mV

SINK

= 20mA 240 460 mV

I

SINK

I

SOURCE

I

SOURCE

LT6230-10 1000 1450 MHz

LT6230-10, AV = –10, RL = 1k, VO = –2V to 2V 320 V/µs

OUT

LT6230-10, HD2 = HD3 ≤ 1% 11 MHz

L

= 5mA 90 200 mV
= 20mA 325 600 mV

= 3V

(Note 9) 5.3 7.4 MHz

P-P

= 2V, AV = –1, RL = 1k 50 ns

STEP

= 1k 35 65 V/mV

sn623012 623012fas

7

LT6230/LT6230-10/
LT6231/LT6232

ELECTRICAL CHARACTERISTICS

temperature range. VS = ±5V, VCM = V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

VOS TC Input Offset Voltage Drift (Note 10) ● 0.5 3 µV/°C
I

B

I

OS

A

VOL

V

CM

CMRR Common Mode Rejection Ratio V

PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V ● 85 dB

V

OL

V

OH

I

SC

I

S

I

ENABLE

V

L

V

H

t

ON

t

OFF

SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V ● 44 V/µs

FPBW Full Power Bandwidth V

Input Offset Voltage LT6230S6, LT6230S6-10 ● 600 µV

Input Offset Voltage Match ● 800 µV

(Channel-to-Channel) (Note 6)

Input Bias Current ● 11 µA

IB Match (Channel-to-Channel) (Note 6) ● 1 µA

Input Offset Current ● 0.7 µA

Large-Signal Gain VO = ±4.5V, RL = 10k ● 100 V/mV

Input Voltage Range Guaranteed by CMRR ● –3 4 V

CMRR Match (Channel-to-Channel) (Note 6) VCM = –3V to 4V ● 89 dB

PSRR Match (Channel-to-Channel) (Note 6) VS = ±1.5V to ±5V ● 79 dB

Output Voltage Swing LOW (Note 8) No Load ● 50 mV

Output Voltage Swing HIGH (Note 8) No Load ● 60 mV

Short-Circuit Current ● ±25 mA

Supply Current per Amplifier ● 4.6 mA

Disabled Supply Current per Amplifier ENABLE = 4.75V

ENABLE Pin Current ENABLE = 0.3V ● –95 µA

ENABLE Pin Input Voltage LOW ● 0.3 V

ENABLE Pin Input Voltage HIGH ● 4.75 V

Output Leakage Current ENABLE = 4.75V, VO = ±1V ● 1 µA

Turn-On Time ENABLE = 5V to 0V, RL = 1k ● 300 ns

Turn-Off Time ENABLE = 0V to 5V, RL = 1k ● 85 µs

= 0V, ENABLE = 0V, unless otherwise noted.

OUT

The ● denotes the specifications which apply over 0°C < TA < 70°C

LT6231S8, LT6232GN
LT6231DD

R

= 1k ● 27 V/mV

= ±2V, RL = 100Ω ● 6V/mV

V

O

= –3V to 4V ● 95 dB

CM

I

SINK

I

SINK

I

SOURCE

I

SOURCE

LT6230-10, AV = –10, RL = 1k, VO = –2V to 2V ● 315 V/µs

OUT

LT6230, LT6231, LT6232

L

= 5mA ● 200 mV
= 20mA ● 500 mV

= 5mA ● 215 mV
= 20mA ● 650 mV

= 3V

(Note 9) ● 4.66 MHz

P-P

● 450 µV

● 550 µV

● 1 µA

8

sn623012 623012fas

LT6230/LT6230-10/

LT6231/LT6232

ELECTRICAL CHARACTERISTICS

temperature range. VS = ±5V, VCM = V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

VOS TC Input Offset Voltage Drift (Note 10) ● 0.5 3 µV/°C
I

B

I

OS

A

VOL

V

CM

CMRR Common Mode Rejection Ratio V

PSRR Power Supply Rejection Ratio VS = ±1.5V to ±5V ● 85 dB

V

OL

V

OH

I

SC

I

S

I

ENABLE

V

L

V

H

t

ON

t

OFF

SR Slew Rate AV = –1, RL = 1k, VO = –2V to 2V ● 37 V/µs

FPBW Full Power Bandwidth (Note 9) V

Input Offset Voltage LT6230, LT6230-10 ● 700 µV

Input Offset Voltage Match ● 1000 µV

(Channel-to-Channel) (Note 6)

Input Bias Current ● 12 µA

IB Match (Channel-to-Channel) (Note 6) ● 1.1 µA

Input Offset Current ● 0.8 µA

Large-Signal Gain VO = ±4.5V, RL = 10k ● 93 V/mV

Input Voltage Range Guaranteed by CMRR ● –3 4 V

CMRR Match (Channel-to-Channel) (Note 6) VCM = –3V to 4V ● 89 dB

PSRR Match (Channel-to-Channel) (Note 6) VS = ±1.5V to ±5V ● 79 dB

Output Voltage Swing LOW (Note 8) No Load ● 60 mV

Output Voltage Swing HIGH (Note 8) No Load ● 70 mV

Short-Circuit Current ● ±15 mA

Supply Current per Amplifier ● 4.85 mA

Disabled Supply Current per Amplifier ENABLE = 4.8V

ENABLE Pin Current ENABLE = 0.3V ● –110 µA

ENABLE Pin Input Voltage LOW ● 0.3 V

ENABLE Pin Input Voltage HIGH ● 4.8 V

Output Leakage Current ENABLE = 4.8V, VO = ±1V ● 1 µA

Turn-On Time ENABLE = 5V to 0V, RL = 1k ● 300 ns

Turn-Off Time ENABLE = 0V to 5V, RL = 1k ● 72 µs

= 0V, ENABLE = 0V, unless otherwise noted. (Note 5)

OUT

The ● denotes the specifications which apply over –40°C < TA < 85°C

LT6231S8, LT6232GN
LT6231DD

= 1k ● 25 V/mV

R

= ±1.5V, RL = 100Ω ● 4.8 V/mV

V

O

= –3V to 4V ● 95 dB

CM

I

SINK

I

SINK

I

SOURCE

I

SOURCE

LT6230-10, AV = –10, RL = 1k, VO = –2V to 2V ● 260 V/µs

OUT

LT6230, LT6231, LT6232

L

= 5mA ● 210 mV
= 15mA ● 510 mV

= 5mA ● 220 mV
= 20mA ● 675 mV

= 3V

P-P

● 550 µV

● 650 µV

● 1 µA

● 3.9 MHz

sn623012 623012fas

9

LT6230/LT6230-10/

INPUT COMMON MODE VOLTAGE (V)

0

OFFSET VOLTAGE (mV)

1.5

623012 GO3

0.5 1 2

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

3452.5 3.5 4.5

TA = –55°C

VS = 5V, 0V

TA = 25°C

TA = 125°C

LOAD CURRENT (mA)

0.01 0.1

0.001

OUTPUT SATURATION VOLTAGE (V)

0.01

10

1 10010

623012 GO6

0.1

1

VS = 5V, 0V

TA = –55°C

TA = 125°C

TA = 25°C

LT6231/LT6232

ELECTRICAL CHARACTERISTICS

Note 1: Absolute maximum ratings are those values beyond which the life
of the device may be impaired.

Note 2: Inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 0.7V, the input current must be limited to less than
40mA.

Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.

Note 4: The LT6230C/LT6230I the LT6231C/LT6231I, and LT6232C/
LT6232I are guaranteed functional over the temperature range of –40°C
and 85°C.

Note 5: The LT6230C/LT6231C/LT6232C are guaranteed to meet specified
performance from 0°C to 70°C. The LT6230C/LT6231C/LT6232C are
designed, characterized and expected to meet specified performance from
–40°C to 85°C, but are not tested or QA sampled at these temperatures.

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230/LT6231/LT6232)

VOS Distribution

100

VS = 5V, 0V

= V+/2

V

90

CM

S8

80
70
60
50
40

NUMBER OF UNITS

30
20
10

0

–150 –50

–200

14

12

10

8

6

4

2

INPUT BIAS CURRENT (µA)

0

–2

10

–100 0

INPUT OFFSET VOLTAGE (µV)

Input Bias Current vs
Common Mode Voltage

VS = 5V, 0V

01 3

–1

COMMON MODE VOLTAGE (V)

TA = –55°C

TA = 125°C

TA = 25°C

2

50

100

150

623012 GO1

456

623012 GO4

UW

200

The LT6230I/LT6231I/LT6232I are guaranteed to meet specified
performance from –40°C to 85°C.

Note 6: Matching parameters are the difference between the two amplifiers
A and D and between B and C of the LT6232; between the two amplifiers
of the LT6231. CMRR and PSRR match are defined as follows: CMRR and
PSRR are measured in µV/V on the matched amplifiers. The difference is
calculated between the matching sides in µV/V. The result is converted
to dB.

Note 7: Minimum supply voltage is guaranteed by power supply rejection
ratio test.

Note 8: Output voltage swings are measured between the output and
power supply rails.

Note 9: Full-power bandwidth is calculated from the slew rate:

FPBW = SR/2πV

Note 10: This parameter is not 100% tested.

Supply Current vs Supply Voltage
(Per Amplifier)

6

5

6

TA = 125°C

TA = 25°C

TA = –55°C

10 12 14

4

3

2

SUPPLY CURRENT (mA)

1

0

24 8

0

TOTAL SUPPLY VOLTAGE (V)

Input Bias Current vs Temperature

10

VS = 5V, 0V

9

8

7

6

5

INPUT BIAS CURRENT (µA)

4

3

–25 0 50

–50

VCM = 4V

VCM = 1.5V

25

TEMPERATURE (°C)

75 100 125

P

Offset Voltage vs Input Common
Mode Voltage

623012 GO2

Output Saturation Voltage vs
Load Current (Output Low)

623012 GO5

sn623012 623012fas

UW

POWER SUPPLY VOLTAGE (±V)

1.5

OUTPUT SHORT-CIRCUIT CURRENT (mA)

3

623012 GO9

2 2.5 3.5

70
60

40

20

50

30

10

0

–20

–40

–70

–60

–10

–30

–50

4 4.5 5

TA = 125°C

TA = –55°C

TA = –55°C

TA = 25°C

SINKING

SOURCING

TA = 25°C

TA = 125°C

OUTPUT VOLTAGE (V)

–5

INPUT VOLTAGE (mV)

–2

623012 G12

–4 –3 –1

0

135024

RL = 100Ω

RL = 1k

VS = ±5V
T

A

= 25°C

2.5

2.0

1.5

1.0

0.5

–0.5
–1.0
–1.5
–2.0
–2.5

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230/LT6231/LT6232)

LT6230/LT6230-10/

LT6231/LT6232

Output Saturation Voltage vs
Load Current (Output High)

10

VS = 5V, 0V

1

0.1

0.01

OUTPUT SATURATION VOLTAGE (V)

0.001

0.01 0.1

TA = 125°C

TA = 25°C

1 10010

LOAD CURRENT (mA)

TA = –55°C

623012 G07

Minimum Supply Voltage

1.0
VCM = VS/2

0.8

0.6

0.4

0.2

0
–0.2
–0.4

OFFSET VOLTAGE (mV)

–0.6
–0.8
–1.0

TA = 125°C

0.5 1 2

0

1.5

TOTAL SUPPLY VOLTAGE (V)

TA = –55°C

TA = 25°C

3452.5 3.5 4.5

623012 G08

Output Short Circuit Current vs
Power Supply Voltage

Open Loop Gain Open Loop Gain Open Loop Gain

2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0

INPUT VOLTAGE (mV)

–1.5
–2.0
–2.5

0.5 1 2

0

RL = 1k

RL = 100Ω

1.5

OUTPUT VOLTAGE (V)

VS = 3V, 0V

= 25°C

T

A

623012 G10

32.5

2.5

2.0

1.5

1.0

0.5
0

–0.5
–1.0

INPUT VOLTAGE (mV)

–1.5
–2.0
–2.5

0.5 1 2

0

RL = 1k

RL = 100Ω

1.5
OUTPUT VOLTAGE (V)

3452.5 3.5 4.5

VS = 5V, 0V

= 25°C

T

A

623012 G11

Offset Voltage vs Output Current

2.0
VS = ±5V

1.5

1.0

0.5

0

–0.5

OFFSET VOLTAGE (mV)

–1.0

–1.5

–2.0

–45 –15

–75

OUTPUT CURRENT (mA)

TA = 125°C

TA = –55°C

030 7560–60 –30 15 45

TA = 25°C

623012 G13

Warm-Up Drift vs Time

30

TA = 25°C

28
26
24
22
20
18
16
14

CHANGE IN OFFSET VOLTAGE (µV)

12
10

20 100

40

0

60

TIME AFTER POWER-UP (s)

VS = ±5V

VS = ±2.5V

VS = ±1.5V

80 120 160

140

623012 G14

Total Noise vs Total Source
Resistance

100

VS = ±2.5V

= 0V

V

CM

f = 100kHz
UNBALANCED
SOURCE

10

RESISTORS

1

TOTAL NOISE (nV/√Hz)

0.1
10 1k 10k 100k

100

TOTAL NOISE

RESISTOR NOISE

AMPLIFIER NOISE VOLTAGE

SOURCE RESISTANCE (Ω)

sn623012 623012fas

623012 G15

11

LT6230/LT6230-10/

TEMPERATURE (°C)

–55

SLEW RATE (V/µs)

5

623012 G21

–35 –15 45

90

100

110

120

80
70

50

20

30

60

40

8525 65 105 125

VS = ±5V FALLING

VS = ±2.5V RISING

AV = –1
R

F

= RG = 1k

VS = ±5V RISING

VS = ±2.5V FALLING

LT6231/LT6232

UW

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230/LT6231/LT6232)

Noise Voltage and Unbalanced
Noise Current vs Frequency

6

5

4

3

2

NOISE VOLTAGE (nV/√Hz)

1

0

10 1k 10k 100k

100

FREQUENCY (Hz)

VS = ±2.5V
T

A

V

CM

NOISE CURRENT

NOISE VOLTAGE

= 25°C

= 0V

623012 G16

6

UNBALANCED NOISE CURRENT (pA/√Hz)

5

4

3

2

1

0

0.1Hz to 10Hz Output Voltage
Noise

VS = ±2.5V

100nV

100nV/DIV

–100nV

5s/DIV

623012 G17

Gain Bandwidth and Phase Margin
vs Temperature

CL = 5pF
R

= 1k

L

V

CM

240

220

200

GAIN BANDWIDTH (MHz)

180

160

140

–55

VS = ±5V

= VS/2

VS = 3V, 0V

VS = ±5V

VS = 3V, 0V

–25 35

5

TEMPERATURE (°C)

PHASE MARGIN

GAIN BANDWIDTH

65 95 125

623012 G18

70

60

PHASE MARGIN (DEG)

50

40

Open Loop Gain vs Frequency

80
70
60
50
40
30

GAIN (dB)

20
10

0
–10
–20

100k 10M 100M 1G

1M

PHASE

VS = 3V, 0V

VS = ±5V

GAIN

VS = 3V, 0V

FREQUENCY (Hz)

Output Impedance vs Frequency

1k

VS = 5V, 0V

100

10

1

OUTPUT IMPEDANCE (Ω)

0.1

0.01
100k 10M 100M

12

AV = 10

AV = 1

1M

FREQUENCY (Hz)

AV = 2

CL = 5pF

= 1k

R

L

= VS/2

V

CM

VS = ±5V

623012 G19

623012 G22

Gain Bandwidth and Phase Margin
vs Supply Voltage

120
100
80
60
40
20
0
–20
–40
–60
–80

PHASE (dB)

TA = 25°C

= 5pF

C

L

= 1k

R

L

240

220

200

GAIN BANDWIDTH (MHz)

180

160

140

24 8

0

TOTAL SUPPLY VOLTAGE (V)

Common Mode Rejection Ratio vs
Frequency

120

100

80

60

40

20

VS = 5V, 0V

COMMON MODE REJECTION RATIO (dB)

= VS/2

V

CM

0

10k 100M100k 1G10M

PHASE MARGIN

GAIN BANDWIDTH

6

1M

FREQUENCY (Hz)

10 12 14

623012 G20

623012 G23

Slew Rate vs Temperature

70

60

PHASE MARGIN (DEG)

50

40

Channel Separation vs Frequency

–40

AV = 1

–50

T

= 25°C

A

V

= ±5V

S

–60
–70
–80

–90
–100
–110

CHANNEL SEPARATION (dB)

–120
–130
–140

100k

1M 10M 100M

FREQUENCY (Hz)

623012 G24

sn623012 623012fas

UW

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230/LT6231/LT6232)

LT6230/LT6230-10/

LT6231/LT6232

Power Supply Rejection Ratio vs
Frequency

120

100

80

60

NEGATIVE SUPPLY

40

20

POWER SUPPLY REJECTION RATIO (dB)

0

1k 10k 100M100k 10M

FREQUENCY (Hz)

POSITIVE SUPPLY

1M

Settling Time vs Output Step
(Non-Inverting)

200

VS = ±5V

= 25°C

T

A

= 1

A

V

150

100

SETTLING TIME (ns)

50

10mV

0

–3 –2 –1 1

–4

–

V

+

IN

1mV

OUTPUT STEP (V)

1mV

0

VS = 5V, 0V

= 25°C

T

A

= VS/2

V

CM

623012 G25

V

OUT

500Ω

10mV

234

623012 G28

Series Output Resistance and
Overshoot vs Capacitive Load

50

VS = 5V, 0V

45

= 1

A

V

40
35
30
25
20

OVERSHOOT (%)

15
10

5
0

10

CAPACITIVE LOAD (pF)

RS = 10Ω

RS = 20Ω

RS = 50Ω

= 50Ω

R

L

100 1000

Settling Time vs Output Step
(Inverting)

200

150

100

SETTLING TIME (ns)

50

0

500Ω

V

IN

10mV

–3 –2 –1 1

–4

500Ω

–

+

1mV

0

OUTPUT STEP (V)

V

1mV

10mV

234

623012 G26

VS = ±5V

= 25°C

T

A

= –1

A

V

OUT

623012 G29

Series Output Resistance and
Overshoot vs Capacitive Load

50

VS = 5V, 0V

45

= 2

A

V

40
35
30
25
20

OVERSHOOT (%)

15
10

5
0

10

RS = 50Ω
R

CAPACITIVE LOAD (pF)

RS = 10Ω

RS = 20Ω

= 50Ω

L

100 1000

Maximum Undistorted Output
Signal vs Frequency

10

AV = –1

9

)

P–P

8

7

6

5

4

VS = ±5V

OUTPUT VOLTAGE SWING (V

3

= 25°C

T

A

HD

, HD3 < –40dBc

2

2

10k

AV = 2

100k 1M 10M

FREQUENCY (Hz)

623012 G27

623012 G30

Distortion vs Frequency

–40

VS = ±2.5V
A

= 1

V

V

10k

= 2V

OUT

RL = 1k, 2ND

(P–P)

RL = 100Ω, 3RD

RL = 100Ω, 2ND

100k 1M 10M

FREQUENCY (Hz)

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

RL = 1k, 3RD

623012 G31

Distortion vs Frequency Distortion vs Frequency

–40

VS = ±5V
A

= 1

V

V

10k

OUT

= 2V

RL = 1k, 2ND

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

(P–P)

RL = 100Ω, 3RD

RL = 100Ω, 2ND

RL = 1k, 3RD

100k 1M 10M

FREQUENCY (Hz)

623012 G32

–40

VS = ±2.5V
A

= 2

V

V

OUT

RL = 100Ω, 2ND

10k

= 2V

RL = 1k, 3RD

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

(P–P)

100k 1M 10M

FREQUENCY (Hz)

RL = 100Ω, 3RD

RL = 1k, 2ND

623012 G33

sn623012 623012fas

13

LT6230/LT6230-10/
LT6231/LT6232

UW

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230/LT6231/LT6232)

Distortion vs Frequency

–40

VS = ±5V

= 2

A

V

= 2V

V

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

10k

(P–P)

OUT

RL = 100Ω, 2ND

RL = 1k, 3RD

100k 1M 10M

FREQUENCY (Hz)

2V/DIV

Large Signal Response Small Signal Response

RL = 100Ω, 3RD

2V

0V

50mV/DIV

VS = ±2.5V 200ns/DIV

= 1

A

V

= 1k 623345 G36

R

L

RL = 1k, 2ND

623012 G34

0V

1V/DIV

–2V

VS = ±2.5V 200ns/DIV
A

= –1

V

= 1k 623345 G35

R

L

Large Signal Response Output Overdrive Recovery

5V

0V

IN

V

(1V/DIV)

0V

–5V

VS = ±5V 200ns/DIV

= 1

A

V

R

= 1k 623345 G37

L

(LT6230) ENABLE Characteristics

Supply Current vs ENABLE Pin
Voltage

4.5

4.0

3.5

3.0

2.5

2.0

1.5

SUPPLY CURRENT (mA)

1.0

0.5
VS = ±2.5V

0

–2.0 0

–1.0

PIN VOLTAGE (V)

TA = –55°C

TA = 125°C

TA = 25°C

1.0 2.0

623012 G39

0V

OUT

V

(2V/DIV)

VS = ±2.5V 200ns/DIV

= 3

A

V

623345 G38

ENABLE Pin Current vs ENABLE
Pin Voltage ENABLE Pin Response Time

30

TA = –55°C

25

20

TA = 25°C

15

TA = 125°C

10

ENABLE PIN CURRENT (µA)

5

0

–2.0 0 1.0 2.0

–1.0

PIN VOLTAGE (V)

VS = ±2.5V

= 1

A

V

623012 G40

5V
0V

ENABLE PIN

0.5V

OUT

0V

V

VS = ±2.5V 100µs/DIV

= 0.5V

V

IN

= 1

A

V

R

= 1k 623345 G41

L

14

sn623012 623012fas

UW

TOTAL RESISTOR LOAD (Ω)

(INCLUDES FEEDBACK R)

0

GAIN BANDWIDTH (MHz)

600

623012 G47

200 400 800

1600

1400

1200

800

600

400

200

0

1000

1000

AV = 10

VS = ±5V
T

A

= 25°C

R

F

= 1k

R

G

= 100

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230-10)

Gain Bandwidth and Phase Margin
vs Temperature Slew Rate vs Temperature

1700

AV = 10

1500

1300

1100

900

GAIN BANDWIDTH (MHz)

–50

VS = ±5V

VS = 3V, 0V

VS = ±5V

VS = 3V, 0V

–25 0 50

TEMPERATURE (°C)

GAIN BANDWIDTH

25

PHASE MARGIN

75 100 125

623012 G42

80

70

60

50

40

600

AV = –10

= 1k

R

550

F

= 100Ω

R

G

500

PHASE MARGIN (DEG)

450
400
350
300

SLEW RATE (V/µs)

250
200

VS = ±2.5V FALLING

150
100

–35 –15 45

–55

VS = ±5V FALLING

VS = ±5V RISING

VS = ±2.5V RISING

5

TEMPERATURE (°C)

8525 65 105 125

623012 G43

LT6230/LT6230-10/

LT6231/LT6232

Series Output Resistor and
Overshoot vs Capacitive Load

70

VS = 5V, 0V

= 10

A

V

60

50

40

30

OVERSHOOT (%)

RS = 50Ω

20

10

0

10

RS = 20Ω

100 1000 10000

CAPACITIVE LOAD (pF)

RS = 10Ω

623012 G44

Open Loop Gain and Phase vs
Frequency

90
80
70
60
50
40

GAIN (dB)

30
20

AV = 10

10

C

0

R
V

–10

100k 10M 100M 1G

Common Mode Rejection Ratio vs
Frequency

120

100

80

60

40

20

COMMON MODE REJECTION RATIO (dB)

0

10k 1G100M100k 10M

GAIN

= 5pF

L

= 1k

L

CM

= VS/2

PHASE

VS = 3V, 0V

VS = ±5V

1M

FREQUENCY (Hz)

1M

FREQUENCY (Hz)

VS = ±5V

VS = 3V, 0V

623012 G45

VS = 5V, 0V

= VS/2

V

CM

623012 G48

120
100
80
60
40
20
0
–20
–40
–60
–80

1700

1450

PHASE (DEG)

1200

GAIN BANDWIDTH (MHz)

Gain Bandwidth and Phase Margin
vs Supply Voltage

TA = 25°C
A

= 10

V

C

= 5pF

L

= 1k

R

L

GAIN BANDWIDTH

950

PHASE MARGIN

24 8

0

TOTAL SUPPLY VOLTAGE (V)

6

Maximum Undistorted Output
Signal vs Frequency

10

9

)

8

P–P

7
6
5
4
3

VS = ±5V

2

T

= 25°C

OUTPUT VOLTAGE SWING (V

A

1

A

= 10

V

HD

= HD3 ≤ 40dBc

2

0

10k

100k 1M 100M10M

FREQUENCY (Hz)

10 12

623012 G46

623012 G49

PHASE MARGIN (DEG)

100

50

0

2nd and 3rd Harmonic Distortion vs
Frequency

–40

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

10k

Gain Bandwidth vs Resistor Load

VS = ±2.5V

= 10

A

V

= 2V

V

(P–P)

OUT

RL = 100Ω, 3RD

100k 1M 10M

FREQUENCY (Hz)

RL = 100Ω, 2ND

RL = 1k, 3RD

RL = 1k, 2ND

623012 G50

sn623012 623012fas

15

LT6230/LT6230-10/
LT6231/LT6232

UW

TYPICAL PERFOR A CE CHARACTERISTICS

(LT6230-10)

2nd and 3rd Harmonic Distortion vs
Frequency Large Signal Response Output-Overload Recovery

–40

VS = ±5V

= 10

A

V

V

OUT

RL = 100Ω, 3RD

10k

= 2V

(P–P)

RL = 100Ω, 2ND

RL = 1k, 2ND

100k 1M 10M

FREQUENCY (Hz)

RL = 1k, 3RD

623012 G51

0V

OUT

V

(2V/DIV)

VS = ±5V 100ns/DIV
A

= 10

V

= 900Ω, RG = 100Ω 623345 G52

R

F

0V

OUT

V

(2V/DIV)

IN

0V

V

(0.5V/DIV)

VS = 5V, 0V 100ns/DIV
A

= 10

V

= 900Ω, RG = 100Ω 623345 G53

R

F

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

Small Signal Response

2.5V

OUT

V

(100mV/DIV)

VS = 5V, 0V 100ns/DIV

= 10

A

V

= 900Ω, RG = 100Ω 623345 G54

R

F

Input Referred High Frequency
Noise Spectrum

10

1nV/√Hz/DIV

0

100kHz 50MHz

5MHz/DIV

623345 G55

16

sn623012 623012fas

LT6230/LT6230-10/

LT6231/LT6232

U

WUU

APPLICATIO S I FOR ATIO

Amplifier Characteristics

Figure 1 is a simplified schematic of the LT6230/LT6231/
LT6232, which has a pair of low noise input transistors Q1
and Q2. A simple current mirror Q3/Q4 converts the
differential signal to a single-ended output, and these
transistors are degenerated to reduce their contribution to
the overall noise.

Capacitor C1 reduces the unity cross frequency and
improves the frequency stability without degrading the
gain bandwidth of the amplifier. Capacitor CM sets the
overall amplifier gain bandwidth. The differential drive
generator supplies current to transistors Q5 and Q6 that
swing the output from rail-to-rail.

+V

+V

C

M

DIFFERENTIAL

DRIVE GENERATOR

BIAS

DESD1
–V

IN

+V

IN

DESD3

Q3

–V

+V

C1

DESD2

–V

Q1

D1

–V

+V

D2

DESD4

Q4

Q2

I

1

Figure 1. Simplified Schematic

Input Protection

There are back-to-back diodes, D1 and D2 across the + and
– inputs of these amplifiers to limit the differential input
voltage to ±0.7V. The inputs of the LT6230/LT6231/
LT6232 do not have internal resistors in series with the
input transistors. This technique is often used to protect
the input devices from over voltage that causes excessive
current to flow. The addition of these resistors would
significantly degrade the low noise voltage of these ampli­fiers. For instance, a 100Ω resistor in series with each
input would generate 1.8nV/√Hz of noise, and the total
amplifier noise voltage would rise from 1.1nV/√Hz to

2.1nV/√Hz. Once the input differential voltage exceeds
±0.7V, steady state current conducted through the protec­tion diodes should be limited to ±40mA. This implies 25Ω
of protection resistance is necessary per volt of overdrive
beyond ±0.7V. These input diodes are rugged enough to

Q5

DESD5

V

OUT

DESD6

–V
+V

Q6

ENABLE

–V

623012 F01

2.5V

0V

1V/DIV

–2.5V

500µs/DIV

623012 F02

Figure 2. VS = ±2.5V, AV = 1 with Large Overdrive

handle transient currents due to amplifier slew rate over­drive and clipping without protection resistors.

The photo of Figure 2 shows the output response to an
input overdrive with the amplifier connected as a voltage
follower. With the input signal low, current source I

1

saturates and the differential drive generator drives Q6
into saturation so the output voltage swings all the way to
V–. The input can swing positive until transistor Q2 satu­rates into current mirror Q3/Q4. When saturation occurs,
the output tries to phase invert, but diode D2 conducts
current from the signal source to the output through the
feedback connection. The output is clamped a diode drop
below the input. In this photo, the input signal generator
is limiting at about 20mA.

With the amplifier connected in a gain of AV ≥ 2, the output
can invert with very heavy overdrive. To avoid this inver­sion, limit the input overdrive to 0.5V beyond the power
supply rails.

ESD

The LT6230/LT6231/LT6232 have reverse-biased ESD
protection diodes on all inputs and outputs as shown in
Figure 1. If these pins are forced beyond either supply,
unlimited current will flow through these diodes. If the
current is transient and limited to one hundred milliamps
or less, no damage to the device will occur.

Noise

The noise voltage of the LT6230/LT6231/LT6232 is equiva­lent to that of a 75Ω resistor, and for the lowest possible
noise it is desirable to keep the source and feedback
resistance at or below this value, i.e. RS + RG||R

≤ 75Ω.

FB

sn623012 623012fas

17

LT6230/LT6230-10/
LT6231/LT6232

U

WUU

APPLICATIO S I FOR ATIO

With RS + RG||R

eN=√(1.1nV)2+(1.1nV)2 = 1.55nV/√Hz

Below this resistance value, the amplifier dominates the
noise, but in the region between 75Ω and about 3k, the
noise is dominated by the resistor thermal noise. As the
total resistance is further increased beyond 3k, the ampli­fier noise current multiplied by the total resistance even­tually dominates the noise.

The product of eN • √I
low noise amplifiers. Most low noise amplifiers with low
eN have high I
low noise voltage with the lowest possible supply current,
this product can prove to be enlightening. The LT6230/
LT6231/LT6232 have an eN • √I
per amplifier, yet it is common to see amplifiers with
similar noise specifications to have eN • √I
as 13.5.

= 75Ω the total noise of the amplifier is:

FB

is an interesting way to gauge

SUPPLY

product of only 1.9

SUPPLY

SUPPLY

SUPPLY

current. In applications that require

as high

For a complete discussion of amplifier noise, see the
LT1028 data sheet.

Enable Pin

The LT6230 includes an ENABLE pin that shuts down the
amplifier to 10µA maximum supply current. The ENABLE
pin must be driven high to within 0.35V of V+ to shut down
the supply current. This can be accomplished with simple
gate logic; however care must be taken if the logic and the
LT6230 operate from different supplies. If this is the case,
then open drain logic can be used with a pull-up resistor
to ensure that the amplifier remains off. See Typical
Characteristic Curves.

The output leakage current when disabled is very low;
however, current can flow into the input protection diodes
D1 and D2 if the output voltage exceeds the input voltage
by a diode drop.

18

sn623012 623012fas

LT6230/LT6230-10/

FREQUENCY (Hz)

100k

GAIN (dB)

23

3

–7

1M 10M

623012 F04

LT6231/LT6232

U

WUU

APPLICATIO S I FOR ATIO

Single Supply, Low Noise, Low Power, Bandpass Filter with Gain = 10

R1

732Ω

C1

1000pF

V

IN

R2

732Ω

C3

0.1µF

C2

47pF

R3
10k

R4
10k

–

LT6230

+

+

V

0.1µF

V

OUT

EN

623012 F03

= 1 = 1MHz

f

0

2πRC

, R = R1 = R2

C = √C

1C2

732Ω

=

f

0

f

–3dB

AV = 20dB at f
EN = 4µV
I

S

MHz, MAXIMUM f0 = 1MHz

(

)

R

f

0

=

2.5

0

INPUT REFERRED

RMS

= 3.7mA FOR V+ = 5V

Frequency Response Plot of

Bandpass Filter

Low Noise, Low Power, Single Supply, Instrumentation

Amplifier with Gain = 100

C2

2200pF

R1

30.9Ω

–

LT6230-10

V

IN1

C1

1µF

R6
511Ω

R3

30.9Ω

R5
511Ω

V

IN2

C3

1µF

+

–

LT6230-10

+

R2

+

V

511Ω

C8

U1

R15

EN

R4

+

511Ω

V

U2

EN

88.7Ω

R13
2k

R16

88.7Ω

R14
2k

68pF

R10

511Ω

R12
511Ω

C4
10µF

C9
68pF

V

= 100 (V

OUT

GAIN =

INPUT RESISTANCE = R5 = R6
f

= 310Hz TO 11MHz

–3dB

= 20µV

E

N

I

= 10.5mA FOR VS = 5V, 0V

S

–

U3

LT6230

+

IN2

R2

+ 1

(

) (

R1 R15

INPUT REFERRED

RMS

V

– V

+

R10

V

OUT

EN

IN1

)

)

R1 = R3
R2 = R4
R10 = R12
R15 = R16

623012 F05

sn623012 623012fas

19

LT6230/LT6230-10/
LT6231/LT6232

PACKAGE DESCRIPTIO

0.62
MAX

0.95
REF

U

1.22 REF

S6 Package

6-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1636)

2.90 BSC
(NOTE 4)

3.85 MAX

2.62 REF

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.20 BSC

DATUM ‘A’

0.30 – 0.50 REF

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. JEDEC PACKAGE REFERENCE IS MO-193

1.4 MIN

2.80 BSC

0.09 – 0.20
(NOTE 3)

1.50 – 1.75
(NOTE 4)

1.00 MAX

0.95 BSC

0.80 – 0.90

PIN ONE ID

1.90 BSC

0.30 – 0.45
6 PLCS (NOTE 3)

0.01 – 0.10

S6 TSOT-23 0302

20

sn623012 623012fas

PACKAGE DESCRIPTIO

LT6230/LT6230-10/

LT6231/LT6232

U

DD Package

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

0.675 ±0.05

3.5 ±0.05

1.65 ±0.05
(2 SIDES)2.15 ±0.05

PACKAGE
OUTLINE

0.25 ± 0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

PIN 1

TOP MARK

(NOTE 6)

0.200 REF

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE

2.38 ±0.05

(2 SIDES)

0.50
BSC

3.00 ±0.10

(4 SIDES)

0.75 ±0.05

0.00 – 0.05

1.65 ± 0.10

(2 SIDES)

R = 0.115

TYP

0.25 ± 0.05

2.38 ±0.10

(2 SIDES)

BOTTOM VIEW—EXPOSED PAD

0.38 ± 0.10

85

14

0.50 BSC

(DD8) DFN 1203

sn623012 623012fas

21

LT6230/LT6230-10/
LT6231/LT6232

PACKAGE DESCRIPTIO

.050 BSC

U

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.189 – .197

.045 ±.005

(4.801 – 5.004)

8

NOTE 3

7

6

5

.245
MIN

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

× 45°

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

.160

±.005

.228 – .244

(5.791 – 6.197)

0°– 8° TYP

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

.150 – .157

(3.810 – 3.988)

NOTE 3

1

3

2

4

.004 – .010

(0.101 – 0.254)

.050

(1.270)

BSC

SO8 0303

22

sn623012 623012fas

PACKAGE DESCRIPTIO

LT6230/LT6230-10/

LT6231/LT6232

U

GN Package

16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

.045 ±.005

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.007 – .0098

(0.178 – 0.249)

.016 – .050

NOTE:

1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

(0.406 – 1.270)

INCHES

(MILLIMETERS)

.150 – .165

.0250 BSC.0165 ±.0015

.015

(0.38 ± 0.10)

0° – 8° TYP

± .004

× 45°

.229 – .244

(5.817 – 6.198)

.0532 – .0688

(1.35 – 1.75)

.008 – .012

(0.203 – 0.305)

TYP

16

15

12

.189 – .196*

(4.801 – 4.978)

14

12 11 10

13

5

4

3

678

.0250

(0.635)

BSC

.009

(0.229)

9

(0.102 – 0.249)

REF

.150 – .157**
(3.810 – 3.988)

.004 – .0098

GN16 (SSOP) 0204

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

sn623012 623012fas

23

LT6230/LT6230-10/
LT6231/LT6232

TYPICAL APPLICATIO S

U

The LT6230 is applied as a transimpedance amplifier with
an I-to-V conversion gain of 1.5kΩ set by R1.␣ The LT6230
is ideally suited to this application because of its low input
offset voltage and␣ current, and its low noise.␣ This is be­cause the 1.5k resistor has an inherent thermal noise of
5nV/√Hz or 3.4pA/√Hz at room temperature, while the
LT6230␣ contributes only 1.1nV and 2.4pA /√Hz.␣ So, with
respect to both voltage and current noises, the LT6230 is
actually quieter than the gain resistor.

The circuit uses an avalanche photodiode with the cathode
biased to approximately 200V.␣ When light is incident on

IS = 3.3mA

≈ 200V BIAS

ADVANCED PHOTONIX

012-70-62-541

WWW.ADVANCEDPHOTONIX.COM

0.1µF

OUTPUT OFFSET = 500µV TYPICAL
BANDWIDTH = 20MHz
OUTPUT NOISE = 1.1mV

R2

1.5k

C2

P–P

C1

4.7pF

R1

1.5k

–

+

(100MHz MEASUREMENT BW)

5V

LT6230

–5V

ENABLE

623012 TA02a

the photodiode, it induces a current IPD which flows␣ into
the amplifier circuit. The amplifier output falls negative to
maintain balance at its inputs. The transfer function is
therefore V

= –IPD • 1.5k. C1 ensures stability and good

OUT

settling characteristics.␣ Output offset was measured
at␣ 280µV, so low in part because R2 serves to cancel the
DC effects of bias current.␣ Output noise was measured at

1.1mV

on a 100MHz measurement bandwidth, with C2

P–P

shunting R2’s thermal noise.␣ As shown in the scope
photo, the rise time is 17ns, indicating a signal bandwidth
of 20MHz.

Photodiode Amplifier Time Domain ResponseLow Power Avalanche Photodiode Transimpedance Amplifier

30mV/DIV

50ns/DIV

623012 TA02b

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1028 Single, Ultra Low Noise 50MHz Op Amp 0.85nV/√Hz
LT1677 Single, Low Noise Rail-to-Rail Amplifier 3V Operation, 2.5mA, 4.5nV/√Hz, 60µV Max V
LT1806/LT1807 Single/Dual, Low Noise 325MHz Rail-to-Rail Amplifier 2.5V Operation, 550µV Max VOS, 3.5nV/√Hz
LT6200/LT6201 Single/Dual, Low Noise 165MHz 0.95nV√Hz, Rail-to-Rail Input and Output
LT6202/LT6203/LT6204 Single/Dual/Quad, Low Noise, Rail-to-Rail Amplifier 1.9nV/√Hz, 3mA Max, 100MHz Gain Bandwidth

LT/TP 0304 1K REV A • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2003

24

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

OS

sn623012 623012fas