LINEAR TECHNOLOGY LT3742 Technical data

LT3742

Dual, 2-Phase Step-Down

Switching Controller

FEATURES

■

Wide Input Voltage Range: 4V to 30V

■

Wide Output Voltage Range: 0.8V to V

■

Low Shutdown IQ: 20μA

■

Out-of-Phase Controllers Reduce Required Input

IN

Capacitance and Power Supply Induced Noise

■

0.8V ±1.5% Voltage Reference

■

500kHz Current Mode Fixed Frequency Operation

■

Internal Boost Converter Provides Bias Rail for

N-Channel MOSFET Gate Drive

■

Power Good Voltage Monitor for Each Output

■

Programmable Soft-Start

■

24-Lead 4mm × 4mm × 0.75mm Package

APPLICATIONS

■

Satellite and Cable TV Set-Top Boxes

■

Distributed Power Regulation

■

Automotive Systems

■

Super Capacitor Charger

DESCRIPTION

The LT®3742 is a dual step-down DC/DC switching regulator
controller that drives high side N-channel power MOSFETs.
A 500kHz fi xed frequency current mode architecture pro­vides fast transient response with simple loop compensa­tion components and cycle-by-cycle current limiting. The
output stages of the two controllers operate 180° out of
phase to reduce the input ripple current, minimizing the
noise induced on the input supply, and allowing less input
capacitance.

An internal boost regulator generates a bias rail of V
to provide gate drive for the N-channel MOSFETs allowing
low dropout and 100% duty cycle operation. The LT3742
can be used for applications where both controllers need
to operate independently, or where both controllers are
used to provide a single higher current output.

The device is available in a thermally enhanced 4mm ×
4mm QFN package.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.

IN

+ 7V

TYPICAL APPLICATION

8V and 5V Dual Step-Down Converter

V

IN

V

OUT1

RUN1

8V
4A

47μF

14V

V

IN

10μF

0.010Ω

1.8k

200Ω

1000pF

1nF

6.5μH

1μF

PG1

30k

45.3k

20.0k

V
UVLO

G1

SW1
SENSE1
SENSE1
FB1

PG1
RUN/SS1
V

10μH

SWB

IN

LT3742

+

SENSE2

–

SENSE2

C1

RUN/SS2

GND

BIAS

SW2

FB2

PG2

V

μF

4.7

Effi ciency vs Load Current

100

90

V

IN

1.05k

200Ω

1nF

10μF

47μF

3742 TA03a

V

OUT2

5V
4A

RUN2

G2

6.5μH

0.010Ω

+
–

PG2

C2

20k

1000pF

80

70

EFFICIENCY (%)

60

50

40

0.5 1.5

0

12

LOAD CURRENT (A)

8V

OUT

5V

OUT

3

2.5

3.5

3742 TA03b

4

3742f

1

LT3742

ABSOLUTE MAXIMUM RATINGS

(Note 1)

VIN Voltage ................................................................30V

UVLO Voltage ............................................................30V

PG1, PG2 Voltage .....................................................30V

SWB, BIAS Voltage ...................................................40V

+

SENSE1
SENSE1

, SENSE2+ Voltage ......................................30V

–

, SENSE2– Voltage ......................................30V

RUN/SS1, RUN/SS2 Voltage .......................................6V

FB1, FB2 Voltage .........................................................6V

, VC2 Voltage ..........................................................6V

V

C1

Junction Temperature ........................................... 125°C

Operating Junction Temperature Range

(Note 2) .................................................. –40°C to 125°C

Storage Temperature Range ................... –65°C to 125°C

ORDER INFORMATION

PIN CONFIGURATION

TOP VIEW

SW1NCNC

24 23 22 21 20 19

1

V

2

IN

UVLO

3

BIAS

4

SWB

5
6

G2

7 8 9

SW2

24-LEAD (4mm × 4mm) PLASTIC QFN

T

EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB

JMAX

SENSE1+SENSE1–FB1

25

10 11 12

+

NC

–

SENSE2

SENSE2

NC

UF PACKAGE

= 125°C, θJA = 36°C/W

FB2

18G1
17
16
15
14
13

V

C1

PG1
RUN/SS1
RUN/SS2
PG2
V

C2

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3742EUF#PBF LT3742EUF#TRPBF 3742 24-Lead (4mm × 4mm) Plastic QFN –40°C to 125°C (Note 2)

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS

The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = 5V unless otherwise specifi ed.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Operating Input Voltage V

Quiescent Current V

Shutdown Current V

= 1.5V

UVLO

RUN/SS1

RUN/SS1

= V

= V

= V

= V

RUN/SS2

RUN/SS2

FB1

= 0V 20 35 μA

= 1V 5.0 7.0 mA

FB2

UVLO Pin Threshold UVLO Pin Voltage Rising

UVLO Pin Hysteresis Current V

= 1V, Current Flows Into Pin 1.8 2.7 4 μA

UVLO

RUN/SS Pin Threshold 0.2 0.6 V

RUN/SS Pin Charge Current V

= 0V 0.5 0.9 1.5 μA

RUN/SS

FB Pin Voltage

FB Pin Voltage Line Regulation V

= 5V to 30V 0.01 %/V

IN

●

●

1.20 1.24 1.28 V

●

0.788 0.800 0.812 V

3.5 4.0 V

2

3742f

LT3742

ELECTRICAL CHARACTERISTICS

The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T

PARAMETER CONDITIONS MIN TYP MAX UNITS

FB Pin Bias Current V

FB Pin Voltage Matching –4 0 4 mV

Error Amplifi er Transconductance 250 μmho

Error Amplifi er Voltage Gain 500 V/V

Pin Source Current VFB = 0.6V 15 μA

V

C

Pin Sink Current VFB = 1V 15 μA

V

C

Controller Switching Frequency 440 500 560 kHz

Switching Phase 180 Deg

Maximum Current Sense Voltage V

Current Sense Matching Between Controllers ±5 %

Current SENSE Pins Total Current SENSE

Gate Rise Time C

Gate Fall Time C

Gate On Voltage (V

Gate Off Voltage (V

PG Pin Voltage Low I

Lower PG Trip Level (Relative to V

Lower PG Trip Level (Relative to V

Upper PG Trip Level (Relative to V

Upper PG Trip Level (Relative to V

PG Pin Leakage Current V

PG Pin Sink Current V

Bias Pin Voltage V

SWB Pin Current Limit 250 340 500 mA

SWB Pin Leakage Current V

Bias Supply Switching Frequency 0.88 1.0 1.12 MHz

– VSW)V

G

– VSW)V

G

)V

FB

)V

FB

)V

FB

)V

FB

= 25°C. VIN = 5V unless otherwise specifi ed.

A

= 0.8V, VC = 0.4V 50 200 nA

FB

–

= 3.3V

SENSE

–

, SENSE+ = 0V

–

SENSE

, SENSE+ = 3.3V

= 3300pF 40 ns

LOAD

= 3300pF 60 ns

LOAD

= 5V, V

IN

= 5V, V

IN

= 100μA 0.20 0.5 V

PG

Increasing –7 –10 –13 %

FB

Decreasing –10 –13 –16 %

FB

Increasing 7 10 13 %

FB

Decreasing 4 7 10 %

FB

= 2V, VFB = 1V 0.1 μA

PG

= 0.5V 200 500 μA

PG

= 12V 0.01 1 μA

SWB

= 12V 6.0 6.7 7.0 V

BIAS

= 12V 0.4 0.75 V

BIAS

●

50 60 70 mV

–1.0

40

+ 6.6 VIN + 7 VIN + 7.7 V

IN

mA

μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LT3742E is guaranteed to meet performance specifi cations
from 0°C to 125°C operating junction temperature range. Specifi cations
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls.

3742f

3

LT3742

TYPICAL PERFORMANCE CHARACTERISTICS

IQ-SHDN vs Temperature IQ-Running vs Temperature

50

40

10

9

8

Controller Current Sense Voltage
vs Temperature

70

65

30

CURRENT (μA)

20

10

–50

–25 0 25 50

TEMPERATURE (°C)

75 100 125

3742 G01

7

6

CURRENT (mA)

5

4

3

–50

–25 0

50 100 125

25 75

TEMPERATURE (°C)

3742 G02

VIN Minimum vs Temperature UVLO Threshold vs Temperature V

3.0

2.5

2.0

1.5

UVLO (V)

1.0

0.5

0

–50

–25 0

50 100 125

25 75

TEMPERATURE (°C)

3742 G05

(V)

IN

V

5

4

3

2

1

–50

–25 0 25 50

TEMPERATURE (°C)

75 100 125

3742 G04

60

SENSE VOLTAGE (mV)

55

50

–50

–25 0 25 50

vs Temperature

FB

830

820

810

(mV)

800

FB

V

790

780

770

–50

–25 0

TEMPERATURE (°C)

50 100 125

25 75

TEMPERATURE (°C)

75 100 125

3742 G03

3742 G06

4

RUN/SS Current vs Temperature UVLO I

1.8

1.2

(μA)

HYST

I

0.6

RUN/SS CURRENT (μA)

0

–25–50

0 255075

TEMPERATURE (°C)

100 125

3742 G07

3.0

2.8

2.6

2.4

2.2

2.0
–50 –25

vs Temperature

HYST

25

0

TEMPERATURE (°C)

50

75

100

125

3742 G08

3742f

TYPICAL PERFORMANCE CHARACTERISTICS

Controller Frequency vs
Temperature

600

PG Threshold vs Temperature V

1.0

LT3742

– V

BIAS

10

vs Temperature

IN

550

500

FREQUENCY (kHz)

450

400

–50

–25 0 25 50

TEMPERATURE (°C)

75 100 125

SWB Current Limit vs
Temperature

380

360

340

320

SWB CURRENT LIMIT (mA)

3742 G09

0.9

0.8

0.7

FEEDBACK VOLTS RISING (V)

0.6
–50

–25 0 25 50

POWER GOOD

TEMPERATURE (°C)

75 100 125

3742 G10

RUN/SS Threshold vs
Temperature

1.0

0.7

0.4

RUN/SS VOLTS (V)

8

) (V)

IN

– V

BIAS

(V

6

4

–50 –25 0 25 50

TEMPERATURE (°C)

75 100 125

3742 G11

300

–50

–25 0 25 50

TEMPERATURE (°C)

75 100 125

3742 G12

0.1
–25

0255075

TEMPERATURE (°C)

100 125

3742 G13

3742f

5

LT3742

PIN FUNCTIONS

G1, G2 (Pins 1, 6): Gate Drives. These pins provide high
current gate drive for the external N-channel MOSFETs.
These pins are the outputs of fl oating drivers whose volt­age swings between the BIAS and SW pins.

(Pin 2): Input Voltage. This pin supplies current to the

V

IN

internal circuitry of the LT3742. This pin must be locally
bypassed with a capacitor.

UVLO (Pin 3): Undervoltage Lockout. Do not leave this
pin open ; connect it to V

connected to V
input voltage at which the LT3742 will operate. When this
pin is less than 1.25V, the controllers are disabled (the
RUN/SS pins are still used to turn on each switching
regulator). Once this pin drops below 1.25V, a 3μA current
sink draws current into the pin to provide programmable
hysteresis for UVLO.

BIAS (Pin 4): Bias for Gate Drive. This pin provides a bias
voltage higher than the input voltage to drive the external
N-channel MOSFETs. The voltage on this pin is regulated

+ 7V.

to V

IN

SWB (Pin 5): Bias Regulator Switch. This is the collec­tor of an internal NPN switch used to generate the bias
voltage to provide gate drive for the external N-channel
MOSFETs.

is tied to this pin to program the minimum

IN

if not used. A resistor divider

IN

PG1, PG2 (Pins 17, 14): Power Good. These pins are
open-collector outputs of internal comparators. PG remains
low until the FB pin is within 90% of the fi nal regulation
voltage. As well as indicating output regulation, the PG
pins can be used to sequence the switching regulators.
The PG outputs are valid when V
and either of the RUN/SS pins is high. The power good
comparators are disabled in shutdown. If not used, these
pins should be left unconnected.

, VC2 (Pins 18, 13): Control Voltage and Compensation

V

C1

Pins for Internal Error Amplifi ers. Connect a series RC
from these pins to ground to compensate each switching
regulator loop.

FB1, FB2 (Pins 19, 12): Feedback Pins. The LT3742
regulates these pins to 800mV. Connect the feedback
resistors to this pin to set the output voltage for each
switching regulator.

–

SENSE1

Sense Inputs. These pins (along with the SENSE
are used to sense the inductor current for each switching
regulator.

SENSE1

Inputs. These pins (along with the SENSE
sense the inductor current for each switching regulator.

, SENSE2– (Pins 20, 11): Negative Current

+

, SENSE2+ (Pins 21, 10): Positive Current Sense

is greater than 3.5V

IN

+

pins)

–

pins) are used to

RUN/SS1, RUN/SS2 (Pins 16, 15): Run/Soft-Start Pins.
These pins are used to shut down each controller. They
also provide a soft-start function with the addition of an
external capacitor. To shut down any regulator, pull the
RUN/SS pin to ground with an open-drain or open-col­lector device. If neither feature is used, leave these pins
unconnected.

SW1, SW2 (Pins 24, 7): Switch Nodes. These pins connect
to the source of the external N-channel MOSFETs and to
the external inductors and diodes.

Exposed Pad (Pin 25): Ground. The Exposed Pad of the
package provides both electrical contact to ground and
good thermal contact to the printed circuit board. The
Exposed Pad must be soldered to the circuit board to
ensure proper operation.

3742f

6

BLOCK DIAGRAM

LT3742

SHDN

SWB

5

BIAS

SENSE

SENSE

SW

4

G

+

–

FB

V

C

GND

25

V

IN

2

3

V

IN

UVLO

RUN/SS

1.25V

LT3742 CONTROLLER 1 AND 2

COMPARATOR

3μA

TO ENABLE

1μA

UNDERVOLTAGE

+
–

UVLO

≈0.5V

TO
RUN/SS1
RUN/SS2

LOCKOUT

ENABLE

COMPARATOR

–
+
+

PWM

COMPARATOR

SS

ENABLE

R

Q

S

GATE DRIVE BIAS

BOOST REGULATOR

THERMAL

SHUTDOWN

PHASE SYNC

500kHz SLAVE

OSCILLATOR

Σ

+
–

V

REF

INTERNAL

SUPPLY

1MHz MASTER

OSCILLATOR

CURRENT

SENSE

AMPLIFIER

ERROR

AMPLIFIER

1.25V

0.86V

0.80V

0.74V

DC/DC CONTROLLERS

BIAS

GATE

DRIVER

+
–

–
+

0.80V

+

BIAS

ENABLE

QDQ

PHASE SYNC FOR

V

IN

V

IN

V

OUT

PGOOD

–

PG

POWER GOOD

COMPARATORS

0.86V

+

FB

–
+

0.74V

3742 BD1

3742f

7

LT3742

OPERATION

The LT3742 is a dual, constant frequency, current mode
DC/DC step-down controller. The two controllers in each
device share some common circuitry including protec­tion circuitry, the internal bias supply, voltage reference,
master oscillator and the gate drive boost regulator. The
Block Diagram shows the shared common circuitry and
the independent circuitry for both DC/DC controllers.

Important protection features included in the LT3742 are
undervoltage lockout and thermal shutdown. When either
of these conditions exist, the gate drive bias regulator and
both DC/DC controllers are disabled and both RUN/SS pins
are discharged to ~0.7V to get ready for a new soft-start
cycle. Undervoltage lockout (UVLO) is programmed using
two external resistors. When the UVLO pin drops below

1.25V, a 3μA current sink is activated to provide program­mable hysteresis for the UVLO function. A separate, less
accurate, internal undervoltage lockout will disable the
LT3742 when V

The gate drive boost regulator is enabled when all internal
fault conditions have been cleared. This regulator uses
both an internal NPN power switch and Schottky diode to
generate a voltage at the BIAS pin that is 7V higher than
the input voltage. Both DC/DC controllers are disabled until
the BIAS voltage has reached ~90% of its fi nal regulation
voltage. This ensures that suffi cient gate drive to fully
enhance the external MOSFETs is present before the driver
is allowed to turn on.

The master oscillator runs at 1MHz and clocks the gate
drive boost regulator at this frequency. The master oscilla­tor also generates two 500kHz clocks, 180° out of phase,
for the DC/DC controllers.

is less than 3V.

IN

A power good comparator pulls the PG pin low whenever
the FB pin is not within ±7.5% of the 800mV internal
reference voltage. PG is the open-collector output of an
NPN that is off when the FB pin is in regulation, allowing
an external resistor to pull the PG pin high. This power
good indication is valid only when the device is enabled
(RUN/SS is high) and V

The LT3742 enables each controller independently when its
RUN/SS pin is above ~0.5V and each controller generates
its own soft-start ramp. During start-up, the error amplifi er
compares the FB pin to the soft-start ramp instead of the
precision 800mV reference, which slowly raises the output
voltage until it reaches its resistor programmed regulation
point. Control of the inductor current is strictly maintained
until the output voltage is reached. The LT3742 is ideal
for applications where both DC/DC controllers need to
operate separately.

A pulse from the 500kHz oscillator sets the RS fl ip-fl op
and turns on the external N-channel MOSFET. Current in
the switch and the external inductor begins to increase.
When this current reaches a level determined by the control
voltage (V
turning off the MOSFET. The current in the inductor then
fl ows through the external Schottky diode and begins to
decrease. This cycle begins again at the next set pulse from
the slave oscillator. In this way, the voltage at the V
controls the current through the inductor to the output.
The internal error amplifi er regulates the output voltage
by continually adjusting the V
of the peak inductor current on a cycle-by-cycle basis is
managed by the current sense amplifi er. Because the induc­tor current is constantly monitored, the devices inherently
provide excellent output short-circuit protection.

), the PWM comparator resets the fl ip-fl op,

C

is 4V or greater.

IN

pin voltage. Direct control

C

pin

C

8

3742f