LINEAR TECHNOLOGY LT3724 Technical data

FEATURES

■

Wide Input Range: 4V to 60V

■

Output Voltages up to 36V (Step-Down)

■

Burst Mode® Operation: <100µA Supply Current

■

10µA Shutdown Supply Current

■

±1.3% Reference Accuracy

■

200kHz Fixed Frequency

■

Drives N-Channel MOSFET

■

Programmable Soft-Start

■

Programmable Undervoltage Lockout

■

Internal High Voltage Regulator for Gate Drive

■

Thermal Shutdown

■

Current Limit Unaffected by Duty Cycle

■

16-Pin Thermally Enhanced TSSOP Package

U

APPLICATIO S

■

Industrial Power Distribution

■

12V and 42V Automotive and Heavy Equipment

■

High Voltage Single Board Systems

■

Distributed Power Systems

■

Avionics

■

Telecom Power

LT3724

High Voltage, Current Mode

Switching Regulator Controller

U

DESCRIPTIO

The LT®3724 is a DC/DC controller used for medium
power, low part count, low cost, high efficiency supplies.
It offers a wide 4V-60V input range (7.5V minimum startup
voltage) and can implement step-down, step-up, inverting
and SEPIC topologies.

The LT3724 includes Burst Mode operation, which re­duces quiescent current below 100µA and maintains high
efficiency at light loads. An internal high voltage bias
regulator allows for simple biasing and can be back driven
to increase efficiency.

Additional features include fixed frequency current mode
control for fast line and load transient response; a gate
driver capable of driving large N-channel MOSFETs; a
precision undervoltage lockout function; 10µA shutdown
current; short-circuit protection; and a programmable
soft-start function that directly controls output voltage
slew rates at startup which limits inrush current, mini­mizes overshoot and facilitates supply sequencing.

The LT3724 is available in a 16-lead thermally enhanced
TSSOP package.

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode is a registered trademark of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 5731694, 6498466, 6611131.

TYPICAL APPLICATIO

V

30V TO

60V

68µF

IN

C

IN

40.2k

120pF680pF

4.99k 93.1k

1M

68.1k

200k

High Voltage Step-Down Regulator

V

IN

SHDN

C

SS

Burst_EN

V

FB

V

C

1000pF

SGND

LT3724

U

BOOST

PGND

SENSE

SENSE

Efficiency and Power Loss

vs Load Current

95

0.22µF

TG

10Ω

SW

V

CC

+

–

1µF

SS3H9

Si7852

47µH

0.025Ω

3724 TA01a

V

OUT

24V
75W

+

C

OUT

330µF

90

EFFICIENCY

85

80

EFFICIENCY (%)

75

70

65

0.1

LOSS

VIN = 48V

110

LOAD CURRENT (A)

3724 TA01b

12

10

POWER LOSS (W)

8

6

4

2

0

3724fa

1

LT3724

WW

W

U

ABSOLUTE AXI U RATI GS

(Note 1)

Input Supply Voltage (VIN)......................... 65V to –0.3V

Boosted Supply Voltage (BOOST).............. 80V to – 0.3V

Switch Voltage (SW)(Note 8) ....................... 65V to –1V

Differential Boost Voltage

(BOOST to SW) ..................................... 24V to –0.3V

Bias Supply Voltage (V
SENSE

+

and SENSE– Voltages ................... 40V to – 0.3V

Differential Sense Voltage

+

(SENSE

to SENSE–) .................................. 1V to – 1V

BURST_EN Voltage.................................... 24V to – 0.3V

, VFB, CSS, and SHDN Voltages ................5V to –0.3V

V

C

C

and SHDN Pin Currents ................................... 1mA

SS

Operating Junction Temperature Range (Note 2)

LT3724E (Note 3) ..............................–40°C to 125°C

LT3724I .............................................–40°C to 125°C

Storage Temperature .............................–65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

) .........................24V to –0.3V

CC

UUW

PACKAGE/ORDER I FOR ATIO

TOP VIEW

1

V

IN

2

NC

3

SHDN

4

C

SS

BURST_EN

V

FB

V

C

SGND

16-LEAD PLASTIC TSSOP

T

= 125°C, θJA = 40°C/W, θJC = 10°C/W

JMAX

EXPOSED PAD IS SGND (PIN 17) MUST BE SOLDERED TO PCB

5

6

7

8

FE PACKAGE

17

ORDER PART NUMBER

LT3724EFE
LT3724IFE

Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

BOOST

16

TG

15

SW

14

NC

13

V

12

CC

PGND

11

10

9

SENSE

SENSE

+

–

FE PART MARKING

3724EFE
3724IFE

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T

–

SENSE

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

I

V

I

V

I

= SENSE+ = 10V, SGND = PGND = SW = 0V, unless otherwise noted.

IN

VIN

BOOST

BOOST

CC

VCC

Operating Voltage Range (Note 4)
Minimum Start Voltage
UVLO Threshold (Falling)
UVLO Threshold Hysteresis 670 mV

VIN Supply Current V
V

Burst Mode Current V

IN

Shutdown Current V

V

IN

Operating Voltage Range
Operating Voltage Range (Note 5) V
UVLO Threshold (Rising) V
UVLO Threshold Hysteresis V

BOOST Supply Current (Note 6) 1.4 mA
BOOST Burst Mode Current V
BOOST Shutdown Current V

Operating Voltage Range (Note 5)
Output Voltage Over Full Line and Load Range
UVLO Threshold (Rising) 6.25 V
UVLO Threshold Hysteresis 500 mV

VCC Supply Current (Note 6)
V

Burst Mode Current V

CC

Shutdown Current V

V

CC

Short-Circuit Current

The ● denotes the specifications which apply over the full operating

= 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V,

A

●

460V

●

7.5 V

●

3.65 3.8 3.95 V

> 9V 20 µA

CC
BURST_EN
SHDN

BOOST
BOOST
BOOST

BURST_EN
SHDN

BURST_EN
SHDN

= 0V, VFB = 1.35V 20 µA

= 0V

- V

SW

- V

SW

- V

SW

= 0V 0.1 µA

= 0V 0.1 µA

= 0V 80 µA

= 0V 20 µA

●

●

●

●

●

●

●

–30 –55 mA

10 15 µA

5V

400 mV

8 8.3 V

1.7 2.1 mA

75 V
20 V

20 V

3724fa

2

LT3724

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifications are at T

–

SENSE

= SENSE+ = 10V, SGND = PGND = SW = 0V, unless otherwise noted.

The ● denotes the specifications which apply over the full operating

= 25°C. VIN = 20V, VCC = BOOST = BURST_EN = 10V, SHDN = 2V,

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

I

FB

V

FB

SHDN

Error Amp Reference Voltage Measured at VFB Pin 1.224 1.231 1.238 V

●

1.215 1.245 V

Feedback Input Current 25 nA

Enable Threshold (Rising)

●

1.3 1.35 1.4 V

Threshold Hysteresis 120 mV

V

SENSE

I

SENSE

f

SW

V

FB(SS)

Common Mode Range
Current Limit Sense Voltage V

Input Current V
(I

SENSE

+

+ I

–

) 2V < V

SENSE

SENSE

SENSE(CM)

V

SENSE(CM)

+

– V

SENSE

–

= 0V 400 µA

SENSE(CM)

< 3.5V 2 µA

> 4V –150 µA

●

036V

●

140 150 175 mV

Operating Frequency 190 200 210 kHz

●

175 220 kHz

Soft-Start Disable Voltage VFB Rising 1.185 V
Soft-Start Disable Hysteresis 300 mV

I

SS

g

m

A

V

V

C

I

VC

V

TG

t

TG

t

TG(OFF)

t

TG(ON)

I

SW

Soft-Start Capacitor Control Current 2 µA

Error Amp Transconductance ●275 340 400 µmhos

Error Amp DC Voltage Gain 62 dB

Error Amp Output Range Zero Current to Current Limit 1.2 V

Error Amp Sink/Source Current ±30 µA

Gate Drive Output On Voltage (Note 7) C
Gate Drive Output Off Voltage C

Gate Drive Rise/Fall Time 10% to 90% or 90% to 10%, C

= 3300pF 9.8 V

LOAD

= 3300pF 0.1 V

LOAD

= 3300pF 60 ns

LOAD

Minimum Switch Off Time 350 ns

Minimum Switch On Time

●

300 500 ns

SW Pin Sink Current VSW = 2V 300 mA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LT3724 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.

Note 3: The LT3724E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3724I is guaranteed over the full –40°C to 125°C operating junction
temperature range.

Note 4: VIN voltages below the start-up threshold (7.5V) are only
supported when the V

Note 5: Operating range is dictated by MOSFET absolute maximum V

is externally driven above 6.5V.

CC

GS

.

Note 6: Supply current specification does not include switch drive
currents. Actual supply currents will be higher.

Note 7: DC measurement of gate drive output “ON” voltage is typically

8.6V. Internal dynamic bootstrap operation yields typical gate “ON”
voltages of 9.8V during standard switching operation. Standard operation
gate “ON” voltage is not tested but guaranteed by design.

Note 8: The –1V absolute maximum on the SW pin is a transient
condition. It is guaranteed by design and not subject to test.

3724fa

3

LT3724

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Shutdown Threshold (Rising)
vs Temperature

1.38

1.37

1.36

1.35

1.34

1.33

SHUTDOWN THRESHOLD, RISING (V)

1.32
–50 25 75

–25 0 50 100 125

TEMPERATURE (°C)

V

vs I

CC

CC(LOAD)

8.2
TA = 25°C ICC = 20mA

8.1

8.0

7.9

(V)

CC

V

7.8

7.7

7.6

3724 G01

Shutdown Threshold (Falling)
vs Temperature V

1.26

1.25

1.24

1.23

1.22

1.21

SHUTDOWN THRESHOLD, FALLING (V)

1.20
–25 0 50 100 125

(V)

CC

V

–50

VCC vs V

9

T

A

8

7

6

5

4

= 25°C

25 75

TEMPERATURE (°C)

3724 G02

IN

vs Temperature

CC

8.2

8.1

8.0

7.9

(V)

CC

V

7.8

7.7

7.6

7.5
–50 25 75–25 0 50 100 125

TEMPERATURE (°C)

I

Current Limit vs Temperature

CC

70

60

50

40

CURRENT LIMIT (mA)

CC

I

30

ICC = 20mA

3724 G03

7.5
0

510

20 30 35

15 25

I

(mA)

CC (LOAD)

VCC UVLO Threshold (Rising)
vs Temperature

6.5

6.4

6.3

6.2

UVLO THRESHOLD, RISING (V)

6.1

CC

V

6.0

–50 25 75–25 0 50 100 125

TEMPERATURE (°C)

4

3724 G04

3724 G07

3

4

57

vs VCC (SHDN = 0V)

CC

25

TA = 25°C

20

15

(µA)

CC

I

10

5

0

246

0

11

6

8

VIN (V)

10

9

12

3724 G05

20

–50 25 75–25 0 50 100 125

TEMPERATURE (°C)

3724 G06

Error Amp Transconductance
vs TemperatureI

350

345

340

335

330

325

ERROR AMP TRANSCONDUCTANCE (µMhos)

810

VCC (V)

12 14 18

16

3724 G08

320

–50

20

–25 0

TEMPERATURE (°C)

50 100 125

25 75

3724 G09

3724fa

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT3724

I

(SENSE+ + SENSE–)

V

SENSE (CM)

400

300

200

(µA)

)

–

100

+ SENSE

+

0

(SENSE

I

–100

–200

0

0.5

1.0 1.5 2.0
V

SENSE (CM)

vs

2.5 4.53.5 5.04.03.0

Maximum Current Sense
Threshold vs Temperature

160

158

156

154

152

150

148

146

144

CURRENT SENSE THRESHOLD (mV)

142

140

–50 25 75

–25 0

TEMPERATURE (°C)

50 100 125

(V)

Operating Frequency
vs Temperature

TA = 25°C

3724 G10

230

220

210

200

190

OPERATING FREQUENCY (kHz)

180

170

–50

–25 0

V

UVLO Threshold (Rising)

IN

25 75

TEMPERATURE (°C)

50 100 125

3724 G11

vs Temperature

4.54

4.52

4.50

4.48

4.46

4.44

UVLO THRESHOLD, RISING (V)

IN

4.42

V

4.40
–50 25 75

–25 0

TEMPERATURE (°C)

3724 G13 3724 G14 3724 G15

50 100 125

Error Amp Reference
vs Temperature

1.234

1.233

1.232

1.231

1.230

1.229

ERROR AMP REFERENCE (V)

1.228

1.227
–50 25 75

–25 0

TEMPERATURE (°C)

V

UVLO Threshold (Falling)

IN

vs Temperature

3.86

3.84

3.82

3.80

3.78

UVLO THRESHOLD, FALLING (V)

IN

V

3.76
–50 25 75

–25 0

TEMPERATURE (°C)

50 100 125

50 100 125

3724 G12

3724fa

5

LT3724

U

UU

PI FU CTIO S

VIN (Pin 1): The VIN pin is the main supply pin and should
be decoupled to SGND with a low ESR capacitor located
close to the pin.

NC (Pin 2): No Connection.

SHDN (Pin 3): The SHDN pin has a precision IC enable

threshold of 1.35V (rising) with 120mV of hysteresis. It is
used to implement an undervoltage lockout (UVLO) cir­cuit. See Application Information section for implement­ing a UVLO function. When the SHDN pin is pulled below
a transistor V
entered, all internal circuitry is disabled and the V
current is reduced to approximately 10µA. Typical pin
input bias current is <10µA and the pin is internally
clamped to 6V.

C

(Pin 4): The soft-start pin is used to program the

SS

supply soft-start function. The pin is connected to V
a ceramic capacitor (CSS) and 200kΩ series resistor.
During start-up, the supply output voltage slew rate is
controlled to produce a 2µA average current through the
soft-start coupling capacitor. Use the following formula to
calculate C

C

= 2µA(tSS/V

SS

See the application section for more information on set­ting the rise time of the output voltage during start-up.
Shorting this pin to SGND disables the soft-start function.

BURST_EN (Pin 5): The BURST_EN pin is used to enable
or disable Burst Mode operation. Connect the BURST_EN
pin to ground to enable the burst mode function. Connect
the pin to V

(0.7V), a low current shutdown mode is

BE

for a given output voltage slew rate:

SS

)

OUT

to disable the burst mode function.

CC

supply

IN

OUT

via

optimize transient response. Connecting a 100pF or greater
high frequency bypass capacitor from this pin to ground
is recommended. When Burst Mode operation is enabled
(see Pin 5 description), an internal low impedance clamp
on the V

pin is set at 100mV below the burst threshold,

C

which limits the negative excursion of the pin voltage.
Therefore, this pin cannot be pulled low with a low imped­ance source. If the V

pin must be externally manipulated,

C

do so through a 1kΩ series resistance.

SGND (Pin 8, 17): The SGND pin is the low noise ground
reference. It should be connected to the –V

side of the

OUT

output capacitors. Careful layout of the PCB is necessary
to keep high currents away from this SGND connection.
See the Application Information section for helpful hints
on PCB layout of grounds.

SENSE

the current sense amplifier and is connected to the V

–

(Pin 9): The SENSE– pin is the negative input for

OUT

side of the sense resistor for step-down applications. The
sensed inductor current limit is set to 150mV across the
SENSE inputs.

SENSE

+

(Pin 10): The SENSE+ pin is the positive input for

the current sense amplifier and is connected to the induc­tor side of the sense resistor for step-down applications.
The sensed inductor current limit is set to 150mV across
the SENSE inputs.

PGND (Pin 11): The PGND pin is the high-current ground
reference for internal low side switch and the V

regulator

CC

circuit. Connect the pin directly to the negative terminal of
the V

decoupling capacitor. See the Application Infor-

CC

mation section for helpful hints on PCB layout of grounds.

(Pin 6): The output voltage feedback pin, VFB, is

V

FB

externally connected to the supply output voltage via a
resistive divider. The VFB pin is internally connected to the
inverting input of the error amplifier. In regulation, V

FB

is

1.231V.

V

(Pin 7): The VC pin is the output of the error amplifier

C

whose voltage corresponds to the maximum (peak) switch
current per oscillator cycle. The error amplifier is typically
configured as an integrator circuit by connecting an RC
network from the V

pin to SGND. This circuit creates the

C

dominant pole for the converter regulation control loop.
Specific integrator characteristics can be configured to

6

VCC (Pin 12): The VCC pin is the internal bias supply
decoupling node. Use low ESR 1µF ceramic capacitor to
decouple this node to PGND. Most internal IC functions
are powered from this bias supply. An external diode
connected from V

to the BOOST pin charges the

CC

bootstrapped capacitor during the off-time of the main
power switch. Back driving the VCC pin from an external DC
voltage source, such as the V

output of the buck

OUT

regulator supply, increases overall efficiency and reduces
power dissipation in the IC. In shutdown mode this pin
sinks 20µA until the pin voltage is discharged to 0V.

NC (Pin 13): No Connection.

3724fa

LT3724

U

UU

PI FU CTIO S

SW (Pin 14): In step-down applications the SW pin is
connected to the cathode of an external clamping Schottky
diode, the drain of the power MOSFET and the inductor.
The SW node voltage swing is from V
of the power MOSFET, to a Schottky voltage drop below
ground during the off-time of the power MOSFET. In start­up and in operating modes where there is insufficient
inductor current to freewheel the Schottky diode, an
internal switch is turned on to pull the SW pin to ground
so that the BOOST pin capacitor can be charged. Give
careful consideration in choosing the Schottky diode to
limit the negative voltage swing on the SW pin.

TG (Pin 15): The TG pin is the bootstrapped gate drive for
the top N-Channel MOSFET. Since very fast high currents
are driven from this pin, connect it to the gate of the power

during the on-time

IN

MOSFET with a short and wide, typically 0.02” width, PCB
trace to minimize inductance.

BOOST (Pin 16): The BOOST pin is the supply for the
bootstrapped gate drive and is externally connected to a
low ESR ceramic boost capacitor referenced to SW pin.
The recommended value of the BOOST capacitor,C
is 50 times greater that the total input capacitance of the
topside MOSFET. In most applications 0.1µF is adequate.
The maximum voltage that this pin sees is VIN + VCC,
ground referred, and is limited to 75V.

Exposed Pad (SGND) (Pin 17): The exposed leadframe is
internally connected to the SGND pin. Solder the exposed
pad to the PCB ground for electrical contact and optimal
thermal performance.

BOOST

,

3724fa

7

LT3724

U

U

W

FU CTIO AL DIAGRA

V

IN

UVLO
(<4V)

V

IN

RA

SHDN

RB

BURST_EN

V

R2

C

C

SS

SGND

1

3

5

FB

6

V

C

7

SS

1.185V

4

8

V

IN

C

IN

R1

C

C2

R

C

C

C1

–

–

g

m

ERROR

AMP

SOFT-START

DISABLE/BURST

ENABLE

+

–

8V V

CC

REGULATOR

+

+

1.231V

0.5V

~1V

3.8V

REGULATOR

FEEDBACK

REFERENCE

+

–

–

+

–

+

2µA

V

CC

UVLO
(<6V)

INTERNAL
SUPPLY RAIL

BURST MODE

OPERATION

DRIVE

CONTROL

SWITCH

LOGIC

DRIVE

CONTROL

CURRENT

SENSE

COMPARATOR

NOL

–

BST

UVLO

BOOST

16

C

BOOST

BOOSTED

SWITCH
DRIVER

OSCILLATOR

SQ

R

SLOPE COMP

GENERATOR

15

14

12

11

TG

SW

V

CC

PGND

M1

L1

R

SENSE

D2

C

VCC

D1

D3

(OPTIONAL)

V

OUT

C

OUT

+

+

+

–

10

9

SENSE

SENSE

–

8

3724 FD

3724fa