Linear Technology LT3695-5, LT3695, LT3695-3.3 Datasheet

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Page 1

LT3695 Series

1A Fault Tolerant Micropower

Step-Down Regulator

FEATURES

Wide Input Range:

Operation from 3.6V to 36V Overvoltage Lockout Protects Circuits Through 60V Transients

FMEA Fault Tolerant:

Output Stays at or Below Regulation Voltage During Adjacent Pin Short or When a Pin Is Left Floating

1A Output Current

Low Ripple (< 15mV

= 75μA for 12VIN to 3.3V

Adjustable Switching Frequency: 250kHz to 2.2MHz

Short-Circuit Protected

Synchronizable Between 300kHz and 2.2MHz

Output Voltage: 0.8V to 20V

Power Good Flag

Fixed Output Voltage Versions for 3.3V and 5V Available

Small, Thermally Enhanced 16-Pin MSOP Package

) Burst Mode® Operation

P-P

with No Load

OUT

APPLICATIONS

Automotive Battery Regulation

Automotive Entertainment Systems

Distributed Supply Regulation

Industrial Supplies

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.

DESCRIPTION

The LT®3695 series are adjustable frequency (250kHz to

2.2MHz) monolithic buck switching regulators that accept input voltages up to 36V and can safely sustain transient voltages up to 60V. The devices include a high efﬁ ciency switch, a boost diode, and the necessary oscillator, control and logic circuitry. Current mode topology is used for fast transient response and good loop stability. A SYNC pin allows the user to synchronize the part to an external clock, and to choose between low ripple Burst Mode operation and standard PWM operation.

The LT3695 regulators tolerate adjacent pin shorts or an open pin without raising the output voltage above its programmed value.

Low ripple Burst Mode operation maintains high efﬁ ciency at low output currents while keeping output ripple below 15mV in a typical application. Shutdown reduces input supply current to less than 1µA while a resistor and capacitor on the RUN/SS pin provide a controlled output voltage ramp (soft-start). Protection circuitry senses the current in the power switch and external Schottky catch diode to protect the LT3695 regulators against short-circuit conditions. Frequency foldback and thermal shutdown provide additional protection.

The LT3695 series is available in a thermally enhanced 16-pin MSOP package.

TYPICAL APPLICATION

5V Step-Down Converter

6.9V TO 36V

TRANSIENT TO 60V

2.2µF

16.2k

470pF

40.2k

RUN/SS

SYNC

VINBD

LT3695

GND PGND

BOOSTON OFF

f = 800kHz

Efﬁ ciency

100

OUT

> 6.9V

0.9A, V

> 12V

1A, V

0.22µF

10µH

102k

536k

10µF

3695 TA01a

EFFICIENCY (%)

VIN= 12V L = 10μH f = 800kHz

0.2 0.4 0.6 0.8 1

= 5V

OUT

= 3.3V

OUT

LOAD CURRENT (A)

3695 TA01b

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LT3695 Series

ABSOLUTE MAXIMUM RATINGS

VIN, RUN/SS Voltage (Note 3) ...................................60V

BOOST Pin Voltage ...................................................50V

BOOST Pin Above SW Pin .........................................30V

BD Voltage (LT3695) .................................................30V

, VC Voltage ............................................................5V

RT Pin Current .........................................................1mA

SYNC Voltage ............................................................20V

FB Voltage (LT3695) ....................................................5V

(Notes 1, 2)

OUT1, OUT2 Voltage (LT3695-3.3, LT3695-5) ...........16V

PG Voltage ................................................................30V

Operating Junction Temperature Range (Notes 4, 5)

LT3695E ............................................. –40°C to 125°C

LT3695I .............................................. –40°C to 125°C

LT3695H ............................................ –40°C to 150°C

Storage Temperature Range ................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec) ..................300°C

PIN CONFIGURATION

LT3695 LT3695-3.3, LT3695-5

TOP VIEW

PGND

RUN/SS

SYNC

16-LEAD PLASTIC MSOP

θJA = 40°C/W WITH EXPOSED PAD SOLDERED

= 110°C/W WITHOUT EXPOSED PAD SOLDERED

PGND

MSE PACKAGE

BOOST

GND

TOP VIEW

PGND

RUN/SS

SYNC

16-LEAD PLASTIC MSOP

θJA = 40°C/W WITH EXPOSED PAD SOLDERED

= 110°C/W WITHOUT EXPOSED PAD SOLDERED

PGND

MSE PACKAGE

BOOST

OUT1

OUT2

GND

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3695EMSE#PBF LT3695EMSE#TRPBF 3695 16-Lead Plastic MSOP –40°C to 125°C

LT3695IMSE#PBF LT3695IMSE#TRPBF 3695 16-Lead Plastic MSOP –40°C to 125°C

LT3695HMSE#PBF LT3695HMSE#TRPBF 3695 16-Lead Plastic MSOP –40°C to 150°C

LT3695EMSE-3.3#PBF LT3695EMSE-3.3#TRPBF 369533 16-Lead Plastic MSOP –40°C to 125°C

LT3695IMSE-3.3#PBF LT3695IMSE-3.3#TRPBF 369533 16-Lead Plastic MSOP –40°C to 125°C

LT3695HMSE-3.3#PBF LT3695HMSE-3.3#TRPBF 369533 16-Lead Plastic MSOP –40°C to 150°C

LT3695EMSE-5#PBF LT3695EMSE-5#TRPBF 36955 16-Lead Plastic MSOP –40°C to 125°C

LT3695IMSE-5#PBF LT3695IMSE-5#TRPBF 36955 16-Lead Plastic MSOP –40°C to 125°C

LT3695HMSE-5#PBF LT3695HMSE-5#TRPBF 36955 16-Lead Plastic MSOP –40°C to 150°C

Consult LTC Marketing for parts speciﬁ ed with wider operating temperature ranges. *The temperature grade is identiﬁ ed by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based ﬁ nish parts.

For more information on lead free part marking, go to: For more information on tape and reel speciﬁ cations, go to:

http://www.linear.com/leadfree/

http://www.linear.com/tapeandreel/

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LT3695 Series

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating temperature range, otherwise speciﬁ cations are at T

= 25°C. VIN = 10V, V

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Operating Voltage (Note 6) LT3695 VBD = 3.3V

< 3V

LT3695-3.3 V

LT3695-5 V

Overvoltage Lockout

Quiescent Current from V

LT3695

LT3695-3.3 V

LT3695-5 V

= 3.3V

OUT1,2

= 5V

OUT1,2

= 0.2V VBD = 3.3V

RUN/SS

= 10V, VBD = 3.3V, Not Switching

RUN/SS

= 10V, VBD = 0V, Not Switching

RUN/SS

= 10V, V

= 3.3V, Not Switching

OUT1,2

= 5V, Not Switching

OUT1,2

Quiescent Current from BD Pin LT3695 V

= 0.2V, VBD = 3.3V

RUN/SS

= 10V, VBD = 3.3V, Not Switching

RUN/SS

= 10V, VBD = 0V, Not Switching

RUN/SS

Quiescent Current from OUT1,2 Pins LT3695-3.3 V

LT3695-5 V

RUN/SS

= 0.2V = 10V, V

= 3.3V, Not Switching

OUT1,2

= 5V, Not Switching

OUT1,2

Minimum BD Pin Voltage: LT3695 2.8 3 V

Feedback Voltage: LT3695

FB Pin Bias Current: LT3695 FB Pin Voltage = 800mV

Reference Voltage Line Regulation 3.6V < V

< 36V 0.001 0.005 %/V

Output Voltage LT3695-3.3

LT3695-5

Error Amp g

IVC = ±1.5µA 430 µS

Error Amp Voltage Gain 1300 V/V

Source Current 50 µA

Sink Current 50 µA

VC Pin to Switch Current Gain 1.25 A/V

Switching Threshold 0.4 0.6 0.8 V

Clamp Voltage 2V

Switching Frequency RRT = 8.06k

= 29.4k

RRT = 158k

Minimum Switch Off-Time E- and I-Grades

H-Grade

Switch Current Limit (Note 7) SYNC = 0V

SYNC = 3.3V or Clocked

= 10V, unless otherwise noted. (Note 4)

RUN/SS

l l

36 38 39.9 V

792

785

3.27

3.25

4.95

4.925

1.98

0.9 225

l l

1.45

1.18

3.4

3.6

4.3

3.4 3.6 V

0.01 35 90

0.5 60

160

35 60 µA

0.01 55

10 65

800 800

0.5

100

–5

112

808 815

–5 –40 nA

3.3

5 5

2.2

1.0

250

130 130

1.7

1.4

3.33

3.35

5.05

5.075

2.42

1.1

275

210 250

1.66

MHz MHz

kHz

V V

µA µA µA

µA µA

mV mV

V V

ns ns

A A

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LT3695 Series

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the full operating temperature range, otherwise speciﬁ cations are at T

PARAMETER CONDITIONS MIN TYP MAX UNITS

Switch V

CESAT

DA Pin Current to Stop OSC 1.25 1.6 1.95 A

Switch Leakage Current V

Boost Schottky Diode Voltage Drop I

Boost Schottky Diode Reverse Leakage V

Minimum Boost Voltage (Note 8)

BOOST Pin Current ISW = 0.5A 10.5 17.5 mA

RUN/SS Pin Current V

RUN/SS Input Voltage High 2.5 V

RUN/SS Input Voltage Low 0.2 V

PG Leakage Current V

PG Sink Current V

PG Threshold as % of V V

(LT3695-3.3, LT3695-5)

OUT

PG Threshold Hysteresis

LT3695-3.3 Measured at OUT1,2, Pins 50 mV

LT3695-5 Measured at OUT1,2, Pins 75 mV

SYNC Threshold Voltage 300 550 800 mV

SYNC Input Frequency 0.3 2.2 MHz

(LT3695) or

LT3695 Measured at FB Pin 12 mV

ISW = 1A 350 mV

= 0V, VIN = 36V 0.01 1 µA

= 50mA 720 900 mV

BSD

= 10V, VBD = 0V 0.1 1 µA

= 2.5V

RUN/SS

= 10V

RUN/SS

= 5V 0.1 1 µA

= 0.4V

Measured at FB Pins (Pin Voltage Rising)

= 25°C. VIN = 10V, V

(LT3695) or OUT1,2 (LT3695-3.3, LT3695-5)

= 10V, unless otherwise noted. (Note 4)

RUN/SS

100 1000 µA

88 90 92 %

1.7 2.3 V

4.5 12

7.5 20

µA µA

Note 1: Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect the device reliability and lifetime.

Note 2: Positive currents ﬂ ow into pins, negative currents ﬂ ow out of pins. Minimum and maximum values refer to absolute values.

Note 3: Absolute maximum voltage at V nonrepetitive 1 second transients, and 36V for continuous operation.

Note 4: The LT3695E regulators are guaranteed to meet performance speciﬁ cations from 0°C to 125°C junction temperature. Speciﬁ cations over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3695I regulators are guaranteed over the full –40°C to 125°C operating junction temperature range. The LT3695H regulators are guaranteed over the full –40°C to 150°C operating junction temperature range.

and RUN/SS pins is 60V for

Note 5: These ICs include overtemperature protection that is intended to protect the devices during momentary overload conditions. Junction temperature will exceed the maximum operating junction temperature when overtemperature protection is active. Continuous operation above the speciﬁ ed maximum operating junction temperature may impair device reliability.

Note 6: This is the voltage necessary to keep the internal bias circuitry in regulation.

Note 7: Current limit guaranteed by design and/or correlation to static test. Slope compensation reduces current limit at higher duty cycles.

Note 8: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch.

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TYPICAL PERFORMANCE CHARACTERISTICS

LT3695 Series

= 25°C, unless otherwise noted.

Efﬁ ciency (V

L = 10µH f = 800kHz

EFFICIENCY (%)

0.1

OUT

VIN = 12V

VIN = 24V

LOAD CURRENT (mA)

No-Load Supply Current

140

120

100

SUPPLY CURRENT (µA)

10 2015 30

INPUT VOLTAGE (V)

= 5V, SYNC = 0V)

VIN = 34V

100

3695 G01

= 3.3V

OUT

3695 G04

1000

4025 35

Efﬁ ciency (V

L = 10µH f = 800kHz

EFFICIENCY (%)

0.1

LOAD CURRENT (mA)

No-Load Supply Current

1300

CATCH DIODE: DIODES, INC. B140

1200

= 12V

1100 1000

900 800 700 600 500 400

SUPPLY CURRENT (µA)

300 200 100

= 3.3V

OUT

INCREASED SUPPLY CURRENT DUE TO CATCH DIODE LEAKAGE AT HIGH TEMPERATURE

–50

= 3.3V, SYNC = 0V)

OUT

VIN = 12V

VIN = 34V

VIN = 24V

050–25 25 100

TEMPERATURE (°C)

100

3695 G02

1000

15075 125

3695 G05

Efﬁ ciency (V

100

VIN = 12V

= 3.3V

OUT

L = 10µH

f = 800kHz

EFFICIENCY (%)

0.1

Maximum Load Current

1.75

1.50

1.25

1.00

0.75

LOAD CURRENT (A)

0.50

0.25 05

= 3.3V, SYNC = 0V)

OUT

TYPICAL

LOAD CURRENT (mA)

SYNC = 0V SYNC = 3.3V

INPUT VOLTAGE (V)

100

MINIMUM

20 30 3525

1000

3695 G03

= 3.3V

OUT

L = 10µH f = 800kHz

3695 G06

POWER LOSS(W)

0.1

0.01

0.001

Maximum Load Current Maximum Load Current

1.50

1.25

1.00

0.75

LOAD CURRENT (A)

0.50

SYNC = 0V

0.25

SYNC = 5V

MINIMUM

20 30 3525

INPUT VOLTAGE (V)

TYPICAL

OUT

L = 10µH f = 800kHz

= 5V

3682 G07

1.50

TYPICAL

1.25

1.00

0.75

LOAD CURRENT (A)

0.50

SYNC = 0V

0.25

SYNC = 5V

INPUT VOLTAGE (V)

MINIMUM

14 16 18

= 5V

OUT

L = 4.7µH f = 2MHz

3695 G08

Maximum Load Current

1.75

TYPICAL

SYNC = 0V SYNC = 3.3V

INPUT VOLTAGE (V)

15 20 30 3525

1.50

1.25

1.00

0.75

LOAD CURRENT (A)

0.50

0.25

MINIMUM

= 1.8V

OUT

L = 10µH f = 500kHz

3695 G09

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LT3695 Series

TYPICAL PERFORMANCE CHARACTERISTICS

Switch Current Limit

1.9

1.7

1.5

1.3 SYNC > 0.8V

1.1

0.9

SWITCH CURRENT LIMIT (A)

0.7

0.5

OR CLOCKED

DUTY CYCLE (%)

BOOST Pin Current

BOOST PIN CURRENT (mA)

SYNC < 0.3V

60 80

100

3695 G10

(SYNC Pin Grounded)

1.9

–50

DC = 10%

DC = 90%

050–25 25 100

TEMPERATURE (°C)

1.7

1.5

1.3

1.1

0.9

SWITCH CURRENT LIMIT (A)

0.7

0.5

Feedback Voltage

810

800

790

780

FEEDBACK VOLTAGE (mV)

TA = 25°C, unless otherwise noted.

Switch Voltage Drop

400

300

200

VOLTAGE DROP (mV)

100

15075 125

3695 G11

0.50

0.25 SWITCH CURRENT (A)

Output Voltage: LT3695-3.3, LT3695-5

3.35

3.30

3.25

3.20

OUTPUT VOLTAGE (V)

3.15

LT3695-3.3

LT3695-5

0.75 1.00

3695 G12

5.15

5.10

5.05

5.00

4.95

1.25

OUTPUT VOLTAGE (V)

0.25

Switching Frequency

1.20 RT = 29.4k

1.15

1.10

1.05

1.00

0.95

FREQUENCY (MHz)

0.90

0.85

0.80

–50

0.50

0.75 1.00

SWITCH CURRENT (A)

050–25 25 100

TEMPERATURE (°C)

3695 G13

3695 G16

1.25

15075 125

770

–50

050–25 25 100

TEMPERATURE (°C)

Frequency Foldback: LT3695

1200

RRT = 29.4k

1000

800

600

400

FREQUENCY (kHz)

200

100 200 300 400 600 700 800500

FB PIN VOLTAGE (mV)

3695 G14

3695 G17

15075 125

900

3.10 –50

1200

1000

800

600

400

FREQUENCY (kHz)

200

050–25 25 100

TEMPERATURE (°C)

15075 125

3695 G15

Frequency Foldback: LT3695-3.3

RRT = 29.4k

0.5

1.51 2 2.5

OUTPUT VOLTAGE (V)

3 3.5

3695 G18

4.90

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TYPICAL PERFORMANCE CHARACTERISTICS

LT3695 Series

= 25°C, unless otherwise noted.

Frequency Foldback: LT3695-5

1200

RRT = 29.4k

1000

800

600

400

FREQUENCY (kHz)

200

OUTPUT VOLTAGE (V)

RUN/SS Pin Current

RUN/SS PIN CURRENT (µA)

10 15 20 3025

RUN/SS PIN VOLTAGE (V)

324

3695 G19

35 40

3695 G22

Minimum Switch On-Time

120

= 1A

OUT

100

MINIMUM SWITCH ON TIME (ns)

–50

050–25 25 100

TEMPERATURE (°C)

Boost Diode Forward Voltage

1.4

1.2

1.0

(V)

0.8

0.6

BOOST DIODE V

0.4

0.2

0.25

BOOST DIODE CURRENT (A)

0.5 0.75

3695 G20

3695 G23

Soft-Start

2.0 SYNC < 0.3V

1.8

1.6

1.4

1.2

1.0

0.8

0.6

SWITCH CURRENT LIMIT (A)

0.4

0.2

15075 125

0.5

1.0 1.5 2.0 3.02.5

RUN/SS PIN VOLTAGE (V)

3.5

3695 G21

Error Ampliﬁ er Output Current: LT3695

60 50 40

20 10

–10

PIN CURRENT (µA)

–20

–30

–40 –50

–60

–200

–100

FB PIN ERROR VOLTAGE (mV)

0 100

200

3659 G24

Error Ampliﬁ er Output Current: LT3695-3.3

50 40

20 10

–10

PIN CURRENT (µA)

–20

–30

–40 –50

–60

–750

–250 0 250

–500

OUTPUT ERROR VOLTAGE (mV)

500 750

3695 G25

Error Ampliﬁ er Output Current: LT3695-5

60 50 40

20 10

–10

PIN CURRENT (µA)

–20

–30

–40 –50

–60

–900

–300 0 300

–600

OUTPUT ERROR VOLTAGE (mV)

600 900

3695 G26

Minimum Input Voltage

5.0 V

= 3.3V

OUT

L = 10µH f = 800kHz

4.5

4.0

3.5

3.0

INPUT VOLTAGE (V)

2.5

2.0

10 100

LOAD CURRENT (mA)

1000

3695 G27

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LT3695 Series

TYPICAL PERFORMANCE CHARACTERISTICS

Minimum Input Voltage

6.5 V

= 5V

OUT

L = 10µH f = 800kHz

6.0

5.5

5.0

INPUT VOLTAGE (V)

4.5

10 100

LOAD CURRENT (mA)

1000

3695 G28

Maximum VIN for Full Frequency VC Voltages

TA = 25˚C

(V)

0.1

TA = 85˚C

0.2

0.3 0.4 0.5 0.7 0.90.80.6 LOAD CURRENT(A)

= 5V

OUT

L = 4.7µH f = 2MHz SYNC = 5V

3695 G31

Maximum VIN for Full Frequency

(V)

2.5

2.0

1.5

VOLTAGE (V)

1.0

0.5

–50

TA = 25˚C

TA = 85˚C

0.2

0.3 0.4 0.5 0.7 0.90.80.6

0.1 LOAD CURRENT(A)

CURRENT LIMIT CLAMP

SWITCHING THRESHOLD

050–25 25 100

TEMPERATURE (°C)

OUT

L = 10µH f = 800kHz SYNC = 3.3V

TA = 25°C, unless otherwise noted.

Maximum VIN for Full Frequency

= 3.3V

3695 G29

(V)

TA = 25˚C

TA = 85˚C

0.2

0.1

0.3 0.4 0.5 0.7 0.90.80.6 LOAD CURRENT(A)

Switching Waveforms, 60V Input Voltage Transient

10V/DIV

20V/DIV

OUT

5V/DIV

= 12V, FRONT PAGE APPLICATION

= 500mA

LOAD

15075 125

3695 G32

5ms/DIV

= 5V

OUT

L = 10µH f = 800kHz SYNC = 5V

3695 G30

3695 G33

Switching Waveforms, Burst Mode Operation

5V/DIV

0.2A/DIV

OUT

20mV/DIV

= 12V, FRONT PAGE APPLICATION

= 5mA

LOAD

5µs/DIV

3695 G34

5V/DIV

0.2A/DIV

OUT

20mV/DIV

Switching Waveforms, Transition from Burst Mode Operation to Full Frequency

1µs/DIV

VIN = 12V, FRONT PAGE APPLICATION

= 55mA

LOAD

3695 G35

5V/DIV

0.5A/DIV

OUT

20mV/DIV

Switching Waveforms, Full Frequency Continuous Operation

1µs/DIV

VIN = 12V, FRONT PAGE APPLICATION

= 500mA

LOAD

3695 G36

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LT3695 Series

PIN FUNCTIONS

PGND (Pin 1, Exposed Pad Pin 17/Pin 1, Exposed Pad Pin 17): This is the power ground used by the catch diode

(D1 in the Block Diagram) when its anode is connected to the DA pin. The exposed pad may be soldered to the PCB in order to lower the thermal resistance.

DA (Pin 2/Pin 2): Connect the anode of the catch diode (D1) to this pin. Internal circuitry senses the current through the catch diode providing frequency foldback in extreme situations.

NC (Pins 3, 10, 12/Pins 3, 10, 15): No Connects. These pins are not connected to internal circuitry and must be left ﬂ oating to ensure fault tolerance.

SW (Pin 4/Pin 4): The SW pin is the output of the internal power switch. Connect this pin to the inductor, catch diode and boost capacitor.

RUN/SS (Pin 5/Pin 5): The RUN/SS pin is used to put the LT3695 regulators in shutdown mode. Tie to ground to shut down the LT3695 regulators. Tie to 2.5V or more for normal operation. RUN/SS also provides a soft-start function; see the Applications Information section for more information.

RT (Pin 6/Pin 6): Oscillator Resistor Input. Connect a resistor from this pin to ground to set the switching frequency.

SYNC (Pin 7/Pin 7): This is the external clock synchronization input. Ground this pin with a 100k resistor for low ripple Burst Mode operation at low output loads. Tie to

0.8V or more for pulse-skipping mode operation. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1µs. Note that the maximum load current depends on which mode is chosen. See the Applications Information section for more information.

(LT3695/LT3695-3.3, LT3695-5)

(Pin 8/Pin 8): The VIN pin supplies current to the

internal regulator and to the internal power switch. This pin must be locally bypassed.

(Pin 9/Pin 9): The VC pin is the output of the internal

error ampliﬁ er. The voltage on this pin controls the peak switch current. Tie an RC network from this pin to ground to compensate the control loop.

FB (Pin 11) LT3695: The LT3695 regulates the FB pin to 0.8V. Connect the feedback resistor divider tap to this pin.

PG (Pin 13/Pin 11): The PG pin is the open-collector output of an internal comparator. PG remains low until the FB pin (LT3695) or the OUT1,2 pins (LT3695-3.3, LT3695-5) are within 10% of the ﬁ nal regulation voltage. PG output is valid when V RUN/SS is high.

GND (Pin 14/Pin 12): The GND pin is the ground of all the internal circuitry. Tie directly to the local GND plane.

OUT1, OUT2, (Pins 14, 13) LT3695-3.3, LT3695-5: These pins connect to the anode of the boost Schottky diode and also supply current to the internal regulator. They also connect to the internal feedback resistors and must be connected to the output.

BD (Pin 15) LT3695: This pin connects to the anode of the boost Schottky diode and also supplies current to the LT3695’s internal regulator.

BOOST (Pin 16/Pin 16): This pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. Connect a capacitor (typically

0.22µF) between BOOST and SW.

is above the minimum input voltage and

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Page 10

LT3695 Series

BLOCK DIAGRAM

INTERNAL 0.8V REF

SYNC

RUN/SS

SOFT-START

+ –

0.720V

FBGND

ERROR AMP

+ –

R1R2

OVLO

LT3695

SLOPE COMP

OSCILLATOR

250kHz TO 2.2MHz

SYNC

OUT

OUTB

– +

Burst Mode

VC CLAMP

R S

DETECT

DISABLE

THERMAL

SHUTDOWN

BOOST

OUT

–

3695 BDa

PGND

LT3695-3.3/LT3695-5

INTERNAL 0.8V REF

SYNC

RUN/SS

SOFT-START

0.720V

–

GND

ERROR AMP

+ –

R1R2

OVLO

SLOPE COMP

OSCILLATOR

250kHz TO 2.2MHz

SYNC

OUT

OUTB

– +

Burst Mode

VC CLAMP

R S

DETECT

DISABLE

THERMAL

SHUTDOWN

+ –

PGND

BOOST

PGND

OUT2

OUT1

OUT

3695 BD

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Page 11

OPERATION

LT3695 Series

The LT3695 series are constant-frequency, current mode step-down regulators. An oscillator, with frequency set by

, enables an RS ﬂ ip-ﬂ op, turning on the internal power

switch. An ampliﬁ er and comparator monitor the current ﬂ owing between the V off when this current reaches a level determined by the voltage at V voltage through an external resistor divider tied to the FB pin (LT3695) or through an internal resistor divider connected to the output voltage (LT3695-3.3, LT3695-5), and servos the V more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the V provides current limit. The V voltage on the RUN/SS pin; soft-start is implemented by generating a voltage ramp at the RUN/SS pin using an external resistor and capacitor.

An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the V but if the BD pin is connected to an external voltage higher than 3V (LT3695) or if the output voltage connected to the OUT 1 and OUT2 pins exceeds 3V (LT3695-3.3, LT3695-5), bias power will be drawn from the external source. This improves efﬁ ciency. The RUN/SS pin is used to place the LT3695 regulators in shutdown, disconnecting the output and reducing the input current to less than 1µA.

The switch driver operates from either the input or from the BOOST pin. An external capacitor and the internal boost diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for efﬁ cient operation.

. An error ampliﬁ er measures the output

pin. If the error ampliﬁ er’s output increases,

and SW pins, turning the switch

pin is also clamped to the

pin,

To further optimize efﬁ ciency, the LT3695 regulators automatically switch to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 75µA in a typical application.

The oscillator reduces the LT3695 regulators’ operating frequency when the voltage at the FB pin (LT3695) or the OUT1,2 pins (LT3695-3.3, LT3695-5) is low. This frequency foldback helps to control the output current during start-up and overload conditions.

Internal circuitry monitors the current ﬂ owing through the catch diode via the DA pin and delays the generation of new switch pulses if this current is too high (above 1.6A nominal). This mechanism also protects the part during short-circuit and overload conditions by keeping the current through the inductor under control.

The LT3695 regulators contain a power good comparator which trips when the FB pin (LT3695) or the OUT1,2 pins (LT3695-3.3, LT3695-5) are at 90% of their regulated value. The PG output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the LT3695 regulators are enabled and V minimum input voltage.

The LT3695 regulators have an overvoltage protection feature which disables switching action when V 38V (typical) during transients. The LT3695 regulators can then safely sustain transient input voltages up to 60V.

is above the

goes above

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Page 12

LT3695 Series

APPLICATIONS INFORMATION

FB Resistor Network (LT3695)

The output voltage of the LT3695 is programmed with a resistor divider between the output and the FB pin. Choose the resistor values according to:

⎛ ⎜

⎝

OUT

⎞

1= −

⎟

⎠

Reference designators refer to the Block Diagram of the LT3695. 1% resistors are recommended to maintain output voltage accuracy.

Setting the Switching Frequency

The LT3695 regulators use a constant-frequency PWM architecture that can be programmed to switch from 250kHz to 2.2MHz by using a resistor tied from the RT pin to ground. A table showing the necessary R

value for

a desired switching frequency is in Table 1.

Table 1. Switching Frequency vs RT Value

SWITCHING FREQUENCY (MHz) RT VALUE (kΩ)

0.25 158

0.3 127

0.4 90.9

0.5 71.5

0.6 57.6

0.7 47.5

0.8 40.2

0.9 34

1.0 29.4

1.2 22.6

1.4 18.2

1.6 14.7

1.8 12.1

2.0 9.76

2.2 8.06

Operating Frequency Trade-Offs

Selection of the operating frequency is a trade-off between efﬁ ciency, component size, minimum dropout voltage and maximum input voltage. The advantage of high frequency operation is that smaller inductor and capacitor values may be used. The disadvantages are lower efﬁ ciency, lower maximum input voltage and higher dropout voltage. The highest acceptable switching frequency (f

SW(MAX)

) for a

given application can be calculated as follows:

OUT D

()

− +

is the output

OUT

SW MAX

()

tVVV

ON MIN IN SW D

where VIN is the typical input voltage, V voltage, V

is the catch diode drop (~0.5V) and VSW is the

internal switch drop (~0.5V at max load). This equation shows that lower switching frequency is necessary to safely accommodate high V

IN/VOUT

ratio. Also, as shown in the Input Voltage Range section, lower frequency allows a lower dropout voltage. Input voltage range depends on the switching frequency because the LT3695 regulators’ switch has ﬁ nite minimum on and off times. An internal timer forces the switch to be off for at least t

OFF(MIN)

per

cycle; this timer has a maximum value of 210ns (250ns

> 125°C). On the other hand, delays associated with

for T

turning off the power switch dictate the minimum on-time, t

ON(MIN)

, before the switch can be turned off; t

ON(MIN)

has a maximum value of 150ns over temperature. The minimum and maximum duty cycles that can be achieved taking minimum on and off times into account are:

where fSW is the switching frequency, t minimum switch on time (150ns), and t minimum switch off time (210ns, 250ns for T

= fSWt

MIN

= 1 – fSWt

MAX

ON(MIN)

OFF(MIN)

ON(MIN)

OFF(MIN)

> 125°C).

is the

These equations show that the duty cycle range increases when the switching frequency is decreased.

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Page 13

APPLICATIONS INFORMATION

LT3695 Series

A good choice of switching frequency should allow an adequate input voltage range (see Input Voltage Range section) and keep the inductor and capacitor values small.

Input Voltage Range

The minimum input voltage is determined by either the LT3695 regulators’ minimum operating voltage of ~3.6V

> 3V) or by their maximum duty cycle (see equation

in Operating Frequency Trade-Offs section). The minimum input voltage due to duty cycle is:

IN MIN

where V

IN(MIN)

−

OUT D

SW OFF MIN

()

− +

DSW()

is the minimum input voltage, and t

OFF(MIN)

is the minimum switch off time. Note that a higher switching frequency will increase the minimum input voltage. If a lower dropout voltage is desired, a lower switching frequency should be used.

The maximum input voltage for LT3695 regulator applications depends on switching frequency, the absolute maximum ratings of the V

and BOOST pins and the operating

mode. The LT3695 regulators can operate from continuous input voltages up to 36V. Input voltage transients of up to 60V are also safely withstood. However, note that while

> V

(overvoltage lockout, 38V typical), the LT3695

OVLO

regulators will stop switching, allowing the output to fall out of regulation.

For a given application where the switching frequency and the output voltage are already ﬁ xed, the maximum input voltage that guarantees optimum output voltage ripple for that application can be found by applying the following expression:

IN MAX

where V V

OUT

IN(MAX)

is the output voltage, VD is the catch diode drop

(~0.5V), V

is the switching frequency (set by RT) and t

OUT D

SW ON MIN

()

− +

DSW()

is the maximum operating input voltage,

is the internal switch drop (~0.5V at max load),

ON(MIN)

is the minimum switch on time (~150ns). Note that a higher switching frequency will reduce the maximum operating

input voltage. Conversely, a lower switching frequency will be necessary to achieve optimum operation at high input voltages.

Special attention must be paid when the output is in start-up, short-circuit or other overload conditions. During these events, the inductor peak current might easily reach and even exceed the maximum current limit of the LT3695 regulators, especially in those cases where the switch already operates at minimum on-time. The circuitry monitoring the current through the catch diode via the DA pin prevents the switch from turning on again if the inductor valley current is above 1.6A nominal. In these cases, the inductor peak current is therefore the maximum current limit of the LT3695 regulators plus the additional current overshoot during the turn off delay due to minimum on time:

LPEAK

where I

L(PEAK)

is the peak inductor current, V

IN MAX OUT OL

−

() ()

•=+

ON MIN()

()

IN(MAX)

is the maximum expected input voltage, L is the inductor value, t

ON(MIN)

is the minimum on time and V

OUT(OL)

is the output voltage under the overload condition. The parts are robust enough to survive prolonged operation under these conditions as long as the peak inductor current does not exceed 3.5A. Inductor current saturation and excessive junction temperature may further limit performance.

Input voltage transients of up to V

are acceptable

OVLO

regardless of the switching frequency. In this case, the LT3695 regulators may enter pulse-skipping operation where some switching pulses are skipped to maintain output regulation. In this mode the output voltage ripple and inductor current ripple will be higher than in normal operation.

Input voltage transients above V

and up to 60V can

OVLO

be tolerated. However, since the parts will stop switching during these transients, the output will fall out of regulation and the output capacitor may eventually be completely discharged. This case must be treated then as a start-up condition as soon as V

returns to values below V

OVLO

and the part starts switching again.

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Page 14

LT3695 Series

APPLICATIONS INFORMATION

Inductor Selection and Maximum Output Current

A good ﬁ rst choice for the inductor value is:

LV V

=+()•

OUT D

where fSW is the switching frequency in MHz, V output voltage, V

.18

is the

OUT

is the catch diode drop (~0.5V) and L

is the inductor value in µH.

The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be about 30% higher. To keep the efﬁ ciency high, the series resistance (DCR) should be less than 0.1, and the core material should be intended for high frequency applications. Table 2 lists several vendors and suitable types.

For robust operation in fault conditions (start-up or shortcircuit) and high input voltage (>30V), the saturation current should be chosen high enough to ensure that the inductor peak current does not exceed 3.5A. For example, an application running from an input voltage of 36V using a 10µH inductor with a saturation current of 2.5A will tolerate the mentioned fault conditions.

The optimum inductor for a given application may differ from the one indicated by this simple design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. If your load is lower than the maximum load current, then you can relax the value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor, or one with a lower DCR resulting in higher efﬁ ciency. Be aware that if the inductance differs from the simple rule above, then the maximum load current will depend on input voltage. In addition, low inductance may result in discontinuous mode operation, which further reduces maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology’s Application Note 44. Finally, for duty cycles greater than 50% (V

OUT/VIN

> 0.5), a minimum inductance

is required to avoid sub-harmonic oscillations:

LVV

=+()•

MIN OUT D

.12

The current in the inductor is a triangle wave with an average value equal to the load current. The peak inductor and switch current is:

III

SW PEAK L PEAK OUT MAX

where I

== +

()() ()

L(PEAK)

is the peak inductor current, I

the maximum output load current and ΔI

OUT(MAX)

is the inductor

ripple current. The LT3695 regulators limit their switch current in order to protect themselves and the system from overload faults. Therefore, the maximum output current that the LT3695 regulators will deliver depends on the switch current limit, the inductor value and the input and output voltages.

When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. This gives the peak-to-peak ripple current in the inductor:

DC V V

− +()•( )

ΔI

•

OUT D

where fSW is the switching frequency of the LT3695 regulators, DC is the duty cycle and L is the value of the inductor.

To maintain output regulation, the inductor peak current must be less than the LT3695 regulators’ switch current limit, I

. If the SYNC pin is grounded, I

LIM

is at least

LIM

1.45A at low duty cycles and decreases to 1.1A at DC = 90%. If the SYNC pin is tied to 0.8V or more or if it is tied to a clock source for synchronization, I

is at least

LIM

1.18A at low duty cycles and decreases to 0.85A at DC = 90%. The maximum output current is also a function of the chosen inductor value and can be approximated by the following expressions depending on the SYNC pin conﬁ guration:

For the SYNC pin grounded:

OUT MAX LIM

()

ΔΔ

ADC

.•(.•)= − = −−

145 1 024

For the SYNC pin tied to 0.8V or more, or tied to a clock source for synchronization:

OUT MAX LIM

()

ΔΔ

ADC

.•(.•)= − = −−

118 1 029

3695fa

Page 15

APPLICATIONS INFORMATION

LT3695 Series

Choosing an inductor value so that the ripple current is small will allow a maximum output current near the switch current limit.

Table 2. Inductor Vendors

VENDOR URL PART SERIES TYPE

Murata www.murata.com LQH55D Open

TDk www.componenttdk.com SLF7045

SLF10145

Toko www.toko.com D62CB

D63CB

D73C

D75F

Coilcraft www.coilcraft.com MSS7341

MSS1038

Sumida www.sumida.com CR54

CDRH74

CDRH6D38

CR75

Shielded Shielded

Shielded Shielded Shielded

Open

Shielded Shielded

Open Shielded Shielded

Open

One approach to choosing the inductor is to start with the simple rule given above, look at the available inductors, and choose one to meet cost or space goals. Then use these equations to check that the LT3695 regulators will be able to deliver the required output current. Note again that these equations assume that the inductor current is continuous. Discontinuous operation occurs when I is less than ΔI

/2.

OUT

Input Capacitor

Bypass the input of the LT3695 regulators’ circuit with a ceramic capacitor of X7R or X5R type. Y5V types have poor performance over temperature and applied voltage, and should not be used. A 2.2µF to 10µF ceramic capacitor is adequate to bypass the LT3695 regulators and will easily handle the ripple current. Note that larger input capacitance is required when a lower switching frequency is used. If the input power source has high impedance, or there is signiﬁ cant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a lower performance electrolytic capacitor.

Step-down regulators draw current from the input supply in pulses with very fast rise and fall times. The input capacitor is required to reduce the resulting voltage ripple at the LT3695 regulators and to force this very high frequency switching current into a tight local loop, minimizing

EMI. A 2.2µF capacitor is capable of this task, but only if it is placed close to the LT3695 regulators (see the PCB Layout section for more information). A second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT3695 regulators. A ceramic input capacitor combined with trace or cable inductance forms a high-Q (underdamped) tank circuit. If the LT3695 regulators circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3695 regulators’ voltage rating. For details see Application Note 88.

Output Capacitor and Output Ripple

The output capacitor has two essential functions. Along with the inductor, it ﬁ lters the square wave generated by the LT3695 regulators to produce the DC output. In this role it determines the output ripple, and low impedance at the switching frequency is important. The second function is to store energy in order to satisfy transient loads and stabilize the LT3695 regulators’ control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. A good starting value is:

OUT

where fSW is in MHz, and C

OUT

is the recommended

OUT

output capacitance in µF. Use X5R or X7R types. This choice will provide low output ripple and good transient response. Transient performance can be improved with a higher value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. A lower value of output capacitor can be used to save space and cost but transient performance will suffer. See the Frequency Compensation section to choose an appropriate compensation network.

When choosing a capacitor, look carefully through the data sheet to ﬁ nd out what the actual capacitance is under operating conditions (applied voltage and temperature). A physically larger capacitor, or one with a higher voltage rating, may be required. High performance tantalum or electrolytic capacitors can be used for the output capacitor.

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Page 16

LT3695 Series

APPLICATIONS INFORMATION

Table 3. Capacitor Vendors

VENDOR PHONE URL PART SERIES COMMANDS

Panasonic (714) 373-7366 www.panasonic.com Ceramic, Polymer, Tantalum EEF Series

Kemet (864) 963-6300 www.kemet.com Ceramic, Tantalum T494, T495

Sanyo (408) 749-9714 www.sanyovideo.com Ceramic, Polymer, Tantalum POSCAP

Murata (408) 436-1300 www.murata.com Ceramic

AVX www.avxcorp.com Ceramic, Tantalum TPS Series

Taiyo Yuden (864) 963-6300 www.taiyo-yuden.com Ceramic

Low ESR is important, so choose one that is intended for use in switching regulators. The ESR should be speciﬁ ed by the supplier, and should be 0.05 or less. Such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low ESR. Table 3 lists several capacitor vendors.

Diode Selection

The catch diode (D1 from Block Diagram) conducts current only during switch off time. Average forward current in normal operation can be calculated from:

= I

D(AVG)

• (1 – DC)

OUT

where DC is the duty cycle. The only reason to consider a diode with larger current rating than necessary for nominal operation is for the case of shorted or overloaded output conditions. For the worst case of shorted output the diode average current will then increase to a value that depends on the following internal parameters: switch current limit, catch diode (DA pin) current threshold and minimum on-time. The worst case (taking maximum values for the above mentioned parameters) is given by the following expression:

D AVG MAX

()

••=+2 L

150

Table 4. Schottky Diodes

PART NUMBER VR (V) I

On-Semiconducor

MBR0520L 20 0.5

MBR0540 40 0.5 620

MBRM120E 20 1 530 595

MBRM140 40 1 550

Diodes Inc.

B0530W 30 0.5

B0540W 40 0.5 620

B120 20 1 500

B130 30 1 500

B140 40 1 500

B220 20 2 500

B230 30 2 500

B140HB 40 1 530

DFLS240L 40 2 500

DFLS140 40 1.1 510

B240 40 2 500

Central Semiconductor

CMSH1-40M 40 1 500

CMSH1-40ML 40 1 400

CMSH2-40M 40 2 550

CMSH2-40L 40 2 400

CMSH2-40 40 2 500

(A) VF at 1A (mV) VF at 2A (mV)

AVE

Peak reverse voltage is equal to the regulator input voltage if it is below the overvoltage protection threshold. This feature keeps the switch off for V

> V

(39.9V maxi-

OVLO

mum). For inputs up to the maximum operating voltage of 36V, use a diode with a reverse voltage rating greater

than the input voltage. If transients at the input of up to 60V are expected, use a diode with a reverse voltage rating of 40V. Table 4 lists several Schottky diodes and their manufacturers. If operating at high ambient temperatures, consider using a Schottky with low reverse leakage.

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Page 17

APPLICATIONS INFORMATION

LT3695 Series

Audible Noise

Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can sometimes cause problems when used with the LT3695 regulators due to their piezoelectric nature. When in Burst Mode operation, the LT3695 regulators’ switching frequency depends on the load current, and at very light loads the LT3695 regulators can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT3695 regulators operate at a lower current limit during Burst Mode operation, the noise is typically very quiet. If this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output.

Frequency Compensation

The LT3695 regulators use current mode control to regulate the output. This simpliﬁ es loop compensation. In particular, the LT3695 regulators do not require the ESR of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. Frequency compensation is provided by the components tied to the V Generally a capacitor (C

pin, as shown in Figure 1.

) and a resistor (RC) in series to

ground are used. In addition, there may be a lower value capacitor in parallel. This capacitor (C

) is used to ﬁ lter

noise at the switching frequency, and is required only if a phase-lead capacitor (C

, LT3695 only) is used or if the

output capacitor has high ESR.

Loop compensation determines the stability and transient performance. Optimizing the design of the compensation network depends on the application and type of output capacitor. A practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. Stability should then be checked across all operating conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. Figure 1 shows an equivalent circuit for the LT3695 regulators control loop. The error ampliﬁ er is a transconductance ampliﬁ er with ﬁ nite output impedance. The power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance ampliﬁ er generating an output current proportional to the voltage at the V

pin.

Note that the output capacitor integrates this current, and that the capacitor on the V

pin (CC) integrates the error

ampliﬁ er output current, resulting in two poles in the loop. In most cases a zero is required and comes from either the output capacitor ESR or from a resistor R

. This simple model works well as long as the value of the

in series with

inductor is not too high and the loop crossover frequency is much lower than the switching frequency. A phase lead capacitor (C

, LT3695 only) across the feedback divider

may improve the transient response. Figure 2 shows the transient response when the load current is stepped from 300mA to 650mA and back to 300mA.

LT3695

CURRENT MODE

POWER STAGE

gm = 1.25S

gm = 430μS

Figure 1. Model for Loop Response. Note That R1 and R2 Are

Integrated in the LT3695-3.3 and LT3695-5

GND

–

0.8V

POLYMER

TANTALUM

ELECTROLITIC

OUTPUT

ESR

3695 F01

CERAMIC

OUT

100mV/DIV

LOAD

0.5A/DIV

20µs/DIV

Figure 2. Transient Load Response of the LT3695 Regulators. A 3.3V as the Load Current Is Stepped from 300mA to 650mA

Typical Application with VIN = 12V

OUT

3695 F02

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Page 18

LT3695 Series

APPLICATIONS INFORMATION

Low Ripple Burst Mode Operation

The LT3695 regulators are capable of operating in either low ripple Burst Mode operation or pulse-skipping mode which are selected using the SYNC pin. See the Synchronization section for more information.

To enhance efﬁ ciency at light loads, the LT3695 regulators can be operated in low ripple Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LT3695 regulators deliver single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. Because the LT3695 regulators deliver power to the output with single, low current pulses, the output ripple is kept below 15mV for a typical application. In addition, V

and BD (LT3695), and OUT1,2

(LT3695-3.3, LT3695-5) quiescent currents are reduced to typically 35µA, 55µA and 65µA, respectively, during the sleep time. As the load current decreases towards a no-load condition, the percentage of time that the LT3695 regulators operate in sleep mode increases and the average input current is greatly reduced resulting in high efﬁ ciency even at very low loads (see Figure 3). At higher output loads (above about 70mA for the front page application) the LT3695 regulators will be running at the frequency programmed by the R

resistor, and will be operating in

standard PWM mode. The transition between PWM and low ripple Burst Mode operation is seamless, and will not disturb the output voltage.

If low quiescent current is not required, tie SYNC high to select pulse-skipping mode. The beneﬁ t of this mode is that the LT3695 regulators will enter full frequency standard

PWM operation at a lower output load current than when in Burst Mode operation. With the SYNC pin tied low, the front page application circuit will switch at full frequency at output loads higher than about 100mA. With the SYNC pin tied high, the front page application circuit will switch at full frequency at output loads higher than about 30mA. The maximum load current that the LT3695 regulators can supply is reduced when SYNC is high.

BOOST Pin Considerations

Capacitor C3 and the internal boost Schottky diode (see the Block Diagram) are used to generate a boost voltage that is higher than the input voltage. In most cases a 0.22µF capacitor will work well. Figure 4 shows three ways to arrange the boost circuit for the LT3695 regulators. The BOOST pin must be more than 2.3V above the SW pin for best efﬁ ciency. For outputs of between 3V and 8V, the standard circuit (Figure 4a) is best. For outputs between

2.8V and 3V, use a 1µF boost capacitor. A 2.5V output presents a special case because it is marginally adequate to support the boosted drive stage while using the internal boost diode. For reliable BOOST pin operation with 2.5V outputs use a good external Schottky diode (such as the ON Semi MBR0540), and a 1µF boost capacitor (see Figure 4b). For lower output voltages the boost diode can be tied to the input (Figure 4c), or to another supply greater than

2.8V. Keep in mind that a minimum input voltage of 4.3V is required if the voltage at the BD pin is smaller than 3V. Tying BD to V

reduces the maximum input voltage to

25V. The circuit in Figure 4a is more efﬁ cient because the BOOST pin current and BD pin quiescent current come from a lower voltage source. You must also be sure that the maximum voltage ratings of the BOOST and BD pins are not exceeded.

5V/DIV

0.2A/DIV

OUT

20mV/DIV

5µs/DIV

= 12V, FRONT PAGE APPLICATION

= 5mA

LOAD

Figure 3. Switching Waveforms, Burst Mode Operation

3695 F03

As mentioned, a minimum of 2.5V across the BOOST capacitor is required for proper operation of the internal BOOST circuitry to provide the base current for the power NPN switch. For BD pin voltages higher than 3V, the excess voltage across the BOOST capacitor does not bring an increase in performance but dissipates additional power in the internal BOOST circuitry instead. The BOOST circuitry tolerates reasonable amounts of power, however excessive power dissipation on this circuitry may impair reliability. For reliable operation, use no more than 8V on the BD pin for

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Page 19

APPLICATIONS INFORMATION

LT3695 Series

(4a) For V

GND PGND

OUT

GND PGND

(4b) For 2.5V < V

(4c) For V

BOOST

LT3695

> 2.8V, V

BOOST

LT3695

OUT

BOOST

LT3695

GND PGND

< 2.5V, V

OUT

IN(MIN)

< 2.8V, V

3695 F04a

= 4.3V if V

3695 F04b

IN(MIN)

3695 F04c

= 25V

IN(MAX)

< 3V

OUT

= 4.3V

OUT

the output is already in regulation, then the boost capacitor may not be fully charged. Because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. The minimum load generally goes to zero once the circuit has started. Figure 5 shows a plot of minimum load to start and to run as a function of input voltage. In many cases the discharged output capacitor will present a load to the switcher, which will allow it to start. The plots show the worst-case situation where V

is ramping very slowly. For lower start-up voltage, the boost diode can be tied to V

; however, this restricts the input

range to one-half of the absolute maximum rating of the BOOST pin. At light loads, the inductor current becomes discontinuous and the effective duty cycle can be very high.

6.0

5.5

TO START

(WORST CASE)

5.0

4.5

4.0

3.5 TO RUN

INPUT VOLTAGE (V)

3.0

2.5

2.0

10 100

LOAD CURRENT (mA)

= 3.3V

OUT

= 25˚C

L = 10µH f = 800kHz

1000

Figure 4. Three Circuits for Generating the Boost Voltage for the LT3695

the circuit in Figure 4a. For higher output voltages, make sure that there is no more than 8V at the BD pin either by connecting it to another available supply higher than 3V or by using a Zener diode between V

and BD to maintain

OUT

the BD pin voltage between 3V and 8V.

The minimum operating voltage of the LT3695 regulators application is limited by the minimum input voltage and by the maximum duty cycle as outlined previously. For proper start-up, the minimum input voltage is also limited by the boost circuit. If the input voltage is ramped slowly, or the LT3695 regulators are turned on with their RUN/SS pin when

8.0

7.5

7.0

TO START

(WORST CASE)

6.5

6.0

5.5

5.0

TO RUN

4.5

4.0

INPUT VOLTAGE (V)

3.5

3.0

2.5

2.0

10 100

LOAD CURRENT(mA)

= 5V

OUT

= 25˚C

L = 10µH f = 800kHz

3695 F05

1000

Figure 5. The Minimum Input Voltage Depends on Output Voltage, Load Current and Boost Circuit

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Page 20

LT3695 Series

APPLICATIONS INFORMATION

This reduces the minimum input voltage to approximately 300mV above V

. At higher load currents, the inductor

OUT

current is continuous and the duty cycle is limited by the maximum duty cycle of the LT3695 regulators, requiring a higher input voltage to maintain regulation.

Soft-Start

The RUN/SS pin can be used to soft-start the LT3695 regulators, reducing the maximum input current during start-up. The RUN/SS pin is driven through an external RC network to create a voltage ramp at this pin. Figure 6 shows the start-up and shutdown waveforms with the soft-start circuit. By choosing a large RC time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. Choose the value of the resistor so that it can supply 7.5µA when the RUN/SS pin reaches 2.5V. For fault tolerant applications, see the discussion of the RUN/SS resistor in the Fault Tolerance section.

Synchronization

To select low ripple Burst Mode operation, tie the SYNC pin below 0.3V (this can be ground or a logic output).

Synchronizing the oscillator of the LT3695 regulators to an external frequency can be done by connecting a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below

0.3V and peaks that are above 0.8V (up to 6V).

The LT3695 regulators will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will skip pulses to maintain regulation.

The maximum load current that the part can supply is reduced when a clock signal is applied to SYNC.

The LT3695 regulators may be synchronized over a 300kHz to 2.2MHz range. The R

resistor should be chosen to set

the LT3695 regulators switching frequency 20% below the lowest synchronization input. For example, if the synchronization signal is 360kHz, the R

should be chosen for

300kHz. To assure reliable and safe operation the LT3695 regulators will only synchronize when the output voltage is near regulation as indicated by the PG ﬂ ag. It is therefore necessary to choose a large enough inductor value to supply the required output current at the frequency set by the R

resistor. See the Inductor Selection section for

more information. It is also important to note that slope compensation is set by the R

value; to avoid subharmonic

oscillations, calculate the minimum inductor value using the frequency determined by R

Shorted and Reversed Input Protection

If the inductor is chosen so that it will not saturate excessively, the LT3695 regulators will tolerate a shorted output. When operating in short-circuit condition, the LT3695 regulators will reduce their frequency until the valley current is at a typical value of 1.6A (see Figure 7). There is another situation to consider in systems where the output will be held high when the input to the LT3695 regulators is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ORed with the LT3695 regulators’ output. If the V high (either by a logic signal or because it is tied to V

pin is allowed to ﬂ oat and the RUN/SS pin is held

RUN

15k

RUN/SS

0.22µF

GND

Figure 6. To Soft-Start the LT3695 Regulators, Add a Resistor and Capacitor to the RUN/SS Pin

5V/DIV

RUN/SS

5V/DIV

1A/DIV

OUT

5ms/DIV

3695 F05

20V/DIV

500mA/DIV

Figure 7. The LT3695 Regulators Reduce Their Frequency to Protect Against Shorted Output with 36V Input

2µs/DIV

3695 F07

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APPLICATIONS INFORMATION

LT3695 Series

then the LT3695 regulators’ internal circuitry will pull its quiescent current through its SW pin. This is ﬁ ne if your system can tolerate a few mA in this state. If you ground the RUN/SS pin, the SW pin current will drop to essentially zero. However, if the V

pin is grounded while the

output is held high, then parasitic diodes inside the LT3695 regulators can pull large currents from the output through the SW pin and the V

pin. Figure 8 shows a circuit that

will run only when the input voltage is present and that protects against a shorted or reversed input.

MBRS140

Figure 8. Diode D4 Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The Regulator Runs Only When the Input Is Present

RUN/SS

GND

LT3695

PGND

BOOST

OUT

BACKUP

3695 F09

PCB Layout

For proper operation and minimum EMI, care must be taken during printed circuit board layout. Figures 9 and 10 show the recommended component placement with trace, ground plane and via locations. Note that large, switched currents ﬂ ow in the LT3695 regulators’ V

, SW

and PGND pins, the catch diode and the input capacitor

). The loop formed by these components should be

as small as possible. These components, along with the inductor and output capacitor (C

), should be placed on

OUT

the same side of the circuit board, and their connections should be made on that layer. All connections to GND should be made at a common star ground point or directly to a local, unbroken ground plane below these components. The SW and BOOST nodes should be laid out carefully to avoid interference. Finally, keep the FB, R

and VC nodes

small so that the ground traces will shield them from the SW and BOOST nodes. To keep thermal resistance low, extend the ground plane as much as possible and add thermal vias under and near the LT3695 regulators to any additional ground planes within the circuit board and on the bottom side. Keep in mind that the thermal design must keep the junctions of the IC below the speciﬁ ed absolute maximum temperature.

GND

OUT

GND

Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation (LT3695)

3695 F09

GND

OUT

GND

Figure 10. A Good PCB Layout Ensures Proper, Low EMI Operation (LT3695-3.3, LT3695-5)

3695 F10

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LT3695 Series

APPLICATIONS INFORMATION

High Temperature Considerations

The PCB must provide heat sinking to keep the LT3695 regulators cool. The exposed pad on the bottom of the package may be soldered to a copper area which should be tied to large copper layers below with thermal vias; these layers will spread the heat dissipated by the LT3695 regulators. Place additional vias to reduce thermal resistance further. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to θ

= 40°C/W

or less. With 100 LFPM airﬂ ow, this resistance can fall by another 25%. Further increases in airﬂ ow will lead to lower thermal resistance. Because of the large output current capability of the LT3695 regulators, it is possible to dissipate enough heat to raise the junction temperature beyond the absolute maximum. When operating at high ambient temperatures, the maximum load current should be derated as the ambient temperature approaches these maximums. If the junction temperature reaches the thermal shutdown threshold, the parts will stop switching to prevent internal damage due to overheating.

Power dissipation within the LT3695 regulators can be estimated by calculating the total power loss from an efﬁ ciency measurement. The die temperature rise is calculated by multiplying the power dissipation of the LT3695 regulators by the thermal resistance from junction to ambient. Die temperature rise was measured on a 2-layer, 10cm × 10cm circuit board in still air at a load current of 1A (fSW =

800kHz). For a 12V input to 5V output the die temperature elevation above ambient was 22°C with the exposed pad soldered and 44°C without the exposed pad soldered.

Fault Tolerance

The LT3695 regulators are designed to tolerate single fault conditions. Shorting two adjacent pins together or leaving one single pin ﬂ oating does not raise V

or cause damage

OUT

to the LT3695 regulators. However, the application circuit must meet the requirements discussed in this section in order to achieve this tolerance level.

Tables 5 and 6 show the effects that result from shorting adjacent pins or from a ﬂ oating pin, respectively.

For the best fault tolerance to inadvertent adjacent pin shorts, the RUN/SS pin must not be directly connected to either ground or V and SW then connecting RUN/SS to V

and would thus raise V

to V

. If there was a short between RUN/SS

would tie SW

. Likewise, grounding

OUT

RUN/SS would tie SW to ground and would damage the power switch if this is done when the power switch is on. A short between RT and a RUN/SS pin that is connected

would violate the absolute maximum ratings of the

to V

RT pin. Therefore, the current supplying the RUN/SS pin must be limited, for example, with resistor R3 in Figures 11 and 12. In case of a short between RUN/SS and SW this resistor charges C2 through the inductor L1 if the current it supplies from V

is not completely drawn by R

LOAD

, R1

R 47

220nF

RUN/SS

LT3695

BDV

BOOST

OUT

LOAD

3695 F11

Figure 11. LT3695: The Dashed Lines Show Where a Connection Would Occur if There Were an Inadvertent Short from RUN/SS to an Adjacent Pin or from BOOST to BD. In These Cases, R3 Protects Circuitry Tied to the RT or SW Pins, and D2 Shields BOOST from V

. If CSS Is Used for Soft Start, RSS Isolates It

OUT

from SW

LT3695-3.3

LT3695-5

RUN/SS

BOOST

OUT1

OUT2

3695 F12

OUT

LOAD

47

220nF

Figure 12. LT3695-3.3, LT3695-5: The Dashed Lines Show Where a Connection Would Occur if There Were an Inadvertent Short from RUN/SS to an Adjacent Pin. In These Cases, R3 Protects Circuitry Tied to the RT or SW Pins. R4 Provides an Additional Load and May Be Necessary in Certain Situations (See Text). If C

Is Used for Soft Start, RSS Isolates It from SW

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Page 23

LT3695 Series

APPLICATIONS INFORMATION

Table 5: Effects of Pin Shorts

PINS EFFECT

PGND-DA No effect if V

< V

SW-RUN/SS The result of this short depends on the load resistance and on R3 (Figure 10). See the following discussion.

RUN/SS-RT No effect or V

-SYNC No effect or V

SYNC-V

No effect if VIN does not exceed the absolute maximum voltage of SYNC (20V).

OUT

PG-GND No effect.

GND-BD (LT3695) V

may fall below regulation voltage, power dissipation of the power switch will be increased. Note that this short also

OUT

grounds the voltage source supplying BD. Make sure it is safe to short the supply for BD to ground. For this reason BD should not be connected to V

BD-BOOST (LT3695) If diode D2 (see Figure 10) is used, no effect or V

GND-OUT2 (LT3695-3.3, LT3695-5)

will fall below regulation voltage, because this shorts the output to ground. As a result, the power dissipation of the part

OUT

may increase.

Table 6: Effects of Floating Pins

PIN EFFECT

PGND No effect if the Exposed Pad is soldered.

Otherwise: V and provide a bypass resistor at the DA pin. See the following discussion.

DA V

may fall below regulation voltage. Make sure that VIN < V

OUT

a bypass resistor. See the following discussion.

SW V

RUN/SS V

RT V

SYNC V