LINEAR TECHNOLOGY LT3663 Technical data

L DESIGN IDEAS

I

C N V V

N T

CHARGE

EFF FC UV

RECHARGE

=

( )

• –

•

V

IN

GND

V

OUT

LT3663 BUCK

GND

TOP RAIL

+

TOP ENA

TOP RAIL

–

BOT RAIL

+

BOT ENA

GND

BIAS
GND
TOP CAP

+

TOP CAP

–

BOT CAP

+

BOT CAP

–

GND

V

CAP

12V

GND

C

BOT

50F

C

TOP

50F

RUN

V

IN

GND

V

OUT

LT3663 BUCK

CONTROL

CIRCUIT

(FIGURE 3)

GND

RUN

V

IN

V

IN

ENA

I

LIM

RUN

V

OUT

V

OUT

2.65V

1.2A

I

SENSE

BOOST

SW

IR05H40CSPTR

L1

3.3µH

L1: TDK VLCF5020T-3R3N1R7-1

LT3663

GND FB

4.7µF
50V
1206

40V

2.0A
DFLS240

10k

R

ILIM

28.7k

0.1µF
16V

47µF
1206
16V

R

FB2

86.6k

R

FB1

200k

Supercapacitor Charger with
Adjustable Output Voltage and
Adjustable Charging Current Limit

Introduction

For applications using larger value
supercapacitors (tens to hundreds of
farads), a charger circuit with a rela­tively high charging current is needed
to minimize the recharge time of the
system. Supercapacitors are used as
energy hold up devices in applications
such as solid state RAID disks, where
information stored in high speed vola­tile memory must be transferred to
non-volatile flash memory when power
is lost. This transfer time may take
minutes, requiring hundreds of farads
to hold up the power supply until the
transfer is complete. The requirement
for the recharge time of these banks
of supercapacitors is typically less
than one hour. To accomplish this,
a high charging current is required.
This article describes a supercapacitor
charging circuit using the LT3663 that
meets these difficult requirements.

The LT3663 is a 1.2A, 1.5MHz step­down switching regulator with output
current limit ideal for supercapacitor
applications. The part has an input
voltage range of 7.5V to 36V,has
adjustable output voltage and adjust­able output current limit. The output
voltage is set with a resistor divider
network in the feedback loop while
the output current limit is set by a
single resistor connected from the I

30

30

Figure 2. Capacitor charger circuit using the LT3663

Figure 1. Block diagram for charging two supercapacitors in series

pin to ground. With its internal com­pensation network and internal boost
diode, the LT3663 requires a minimal
number of external components.

Power Ride-Through
Application

A procedure for selecting the size of
the supercapacitor is outlined in the
September 2008 edition of Linear
Technology, in an article titled “Re­place Batteries in Power Ride-Through
Applications with Supercaps and
3mm × 3mm Capacitor Charger.” The
procedure determines the effective
supercapacitor (C

0.3Hz, based on the power level to

LIM

) capacitance at

EFF

by Jim Drew

be held up, the minimum operating
voltage of the DC/DC converter sup­porting the load, the distributed circuit
resistances including the ESR of the
supercapacitors, and the required
hold up time.

Once the size of the supercapacitor
is known, the charging current can
be determined to meet the recharge
time requirements. The recharge
time (T

RECHARGE

to recharge the supercapacitors from
the minimum operating voltage (VUV)
of the DC/DC converter to the full
charge voltage (VFC) of the superca­pacitors. The voltage on the individual
supercapacitors at the start of the
recharge cycle is the minimum oper­ating voltage divided by the number
(N) of supercapacitors in series. From
here on, this article describes an ap­plication with two supercapacitors in
series. The recharge current (I
is determined by the capacitor charge
control law:

This assumes that the voltage
across the supercapacitor doesn’t
discharge below the VUV/N value. This
assumption is valid if the time period

Linear Technology Magazine • June 2009

) is the time required

)

CHARGE

DESIGN IDEAS L

T

C V

I

CHARGE

EFF FC

CHARGE

=

•

IN OUT

BIAS

(FIGURE 1

CONNECTIONS)

(FIGURE 1
CONNECTIONS)

GND

BYP

GND

V

–

V

+

SHDN

U6

LT1761-3.3

3.3V

3.3V

3.3V

3.3V

10µF

16V

0.01µF

0.01µF

10µF

TOP ENA

TOP CAP +

TOP CAP

–

150k

V

REF

U7

LT1634-1.25

BOT_CHRG_L

100k 100k

100k 100k

OUT A V+

–IN A OUT B

–IN B

+IN B

+IN A

GND

0.1µF

–

+

U1

LT1784

V

–

V

+

3.3V

0.01µF

BOT CAP

+

BOT CAP

–

100k 100k

100k 100k

–

+

U2

LT1784

V

–

V

+

3.3V

0.01µF

100k

10k

1M

100k

R2
402k

R1
10k

R3

10k

R4
402k

1M

1k

1M

100k 100k

10k

–

+

U3

LT1784

0.01µF

TOP RAIL

–

U5

4N25

BOT ENA

2N7002

10k

GND

U4

LT6702

while input power isn’t available is
such that the supercapacitor’s leakage
current hasn’t significantly reduced
the voltage across the capacitor. The
voltage across the supercapacitor may
actually rise slightly after the DC/DC
converter shuts down due to the dielec­tric absorption effect. The initial charge
time T

for a fully discharged

CHARGE

bank of supercapacitors is:

Figure 1 shows a block diagram of
the components for this supercapaci­tor charger application.

Charging Circuit
Using the LT3663

To set the charging current, a resistor
R

is connected from the I

ILIM

the LT3663 to ground. Table 1 shows
the nominal charging currents for
various values of R

The full charge voltage is set by
the resistor divider network in the

.

ILIM

pin of

LIM

Figure 3. Charger control circuit

feedback loop. Table 2 shows various
full charge voltages versus the value
of R
ground) when resistor R
tied between the V
pin) is 200k. Figure 2 shows the charg­ing circuit for each supercapacitor.

Control Circuit

(resistor from the FB pin to

FB2

pin and the FB

OUT

(resistor

FB1

for Charging Supercapacitors

The control circuit in Figure 3 is used
to balance the voltages of the super­capacitors while they are charging.
This is accomplished by prioritizing

Charging Current (A)

Table 1. Charging current vs R

0.4 140

0.6 75

R

Value (kΩ)

ILIM

0.8 48.7

1.0 36.5

1.2 28.7

ILIM

charge current to the lower voltage
supercapacitor—specifically by en­abling the charging circuit for the
supercapacitor with the lower voltage
while disabling the circuit for the other
supercapacitor.

If the top charging circuit is enabled
while the bottom charging circuit is
disabled, the bottom supercapacitor
is charged by the input return cur­rent from the top charger. This return
current is a fraction of the charging
current so the top supercapacitor
charges faster. The control circuit

Full Charge Voltage (V)

Table 2. Full charge voltage vs R

2.65 86.6

2.5 93.1

2.4 100

2.2 115

2.0 133

continued on page 33

FB2

R

(kΩ)

FB2

Linear Technology Magazine • June 2009

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