LINEAR TECHNOLOGY LT3510 Technical data

LT3510

Monolithic Dual Tracking

2A Step-Down Switching

Regulator

FEATURES

n

Wide Input Range: 3.1V to 25V

n

Two Switching Regulators with 2A Output Capability

n

Independent Supply to Each Regulator

n

Adjustable/Synchronizable Fixed Frequency

Operation from 250kHz to 1.5MHz

n

Antiphase Switching

n

Outputs Can be Paralleled

n

Independent, Sequential, Ratiometric or Absolute

Tracking Between Outputs

n

Independent Soft-Start and Power Good Pins

n

Enhanced Short-Circuit Protection

n

Low Dropout: 95% Maximum Duty Cycle

n

Low Shutdown Current: <10μA

n

20-Lead TSSOP Package with Exposed Leadframe

APPLICATIONS

n

DSP Power Supplies

n

Disc Drives

n

DSL/Cable Modems

n

Wall Transformer Regulation

n

Distributed Power Regulation

n

PCI Cards

, LT, LTC, and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

DESCRIPTION

The LT®3510 is a dual current mode PWM step-down
DC/DC converter with two internal 2.5A switches. Inde­pendent input voltage, feedback, soft-start and power
good pins for each channel simplify complex power
supply tracking/sequencing requirements.

Both converters are synchronized to either a common
external clock input or a resistor programmable fi xed
250kHz to 1.5MHz internal oscillator. At all frequencies, a
180° phase relationship between channels is maintained,
reducing voltage ripple and component size. Programmable
frequency allows for optimization between effi ciency and
external component size.

Minimum input-to-output voltage ratios are improved
by allowing the switch to stay on through multiple clock
cycles, only switching off when the boost capacitor needs
recharging, resulting in ~95% maximum duty cycle.

Each output can be independently disabled using its own
soft-start pin, or by using the SHDN pin the entire part can
be placed in a low quiescent current shutdown mode.

The LT3510 is available in a 20-lead TSSOP package with
exposed leadframe for low thermal resistance.

TYPICAL APPLICATION

3.3V and 1.8V Dual 2A Step-Down Converter with Output Tracking

V

IN

12V

4.7μF

PMEG4005

V

OUT1

3.3V
2A

4.7μH

PMEG4005

47μF 100μF

24.9k

8.06k

0.47μF

B360A B360A

470pF

40.2k

10pF 47pF

SHDN

BST1

SW1

IND1
V

OUT1

PG1
FB1
V

C1

SS/TRACK1

0.1μF

Effi ciency

V

IN1

LT3510

GND

V

IN2

R

/SYNC

T

BST2

SW2

IND2

V

OUT2

PG2

FB2
V

SS/TRACK2

61.9k

470pF

40.2k

3.3μH

10k

8.06k

3510 TA01a

V

1.8V
2A

OUT2

0.47μF

C2

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

0

V

= 5V

OUT

V

= 1.8V

OUT

0.5

LOAD CURRENT (A)

V

= 3.3V

OUT

V

= 2.5V

OUT

VIN = 12V

= 0A

I

OUT2

FREQUENCY = 500kHz

1.5

1

3510 TA01b

2

3510fc

1

LT3510

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

V

, SHDN, PG1/2 ...................................... 25V/–0.3V

IN1/2

SW1/2 .................................................................... V

IN1/2

BST1/2 ........................................................... 35V/–0.3V

BST1/2 Pins Above SW1/2 ........................................25V

IND1/2 .....................................................................±4A

V
FB1/2, SS1/2, R
V

........................................................ V

OUT1/2

/SYNC ............................................5.5V

T

......................................................................±1mA

C1/2

IN1/2

/–0.3V

Operating Junction Temperature Range

LT3510EFE (Notes 2, 8) ..................... –40°C to 125°C

LT3510IFE (Notes 2, 8) ...................... –40°C to 125°C

Storage Temperature Range ...................–65°C to 150°C

Lead Temperature (Soldering, 10 sec) ..................300°C

V

IN1

SW1

IND1

V

OUT1

PG1

PG2

V

OUT2

IND2

SW2

V

IN2

T

= 125°C, θJA = 45°C/W, θ

JMAX

EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB

TOP VIEW

1

2

3

4

5

6

7

8

9

10

FE PACKAGE

20-LEAD PLASTIC TSSOP

20

19

18

17

16

21

15

14

13

12

11

JC(PAD)

BST1

SS/TRACK1

V

C1

FB1

R

/SYNC

T

SHDN

FB2

V

C2

SS/TRACK2

BST2

= 10°C/W

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3510EFE#PBF LT3510EFE#TRPBF LT3510FE 20-Lead TSSOP –40°C to 125°C

LT3510IFE#PBF LT3510IFE#TRPBF LT3510FE 20-Lead TSSOP –40°C to 125°C

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3510EFE LT3510EFE#TR LT3510FE 20-Lead TSSOP –40°C to 125°C

LT3510IFE LT3510IFE#TR LT3510FE 20-Lead TSSOP –40°C to 125°C

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
For more information on lead free part marking, go to:

For more information on tape and reel specifi cations, go to:

http://www.linear.com/leadfree/

http://www.linear.com/tapeandreel/

The

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifi cations are at TJ = 25°C. V

l denotes the specifi cations which apply over the full operating

VIN1/2

= 15V, V

BST1/2

= open, V

RT/SYNC

= 2V, V

VOUT1/2

= open,

unless otherwise specifi ed.

PARAMETER CONDITIONS MIN TYP MAX UNITS

SHDN Threshold V

SHDN Input Current V

Minimum Input Voltage Ch 1 (Note 3) V

Minimum Input Voltage Ch 2 V

Supply Shutdown Current Ch 1 V

Supply Shutdown Current Ch 2 V

Supply Quiescent Current Ch 1 V

Supply Quiescent Current Ch 2 V

Feedback Voltage Ch 1/2 V

= 0V, RT/SYNC = 133k

OUT1/2

= 1.375V

SHDN

V

= 1.225V

SHDN

= 0V, V

FB1/2

= 0V, V

FB1/2

= 0V

SHDN

= 0V 0 5 μA

SHDN

= 0.9V 3.5 5 mA

FB1/2

= 0.9V 200 500 μA

FB1/2

= 1V

VC1/2

VOUT1/2

VOUT1/2

= 0V, V

= 0V, V

= 0V, RT/SYNC = 133k 2.8 3 V

IND1/2

= 0V 2.8 3 V

IND1/2

l

1.23 1.28 1.37 V

7
2

l

l

0.784 0.8 0.816 V

10

13

3

930 μA

5

μA

3510fc

μA

2

LT3510

ELECTRICAL CHARACTERISTICS

The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
unless otherwise specifi ed.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Feedback Voltage Line Regulation V

Feedback Voltage Offset Ch 1 to Ch 2 V

Feedback Bias Current Ch 1/2 V

Error Amplifi er g

Ch 1/2 V

m

Error Amplifi er Gain Ch 1/2 1000 V/V

Error Amplifi er to Switch Gain Ch 1/2 2.2 A/V

Error Amplifi er Source Current Ch 1/2 V

Error Amplifi er Sink Current Ch 1/2 V

Error Amplifi er High Clamp Ch 1/2 V

Error Amplifi er Switching Threshold Ch 1/2 V

Soft-Start Source Current Ch 1/2 V

Soft-Start V

Ch 1/2 V

OH

Soft-Start Sink Current Ch 1/2 V

Soft-Start V

Ch 1/2 V

OL

Soft-Start to Feedback Offset Ch 1/2 V

Soft-Start Sink Current Ch 1/2 POR V

Soft-Start POR Threshold Ch 1/2 V

Soft-Start Switching Threshold Ch 1/2 V

Power Good Leakage Ch 1/2 V

Power Good Threshold Ch 1/2 V

Power Good Hysteresis Ch 1/2 V

Power Good Sink Current Ch 1/2 V

Power Good Shutdown Sink Current Ch 1/2 V

/SYNC Reference Voltage V

R

T

Switching Frequency R

Switching Phase Angle Ch A to Ch B R

Minimum Boost for 100% Duty Cycle Ch 1/2 V

SYNC Frequency Range V

SYNC Switching Phase Angle Ch A to Ch B SYNC = 250kHz, V

IND + V

IND to V

Current Ch 1/2 V

OUT

Maximum Current Ch 1/2 V

OUT

Switch Leakage Current Ch 1/2 V

Switch Saturation Voltage Ch 1/2 I

Boost Current Ch 1/2 I

Minimum Boost Voltage Ch 1/2 I

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

VIN1/2

VC1/2

FB1/2

VC1/2

FB1/2

FB1/2

FB1/2

OUT1/2

FB1/2

FB1/2

FB1/2

FB1/2

VC1/2

SS1/2

FB1/2

FB1/2

FB1/2

FB1/2

FB1/2

FB1/2

VIN1/2

FB1/2

T

R

T

T

FB1/2

BST1/2

VOUT1/2

V

VOUT1/2

VOUT1/2

V

VOUT1/2

SW1/2

SW1/2

SW1/2

SW1/2

= 25°C. V

J

= 3V to 25V

= 1V

= 0.8V, V

= 1V, I

= 0.6V, V

= 1V, V

VC1/2

VC1/2

VC1/2

VC1/2

= ±5μA

= 1V 15 20 30 μA

VIN1/2

= 1V

= 15V, V

BST1/2

= open, V

RT/SYNC

l

l

l

l

= 2V, V

VOUT1/2

= open,

–1 0 1 %

–16 0 16 mV

–200 75 200 nA

150 275 450 μmho

= 1V 10 15 25 μA

= 0.7V 1.75 2.0 2.25 V

= 5V, RT/SYNC = 133k 0.5 0.7 1.0 V

= 0.6V, V

SS1/2

= 0.4V

l

2.5 3.25 4 μA

= 0.9V 1.9 2 2.4 V

= 0.6V, V

= 1V 200 600 1000 μA

SS1/2

= 0V 50 80 125 mV

= 1V, V

SS1/2

= 0.4V

l

–16 0 16 mV

= 0.4V (Note 4), VVC = 1V 0.5 1.5 2 mA

= 0V (Note 4) 55 80 105 mV

= 0V 30 50 70 mV

= 0.9V, V

Rising, PG1/2 = 20k to 5V

PG1/2

= 25V, V

VIN1/2

= 25V, V

= 5V 0 1 μA

OUT

l

87 90 93 %

Falling, PG1/2 = 20k to 5V 20 30 50 mV

= 0.65V, V

= 2V, V

= 0.9V, I

/SYNC = 133k, V
/SYNC = 15.4k, V

/SYNC = 133k, V

= 0.7V, I

= 0.4V 400 800 1200 μA

PG1/2

= 0V, V

FB1/2

= –40μA 0.93 0.975 1 V

RT/SYNC

FB1/2

FB1/2

FB1/2

= –35μA (Note 5), V

RT/SYNC

= 0.4V 10 50 100 μA

PG1/2

= 0.6V, V

= 0.6V, V

= 0.6V, V

= VSW + 3V

BST1/2

= VSW + 3V

BST1/2

= VSW + 3V 120 180 210 Deg

BST1/2

= 0V 1.7 2 V

OUT

200

1.2

250

1.5

300

1.8

= VSW + 3V 250 1500 kHz

= VSW + 3V 120 180 210 Deg

BST1/2

= 0V, V
= 5V

= 0.5V (Note 6), V
= 5V (Note 6), RT/SYNC = 133k, V

= 0V, V

= 2A, V

= 2A, V

= 2A, V

= 0.9V

FB1/2

VIN1/2 = 25V

= 20V, V

BST1/2

= 20V, V

BST1/2

= 20V, V

BST1/2

40 70

100

0

= 0.7V, V

FB1/2

= 0.7V

FB1/2

= 0.7V 25 50 100 mA

FB1/2

= 0.7V (Note 7) 1.4 2.5 V

FB1/2

BST1/2

BST1/2

= 20V

= 20V

2.25

2.5

l

l

2.8

2.8

050 μA

250 400 mV

1

4
4

Note 2: The LT3510EFE is guaranteed to meet performance specifi cations
from 0°C to 125°C junction temperature. Specifi cations over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The

kHz

MHz

μA
μA

A
A

3510fc

3

LT3510

ELECTRICAL CHARACTERISTICS

LT3510IFE is guaranteed and tested over the full –40°C to 125°C operating
junction temperature range.

Note 3: Minimum input voltage is defi ned as the voltage where internal
bias lines are regulated so that the reference voltage and oscillator remain
constant. Actual minimum input voltage to maintain a regulated output
will depend upon output voltage and load current. See Applications
Information.

Note 4: An internal power-on reset (POR) latch is set on the positive
transition of the SHDN pin through its threshold. The output of the latch
activates current sources on each SS pin which typically sink 1.5mA,
discharging the SS capacitor. The latch is reset when both SS pins are
driven below the soft-start POR threshold or the SHDN pin is taken below
its threshold.

Note 5: To enhance dropout operation, the output switch will be turned off
for the minimum off time only when the voltage across the boost capacitor
drops below the minimum boost for 100% duty cycle threshold.

Note 6: The IND to V
current fl owing from the IND pin to the V
latch when the V

Note 7: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.

Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.

TYPICAL PERFORMANCE CHARACTERISTICS

Feedback Voltage vs Temperature RT/SYNC Voltage vs Temperature

0.816

0.811

0.806

0.801

VOLTAGE (V)

0.796

1.05

1.03

1.01

0.99

VOLTAGE (V)

maximum current is defi ned as the value of

OUT

pin is at its high clamp.

C

pin which resets the switch

OUT

Shutdown Threshold and Minimum
Input Voltage vs Temperature

3.0

2.5

2.0

1.5

VOLTAGE (V)

1.0

MINIMUM INPUT

VOLTAGE

SHUTDOWN

THRESHOLD

VOLTAGE

0.791

0.786
–50

–25 0

TEMPERATURE (°C)

50 100 125

25 75

Shutdown Quiescent Current
vs Temperature

16

14

12

10

CURRENT (μA)

V

VIN1

8

6

4

2

0

–25 0 50

–50

25

TEMPERATURE (°C)

3510 G02

V

VIN2

75 100 125

3510 G05

0.97

0.95
–50 –25

25

0

TEMPERATURE (°C)

Soft-Start Source Current
vs Temperature

4.0

3.8

3.6

3.4

3.2

3.0

2.8

CURRENT (μA)

2.6

2.4

2.2

2.0
–50

–25

25

0

TEMPERATURE (°C)

0.5

0

–50

50

75

100

125

3510 G03

–25 0

IND to V

TEMPERATURE (°C)

OUT

50 100 125

25 75

3510 G04

Maximum Current vs

Temperature

4.0

3.8

3.6

3.4

3.2

3.0

2.8

CURRENT (A)

2.6

2.4

2.2

2.0
–30 10

50

75

100

125

3510 G07

–50

V

OUT

V

OUT

–10

30

TEMPERATURE (°C)

= 5V

= 0V

50

90

110

70

3510 G30

3510fc

4

TYPICAL PERFORMANCE CHARACTERISTICS

LT3510

Soft-Start to Feedback Offset
Voltage vs Temperature

4

3

2

1

0

–1

VOLTAGE (mV)

–2

–3

–4

–25 0 50

–50

25

TEMPERATURE (°C)

Power Good Sink Current
vs Temperature

1000

950

900

850

800

750

700

CURRENT (μA)

650

600

550

500

–50

0

–25

TEMPERATURE (°C)

50

25

75 100 125

3510 G08

100

125

3510 G11

75

Switching Threshold Voltage

V

C

vs Temperature

1000

900

800

700

VOLTAGE (V)

600

500

400

–50

–25 0

V

OUT

V

= 0V

OUT

25 75

TEMPERATURE (°C)

Minimum Switching Times
vs Temperature

250

230

210

MINIMUM ON TIME

190

170

150

TIME (ns)

130

110

90

70

50

–50

–25

MINIMUM OFF TIME

25

0

TEMPERATURE (°C)

= 5V

50 100 125

3510 G09

50

75

100

3510 G12

125

Power Good Threshold Voltage
vs Temperature

800

780

760

740

720

700

680

VOLTAGE (V)

660

640

620

600

–50

–25

RISING

FALLING

50

25

0

TEMPERATURE (°C)

75

Switching Frequency and Channel
Phase vs Temperature

300

RT/SYNC = 133k

290

280

PHASE

270

260

250

FREQUENCY

240

FREQUENCY (kHz)

230

220

210

200

–50

–25

0

TEMPERATURE (°C)

50

25

75

100

100

3510 G10

3510 G13

125

125

200

190

180

170

PHASE (DEG)

160

150

140

130

120

110

100

Switching Frequency and Channel
Phase vs Temperature

1650

RRT/SYNC = 15.4k

1600

1550

1500

1450

FREQUENCY (kHz)

1400

1350

–50

PHASE

FREQUENCY

–25 0

50 100 125

25 75

TEMPERATURE (°C)

3510 G14

200

195

190

185

PHASE (DEG)

180

175

170

165

160

155

150

Synchronization Clock Frequency
Range vs Temperature

2500

2000

MAXIMUM

1500

1000

FREQUENCY (kHz)

500

0

–50 –25

SYNCHRONIZATION

FREQUENCY

MINIMUM

SYNCHRONIZATION

FREQUENCY

50

25

0

TEMPERATURE (°C)

Channel Phase vs Temperature
with External Synchronization

188

186

164

182

180

178

176

PHASE (DEG)

174

172

170

168

100

125

3510 G15

75

–50

SYNCHRONIZATION
FREQUENCY = 250kHz

SYNCHRONIZATION
FREQUENCY = 1500kHz

0

–25

TEMPERATURE (°C)

50

25

75

100

125

3510 G16

3510fc

5

LT3510

TYPICAL PERFORMANCE CHARACTERISTICS

External Sync Duty Cycle Range
vs External Sync Frequency

100

90

80

70

60

50

40

DUTY CYCLE (%)

30

20

10

0

250

MAXIMUM CLOCK

DUTY CYCLE

MINIMUM CLOCK

DUTY CYCLE

500

750

FREQUENCY (kHz)

1000

Minimum Boost Voltage
vs Temperature

2.5

2.0

1.5

1.0

VOLTAGE (V)

0.5

0

–50 –25

0

TEMPERATURE (°C)

50

25

Frequency and Phase vs RT/SYNC
Pin Resistance

1250

3510 G17

1500

1600

1400

1200

1000

800

600

FREQUENCY (kHz)

400

200

100

FREQUENCY

0 20 40 60 80 100 120 140

RESISTANCE (kΩ)

V

+ IND Current

OUT

PHASE

3510 G18

190

185

180

PHASE (DEG)

175

170

165

160

155

150

vs Temperature

100

95

90

85

80

75

70

CURRENT (μA)

65

60

55

100

125

3510 G21

75

50

–50

–25

0

TEMPERATURE (°C)

50

25

75

100

125

3510 G22

Switch Saturation Voltage
vs Switch Current

250

200

150

100

VOLTAGE (mV)

50

0

0.5

0.7 0.9

V

OUT

vs V

100

90

80

70

60

50

40

CURRENT (μA)

30

20

10

0

0

OUT

1.1 1.5

CURRENT (A)

+ IND Current

Voltage

0.40.2

0.80.6

VOLTAGE (V)

1.3

1.2 1.4 1.8

1.0

125°C

25°C

–50°C

1.7 1.9

1.6

3510 G19

2.0

3510 G23

Minimum Input Voltage
vs Load Current

5.0
V

= 2.5V

OUT

4.5

4.0

3.5

VOLTAGE (V)

3.0

2.5

2.0

1

10 100 1000 10000

6

CURRENT (mA)

RUNNING

3510 G24

Minimum Input Voltage
vs Load Current

6.0
V

= 3.3V

OUT

5.5

5.0

4.5

VOLTAGE (V)

4.0

3.5

3.0

1

10 100 1000 10000

CURRENT (mA)

RUNNING

3510 G25

Minimum Input Voltage
vs Load Current

7.5
V

= 5V

OUT

7.0

6.5

6.0

VOLTAGE (V)

5.5

5.0

4.5

1

10 100 1000 10000

CURRENT (mA)

RUNNING

3510 G26

3510fc

TYPICAL PERFORMANCE CHARACTERISTICS

LT3510

Inductor Value vs Frequency for

Dropout Operation

6

LOAD = 1A

5

4

3

2

OUTPUT VOLTAGE (V)

1

0

2

34

2.5 3.5

V

= 5V

OUT

V

OUT

INPUT VOLTAGE (V)

4.5

= 3.3V

FREQUENCY

1.5MHz
250kHz

5

5.5

6

3510 G27

2A Maximum Load Current

1500

V

= 3.3V

OUT

= 1A

I

RIPPLE

1250

1000

750

FREQUENCY (kHz)

500

250

7

L = 2.2μH

L = 3.3μH

913

11

INPUT VOLTAGE (V)

PIN FUNCTIONS

V

(Pin 1): The V

IN1

circuitry for both channels and is monitored by the
undervoltage lockout comparator. The V
connected to the collector of channel 1’s on-chip power
NPN switch. The V
be decoupled to ground close to the pin of the device.

SW1/SW2 (Pins 2, 9): The SW pin is the emitter of the on­chip power NPN. At switch off, the inductor will drive this
pin below ground with a high dV/dt. An external Schottky
catch diode to ground, close to the SW pin and respective

decoupling capacitor’s ground, must be used to prevent

V

IN

this pin from excessive negative voltages.

IND1/IND2 (Pins 3, 8): The IND pin is the input to the
on-chip sense resistor that measures current fl owing in
the inductor. When the current in the resistor exceeds
the current dictated by the V
reset, disabling the output switch. Bias current fl ows out
of the IND pin when IND is less than 1.6V.

pin powers the internal control

IN1

pin is also

IN1

pin has high dI/dt edges and must

IN1

pin, the SW latch is held in

C

Inductor Value vs Frequency for
2A Maximum Load Current

L = 4.7μH

L = 6.8μH

17 25

19

15

1500

L = 2.2μH

1250

1000

750

FREQUENCY (kHz)

500

250

21

23

3510 G28

10

15 17.5 20

12.5
INPUT VOLTAGE (V)

L = 3.3μH

L = 4.7μH

V

= 5V

OUT

I

RIPPLE

L = 6.8μH

L = 10μH

22.5 25

= 1A

3510 G29

PG1/PG2 (Pins 5, 6): The power good pin is an open-col­lector output that sinks current when the feedback falls
below 90% of its nominal regulating voltage. For V

IN1

above 1V, its output state remains true, although during
shutdown, V

undervoltage lockout or thermal shutdown,

IN1

its current sink capability is reduced. The PG pins can be
left open circuit or tied together to form a single power
good signal.

(Pin 10): The V

V

IN2

on-chip power NPN switch. This pin is independent of V

pin is the collector of channel 2’s

IN2

IN1

and may be connected to the same or a separate supply. In
either case, high dI/dt edges are present and decoupling
to ground must be used close to this pin.

SS1/SS2 (Pins 19, 12): The SS1/2 pins control the soft­start and sequence of their respective outputs. A single
capacitor from the SS pin to ground determines the outpt
ramp rate. For soft-start and output tracking/sequencing
details, see the Applications Information section.

V

OUT1/VOUT2

(Pins 4, 7): The V

pin is the output to

OUT

the on-chip sense resistor that measures current fl owing
in the inductor. When the current in the resistor exceeds
the current dictated by the V

pin, the SW latch is held in

C

reset, disabling the output switch. Bias current fl ows out
of the V

pin when V

OUT

is less than 1.6V.

OUT

V

(Pins 18, 13): The VC pin is the output of the

C1/VC2

error amplifi er and the input to the peak switch current
comparator. It is normally used for frequency compensa­tion, but can also be used as a current clamp or control
loop override. If the error amplifi er drives V

above the

C

maximum switch current level, a voltage clamp activates.

3510fc

7

LT3510

PIN FUNCTIONS

This indicates that the output is overloaded and current is
pulled from the SS pin, reducing the regulation point.

FB1/FB2 (Pins 17, 14): The FB pin is the negative input
to the error amplifi er. The output switches regulate this
pin to 0.8V, with respect to the exposed ground pad. Bias
current fl ows out of the FB pin.

SHDN (Pin 15): The shutdown pin is used to turn off both
channels and control circuitry to reduce quiescent current
to a typical value of 9μA. The accurate 1.28V threshold and
input current hysteresis can be used as an undervoltage
lockout, preventing the regulator from operating until the
input voltage has reached a predetermined level. Force
the SHDN pin above its threshold or let it fl oat for normal
operation.

/SYNC (Pin 16): This RT/SYNC pin provides two modes

R

T

of setting the constant switch frequency.

Connecting a resistor from the R
will set the R
resultant switching frequency will be set by the resistor
value. The minimum value of 15.4k and maximum value of
133k sets the switching frequency to 1.5MHz and 250kHz
respectively.

Driving the R
synchronize the switch to the applied frequency. Synchro­nization occurs on the rising edge of the clock signal after

/SYNC pin to a typical value of 0.975V. The

T

/SYNC pin with an external clock signal will

T

/SYNC pin to ground

T

the clock signal is detected, with switch 1 in phase with
the synchronization signal. Each rising clock edge initiates
an oscillator ramp reset. A gain control loop servos the
oscillator charging current to maintain a constant oscillator
amplitude. Hence, the slope compensation and channel
phase relationship remain unchanged. If the clock signal
is removed, the oscillator reverts to resistor mode and
reapplies the 0.975V bias to the R
synchronization detection circuitry times out. The clock
source impedance should be set such that the current out
of the R
roughly equivalent to the synchronization frequency.

BST1/BST2 (Pins 20, 11): The BST pin provides a higher
than V
switch drop. A comparator to V
off time on the SW pin if the BST pin voltage drops too
low. Forcing a SW off time allows the boost capacitor to
recharge.

Exposed Pad (Pin 21): GND. The Exposed Pad GND pin is
the only ground connection for the device. The Exposed
Pad should be soldered to a large copper area to reduce
thermal resistance. The GND pin is common to both chan­nels and also serves as small-signal ground. For ideal
operation all small-signal ground paths should connect
to the GND pin at a single point, avoiding any high current
ground returns.

/SYNC pin in resistor mode generates a frequency

T

base drive to the power NPN to ensure a low

IN

/SYNC pin after the

T

imposes a minimum

IN

8

3510fc

BLOCK DIAGRAM

/SYNC

R

T

R3

3μA

SHDN

1.28V

GND

V

IN1

+

INTERNAL

REGULATOR

AND

REFERENCE

7μA

+
–

SHUTDOWN

COMPARATOR

UNDERVOLTAGE

POR

TSD

S
RQ

SOFT-START

RESET

COMPARATOR

OSCILLATOR

AND
AGC

SLOPE
COMPENSATION

3

+

0.8V

3.25A

–
+

+

80mV

CLK1

CLK2

LOWEST
VOLTAGE

SS

ONE CHANNEL

–
+

VC CLAMP

SS CLAMP

LT3510

V

IN

C

DROPOUT

ENHANCEMENT

PRE

S

R

Q

DRIVER

CIRCUITRY

+
–

+
–

POWER GOOD
COMPARATOR

–
+

+

0.72V

V

C

BST

SW

IND

V

OUT

PGOOD

3510 BD

C3

D

L1

D

C

FB

R1

R2

C

Figure 1. Block Diagram (One of Two Switching Regulators Shown)

APPLICATIONS INFORMATION

The LT3510 is dual channel, constant frequency, current
mode buck converter with internal 2A switches. Each
channel is identical with a common shutdown pin, internal
regulator, oscillator, undervoltage detect, thermal shutdown
and power-on reset.

If the SHDN pin is taken below its 1.28V threshold the
LT3510 will be placed in a low quiescent current mode.
In this mode the LT3510 typically draws 9μA from V
and <1μA from V
with a typical sink capability of 50μA for V

. In shutdown mode the PG is active

IN2

voltage

IN1

greater than 2V.

IN1

When the SHDN pin is opened or driven above 1.28V,
the internal bias circuits turn on generating an internal
regulated voltage, 0.8V

, 0.975V RT/SYNC references,

FB

and a POR signal which sets the soft-start latch.

As the R

/SYNC pin reaches its 0.975V regulation point,

T

the internal oscillator will start generating two clock sig­nals 180° out of phase for each regulator at a frequency
determined by the resistor from the R

/SYNC pin to ground.

T

Alternatively, if a synchronization signal is detected by the
LT3510 at the R

/SYNC pin, clock signals 180° out of phase

T

3510fc

9