LINEAR TECHNOLOGY LT1806, LT1807 Technical data

FEATURES

LT1806/LT1807

325MHz, Single/Dual,

Rail-to-Rail Input and Output, Low Distortion,

Low Noise Precision Op Amps

U

DESCRIPTIO

■

Gain Bandwidth Product: 325MHz

■

Slew Rate: 140V/µs

■

Wide Supply Range: 2.5V to 12.6V

■

Large Output Current: 85mA

■

Low Distortion, 5MHz: –80dBc

■

Low Voltage Noise: 3.5nV/√Hz

■

Input Common Mode Range Includes Both Rails

■

Output Swings Rail-to-Rail

■

Input Offset Voltage (Rail-to-Rail): 550µV Max

■

Common Mode Rejection: 106dB Typ

■

Power Supply Rejection: 105dB Typ

■

Unity-Gain Stable

■

Power Down Pin (LT1806)

■

Single in SO-8 and 6-Pin SOT-23 Packages

■

Dual in SO-8 and 8-Pin MSOP Packages

■

Operating Temperature Range: –40°C to 85°C

U

APPLICATIO S

■

Low Voltage, High Frequency Signal Processing

■

Driving A/D Converters

■

Rail-to-Rail Buffer Amplifiers

■

Active Filters

■

Video Line Driver

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LT®1806/LT1807 are single/dual low noise rail-to-rail input and output unity-gain stable op amps that feature a 325MHz gain-bandwidth product, a 140V/µs slew rate and a 85mA output current. They are optimized for low voltage, high performance signal conditioning systems.

The LT1806/LT1807 have a very low distortion of –80dBc at 5MHz, a low input referred noise voltage of 3.5nV/√Hz and a maximum offset voltage of 550µV that allows them to be used in high performance data acquisition systems.

The LT1806/LT1807 have an input range that includes both supply rails and an output that swings within 20mV of either supply rail to maximize the signal dynamic range in low supply applications.

The LT1806/LT1807 maintain their performance for supplies from 2.5V to 12.6V and are specified at 3V, 5V and ±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output.

The LT1806 is available in an 8-pin SO package with the standard op amp pinout and a 6-pin SOT-23 package. The LT1807 features the standard dual op amp pinout and is available in 8-pin SO and MSOP packages.These devices can be used as plug-in replacements for many op amps to improve input/output range and performance.

TYPICAL APPLICATIO

Gain of 20 Differential A/D Driver

+

1/2 LT1807

–

R2

909Ω

R1

R3

100Ω

V

IN

–

1/2 LT1807

+

C1 5.6pF

C2 5.6pF

R4

1k

R5

49.9Ω

R6

49.9Ω

U

C3 470pF

+AV

–AV

IN

LTC PGA GAIN = 1 V

REF

IN

5V

®

1420

= 4.096V

–5V

18067 TA01

12 BITS 10Msps

4096 Point FFT Response

0

–20

–40

–60

AMPLITUDE (dB)

–80

–100

–120

0

1234

FREQUENCY (MHz)

VS = ±5V A f f SFDR = 83dB NONAVERAGED V

= 20

V

= 10Msps

SAMPLE

= 1.4086MHz

IN

= 200mV

IN

P-P

5

18067 TA02

1

LT1806/LT1807

TOP VIEW

V

+

OUT B –IN B +IN B

OUT A

–IN A +IN A

V

–

S8 PACKAGE

8-LEAD PLASTIC SO

1

2

3

4

8

7

6

5

–

+

– +

1 2 3 4

OUT A

–IN A +IN A

V

–

8 7 6 5

V

+

OUT B –IN B +IN B

TOP VIEW

MS8 PACKAGE

8-LEAD PLASTIC MSOP

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

Total Supply Voltage (V+ to V–) ............................ 12.6V

Input Voltage (Note 2) ............................................. ±V

Input Current (Note 2) ........................................ ±10mA

Output Short-Circuit Duration (Note 3)............ Indefinite

Operating Temperature Range (Note 4) .. –40°C to 85°C

UU

W

PACKAGE/ORDER I FOR ATIO

ORDER PART

TOP VIEW

OUT 1

–

2

V

+IN 3

S6 PACKAGE

6-LEAD PLASTIC SOT-23

T

= 150°C, θJA = 160°C/W (Note 9)

JMAX

+

6 V 5 SHDN 4 –IN

NUMBER

LT1806CS6 LT1806IS6

S6 PART MARKING

LTNK LTNL

ORDER PART

NUMBER

Specified Temperature Range (Note 5)... –40°C to 85°C

Junction Temperature...........................................150°C

S

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)..................300°C

TOP VIEW

ORDER PART

NUMBER

SHDN

1 –IN +IN

–

V

T

= 150°C, θJA = 100°C/W (Note 9)

JMAX

–

2

+

3

4

S8 PACKAGE

8-LEAD PLASTIC SO

NC

8

+

V

7

OUT

6

NC

5

LT1806CS8 LT1806IS8

S8 PART MARKING

1806 1806I

ORDER PART

NUMBER

T

= 150°C, θJA = 135°C/W (Note 9)

JMAX

LT1807CMS8 LT1807IMS8

MS8 PART MARKING

LTTT LTTV

T

= 150°C, θJA = 100°C/W (Note 9)

JMAX

LT1807CS8 LT1807IS8

S8 PART MARKING

1807 1807I

Consult factory for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

T

= 25°C. V

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

∆V

OS

I

B

∆I

B

2

= 5V, 0V; VS = 3V, 0V; V

S

= open; VCM = V

SHDN

Input Offset Voltage VCM = V

V

CM

VCM = V+ (LT1806 SOT-23) 100 700 µV V

CM

Input Offset Voltage Shift VCM = V– to V

VCM = V– to V+ (LT1806 SOT-23) 100 700 µV

Input Offset Voltage Match (Channel-to-Channel) VCM = V– to V (Note 10)

Input Bias Current VCM = V

V

CM

Input Bias Current Shift VCM = V– to V Input Bias Current Match (Channel-to-Channel) VCM = V

(Note 10) V

CM

= half supply, unless otherwise noted.

OUT

= V

+ –

100 550 µV 100 550 µV

= V– (LT1806 SOT-23) 100 700 µV

+

50 550 µV

200 1000 µV

14 µA

= V– + 0.2V –13 –5 µA

+

617 µA

0.03 1.2 µA

= V– + 0.2V 0.05 3.0 µA

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

T

= 25°C. V

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

I

OS

∆I

OS

e

n

i

n

C

IN

A

VOL

CMRR Common Mode Rejection Ratio VS = 5V, V

PSRR Power Supply Rejection Ratio VS = 2.5V to 10V, V

V

OL

V

OH

I

SC

I

S

I

SHDN

V

L

V

H

t

ON

t

OFF

GBW Gain Bandwidth Product Frequency = 6MHz 325 MHz SR Slew Rate VS = 5V, AV = –1, RL = 1k, VO = 4V 125 V/µs FPBW Full Power Bandwidth VS = 5V, V HD Harmonic Distortion VS = 5V, AV = 1, RL = 1k, VO = 2V t

S

∆G Differential Gain (NTSC) VS = 5V, AV = 2, RL = 150 0.015 % ∆θ Differential Phase (NTSC) VS = 5V, AV = 2, RL = 150 0.05 Deg

= 5V, 0V; VS = 3V, 0V; V

S

Input Offset Current VCM = V

= open; VCM = V

SHDN

= half supply unless otherwise noted.

OUT

+

0.03 0.6 µA

VCM = V– + 0.2V 0.05 1.5 µA

Input Offset Current Shift VCM = V– + 0.2V to V

+

0.08 2.1 µA

Input Noise Voltage 0.1Hz to 10Hz 800 nV Input Noise Voltage Density f = 10kHz 3.5 nV/√Hz Input Noise Current Density f = 10kHz 1.5 pA/√Hz Input Capacitance 2pF Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 75 220 V/mV

VS = 5V, VO = 1V to 4V, RL = 100 to VS/2 9 22 V/mV

= 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 60 150 V/mV

V

S

= V– to V

= 3V, V

S

CM

= V– to V

CM

= V– to V

CM

= V– to V

CM

VS = 3V, V

CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, V

V

Input Common Mode Range V

+

= 0V 90 105 dB

CM

79 100 dB 74 95 dB

73 100 dB 68 95 dB

–

+

V

PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V 84 105 dB Minimum Supply Voltage (Note 6) 2.3 2.5 V Output Voltage Swing LOW (Note 7) No Load 8 50 mV

= 5mA 50 130 mV

I

SINK

= 25mA 170 375 mV

I

SINK

Output Voltage Swing HIGH (Note 7) No Load 15 65 mV

= 5mA 85 180 mV

I

SOURCE

= 25mA 350 650 mV

I

SOURCE

Short-Circuit Current VS = 5V ±35 ±85 mA

= 3V ±30 ±65 mA

V

S

Supply Current per Amplifier 913 mA Disable Supply Current VS = 5V, V

= 3V, V

V

S

SHDN Pin Current VS = 5V, V

= 3V, V

V

S

Shutdown Output Leakage Current V

= 0.3V 0.1 75 µA

SHDN

= 0.3V 0.40 0.9 mA

SHDN

= 0.3V 0.22 0.7 mA

SHDN

= 0.3V 150 350 µA

SHDN

= 0.3V 100 300 µA

SHDN

SHDN Pin Input Voltage LOW 0.3 V SHDN Pin Input Voltage HIGH V+ – 0.5 V Turn-On Time V Turn-Off Time V

Settling Time 0.01%, VS = 5V, V

= 0.3V to 4.5V, RL = 100Ω 80 ns

SHDN

= 4.5V to 0.3V, RL = 100Ω 50 ns

SHDN

OUT

= 4V

P-P

, fC = 5MHz –78 dBc

P-P

= 2V, AV = 1, RL = 1k 60 ns

STEP

10 MHz

P-P

V

3

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

temperature range. VS = 5V, 0V; VS = 3V, 0V; V

SHDN

The ● denotes the specifications which apply over the 0°C < TA < 70°C

= open; VCM = V

= half supply, unless otherwise noted.

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage VCM = V

+ –

= V

V

CM

= V+ (LT1806 SOT-23) ● 200 850 µV

V

CM

● 200 700 µV

VCM = V– (LT1806 SOT-23) ● 200 850 µV

VOS TC Input Offset Voltage Drift (Note 8) VCM = V

∆V

OS

Input Offset Voltage Shift V

Input Offset Voltage Match (Channel-to-Channel) VCM = V–, VCM = V

+

–

= V

V

CM

= V– to V

CM

= V– to V+ (LT1806 SOT-23) ● 100 850 µV

V

CM

+

● 1.5 5 µV/°C

● 100 700 µV

● 300 1200 µV

(Note 10)

I

B

Input Bias Current VCM = V+ – 0.2V ● 15 µA

VCM = V– + 0.4V ● –15 –5 µA

∆I

B

Input Bias Current Shift V

= V– + 0.4V to V+ – 0.2V ● 620 µA

CM

Input Bias Current Match (Channel-to-Channel) VCM = V+ – 0.2V ● 0.03 1.5 µA (Note 10) V

I

OS

∆I

OS

A

VOL

Input Offset Current VCM = V+ – 0.2V ● 0.03 0.75 µA

Input Offset Current Shift V Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 ● 60 175 V/mV

= V– + 0.4V ● 0.05 3.5 µA

CM

= V– + 0.4V ● 0.05 1.80 µA

V

CM

= V– + 0.4V to V+ – 0.2V ● 0.08 2.55 µA

CM

= 5V, VO = 1V to 4V, RL = 100Ω to VS/2 ● 7.5 20 V/mV

V

S

VS = 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 ● 45 140 V/mV

CMRR Common Mode Rejection Ratio VS = 5V, V

= 3V, V

V

S

CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, V

= 3V, V

V

S

= V– to V

CM

= V– to V

CM

= V– to V

CM

= V– to V

CM

Input Common Mode Range ● V

PSRR Power Supply Rejection Ratio VS = 2.5V to 10V, V

+

= 0V ● 88 105 dB

CM

● 77 94 dB

● 72 89 dB

● 71 94 dB

● 66 89 dB

–

+

V

PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V ● 82 105 dB Minimum Supply Voltage (Note 6) VCM = VO = 0.5V ● 2.3 2.5 V

V

OL

V

OH

I

SC

I

S

I

SHDN

V

L

V

H

t

ON

t

OFF

Output Voltage Swing LOW (Note 7) No Load ● 12 60 mV

= 5mA ● 60 140 mV

I

SINK

= 25mA ● 180 425 mV

I

SINK

Output Voltage Swing HIGH (Note 7) No Load ● 30 120 mV

I

= 5mA ● 110 220 mV

SOURCE

= 25mA ● 360 700 mV

I

SOURCE

Short-Circuit Current VS = 5V ● ±30 ±65 mA

= 3V ● ±25 ±55 mA

V

S

Supply Current per Amplifier ● 10 14 mA Disable Supply Current VS = 5V, V

= 3V, V

V

S

SHDN Pin Current VS = 5V, V

VS = 3V, V

Shutdown Output Leakage Current V

= 0.3V ● 1 µA

SHDN

= 0.3V ● 0.40 1.1 mA

SHDN

= 0.3V ● 0.22 0.9 mA

SHDN

= 0.3V ● 160 400 µA

SHDN

= 0.3V ● 110 350 µA

SHDN

SHDN Pin Input Voltage LOW ● 0.3 V SHDN Pin Input Voltage HIGH ● V+ – 0.5 V Turn-On Time V Turn-Off Time V

= 0.3V to 4.5V, RL = 100Ω ● 80 ns

SHDN

= 4.5V to 0.3V, RL = 100Ω ● 50 ns

SHDN

GBW Gain Bandwidth Product Frequency = 6MHz ● 300 MHz SR Slew Rate VS = 5V, AV = –1, RL= 1k, VO = 4V ● 100 V/µs FPBW Full Power Bandwidth VS = 5V, VO = 4V

P-P

● 8 MHz

V

4

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

temperature range. VS = 5V, 0V; VS = 3V, 0V; V

SHDN

The ● denotes the specifications which apply over the – 40°C < TA < 85°C

= open; VCM = V

= half supply, unless otherwise noted. (Note 5)

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage VCM = V

VOS TC Input Offset Voltage Drift (Note 8) VCM = V

∆V

OS

Input Offset Voltage Shift V

Input Offset Voltage Match (Channel-to-Channel) VCM = V+, VCM = V

+ –

VCM = V

= V+ (LT1806 SOT-23) ● 200 950 µV

V

CM

= V– (LT1806 SOT-23) ● 200 950 µV

V

CM

+

–

= V

V

CM

–

= V

CM

= V– to V+ (LT1806 SOT-23) ● 100 950 µV

V

CM

–

● 200 800 µV

● 1.5 5 µV/°C

● 100 800 µV

● 200 1400 µV

(Note 10)

I

B

Input Bias Current VCM = V+ – 0.2V ● 16 µA

VCM = V– + 0.4V ● –16 –5 µA

∆I

B

Input Bias Current Shift V

= V– + 0.4V to V+ – 0.2V ● 622 µA

CM

Input Bias Current Match (Channel-to-Channel) VCM = V+ – 0.2V ● 0.02 1.8 µA (Note 10) V

I

OS

∆I

OS

A

VOL

Input Offset Current VCM = V+ – 0.2V ● 0.02 0.9 µA

Input Offset Current Shift V Large-Signal Voltage Gain VS = 5V, VO = 0.5V to 4.5V, RL = 1k to VS/2 ● 50 140 V/mV

CMRR Common Mode Rejection Ratio VS = 5V, V

CMRR Match (Channel-to-Channel) (Note 10) VS = 5V, V

Input Common Mode Range ● V

PSRR Power Supply Rejection Ratio VS = 2.5V to 10V, V

= V– + 0.4V ● 0.05 4.0 µA

CM

= V– + 0.4V ● 0.05 2.1 µA

V

CM

= V– + 0.4V to V+ – 0.2V ● 0.07 3 µA

CM

= 5V, VO = 1V to 4V, RL = 100Ω to VS/2 ● 616 V/mV

V

S

= 3V, VO = 0.5V to 2.5V, RL = 1k to VS/2 ● 35 100 V/mV

V

S

VS = 3V, V

= 3V, V

V

S

= V– to V

CM CM

= V– to V

CM CM

= V– to V

CM

+

● 75 94 dB

● 71 89 dB

● 69 94 dB

● 65 89 dB

–

+

V

= 0V ● 86 105 dB

PSRR Match (Channel-to-Channel) (Note 10) VS = 2.5V to 10V, VCM = 0V ● 80 105 dB Minimum Supply Voltage (Note 6) VCM = VO = 0.5V ● 2.3 2.5 V

V

OL

V

OH

I

SC

Output Voltage Swing LOW (Note 7) No Load ● 15 70 mV

= 5mA ● 65 150 mV

I

SINK

= 20mA ● 170 400 mV

I

SINK

Output Voltage Swing HIGH (Note 7) No Load ● 30 130 mV

I

= 5mA ● 110 240 mV

SOURCE

= 20mA ● 350 700 mV

I

SOURCE

Short-Circuit Current VS = 5V ● ±22 ±45 mA

VS = 3V ● ±20 ±40 mA

I

S

I

SHDN

V

L

V

H

t

ON

t

OFF

Supply Current per Amplifier ● 11 16 mA Disable Supply Current VS = 5V, V

VS = 3V, V

SHDN Pin Current VS = 5V, V

= 3V, V

V

S

Shutdown Output Leakage Current V

= 0.3V ● 1.2 µA

SHDN

= 0.3.V ● 0.4 1.2 mA

SHDN

= 0.3V ● 0.3 1.0 mA

SHDN

= 0.3V ● 170 450 µA

SHDN

= 0.3V ● 120 400 µA

SHDN

SHDN Pin Input Voltage LOW ● 0.3 V SHDN Pin Input Voltage HIGH ● V+ – 0.5 V Turn-On Time V Turn-Off Time V

= 0.3V to 4.5V, RL = 100Ω ● 80 ns

SHDN

= 4.5V to 0.3V, RL = 100Ω ● 50 ns

SHDN

GBW Gain Bandwidth Product Frequency = 6MHz ● 250 MHz SR Slew Rate VS= 5V, AV = –1, RL= 1k, VO = 4V ● 80 V/µV FPBW Full Power Bandwidth VS = 5V, VO = 4V

P-P

● 6 MHz

V

5

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

T

= 25°C. V

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

∆V

OS

I

B

∆I

B

I

OS

∆I

OS

e

n

i

n

C

IN

A

VOL

CMRR Common Mode Rejection Ratio V

PSRR Power Supply Rejection Ratio V

V

OL

V

OH

I

SC

I

S

I

SHDN

V

L

V

H

t

ON

t

OFF

GBW Gain Bandwidth Product Frequency = 6MHz 170 325 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, Measured at VO = ±3V 70 140 V/µs FPBW Full Power Bandwidth VO = 8V HD Harmonic Distortion AV = 1, RL = 1k, VO = 2V t

S

∆G Differential Gain (NTSC) AV = 2, RL = 150 0.01 % ∆θ Differential Phase (NTSC) AV = 2, RL = 150 0.01 Deg

= ±5V, V

S

Input Offset Voltage VCM = V

Input Offset Voltage Shift VCM = V– to V

Input Offset Voltage Match (Channel-to-Channel) VCM = V–, VCM = V

= open; VCM = 0V, V

SHDN

= 0V, unless otherwise noted.

OUT

+

–

= V

V

CM

V

= V+ (LT1806 SOT-23) 100 750 µV

CM

= V– (LT1806 SOT-23) 100 750 µV

V

CM

V

= V– to V+ (LT1806 SOT-23) 50 750 µV

CM

+

100 700 µV 100 700 µV

50 700 µV

200 1200 µV

(Note 10) Input Bias Current VCM = V

Input Bias Current Shift VCM = V– + 0.2V to V Input Bias Current Match (Channel-to-Channel) VCM = V

(Note 10) V Input Offset Current VCM = V

Input Offset Current Shift VCM = V– + 0.2V to V

+

= V– + 0.2V –14 –5 µA

V

CM

+

= V– + 0.2V 0.05 3.2 µA

CM

+

V

= V– + 0.2V 0.04 1.6 µA

CM

+

15 µA

619 µA

0.03 1.4 µA

0.03 0.7 µA

0.07 2.3 µA

Input Noise Voltage 0.1Hz to 10Hz 800 nV Input Noise Voltage Density f = 10kHz 3.5 nV/√Hz Input Noise Current Density f = 10kHz 1.5 pA/√Hz Input Capacitance f = 100kHz 2 pF Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k 100 300 V/mV

= –2.5V to 2.5V, RL = 100Ω 10 27 V/mV

V

O

= V– to V

CM

CMRR Match (Channel-to-Channel) (Note 10) VCM = V– to V Input Common Mode Range V

+

= 2.5V to 10V, V– = 0V 90 105 dB

PSRR Match (Channel-to-Channel) (Note 10) V

+

= 2.5V to 10V, V– = 0V 84 105 dB

+

83 106 dB 77 106 dB

–

+

V

Output Voltage Swing LOW (Note 7) No Load 14 60 mV

I

= 5mA 55 140 mV

SINK

= 25mA 180 450 mV

I

SINK

Output Voltage Swing HIGH (Note 7) No Load 20 70 mV

= 5mA 90 200 mV

I

SOURCE

I

= 25mA 360 700 mV

SOURCE

Short-Circuit Current ±40 ±85 mA Supply Current per Amplifier 11 16 mA Disable Supply Current V SHDN Pin Current V Shutdown Output Leakage Current V

= 0.3V 0.4 1.2 mA

SHDN

= 0.3V 150 350 µA

SHDN

= 0.3V 0.3 75 µA

SHDN

SHDN Pin Input Voltage LOW 0.3 V SHDN Pin Input Voltage HIGH V+ – 0.5 V Turn-On Time V Turn-Off Time V

Settling Time 0.01%, V

= 0.3V to 4.5V, RL = 100Ω 80 ns

SHDN

= 4.5V to 0.3V, RL = 100Ω 50 ns

SHDN

P-P

, fC = 5MHz –80 dBc

P-P

= 8V, AV = 1, RL = 1k 120 ns

STEP

5.5 MHz

P-P

V

6

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

temperature range. VS = ±5V, V

= open; VCM = 0V, V

SHDN

The ● denotes specifications which apply over the 0°C < TA < 70°C

= 0V, unless otherwise noted.

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage VCM = V

VOS TC Input Offset Voltage Drift (Note 8) VCM = V

∆V

OS

Input Offset Voltage Shift VCM = V– to V

Input Offset Voltage Match (Channel-to Channel) VCM = V–, VCM = V

+ –

= V

V

CM

V

= V+ (LT1806 SOT-23) ● 200 900 µV

CM

= V– (LT1806 SOT-23) ● 200 900 µV

V

CM

+

–

= V

V

CM

V

= V– to V+ (LT1806 SOT-23) ● 100 900 µV

CM

+

● 200 800 µV

● 1.5 5 µV/°C

● 100 800 µV

● 300 1400 µV

(Note 10)

I

B

∆I

B

Input Bias Current VCM = V+ – 0.2V ● 16 µA

= V– + 0.4V ● –15 –6 µA

V

CM

Input Bias Current Shift VCM = V– + 0.4V to V+ – 0.2V ● 721 µA Input Bias Current Match (Channel-to-Channel) VCM = V+ – 0.2V ● 0.03 1.8 µA

(Note 10) V

I

OS

∆I

OS

A

VOL

Input Offset Current VCM = V+ – 0.2V ● 0.03 0.9 µA

Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V ● 0.07 2.8 µA Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k ● 80 250 V/mV

CMRR Common Mode Rejection Ratio V

CMRR Match (Channel-to-Channel) (Note 10) V Input Common Mode Range ● V

PSRR Power Supply Rejection Ratio V

PSRR Match (Channel-to-Channel) (Note 10) V

V

OL

V

OH

I

SC

I

S

Output Voltage Swing LOW (Note 7) No Load ● 18 80 mV

Output Voltage Swing HIGH (Note 7) No Load ● 40 140 mV

Short-Circuit Current ● ±35 ±75 mA Supply Current per Amplifier ● 14 20 mA Disable Supply Current V

I

SHDN

SHDN Pin Current V

Shutdown Output Leakage Current V V V t t

L

H ON OFF

SHDN Pin Input Voltage LOW ● 0.3 V SHDN Pin Input Voltage HIGH ● V+ – 0.5 V Turn-On Time V Turn-Off Time V

= V– + 0.4V ● 0.04 3.8 µA

CM

V

= V– + 0.4V ● 0.04 1.9 µA

CM

V

= –2.5V to 2.5V, RL = 100Ω ● 825 V/mV

O

= V– to V

CM

= V– to V

CM

+

= 2.5V to 10V, V– = 0V ● 88 105 dB

+

= 2.5V to 10V, V– = 0V ● 82 106 dB

I

= 5mA ● 60 160 mV

SINK

= 25mA ● 185 500 mV

I

SINK

I

SOURCE

I

SOURCE

SHDN SHDN SHDN

SHDN SHDN

+

● 81 100 dB

● 75 100 dB

–

+

V

= 5mA ● 110 240 mV = 25mA ● 360 750 mV

= 0.3V ● 0.4 1.4 mA = 0.3V ● 160 400 µA = 0.3V ● 1 µA

= 0.3V to 4.5V, RL = 100Ω ● 80 ns = 4.5V to 0.3V, RL = 100Ω ● 50 ns

GBW Gain Bandwidth Product Frequency = 6MHz ● 150 300 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, ● 60 120 V/µs

P-P

= ±3V

O

● 4.5 MHz

Measure at V

FPBW Full Power Bandwidth VO = 8V

V

7

LT1806/LT1807

ELECTRICAL CHARACTERISTICS

temperature range. VS = ±5V, V

= open; VCM = 0V, V

SHDN

The ● denotes the specifications which apply over the –40°C < T

= 0V, unless otherwise noted. (Note 5)

OUT

< 85°C

A

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

Input Offset Voltage VCM = V

VOS TC Input Offset Voltage Drift (Note 8) VCM = V

∆V

OS

Input Offset Voltage Shift VCM = V– to V

Input Offset Voltage Match (Channel-to-Channel) VCM = V– to V

+ –

VCM = V

= V+ (LT1806 SOT-23) ● 200 975 µV

V

CM

= V– (LT1806 SOT-23) ● 200 975 µV

V

CM

+

–

= V

V

CM

= V– to V+ (LT1806 SOT-23) ● 100 975 µV

V

CM

+

● 200 900 µV

● 1.5 5 µV/°C

● 100 900 µV

● 300 1600 µV

(Note 10)

I

B

∆I

B

Input Bias Current VCM = V+ – 0.2V ● 1.2 7 µA

= V– + 0.4V ● –16 –5 µA

V

CM

Input Bias Current Shift VCM = V– + 0.4V to V+ – 0.2V ● 623 µA Input Bias Current Match (Channel-to-Channel) VCM = V+ – 0.2V ● 0.03 2.0 µA

(Note 10) V

I

OS

∆I

OS

A

VOL

Input Offset Current VCM = V+ – 0.2V ● 0.03 1.0 µA

Input Offset Current Shift VCM = V– + 0.4V to V+ – 0.2V ● 0.07 3.2 µA Large-Signal Voltage Gain VO = –4V to 4V, RL = 1k ● 60 175 V/mV

CMRR Common Mode Rejection Ratio V

CMRR Match (Channel-to-Channel) (Note 10) V Input Common Mode Range ● V

PSRR Power Supply Rejection Ratio V

= V– + 0.4V ● 0.04 4.5 µA

CM

= V– + 0.4V ● 0.04 2.2 µA

V

CM

= –2V to 2V, RL =100Ω ● 717 V/mV

V

O

= V– to V

CM

= V– to V

CM

+

= 2.5V to 10V, V– = 0V ● 86 105 dB

+

● 80 100 dB

● 74 100 dB

–

+

V

PSRR Match (Channel-to-Channel) (Note 10) ● 80 105 dB

V

OL

V

OH

I

SC

I

S

I

SHDN

V

L

V

H

t

ON

t

OFF

Output Voltage Swing LOW (Note 7) No Load ● 20 100 mV

I

= 5mA ● 65 170 mV

SINK

= 20mA ● 200 500 mV

I

SINK

Output Voltage Swing HIGH (Note 7) No Load ● 50 160 mV

= 5mA ● 115 260 mV

I

SOURCE

= 20mA ● 360 700 mV

I

SOURCE

Short-Circuit Current ● ±25 ±55 mA Supply Current ● 15 22 mA Disable Supply Current V SHDN Pin Current V Shutdown Output Leakage Current V

= 0.3V ● 0.45 1.5 mA

SHDN

= 0.3V ● 170 450 µA

SHDN

= 0.3V ● 1.2 µA

SHDN

SHDN Pin Input Voltage LOW ● 0.3 V SHDN Pin Input Voltage HIGH ● V+ – 0.5 V Turn-On Time V Turn-Off Time V

= 0.3V to 4.5V, RL = 100Ω ● 80 ns

SHDN

= 4.5V to 0.3V, RL = 100Ω ● 50 ns

SHDN

GBW Gain Bandwidth Product Frequency = 6MHz ● 125 290 MHz SR Slew Rate AV = –1, RL = 1k, VO = ±4V, ● 50 100 V/µs

P-P

= ±3V

O

● 4 MHz

Measured at V

FPBW Full Power Bandwidth VO = 8V

V

Note 1: Absolute maximum ratings are those values beyond which the life of the device may be impaired.

8

Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA.

ELECTRICAL CHARACTERISTICS

COMMON MODE VOLTAGE (V)

–1

–10

INPUT BIAS CURRENT (µA)

–5

0

5

0123

18067 G06

456

TA = 125°C

T

A

= 25°C

T

A

= –55°C

VS = 5V, 0V

TA = 125°C

T

A

= 25°C

T

A

= –55°C

LT1806/LT1807

Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely.

Note 4: The LT1806C/LT1806I and LT1807C/LT1807I are guaranteed functional over the temperature range of –40°C and 85°C.

Note 5: The LT1806C/LT1807C are guaranteed to meet specified performance from 0°C to 70°C. The LT1806C/LT1807C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LT1806I/LT1807I are guaranteed to meet specified performance from –40°C to 85°C.

Note 6: Minimum supply voltage is guaranteed by power supply rejection ratio test.

Note 7: Output voltage swings are measured between the output and power supply rails.

Note 8: This parameter is not 100% tested. Note 9: Thermal resistance varies depending upon the amount of PC board

metal attached to the V amount of 2oz copper metal trace connecting to the V the thermal resistance tables in the Applications Information section.

Note 10: Matching parameters are the difference between the two amplifiers of the LT1807.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

VOS Distribution, VCM = 0V (PNP Stage)

50

VS = 5V, 0V V

= 0V

CM

40

30

VOS Distribution, VCM = 5V

(NPN Stage) ∆V

50

VS = 5V, 0V V

= 5V

CM

40

30

–

pin of the device. θ

Shift for VCM = 0V to 5V

OS

50

VS = 5V, 0V

40

30

is specified for a certain

JA

–

pin as described in

20

PERCENT OF UNITS (%)

10

20

15

10

SUPPLY CURRENT (mA)

0 –500

–300

INPUT OFFSET VOLTAGE (µV)

–100

100

Supply Current per Amp vs Supply Voltage

TA = 125°C

5

0

34521

TOTAL SUPPLY VOLTAGE (V)

678

300

T

= 25°C

A

TA = –55°C

91011

18067 G01

18067 G04

500

12

20

PERCENT OF UNITS (%)

10

0

–300

–500

–100

INPUT OFFSET VOLTAGE (µV)

Offset Voltage vs Input Common Mode

500

–100 –200

OFFSET VOLTAGE (µV)

–300 –400 –500

400 300 200

100

0

VS = 5V, 0V TYPICAL PART

0

INPUT COMMON MODE VOLTAGE (V)

TA = 125°C

TA = 25°C

TA = –55°C

1

20

PERCENT OF UNITS (%)

10

100

300

500

18067 G02

0 –500

–300

INPUT OFFSET VOLTAGE (µV)

–100

100

300

500

18067 G03

Input Bias Current vs Common Mode Voltage

3

4

2

5

18067 G05

9

LT1806/LT1807

LOAD CURRENT (mA)

0.01

0.001

OUTPUT SATURATION VOLTAGE (V)

0.1

10

1 1000.1 10

18067 G09

0.01

1

TA = 125°C

TA = –55°C

TA = 25°C

VS = ±5V

SHDN PIN VOLTAGE (V)

0

SUPPLY CURRENT (mA)

2

6

8

10

2

4

5

18

18067 G12

4

13

12

14

16

TA = 125°C

TA = –55°C

TA = 25°C

VS = 5V, 0V

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Input Bias Current vs Temperature

2 1

NPN ACTIVE V

= 5V, 0V

S

V

CM

PNP ACTIVE V

= 5V, 0V

S

V

CM

–20

10

TEMPERATURE (°C)

= 5V

= 0V

25 85

40

INPUT BIAS (µA)

0

–1 –2 –3 –4 –5 –6 –7 –8

–50

–35 –5

Minimum Supply Voltage

1.0

0.8

0.6

0.4

0.2 TA = 125°C

0 –0.2 –0.4 –0.6

CHANGE IN OFFSET VOLTAGE (mV)

–0.8 –1.0

1.0

1.5 2.5

TA = 25°C

TA = –55°C

2.0

TOTAL SUPPLY VOLTAGE (V)

3.0

3.5

4.0

Output Saturation Voltage vs Load Current (Output Low)

10

VS = ±5V

1

0.1 TA = 125°C

0.01

TA = –55°C

0.1 1 10 100 LOAD CURRENT (mA)

OUTPUT SATURATION VOLTAGE (V)

55

70

18067 G07

0.001

TA = 25°C

18067 G08

Output Short-Circuit Current vs Power Supply Voltage

120

4.5

18067 G10

5.0

100

80 60 40 20

–20 –40 –60 –80

OUTPUT SHORT-CIRCUIT CURRENT (mA)

–100

TA = 25°C

0

TA = –55°C

TA = 25°C

1.5

2.5

2.0

POWER SUPPLY VOLTAGE (±V)

“SINKING”

“SOURCING”

3.0

3.5

TA = –55°C

TA = 125°C

4.0

4.5

5.0

18067 G11

Output Saturation Voltage vs Load Current (Output High)

Supply Current vs SHDN Pin Voltage

SHDN Pin Current vs SHDN Pin Voltage

20

VS = 5V, 0V

0 –20 –40 –60 –80

–100

–120

SHDN PIN CURRENT (µA)

–140 –160 –180

10

TA = 125°C

TA = –55°C

1

0

TA = 25°C

3

2

SHDN PIN VOLTAGE (V)

Open-Loop Gain

500 400 300 200 100

0 –100 –200

INPUT VOLTAGE (µV)

–300 –400 –500

0

4

5

18067 G13

0.5

RL = 100Ω

1.5 2.0

1.0

OUTPUT VOLTAGE (V)

RL = 1k

VS = 3V, 0V

TO GND

R

L

2.5

18067 G14

3.0

Open-Loop Gain

500 400 300 200 100

0 –100 –200

INPUT VOLTAGE (µV)

–300 –400 –500

0

0.5

RL = 100Ω

2.5

1.5 2.0

1.0 OUTPUT VOLTAGE (V)

VS = 5V, 0V

TO GND

R

L

RL = 1k

3.0 3.5 4.0 4.5 5.0

18067 G15

UW

TIME (SEC)

0

OUTPUT VOLTAGE (nV)

200

600

1000

8

18067 G21

–200

–600

0

400

800

–400

–800

–1000

21

43

67 9

5

10

TEMPERATURE (°C)

–55

75

SLEW RATE (µV/µs)

100

125

150

175

–35 –15 5 25

18067 G24

45 65 85 105 125

AV = –1 R

F

= RG = 1k

R

L

= 1k

VS = ±5V

VS = ±2.5V

TYPICAL PERFOR A CE CHARACTERISTICS

LT1806/LT1807

Open-Loop Gain

500 400 300 200 100

0

–100

–200

INPUT VOLTAGE (µV)

–300 –400 –500

–5

–4–3–2 –1

RL = 100Ω

0

OUTPUT VOLTAGE (V)

12345

VS = ±5V

RL = 1k

18067 G16

Offset Voltage vs Output Current

2.5 VS = ±5V

2.0

1.5

1.0

0.5

0 –0.5 –1.0

OFFSET VOLTAGE (mV)

–1.5 –2.0 –2.5

–100

–80

–40 –20

–60

OUTPUT CURRENT (mA)

TA = 125°C

TA = 25°C

TA = –55°C

0

20 40 60 80 100

Input Noise Voltage vs Frequency Input Noise Current vs Frequency

12

10

8

6

4

NOISE VOLTAGE (nV/√Hz)

2

0

VS = 5V, 0V

PNP ACTIVE

V

0.1

NPN ACTIVE

= 4.5V

V

CM

= 2.5V

CM

1 10 100

FREQUENCY (kHz)

18067 G19

12

10

8

6

4

NOISE CURRENT (pA/√Hz)

2

0

VS = 5V, 0V

NPN ACTIVE

V

CM

0.1

PNP ACTIVE

= 2.5V

V

CM

= 4.5V

1 10 100

FREQUENCY (kHz)

18067 G17

18067 G19

Warm-Up Drift vs Time (LT1806S8)

45

40

35

30

25

20

15

10

OFFSET VOLTAGE DRIFT (µV)

5

0

VS = ±5V

VS = ±2.5V

VS = ±1.5V

40

20

60

TIME AFTER POWER-UP (SEC)

0.1Hz to 10Hz Output Voltage Noise

16014012010080

18067 G18

400 350

GAIN BANDWIDTH (MHz)

300 250 200

Gain Bandwidth and Phase Margin vs Supply Voltage

TA = 25°C

PHASE MARGIN

GAIN BANDWIDTH PRODUCT

21

0

TOTAL SUPPLY VOLTAGE (V)

43

5

67 9

8

18067 G22

10

Gain Bandwidth and Phase Margin vs Temperature

55 50 45

PHASE MARGIN (DEG)

40 35 30

400 350

GAIN BANDWIDTH (MHz)

300 250 200

–55

PHASE MARGIN

= ±5V

V

S

GBW PRODUCT

–15–35

255

TEMPERATURE (°C)

V

= ±5V

S

= 3V

S

45

PHASE MARGIN

= 3V

V

S

65 85 125

105

18067 G23

Slew Rate vs Temperature

55 50 45

PHASE MARGIN (DEG)

40 35 30

11

LT1806/LT1807

FREQUENCY (MHz)

0.001

40

POWER SUPPLY REJECTION RATIO (dB)

50

60

70

80

0.01 0.1 1 10 100

18067 G30

30 20 10

0

90

100

VS = 5V, 0V T

A

= 25°C

NEGATIVE SUPPLY

POSITIVE SUPPLY

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Gain and Phase vs Frequency Gain vs Frequency (AV = 1) Gain vs Frequency (AV = 2)

70 60 50 40 30 20

GAIN (dB)

10

0

–10

CL = 5pF

–20

= 100Ω

R

L

–30

0.1 10 100 500

1

FREQUENCY (MHz)

V

S

GAIN

= ±5V

V

PHASE

V

S

PHASE

= ±5V

S

= 3V

GAIN

V

S

= 3V

18067 G25

225 180 135 90

PHASE (DEG)

45 0 –45 –90 –135 –180 –225

30

CL = 10pF

24

R

= 100Ω

L

18 12

6 0

GAIN (dB)

–6 –12 –18 –24 –36

0.1 10 100 500

1

FREQUENCY (MHz)

VS = ±5V

VS = 3V

18067 G26

21

CL = 10pF

18

= 100Ω

R

L

15 12

9 6

GAIN (dB)

3

0 –3 –6 –9

0.1 10 100 500

1

FREQUENCY (MHz)

VS = ±5V

VS = 3V

18067 G27

Output Impedance vs Frequency

600

VS = 5V, 0V

100

0.1

OUTPUT IMPEDANCE (Ω)

0.01

0.001

10

1

100k

AV = 2

AV = 10

1M 10M 100M 500M

FREQUENCY (Hz)

Series Output Resistor vs Capacitive Load

50

VS = 5V, 0V

= 1

A

45

V

40 35 30 25 20

OVERSHOOT (%)

15 10

5 0

10

12

ROS = 20Ω

ROS = RL = 50Ω

CAPACITIVE LOAD (pF)

AV = 1

18067 G28

ROS = 10Ω

100 1000

18067 G31

Common Mode Rejection Ratio vs Frequency

100

90 80 70 60

50 40 30 20 10

COMMON MODE REJECTION RATIO (dB)

0

0.1 1 10 100 500

0.01 FREQUENCY (MHz)

Series Output Resistor vs Capacitive Load

50

VS = 5V, 0V

= 2

A

45

V

40 35 30 25 20

OVERSHOOT (%)

15 10

ROS = RL = 50Ω

5 0

10

ROS = 10Ω

ROS = 20Ω

100 1000

CAPACITIVE LOAD (pF)

VS = 5V, 0V

18067 G29

18067 G32

INPUT SIGNAL

GENERATION

(2V/DIV)

OUTPUT

SETTLING

RESOLUTION

(2mV/DIV)

Power Supply Rejection Ratio vs Frequency

0.01% Settling Time

VS = ±5V 20ns/DIV 18067 G33 V

= ±4V

OUT

RL = 500Ω

= 120ns (SETTLING TIME)

t

S

UW

FREQUENCY (MHz)

0.3

–70

DISTORTION (dBc)

–60

–50

–40

11030

18067 G36

–80

–90

–100

–120

–110

AV = 2 V

OUT

= 2V

P-P

VS = ±5V

RL = 100Ω, 2ND

RL = 100Ω, 3RD

RL = 1k, 3RD

RL = 1k, 2ND

TYPICAL PERFOR A CE CHARACTERISTICS

LT1806/LT1807

Distortion vs Frequency

–40

AV = 1

= 2V

V

OUT

–50

–60

–70

–80

DISTORTION (dBc)

–90

–100

–110

0.3

P-P

VS = ±5V

RL = 100Ω, 2ND

RL = 100Ω, 3RD

11030

FREQUENCY (MHz)

–40

–50

–60

–70

–80

–90

DISTORTION (dBc)

–100

–110

–120

RL = 1k, 3RD

RL = 1k, 2ND

18067 G34

Distortion vs Frequency

AV = 2

V

= 2V

OUT

P-P

VS = 5V, 0V

0.3

RL = 100Ω, 3RD

RL = 100Ω, 2ND

RL = 1k, 3RD

11030

FREQUENCY (MHz)

Distortion vs Frequency Distortion vs Frequency

–40

AV = 1 V

–50

VS = 5V, 0V

–60

–70

–80

DISTORTION (dBc)

–90

–100

–110

0.3

RL = 1k, 2ND

18067 G37

= 2V

OUT

P-P

RL = 100Ω, 3RD

RL = 100Ω, 2ND

RL = 1k, 2ND

RL = 1k, 3RD

11030

FREQUENCY (MHz)

18067 G35

Maximum Undistorted Output Signal vs Frequency

4.6 VS = 5V, 0V

)

4.5

P-P

4.4

4.3

4.2

4.1

OUTPUT VOLTAGE SWING (V

4.0

3.9

0.1

AV = –1

AV = +2

1 10 100

FREQUENCY (MHz)

18067 G38

0V 0V

±5V Large-Signal Response ±5V Small-Signal Response 5V Large-Signal Response

0.5V

VS = ±5V 40ns/DIV 18067 G39 FREQ = 1.92MHz

A

= 1

V

= 1k

R

L

VS = ±5V 20ns/DIV 18067 G40 FREQ = 4.48MHz

A

= 1

V

= 1k

R

L

VS = 5V, 0V 20ns/DIV 18067 G41 FREQ = 5.29MHz

A

= 1

V

= 1k

R

L

13

LT1806/LT1807

UW

TYPICAL PERFOR A CE CHARACTERISTICS

5V Small-Signal Response Output Overdriven Recovery Shutdown Response

V

IN

(1V/DIV)

0V

V

OUT

(2V/DIV)

0V

V

SHDN

(2V/DIV)

0V

V

OUT

(2V/DIV)

0V

VS = 5V, 0V 10ns/DIV 18067 G42 AV = 1

R

= 1k

L

= 5V, 0V 100ns/DIV 18067 G43

V

S

AV = 2

= 1k

R

L

WUUU

APPLICATIO S I FOR ATIO

Rail-to-Rail Characteristics

The LT1806/LT1807 have input and output signal range that covers from negative power supply to positive power supply. Figure 1 depicts a simplified schematic of the amplifier. The input stage is comprised of two differential amplifiers, a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active over different ranges of common mode input voltage. The PNP differential pair is active between the negative supply to approximately 1.5V below the positive

+

SHDN

V

+

V

–

V

–

V

ESDD5

D9

ESDD6

R6 40k

R7 100k

Q16

Q17

BIAS

GENERATION

+IN

–IN

–

+

V

ESDD2ESDD1

D6D7D8

D5

ESDD3ESDD4

–

V+V

D1

D2

Q3

Q4

Q7

= 5V, 0V 200ns/DIV 18067 G44

V

S

AV = 2

= 100Ω

R

L

supply. As the input voltage moves closer toward the positive supply, the transistor Q5 will steer the tail current I1 to the current mirror Q6/Q7, activating the NPN differential pair. The PNP pair becomes inactive for the rest of the input common mode range up to the positive supply.

A pair of complementary common emitter stages Q14/ Q15 that enable the output to swing from rail to rail constructs the output stage. The capacitors C1 and C2 form the local feedback loops that lower the output

R3 R4 R5

Q11

Q12

Q13 Q15

C2

+

I

2

C

–

V

BUFFER

AND

OUTPUT BIAS

Q9

Q8

C1

R2R1

OUT

Q14

18067 F01

Q5 V

Q6

BIAS

+

I

1

Q1

Q2

D3

D4

Q10

14

Figure 1. LT1806 Simplified Schematic Diagram

WUUU

APPLICATIO S I FOR ATIO

LT1806/LT1807

imped

ance at high frequency. These devices are fabricated on Linear Technology’s proprietary high speed complementary bipolar process.

Power Dissipation

The LT1806/LT1807 amplifiers combine high speed with large output current in a small package, so there is a need to ensure that the die’s junction temperature does not exceed 150°C. The LT1806 is housed in an SO-8 package or a 6-lead SOT-23 package and the LT1807 is in an SO-8 or 8-lead MSOP package. All packages have the V– supply pin fused to the lead frame to enhance the thermal conductance when connecting to a ground plane or a large metal trace. Metal trace and plated through-holes can be used to spread the heat generated by the device to the backside of the PC board. For example, on a 3/32" FR-4 board with 2oz copper, a total of 660 square millimeters connects to Pin␣ 4 of LT1807 in an SO-8 package (330 square millimeters on each side of the PC board) will bring the thermal resistance, θJA, to about 85°C/W. Without extra metal trace beside the power line connecting to the V– pin to provide a heat sink, the thermal resistance will be around 105°C/W. More information on thermal resistance for all packages with various metal areas connecting to the V– pin is provided in Tables 1, 2 and 3.

Table 1. LT1806 6-Lead SOT-23 Package

COPPER AREA

TOPSIDE (mm

270 2500 135°C/W 100 2500 145°C/W

20 2500 160°C/W

0 2500 200°C/W

Device is mounted on topside.

Table 2. LT1806/LT1807 SO-8 Package

COPPER AREA

TOPSIDE BACKSIDE BOARD AREA THERMAL RESISTANCE

2

(mm

) (mm2) (mm2) (JUNCTION-TO-AMBIENT)

1100 1100 2500 65°C/W

330 330 2500 85°C/W

35 35 2500 95°C/W 35 0 2500 100°C/W

0 0 2500 105°C/W

Device is mounted on topside.

BOARD AREA THERMAL RESISTANCE

2

) (mm2) (JUNCTION-TO-AMBIENT)

Table 3. LT1807 8-Lead MSOP Package

COPPER AREA

TOPSIDE BACKSIDE BOARD AREA THERMAL RESISTANCE

2

(mm

) (mm2) (mm2) (JUNCTION-TO-AMBIENT)

540 540 2500 110°C/W 100 100 2500 120°C/W 100 0 2500 130°C/W

30 0 2500 135°C/W

0 0 2500 140°C/W

Device is mounted on topside.

Junction temperature TJ is calculated from the ambient temperature TA and power dissipation PD as follows:

TJ = TA + (PD • θJA)

The power dissipation in the IC is the function of the supply voltage, output voltage and the load resistance. For a given supply voltage, the worst-case power dissipation P

D(MAX)

occurs at the maximum quiescent supply current and at the output voltage which is half of either supply voltage (or the maximum swing if it is less than 1/2 the supply voltage). P

P

D(MAX)

Example: An LT1807 in SO-8 mounted on a 2500mm

is given by:

D(MAX)

= (VS • I

S(MAX)

) + (VS/2)2/R

L

2

area of PC board without any extra heat spreading plane connected to its V– pin has a thermal resistance of 105°C/W, θJA. Operating on ±5V supplies with both amplifiers simultaneously driving 50Ω loads, the worstcase power dissipation is given by:

P

D(MAX)

= 2 • (10 • 14mA) + 2 • (2.5)2/50 = 0.28 + 0.25 = 0.53W

The maximum ambient temperature that the part is allowed to operate is:

TA = TJ – (P

D(MAX)

• 105°C/W)

= 150°C – (0.53W • 105°C/W) = 94°C

To operate the device at higher ambient temperature, connect more metal area to the V– pin to reduce the thermal resistance of the package as indicated in Table 2.

15

LT1806/LT1807

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APPLICATIO S I FOR ATIO

Input Offset Voltage

The offset voltage will change depending upon which input stage is active and the maximum offset voltage is guaranteed to less than 550µV. To maintain the precision charac- teristics of the amplifier, the change of VOS over the entire input common mode range (CMRR) is limited to be less than 550µV on a single 5V and 3V supply.

Input Bias Current

The input bias current polarity depends on a given input common voltage at which the input stage is operating. When the PNP input stage is active, the input bias currents flow out of the input pins. When the NPN input stage is activated, the input bias current flows into the input pins. Because the input offset current is less than the input bias current, matching the source resistances at the input pins will reduce total offset error.

Output

The LT1806/LT1807 can deliver a large output current, so the short-circuit current limit is set around 90mA to prevent damage to the device. Attention must be paid to keep the junction temperature of the IC below the absolute maximum rating of 150°C (refer to the Power Dissipation section) when the output is continuously short-circuited. The output of the amplifier has reverse-biased diodes connected to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to one hundred milliamps or less, no damage to the device will occur.

Overdrive Protection

When the input voltage exceeds the power supplies, two pairs of crossing diodes D1 to D4 will prevent the output from reversing polarity. If the input voltage exceeds either power supply by 700mV, diode D1/D2 or D3/D4 will turn on to keep the output at the proper polarity. For the phase reversal protection to perform properly, the input current must be limited to less than 5mA. If the amplifier is

severely overdriven, an external resistor should be used to limit the overdrive current.

The LT1806/LT1807’s input stages are also protected against large differential input voltages of 1.4V or higher by a pair of back-to-back diodes, D5/D8, that prevent the emitter-base breakdown of the input transistors. The current in these diodes should be limited to less than 10mA when they are active. The worst-case differential input voltage usually occurs when the input is driven while the output is shorted to ground in a unity gain configuration. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins by a pair of protection diodes, ESDD1 to ESDD6, on each pin that are connected to the power supplies as shown in Figure 1.

Capacitive Load

The LT1806/LT1807 are optimized for high bandwidth and low distortion applications. They can drive a capacitive load of about 20pF in a unity-gain configuration, and more for higher gain. When driving a larger capacitive load, a resistor of 10Ω to 50Ω should be connected between the output and the capacitive load to avoid ringing or oscillation. The feedback should still be taken from the output so that the resistor will isolate the capacitive load to ensure stability. Graphs on capacitive loads indicate the transient response of the amplifier when driving the capacitive load with a specified series resistor.

Feedback Components

When feedback resistors are used to set up gain, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. For instance, the LT1806/ LT1807 in a noninverting gain of 2, set up with two 1k resistors and a capacitance of 3pF (part plus PC board) will probably ring in transient response. The pole is formed at 106MHz that will reduce phase margin by 34 degrees when the crossover frequency of the amplifier is around 70MHz. A capacitor of 3pF or higher connected across the feedback resistor will eliminate any ringing or oscillation.

16

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APPLICATIO S I FOR ATIO

LT1806/LT1807

SHDN Pin

The LT1806 has a SHDN pin to reduce the supply current to less than 0.9mA. When the SHDN pin is pulled low, it will generate a signal to power down the device. If the pin is left unconnected, an internal pull-up resistor of 40k will keep the part fully operating as shown in Figure 1. The output

U

TYPICAL APPLICATIO S

Driving A/D Converter

The LT1806/LT1807 have 60ns settling time to 0.01% on a 2V step signal, and 20Ω output impedance at 100MHz, that makes them ideal for driving high speed A/D converters. With the rail-to-rail input and output, and low supply voltage operation, the LT1806/LT1807 are also desirable for single supply applications. As shown in the application on the front page of this data sheet, the LT1807 drives a 10Msps, 12-bit, LTC1420 ADC in a gain of 20. Driving the LTC1420 differentially will optimize the signal-to-noise ratio, SNR, and the total harmonic distortion, THD, of the A/D converter. The lowpass filter, R5, R6 and C3 reduce

will be high impedance during shutdown, and the turn-on and turn-off time is less than 100ns. Because the input is protected by a pair of back to back diodes, the input signal will feed through to the output during shutdown mode if the amplitude of signal between the inputs is larger than

1.4V.

noise or distortion products that might come from the input signal. High quality capacitors and resistors, NPO chip capacitor and metal film surface mount resistors, should be used since these components can add to distortion. The voltage glitch of the converter, due to its sampling nature is buffered by the LT1807, and the ability of the amplifier to settle it quickly will affect the spurious free dynamic range of the system. Figure 2 depicts the LT1806 driving LTC1420 at noninverting gain of 2 configuration. The FFT responses show a better than 92dB of spurious free dynamic range, SFDR.

1.5V

V

P-P

0

–20

5V

IN

+

LT1806

–

–5V

R1 1k

R3

49.9Ω

C1

R2

1k

470pF

+A

IN

–A

LTC1420

PGA GAIN = 1

REF = 2.048V

IN

–5V

18067 F02

12 BITS

• 10Msps

•

Figure 2. Noninverting A/D Driver

–40

–60

AMPLITUDE (dB)

–80

–100

–120

0

1234

FREQUENCY (MHz)

Figure 3. 4096 Point FFT Response

VS = ±5V

= 2

A

V

= 10Msps

f

SAMPLE

= 1.4086MHz

f

IN

SFDR = 92.5dB

5

18067 F03

17

LT1806/LT1807

TYPICAL APPLICATIO S

U

Single Supply Video Line Driver

The LT1806/LT1807 are wideband rail-to-rail op amps with large output current that allows them to drive video signals in low supply applications. Figure 4 depicts a single supply video line driver with AC coupling to minimize the quiescent power dissipation. Resistors R1 and R2 are used to level-shift the input and output to provide the largest signal swing. The gain of 2 is set up with R3 and R4 to restore the signal at V

, which is attenuated by 6dB

OUT

due to the matching of the 75Ω line with the back-terminated

5V

C1

33µF

V

IN

R

T

75Ω

R1 5k

+

R2 5k

3

2

+

R3 1k

C2 150µF

+

LT1806

–

7

6

4

R4 1k

C4

3pF

resistor, R5. The back termination will eliminate any reflection of the signal that comes from the load. The input termination resistor, RT, is optional—it is used only if matching of the incoming line is necessary. The values of C1, C2 and C3 are selected to minimize the droop of the luminance signal. In some less stringent requirements, the value of capacitors could be reduced. The –3dB bandwidth of the driver is about 90MHz on 5V supply, and the amount of peaking will vary upon the value of capacitor C4.

C3

1000µF

+

R5

75Ω

COAX CABLE

R

LOAD

75Ω

18067 F04

V

OUT

Figure 4. 5V Single Supply Video Line Driver

5

VS = 5V, 0V

4 3 2 1

0 –1 –2

VOLTAGE GAIN (dB)

–3 –4 –5

0.2 10 100

1

FREQUENCY (MHz)

18067 F05

Figure 5. Video Line Driver Frequency Response

18

TYPICAL APPLICATIO S

LT1806/LT1807

U

Single 3V Supply, 4MHz, 4th Order Butterworth Filter

Benefiting from a low voltage supply operation, low distortion and rail-to-rail output of LT1806/LT1807, a low distortion filter that is suitable for antialiasing can be built as shown in Figure 6.

232Ω

47pF

V

IN

V

2

S

232Ω

(OPTIONAL)

665Ω

220pF

365Ω

–

1/2 LT1807

+

4.7µF (OPTIONAL)

Figure 6. Single 3V Supply, 4MHz, 4th Order Butterworth Filter

On a 3V supply, the filter built with LT1807 has a passband of 4MHz with 2.5V

signal and stopband that is greater

P-P

than 70dB to frequency of 100MHz. As an option to minimize the DC offset voltage at the output, connect a series resistor of 365Ω and a bypass capacitor at the noninverting inputs of the amplifiers as shown in Figure 6.

274Ω

22pF

274Ω

562Ω

470pF

–

1/2 LT1807

+

V

OUT

18067 F06

10

0 –10 –20 –30 –40

GAIN (dB)

–50 –60 –70

VS = 3V, 0V

–80

= 2.5V

V

P-P

IN

–90

10k 100k 1M 10M 100M

FREQUENCY (Hz)

Figure 7. Filter Frequency Response

18067 F07

19

LT1806/LT1807

TYPICAL APPLICATIO S

U

1MHz Series Resonant Crystal Oscillator with Square and Sinusoid Outputs

Figure 8 shows a classic 1MHz series resonant crystal oscillator. At series resonance, the crystal is a low impedance and the positive feedback connection is what brings about oscillation at the series resonance frequency. The RC feedback around the other path ensures that the circuit does not find a stable DC operating point and refuse to oscillate. The comparator output is a 1MHz square wave with a measured jitter of 28ps 40ps

with a 3V supply. On the other side of the crystal,

RMS

with a 5V supply and

RMS

however, is an excellent looking sine wave except for the fact of the small high frequency glitch caused by the fast

R5

1k

1MHZ

AT-CUT

V

S

R1 1k

R2 1k

2

3

+

–

C1

0.1µF

V

LT1713

LE

6

R4

210Ω

S

1

7

8

SQUARE WAVE

4

5

R3 1k

6.49k

100pF

R6 162Ω

V

S

VS = 2.7V TO 6V

edge and the crystal capacitance (middle trace of Figure␣ 9). Sinusoid amplitude stability is maintained by the fact that the sine wave is basically a filtered version of the square wave; the usual amplitude control loops associated with sinusoidal oscillators are not immediately necessary.1 One can make use of this sine wave by buffering and filtering it, and this is the combined task of the LT1806. It is configured as a bandpass filter with a Q of 5 and does a good job of cleaning up and buffering the sine wave. Distortion was measured at –70dBc and –60dBc on the second and third harmonics.

1

Amplitude will be a linear function of comparator output swing, which is supply dependent and therefore controllable. The important difference here is that any added amplitude stabilization loop will not be faced with the classical task of avoiding regions of nonoscillation versus clipping.

C4

100pF

R7

15.8k

C3 100pF

R9 2k

C2

R8

0.1µF

2k

V

S

2

3

–

LT1806

+

7

6

1 (NC)

4

SINE WAVE

18067 F08

20

Figure 8. LT1713 Comparator is Configured as a Series Resonant Crystal Oscillator. The LT1806 Op Amp is Configured in a Q = 5 Bandpass Filter with fC = 1MHz

3V/DIV

1V/DIV

200ns/DIV

1806 F09

Figure 9. Oscillator Waveforms with VS = 3V. Top Trace is Comparator Output. Middle Trace is Crystal Feedback to Pin 2 at LT1713. Bottom Trace is Buffered, Inverted and Bandpass Filtered with a Q of 5 by the LT1806

PACKAGE DESCRIPTIO

LT1806/LT1807

U

Dimensions in inches (millimeters) unless otherwise noted.

S6 Package

6-Lead Plastic SOT-23

(Reference LTC DWG # 05-08-1634) (Reference LTC DWG # 05-08-1636)

2.80 – 3.10

(.110 – .118)

(NOTE 3)

SOT-23

(Original)

.90 – 1.45

A

(.035 – .057)

.00 – 0.15

A1

(.00 – .006)

.90 – 1.30

A2

(.035 – .051)

.35 – .55

L

(.014 – .021)

.20

(.008)

DATUM ‘A’

L

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

4. DIMENSIONS ARE INCLUSIVE OF PLATING

5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

6. MOLD FLASH SHALL NOT EXCEED .254mm

7. PACKAGE EIAJ REFERENCE IS: SC-74A (EIAJ) FOR ORIGINAL JEDEC MO-193 FOR THIN

SOT-23

(ThinSOT)

1.00 MAX

(.039 MAX)

.01 – .10

(.0004 – .004)

.80 – .90

(.031 – .035)

.30 – .50 REF

(.012 – .019 REF)

MILLIMETERS

(INCHES)

2.60 – 3.00

(.102 – .118)

.09 – .20

(.004 – .008)

(NOTE 2)

1.50 – 1.75

(.059 – .069)

(NOTE 3)

A

PIN ONE ID

.95

(.037)

REF

A2

1.90

(.074)

REF

.25 – .50

(.010 – .020)

(6PLCS, NOTE 2)

A1

S6 SOT-23 0401

21

LT1806/LT1807

PACKAGE DESCRIPTIO

U

Dimensions in inches (millimeters) unless otherwise noted.

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660)

0.118 ± 0.004* (3.00 ± 0.102)

8

7

6

5

0.193 ± 0.006 (4.90 ± 0.15)

12

0.043 (1.10)

MAX

0.007

(0.18)

0.021

± 0.006

(0.53 ± 0.015)

* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,

PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

° – 6° TYP

0

SEATING

PLANE

0.009 – 0.015 (0.22 – 0.38)

0.0256 (0.65)

BSC

4

3

0.118 ± 0.004** (3.00 ± 0.102)

0.034 (0.86)

REF

0.005

± 0.002

(0.13 ± 0.05)

MSOP (MS8) 1100

22

PACKAGE DESCRIPTIO

U

Dimensions in inches (millimeters) unless otherwise noted.

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

0.189 – 0.197* (4.801 – 5.004)

7

8

5

6

LT1806/LT1807

0.228 – 0.244

(5.791 – 6.197)

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

×

°

45

0.016 – 0.050

(0.406 – 1.270)

0°– 8° TYP

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

TYP

0.150 – 0.157** (3.810 – 3.988)

1

3

2

4

0.050

(1.270)

BSC

0.004 – 0.010

(0.101 – 0.254)

SO8 1298

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LT1806/LT1807

TYPICAL APPLICATIO

U

FET Input, Fast, High Gain Photodiode Amplifier

Figure 10 shows a fast, high gain transimpedance amplifier applied to a photodiode. A JFET buffer is used for its extremely low input bias current and high speed. The LT1097 and 2N3904 keep the JFET biased at I

DSS

for zero offset and lowest voltage noise. The JFET then drives the LT1806, with RF closing the high speed loop back to the JFET input and setting the transimpedance gain. C4 helps improve the phase margin of the fast loop. Output voltage noise density was measured as 9nV/√Hz with RF short circuited. With RF varied from 100k to 1M, total output

SIEMENS/ INFINEON SFH213FA

PHOTODIODE

R1 10M

–

V

S

+

V

S

7

3

+

LT1097

2

–

4

2200pF

–

V

S

C1 100pF

6

C2

C3

0.1µF

noise was below 1mV

measured over a 10MHz

RMS

bandwidth. Table 4 shows results achieved with various values of RF and Figure 11 shows the time domain response with RF = 499k.

Table 4. Results Achieved for Various RF, 1.2V Output Step

10% to 90% –3dB

RISE TIME BANDWIDTH

49.9Ω

50Ω

18067 F10

V

OUT

R3 10k

R4

2.4k

R

F

100k 64ns 6.8MHz 200k 94ns 4.6MHz 499k 154ns 3MHz

1M 263ns 1.8MHz

+

V

S

2N5486

R2

1M

2N3904

–

V

S

R5 33Ω

R

F

C4

3pF

*

+

V

S

7

2

–

LT1806

3

+

6

4

–

V

S

*ADJUST PARASITIC CAPACITANCE AT

FOR DESIRED RESPONSE

R

F

CHARACTERISTICS

= ±5V

V

S

Figure 10. Fast, High Gain Photodiode Amplifier

100mV/DIV

200ns/DIV

18067 F11

Figure 11. Step Response with RF = 499k

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1395 400MHz Current Feedback Amplifier 800V/µs Slew Rate, Shutdown LT1399 Triple 300MHz Current Feedback Amplifier 0.1dB Gain Flatness to 150MHz, Shutdown LT1632/LT1633 Dual/Quad 45MHz, 45V/µs Rail-to-Rail Input and Output Amplifiers High DC Accuracy 1.35mV V

Max Supply Current 5.2mA/Amp

LT1809/LT1810 Single/Dual 180MHz Input and Output Rail-to-Rail Amplifiers 350V/µs Slew Rate, Shutdown, Low Distortion –90dBc at 5MHz

Linear Technology Corporation

24

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

●

www.linear-tech.com

, 70mA Output Current,

OS(MAX)

18067f LT/LCG 1200 4K • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2000

LINEAR TECHNOLOGY LT1806, LT1807 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual