LINEAR TECHNOLOGY LT1766, LT1766-5 Technical data

LOAD CURRENT (A)
0
EFFICIENCY (%)
80
90
100
1.00
1766 TA02
70
60
50
0.25
0.50
0.75
1.25
VIN = 12V
VIN = 42V
V
OUT
= 5V
L = 47µH
FEATURES
LT1766/LT1766-5
5.5V to 60V 1.5A, 200kHz
Step-Down Switching Regulator
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DESCRIPTIO
Wide Input Range: 5.5V to 60V
1.5A Peak Switch Current
Constant 200kHz Switching Frequency
Saturating Switch Design: 0.2
Peak Switch Current Rating Maintained Over Full Duty Cycle Range
Low Effective Supply Current: 2.5mA
Low Shutdown Current: 25µA
1.2V Feedback Reference Voltage (LT1766)
5V Fixed Output (LT1766-5)
Easily Synchronizable
Cycle-by-Cycle Current Limiting
Small 16-Pin SSOP and Thermally Enhanced TSSOP Packages
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APPLICATIO S
High Voltage, Industrial and Automotive
Portable Computers
Battery-Powered Systems
Battery Chargers
Distributed Power Systems
®
The LT
1766/LT1766-5 are 200kHz monolithic buck
switching regulators that accept input voltages up to 60V. A high efficiency 1.5A, 0.2 switch is included on the die along with all the necessary oscillator, control and logic cir­cuitry. A current mode control architecture delivers fast transient response and excellent loop stability.
Special design techniques and a new high voltage process achieve high efficiency over a wide input range. Efficiency is maintained over a wide output current range by using the output to bias the circuitry and by utilizing a supply boost capacitor to saturate the power switch. Patented circuitry* maintains peak switch current over the full duty cycle range. A shutdown pin reduces supply current to 25µA and the device can be externally synchronized from 228kHz to 700kHz with logic level inputs.
The LT1766/LT1766-5 are available in a 16-pin fused-lead SSOP package or a TSSOP package with exposed backside for improved thermal performance.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Protected by U.S. Patents including 6498466, 6531909
TYPICAL APPLICATIO
5V Buck Converter
6
V
IN
5.5V*
TO 60V
*
2.2µF† 100V CERAMIC
ONOFF
FOR INPUT VOLTAGES BELOW 7.5V, SOME RESTRICTIONS MAY APPLY
TDK C4532X7R2A225K
1, 8, 9, 16
4
15
14
V
IN
SHDN
SYNC
GND
0.022µF
BOOST
LT1766
BIAS
2.2k
U
1N4148W
0.33µF
2
SW
10
12
FB
V
C
11
220pF
1766 TA01
47µH
15.4k
4.99k
+
V
OUT
5V 1A
100µF 10V SOLID TANTALUM
Efficiency vs Load Current
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LT1766/LT1766-5
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ABSOLUTE AXI U RATI GS
(Note 1)
Input Voltage (VIN) ................................................. 60V
BOOST Pin Above SW ............................................ 35V
BOOST Pin Voltage ................................................. 68V
SYNC, SENSE Voltage (LT1766-5) ........................... 7V
SHDN Voltage ........................................................... 6V
BIAS Pin Voltage .................................................... 30V
FB Pin Voltage/Current (LT1766) ................... 3.5V/2mA
Operating Junction Temperature Range
LT1766EFE/LT1766EFE-5/LT1766EGN/
LT1766EGN-5 (Note 8,10) ................. – 40°C to 125°C
LT1766IFE/LT1766IFE-5/ LT1766IGN/LT1766IGN-5 (Note 8,10) – 40°C to 125°C
LT1766HGN/LT1766HFE ................... –40°C to 140°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
1
GND
2
SW
3
NC
4
V
IN
5
NC
6
BOOST
7
NC
8
GND
FE PACKAGE
16-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 17) IS GND, MUST BE CONNECTED TO PCB
θJA = 45°C/W, θJC (PAD) = 10°C/W
ORDER PART NUMBER
LT1766EFE LT1766IFE LT1766HFE LT1766EFE-5 LT1766IFE-5
17
GND
16
SHDN
15
SYNC
14
NC
13
FB/SENSE
12
V
11
C
BIAS
10
GND
9
FE PART MARKING
1766EFE 1766IFE 1766HFE 1766EFE-5 1766IFE-5
TOP VIEW
1
GND
2
SW
3
NC
4
V
IN
5
NC
6
BOOST
7
NC
8
GND
GN PACKAGE
16-LEAD PLASTIC SSOP
θJA = 85°C/W, θJC (PIN 8) = 25°C/W
FOUR CORNER PINS SOLDERED TO GROUND PLANE
ORDER PART NUMBER
LT1766EGN LT1766IGN LT1766HGN LT1766EGN-5 LT1766IGN-5
GND
16
SHDN
15
SYNC
14
NC
13
FB/SENSE
12
V
11
C
BIAS
10
GND
9
GN PART MARKING
1766 1766I 1766H 17665 1766I5
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
(LT1766E/LT1766I GRADE)
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
= 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
V
IN
PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference Voltage (V
SENSE Voltage (LT1766-5) 5.5V ≤ VIN 60V 4.94 5 5.06 V
SENSE Pin Resistance (LT1766-5) 9.5 13.8 19 k FB Input Bias Current (LT1766)
) (LT1766) 5.5V ≤ VIN 60V 1.204 1.219 1.234 V
REF
VOL + 0.2 ≤ VC VOH – 0.2
VOL + 0.2V ≤ VC VOH – 0.2V
1.195 1.243 V
4.90 5.10 V
–0.5 –1.5 µA
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LT1766/LT1766-5
ELECTRICAL CHARACTERISTICS
(LT1766E/LT1766I GRADE)
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
= 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
V
IN
PARAMETER CONDITIONS MIN TYP MAX UNITS
Error Amp Voltage Gain (Notes 2, 9) 200 400 V/V Error Amp g
VC to Switch g
m
m
EA Source Current FB = 1V or V EA Sink Current FB = 1.4V or V VC Switching Threshold Duty Cycle = 0 0.9 V VC High Clamp SHDN = 1V 2.1 V Switch Current Limit VC Open, Boost = VIN + 5V, FB = 1V or V Switch On Resistance ISW = 1.5A, Boost = VIN + 5V (Note 7) 0.2 0.3
Maximum Switch Duty Cycle FB = 1V or V
Switch Frequency VC Set to Give DC = 50% 184 200 216 kHz
fSW Line Regulation 5.5V ≤ VIN 60V fSW Frequency Shifting Threshold Df = 10kHz 0.8 V Minimum Input Voltage (Note 3) Minimum Boost Voltage (Note 4) ISW 1.5A Boost Current (Note 5) Boost = VIN + 5V, ISW = 0.5A
Input Supply Current (I Bias Supply Current (I
) (Note 6) V
VIN
) (Note 6) V
BIAS
Shutdown Supply Current SHDN = 0V, VIN 60V, SW = 0V, VC Open 25 75 µA
Lockout Threshold VC Open Shutdown Thresholds VC Open, Shutting Down
Minimum SYNC Amplitude SYNC Frequency Range 228 700 kHz SYNC Input Resistance 20 k
dl (VC) = ±10µA (Note 9) 1500 2000 3000 µMho
1000 4200 µMho
1.7 A/V
SENSE
SENSE
SENSE
Boost = V
V
Open, Starting Up
C
+ 5V, ISW = 1.5A
IN
= 5V 1.4 2.2 mA
BIAS
= 5V 2.9 4.2 mA
BIAS
= 4.1V
= 5.7V
= 4.1V
SENSE
= 4.1V 93 96 %
125 225 400 µA
100 225 450 µA
1.5 2 3 A
90 %
172 200 228 kHz
0.05 0.15 %/V
4.6 5.5 V
1.8 3 V
2.3 2.42 2.53 V
0.15 0.37 0.6 V
0.25 0.45 0.6 V
1.5 2.2 V
0.4
12 25 mA 45 70 mA
200 µA
(LT1766H GRADE)
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
= 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
V
IN
PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference Voltage (V
FB Input Bias Current
) 5.5V VIN 60V 1.204 1.219 1.234 V
REF
+ 0.2 ≤ VC VOH – 0.2
V
OL
1.175 1.265 V
–0.5 –1.5 µA
Error Amp Voltage Gain (Notes 2, 9) 200 400 V/V
Error Amp g
VC to Switch g
m
m
EA Source Current FB = 1V or V
EA Sink Current FB = 1.4V or V
dl (VC) = ±10µA (Note 9) 1500 2000 3000 µMho
900 4200 µMho
1.7 A/V
SENSE
SENSE
= 4.1V
= 5.7V
125 225 400 µA
100 225 450 µA
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LT1766/LT1766-5
ELECTRICAL CHARACTERISTICS
(LT1766H GRADE)
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
= 15V, VC = 1.5V, SHDN = 1V, BOOST open circuit, SW open circuit, unless otherwise noted.
V
IN
PARAMETER CONDITIONS MIN TYP MAX UNITS
VC Switching Threshold Duty Cycle = 0 0.9 V
VC High Clamp SHDN = 1V 2.1 V
Switch Current Limit VC Open, Boost = VIN + 5V, FB = 1V or V
Switch On Resistance ISW = 0.75A, Boost = VIN + 5V (Note 7) 0.2 0.3
Maximum Switch Duty Cycle FB = 1V or V
= 4.1V 93 96 %
SENSE
Switch Frequency VC Set to Give DC = 50% 184 200 216 kHz
fSW Line Regulation 5.5V ≤ VIN 60V
fSW Frequency Shifting Threshold Df = 10kHz 0.8 V
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4) ISW 0.75A
Boost Current (Note 5) Boost = VIN + 5V, ISW = 0.5A
+ 5V, ISW = 0.75A
IN
= 5V 1.4 2.2 mA
BIAS
= 5V 2.9 4.2 mA
BIAS
Input Supply Current (I
Bias Supply Current (I
Boost = V
) (Note 6) V
VIN
) (Note 6) V
BIAS
Shutdown Supply Current SHDN = 0V, VIN 60V, SW = 0V, VC Open 25 120 µA
Lockout Threshold VC Open
Shutdown Thresholds VC Open, Shutting Down
Open, Starting Up
V
C
Minimum SYNC Amplitude
SYNC Frequency Range 228 700 kHz SYNC Input Resistance 20 k
SENSE
= 4.1V
0.75 2 3 A
90 %
135 200 228 kHz
0.05 0.15 %/V
2.3 2.42 2.68 V
0.15 0.37 0.9 V
0.25 0.45 0.9 V
0.8
4.6 5.5 V
1.8 3 V
12 40 mA 45 100 mA
500 µA
1.5 2.2 V
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: Gain is measured with a V
swing equal to 200mV above the low clamp
C
level to 200mV below the upper clamp level. Note 3: Minimum input voltage is not measured directly, but is guaranteed by
other tests. It is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator remain constant. Actual minimum input voltage to maintain a regulated output will depend upon output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch.
Note 5: Boost current is the current flowing into the BOOST pin with the pin held 5V above input voltage. It flows only during switch on time.
Note 6: Input supply current is the quiescent current drawn by the input pin when the BIAS pin is held at 5V with switching disabled. Bias supply current is the current drawn by the BIAS pin when the BIAS pin is held at 5V. Total input referred supply current is calculated by summing input supply current (I a fraction of bias supply current (I
I
= I
+ (I
With V
TOTAL
IN
VIN
= 15V, V
OUT
)(V
BIAS
= 5V, I
OUT/VIN
Note 7: Switch on resistance is calculated by dividing V
BIAS
= 1.4mA, I
VIN
):
)
= 2.9mA, I
BIAS
= 2.4mA.
TOTAL
to SW voltage by the
IN
VIN
) with
4
forced current. See Typical Performance Characteristics for the graph of switch voltage at other currents.
Note 8: The LT1766EGN, LT1766EGN-5, LT1766EFE and LT1766EFE-5 are guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT1766IGN, LT1766IGN-5, LT1766IFE and LT1766IFE-5 are guaranteed over the full –40°C to 125°C operating junction temperature range. The LT1766HGN and LT1766HFE are guaranteed over the full –40°C to 140°C operating junction temperature range.
Note 9: Transconductance and voltage gain refer to the internal amplifier exclusive of the voltage divider. To calculate gain and transconductance, refer to the SENSE pin on fixed voltage parts. Divide the values shown by the ratio V
OUT
/1.219.
Note 10: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 140°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
Note 11: High junction temperatures degrade operating lifetimes. Operating lifetime at junction temperatures between 125°C and 140°C is derated to 1000 hours.
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JUNCTION TEMPERATURE (°C)
–50
250
200
150
100
12
6
0
25 75
1766 G03
–25 0
50 100 150125
CURRENT (µA)
CURRENT REQUIRED TO FORCE SHUTDOWN (FLOWS OUT OF PIN). AFTER SHUTDOWN, CURRENT DROPS TO A FEW µA
AT 2.38V STANDBY THRESHOLD (CURRENT FLOWS OUT OF PIN)
SHUTDOWN VOLTAGE (V)
0
0
INPUT SUPPLY CURRENT (µA)
50
100
150
200
250
300
0.1 0.2 0.3 0.4
1766 G06
0.5
VIN = 60V
V
IN
= 15V
TA = 25°C
TYPICAL PERFOR A CE CHARACTERISTICS
LT1766/LT1766-5
Switch Peak Current Limit SHDN Pin Bias Current
2.5 TA = 25°C
2.0
1.5
SWITCH PEAK CURRENT (A)
1.0
20 40
TYPICAL
GUARANTEED MINIMUM
60 80
DUTY CYCLE (%)
1000
1766 G01
FB Pin Voltage and Current
1.234
1.229
1.224
1.219
1.214
FEEDBACK VOLTAGE (V)
1.209
1.204 –50
–25 0
25 75
JUNCTION TEMPERATURE (°C)
VOLTAGE
CURRENT
50 100 125 150
1766 G02
2.0
1.5
CURRENT (µA)
1.0
0.5
0
Lockout and Shutdown Thresholds Shutdown Supply Current
2.4
0
25 75
LOCKOUT
START-UP
SHUTDOWN
50 100
1766 G04
2.0
1.6
1.2
0.8
SHDN PIN VOLTAGE (V)
0.4
0
–25 150125
–50
JUNCTION TEMPERATURE (°C)
Shutdown Supply Current
40
V
= 0V
SHDN
= 25°C
T
A
35
30
25
20
15
10
INPUT SUPPLY CURRENT (µA)
5
0
10 20 30 40 50 60
0
INPUT VOLTAGE (V)
1766 G05
Error Amplifier Transconductance
2500
2000
1500
1000
500
TRANSCONDUCTANCE (µmho)
0
–50
0
JUNCTION TEMPERATURE (°C)
50 100
25 75–25 150125
1766 G07
Error Amplifier Transconductance Frequency Foldback
3000
TA = 25°C
2500
2000
1500
V
GAIN (µMho)
1000
500
2 • 10
FB
ERROR AMPLIFIER EQUIVALENT CIRCUIT
R
LOAD
100 10k 100k 10M
PHASE
GAIN
R
–3
)(
= 50
1k 1M
FREQUENCY (Hz)
OUT
200k
C 12pF
OUT
V
C
1766 G08
200
150
PHASE (DEG)
100
50
0
–50
600
= 25°C
T
A
500
400
300
200
OR FB CURRENT (µA)
SWITICHING FREQUENCY (kHz)
100
0
0
0.5 VFB (V)
SWITCHING FREQUENCY
FB PIN
CURRENT
1.0
1.5
1766 G09
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LT1766/LT1766-5
JUNCTION TEMPERATURE (°C)
–50
SWITCH MINIMUM ON TIME (ns)
400
500
600
25 75
1766 G15
300
200
–25 0
50 100 150125
100
0
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TYPICAL PERFOR A CE CHARACTERISTICS
Minimum Input Voltage with 5V
Switching Frequency
230
220
210
200
190
FREQUENCY (kHz)
180
170
–50
V
2.1
1.9
1.7
1.5
1.3
1.1
THRESHOLD VOLTAGE (V)
0.9
0.7 –50
0
–25 150125
Pin Shutdown Threshold
C
–25 0
25 75
JUNCTION TEMPERATURE (°C)
25 75
JUNCTION TEMPERATURE (°C)
50 100
1766 G10
50 100 150125
1766 G13
Output
7.5
7.0
6.5
6.0
INPUT VOLTAGE (V)
5.5
5.0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
MINIMUM INPUT VOLTAGE TO START
MINIMUM INPUT VOLTAGE TO RUN
LOAD CURRENT (A)
Switch Voltage Drop
450
400
350
300
250
200
150
SWITCH VOLTAGE (mV)
100
50
0
0 0.5 1 1.5
TJ = 125°C
TJ = 25°C
SWITCH CURRENT (A)
TJ = 150°C
TJ = –40°C
TA = 25°C
1766 G11
1766 G14
BOOST Pin Current
45
TA = 25°C
40
35
30
25
20
15
BOOST PIN CURRENT (mA)
10
5
0
0 0.5 1 1.5
SWITCH CURRENT (A)
Switch Minimum ON Time vs Temperature
1766 G12
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PI FU CTIO S
GND (Pins 1, 8, 9, 16, 17): The GND pin connections act as the reference for the regulated output, so load regula­tion will suffer if the “ground” end of the load is not at the same voltage as the GND pins of the IC. This condition will occur when load current or other currents flow through metal paths between the GND pins and the load ground. Keep the paths between the GND pins and the load ground short and use a ground plane when possible. The GND pin also acts as a heat sink and should be soldered to a large copper plane to reduce thermal resistance. For the FE package, the exposed pad should be soldered to the
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copper ground plane underneath the device. (See Applica­tions Information—Layout Considerations.)
SW (Pin 2): The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage during switch on time. Inductor current drives the switch pin negative during switch off time. Negative volt­age is clamped with the external catch diode. Maximum negative switch voltage allowed is –0.8V.
NC (Pins 3, 5, 7, 13): No Connection.
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LT1766/LT1766-5
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PI FU CTIO S
VIN (Pin 4): This is the collector of the on-chip power NPN switch. V voltage on the BIAS pin is not present. High dI/dt edges occur on this pin during switch turn on and off. Keep the path short from the VIN pin through the input bypass capacitor, through the catch diode back to SW. All trace inductance on this path will create a voltage spike at switch off, adding to the VCE voltage across the internal NPN.
BOOST (Pin 6): The BOOST pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. Without this added voltage, the typical switch voltage loss would be about 1.5V. The additional BOOST voltage allows the switch to saturate and voltage loss approximates that of a 0.2 FET struc­ture, but with much smaller die area.
BIAS (Pin 10): The BIAS pin is used to improve efficiency when operating at higher input voltages and light load current. Connecting this pin to the regulated output volt­age forces most of the internal circuitry to draw its operating current from the output voltage rather than the input supply. This architecture increases efficiency espe­cially when the input voltage is much higher than the output. Minimum output voltage setting for this mode of operation is 3V.
V
(Pin 11) The VC pin is the output of the error amplifier
C
and the input of the peak switch current comparator. It is normally used for frequency compensation, but can also serve as a current clamp or control loop override. VC sits at about 0.9V for light loads and 2.1V at maximum load. It can be driven to ground to shut off the regulator, but if driven high, current must be limited to 4mA.
powers the internal control circuitry when a
IN
FB/SENSE (Pin 12): The feedback pin is used to set the output voltage using an external voltage divider that gen­erates 1.22V at the pin for the desired output voltage. The 5V fixed output voltage parts have the divider included on the chip and the FB pin is used as a SENSE pin, connected directly to the 5V output. Three additional functions are performed by the FB pin. When the pin voltage drops below 0.6V, switch current limit is reduced and the exter­nal SYNC function is disabled. Below 0.8V, switching frequency is also reduced. See Feedback Pin Functions in Applications Information for details.
SYNC (Pin 14): The SYNC pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 10% and 90% duty cycle. The synchronizing range is equal to initial operating frequency up to 700kHz. See Synchronizing in Applications Information for details.
SHDN (Pin 15): The SHDN pin is used to turn off the regulator and to reduce input drain current to a few microamperes. This pin has two thresholds: one at 2.38V to disable switching and a second at 0.4V to force com­plete micropower shutdown. The 2.38V threshold func­tions as an accurate undervoltage lockout (UVLO); sometimes used to prevent the regulator from delivering power until the input voltage has reached a predetermined level.
If the SHDN pin functions are not required, the pin can either be left open (to allow an internal bias current to lift the pin to a default high state) or be forced high to a level not to exceed 6V.
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BLOCK DIAGRA
The LT1766 is a constant frequency, current mode buck converter. This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. In addition to the normal error amplifier, there is a current sense amplifier that monitors switch current on a cycle-by-cycle basis. A switch cycle starts with an oscilla­tor pulse which sets the R When switch current reaches a level set by the inverting
flip-flop to turn the switch on.
S
input of the comparator, the flip-flop is reset and the switch turns off. Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point. This technique means that the error amplifier commands current to be delivered to the output rather than voltage. A voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor, then an abrupt 180° shift will occur.
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LT1766/LT1766-5
BLOCK DIAGRA
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The current fed system will have 90° phase shift at a much lower frequency, but will not have the additional 90° shift until well beyond the LC resonant frequency. This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response.
Most of the circuitry of the LT1766 operates from an internal 2.9V bias line. The bias regulator normally draws power from the regulator input pin, but if the BIAS pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the
V
4
IN
BIAS
SYNC
COMPARATOR
10
14
SHUTDOWN
2.9V BIAS
REGULATOR
+
0.4V
INTERNAL V
CC
SLOPE COMP
ANTISLOPE COMP
200kHz
OSCILLATOR
Σ
regulated output voltage). This will improve efficiency if the BIAS pin voltage is lower than regulator input voltage.
High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage, allowing switch to be saturated. This boosted voltage is generated with an external capacitor and diode. Two comparators are connected to the shutdown pin. One has a 2.38V threshold for under­voltage lockout and the second has a 0.4V threshold for complete shutdown.
R
LIMIT
+
CURRENT COMPARATOR
BOOST
6
S
FLIP-FLOP
R
R
S
DRIVER
CIRCUITRY
R
SENSE
Q1 POWER SWITCH
SHDN
5.5µA
2.38V
+
LOCKOUT
COMPARATOR
V
C(MAX)
CLAMP
FREQUENCY
FOLDBACK
×1
Q2
FOLDBACK
Q3
CURRENT
LIMIT
CLAMP
11
V
C
AMPLIFIER
= 2000µMho
g
m
ERROR
+
1.22V
15
2
12
1766 F01
SW
FB
GND 1, 8, 9, 16, 17
Figure 1. LT1766 Block Diagram
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APPLICATIO S I FOR ATIO
LT1766/LT1766-5
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT1766 is used to set output voltage and provide several overload protection features. The first part of this section deals with selecting resistors to set output voltage and the remaining part talks about foldback frequency and current limiting created by the FB pin. Please read both parts before committing to a final design. The 5V fixed output voltage part (LT1766-5) has internal divider resistors and the FB pin is renamed SENSE, connected directly to the output.
The suggested value for the output divider resistor (see Figure 2) from FB to ground (R2) is 5k or less, and a formula for R1 is shown below. The output voltage error caused by ignoring the input bias current on the FB pin is less than 0.25% with R2 = 5k. A table of standard 1% values is shown in Table 1 for common output voltages. Please read the following if divider resistors are increased above the suggested values.
RV
2122
()
R
1
=
Table 1
OUTPUT R1 % ERROR AT OUTPUT
VOLTAGE R2 (NEAREST 1%) DUE TO DISCREET 1%
(V) (k
3 4.99 7.32 + 0.32
3.3 4.99 8.45 – 0.43
5 4.99 15.4 – 0.30
6 4.75 18.7 + 0.38
8 4.47 24.9 + 0.20
10 4.32 30.9 – 0.54
12 4.12 36.5 + 0.24
15 4.12 46.4 – 0.27
OUT
.
.
122
)(k
) RESISTOR STEPS
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage sensing. It also reduces switching frequency and current limit when output voltage is very low (see the Frequency Foldback graph in Typical Performance Char­acteristics). This is done to control power dissipation in both the IC and in the external diode and inductor during short-circuit conditions. A shorted output requires the
switching regulator to operate at very low duty cycles, and the average current through the diode and inductor is equal to the short-circuit current limit of the switch (typically 2A for the LT1766, folding back to less than 1A). Minimum switch on time limitations would prevent the switcher from attaining a sufficiently low duty cycle if switching frequency were maintained at 200kHz, so frequency is reduced by about 5:1 when the feedback pin voltage drops below 0.8V (see Frequency Foldback graph). This does not affect operation with normal load condi­tions; one simply sees a gear shift in switching frequency during start-up as the output voltage rises.
In addition to lower switching frequency, the LT1766 also operates at lower switch current limit when the feedback pin voltage drops below 0.6V. Q2 in Figure 2 performs this function by clamping the VC pin to a voltage less than its normal 2.1V upper clamp level. This
foldback current limit
greatly reduces power dissipation in the IC, diode and in­ductor during short-circuit conditions. External synchro­nization is also disabled to prevent interference with fold­back operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be affected are current source loads which maintain full load current with output voltage less than 50% of final value. In these rare situations the feedback pin can be clamped above
0.6V with an external diode to defeat foldback current limit.
Caution:
clamping the feedback pin means that frequency shifting will also be defeated, so a combination of high in­put voltage and dead shorted output may cause the LT1766 to lose control of current limit.
The internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low. The equivalent circuitry is shown in Figure 2. Q1 is completely off during normal operation. If the FB pin falls below 0.8V, Q1 begins to conduct current and reduces frequency at the rate of approximately 1.4kHz/µA. To ensure adequate frequency foldback (under worst-case short-circuit conditions), the external divider Thevinin resistance must be low enough to pull 115µA out of the FB pin with 0.44V on the pin (R 3.8k).
The net result is that reductions in frequency and
DIV
current limit are affected by output voltage divider imped­ance. Although divider impedance is not critical, caution
1766fb
9
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