LINEAR TECHNOLOGY LT1764A Technical data

FEATURES

LT1764A Series

3A, Fast Transient

Response, Low Noise,

LDO Regulators

U

DESCRIPTIO

■

Optimized for Fast Transient Response

■

Output Current: 3A

■

Dropout Voltage: 340mV at 3A

■

Low Noise: 40µV

■

1mA Quiescent Current

■

Wide Input Voltage Range: 2.7V to 20V

■

No Protection Diodes Needed

■

Controlled Quiescent Current in Dropout

■

Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V

■

Adjustable Output from 1.21V to 20V

■

<1µA Quiescent Current in Shutdown

■

Stable with 10µF Output Capacitor*

■

Stable with Ceramic Capacitors*

■

Reverse Battery Protection

■

No Reverse Current

■

Thermal Limiting

(10Hz to 100kHz)

RMS

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APPLICATIO S

■

3.3V to 2.5V Logic Power Supply

■

Post Regulator for Switching Supplies

The LT

®

1764A is a low dropout regulator optimized for fast transient response. The device is capable of supplying 3A of output current with a dropout voltage of 340mV. Operating quiescent current is 1mA, dropping to <1µA in shutdown. Quiescent current is well controlled; it does not rise in dropout as it does with many other regulators. In addition to fast transient response, the LT1764A has very low output voltage noise which makes the device ideal for sensitive RF supply applications.

Output voltage range is from 1.21V to 20V. The LT1764A regulators are stable with output capacitors as low as 10µF. Internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. The device is available in fixed output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable device with a 1.21V reference voltage. The LT1764A regulators are available in 5-lead TO-220 and DD packages, and 16-lead FE packages.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

*See Applications Information Section.

TYPICAL APPLICATIO

to 2.5V

3.3V

IN

> 3V

V

IN

+

10µF*

IN

LT1764A-2.5

SHDN

OUT

SENSE

GND

Regulator

OUT

1764 TA01

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2.5V

+

*TANTALUM, CERAMIC OR ALUMINUM ELECTROLYTIC

3A

10µF*

Dropout Voltage

400

350

300

250

200

150

100

DROPOUT VOLTAGE (mV)

50

0

0 0.5

1.0 2.01.5

LOAD CURRENT (A)

2.5

3.0

1764 TA02

1764afb

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LT1764A Series

WW

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ABSOLUTE MAXIMUM RATINGS

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(Note 1)

IN Pin Voltage ........................................................ ±20V

OUT Pin Voltage .................................................... ±20V

Input to Output Differential Voltage (Note 12) ....... ±20V

SENSE Pin Voltage ............................................... ±20V

ADJ Pin Voltage ...................................................... ±7V

SHDN Pin Voltage ................................................. ±20V

U

W

PACKAGE/ORDER INFORMATION

FRONT VIEW

SENSE/ADJ*

5

OUT

TAB IS

GND

5-LEAD PLASTIC DD

*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/

LT1764A-2.5/LT1764A-3.3

= ADJ FOR LT1764A

T

JMAX

4

3

2

1

Q PACKAGE

= 150°C, θJA = 30°C/ W

GND

IN

SHDN

TAB IS

GND

*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/

FRONT VIEW

5

4

3

2

1

T PACKAGE

5-LEAD PLASTIC TO-220

LT1764A-2.5/LT1764A-3.3

= ADJ FOR LT1764A

= 150°C, θJA = 50°C/ W

T

JMAX

Output Short-Circuit Duration ......................... Indefinite

Operating Junction Temperature Range

E Grade............................................. – 40°C to 125°C

MP Grade ......................................... –55°C to 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

U

TOP VIEW

1

SENSE/ ADJ*

OUT

GND

IN

SHDN

GND

OUT

SENSE/ADJ*

GND

T

2

NC

3

4

17

5

6

7

8

FE PACKAGE

16-LEAD PLASTIC TSSOP

PIN 17 IS GND

= 150°C, θJA = 38°C/ W

JMAX

GND

16

NC

15

IN

14

*PIN 6 = SENSE FOR LT1764A-1.5/

IN

13

IN

12

NC

11

SHDN

10

GND

9

LT1764A-1.8/LT1764A-2.5/ LT1764A-3.3

= ADJ FOR LT1764A

ORDER PART NUMBER

LT1764AEQ LT1764AEQ-1.5 LT1764AEQ-1.8 LT1764AEQ-2.5 LT1764AEQ-3.3

ORDER PART NUMBER

LT1764AET LT1764AET-1.5 LT1764AET-1.8 LT1764AET-2.5 LT1764AET-3.3

ORDER PART NUMBER FE PART MARKING

LT1764AEFE LT1764AEFE-1.5 LT1764AEFE-1.8 LT1764AEFE-2.5 LT1764AEFE-3.3

LT1764AMPQ

Order Options

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Tape and Reel: Add #TR

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage I (Notes 3, 11) I

Regulated Output Voltage LT1764A-1.5 VIN = 2.21V, I (Note 4) 2.7V < V

= 0.5A 1.7 V

LOAD

= 1.5A 1.9 V

LOAD

E Grade: I MP Grade: I

LT1764A-1.8 VIN = 2.3V, I

LOAD

= 3A

2.8V < V

●

= 1mA 1.477 1.500 1.523 V

LOAD

< 20V, 1mA < I

IN

= 1mA 1.773 1.800 1.827 V

LOAD

< 20V, 1mA < I

IN

LOAD

< 3A

●

1.447 1.500 1.545 V

●

1.737 1.800 1.854 V

2.3 2.7 V

2.3 2.8 V

1764afb

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LT1764A Series

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

LT1764A-2.5 VIN = 3V, I

3.5V < V

LT1764A-3.3 VIN = 3.8V, I

4.3V < V

ADJ Pin Voltage LT1764A VIN = 2.21V, I (Notes 3, 4) E Grade: 2.7V < V

MP Grade: 2.8V < V

Line Regulation LT1764A-1.5 ∆VIN = 2.21V to 20V, I

LT1764A-1.8 ∆V LT1764A-2.5 ∆V LT1764A-3.3 ∆V LT1764A (Note 3) ∆V

Load Regulation LT1764A-1.5 VIN = 2.7V, ∆I

V

IN

LT1764A-1.8 VIN = 2.8V, ∆I

V

IN

LT1764A-2.5 VIN = 3.5V, ∆I

V

IN

LT1764A-3.3 VIN = 4.3V, ∆I

V

IN

LT1764A (Note 3) VIN = 2.7V, ∆I

E Grade: V MP Grade: V

Dropout Voltage I

= V

V

IN

OUT(NOMINAL)

(Notes 5, 6, 11) I

GND Pin Current I

= V

V

IN

OUT(NOMINAL)

+ 1V I

(Notes 5, 7) I

Output Voltage Noise C

= 1mA 0.02 0.05 V

LOAD

I

= 1mA

LOAD

= 100mA 0.07 0.13 V

LOAD

I

= 100mA

LOAD

I

= 500mA 0.14 0.20 V

LOAD

I

= 500mA

LOAD

I

= 1.5A 0.25 0.33 V

LOAD

= 1.5A

I

LOAD

I

= 3A 0.34 0.45 V

LOAD

= 3A

I

LOAD

= 0mA

LOAD

= 1mA

LOAD

= 100mA

LOAD

I

= 500mA

LOAD

I

= 1.5A

LOAD

I

= 3A

LOAD

= 10µF, I

OUT

= 3A, BW = 10Hz to 100kHz 40 µV

LOAD

ADJ Pin Bias Current (Notes 3, 8) 310µA

Shutdown Threshold V

SHDN Pin Current V (Note 9) V

Quiescent Current in Shutdown VIN = 6V, V

Ripple Rejection VIN – V

= Off to On

OUT

V

= On to Off

OUT

= 0V 0.01 1 µA

SHDN

= 20V 730µA

SHDN

= 0V 0.01 1 µA

SHDN

= 1.5V (Avg), V

OUT

f

= 120Hz, I

RIPPLE

LOAD

= 1mA 2.462 2.500 2.538 V

LOAD

< 20V, 1mA < I

IN

= 1mA 3.250 3.300 3.350 V

LOAD

< 20V, 1mA < I

IN

= 1mA 1.192 1.210 1.228 V

LOAD

< 20V, 1mA < I

IN

= 2.3V to 20V, I

IN

= 3V to 20V, I

IN

= 3.8V to 20V, I

IN

= 2.21V to 20V, I

IN

RIPPLE

LOAD LOAD

LOAD

= 2.7V, ∆I

= 2.8V, ∆I

IN

= 0.5V

= 2.7V, ∆I

= 2.8V, ∆I

= 3.5V, ∆I

= 4.3V, ∆I

< 20V, 1mA < I

LOAD

= 1mA

LOAD

< 3A

LOAD

= 1mA

< 3A

LOAD

< 3A

●

2.412 2.500 2.575 V

●

3.183 3.300 3.400 V

●

1.168 1.210 1.246 V

●

1.168 1.210 1.246 V

●

2.5 10 mV 310mV 410mV

4.5 10 mV 210mV

= 1mA to 3A 3 7 mV = 1mA to 3A

●

= 1mA to 3A 4 8 mV = 1mA to 3A

●

= 1mA to 3A 4 10 mV = 1mA to 3A

●

= 1mA to 3A 4 12 mV = 1mA to 3A

●

= 1mA to 3A 2 5 mV

= 1mA to 3A

LOAD

= 1mA to 3A

LOAD

,5563dB

P-P

●

0.25 0.75 V

1 1.5 mA

1.1 1.6 mA

3.5 5 mA

11 18 mA 40 75 mA

120 200 mA

0.9 2 V

= 1.5A

23 mV

25 mV

30 mV

40 mV

20 mV 20 mV

0.10 V

0.18 V

0.27 V

0.40 V

0.66 V

RMS

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LT1764A Series

TEMPERATURE (°C)

–50

DROPOUT VOLTAGE (mV)

400

500

600

25 75

1764 G03

300

200

–25 0

50 100 125

100

0

IL = 3A

IL = 1.5A

IL = 0.5A

IL = 100mA

IL = 1mA

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Current Limit VIN = 7V, V

E Grade: LT1764A; LT1764A-1.5;

= 2.7V, ∆V

V

IN

MP Grade: LT1764A

= 2.8V, ∆V

V

IN

Input Reverse Leakage Current VIN = –20V, V Reverse Output Current (Note 10) LT1764A-1.5 V

LT1764A-1.8 V LT1764A-2.5 V LT1764A-3.3 V LT1764A (Note 3) V

Note 1:

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

Note 2: The LT1764A regulators are tested and specified under pulse load conditions such that T

= 25°C; performance at –40°C and 125°C is assured by design,

T

A

≈ TA. The LT1764A (E grade) is 100% tested at

J

characterization and correlation with statistical process controls. The LT1764A (MP grade) is 100% tested and guaranteed over the –55°C to 125°C temperature range.

Note 3: The LT1764A (adjustable version) is tested and specified for these conditions with the ADJ pin connected to the OUT pin.

Note 4. Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited.

Note 5: To satisfy requirements for minimum input voltage, the LT1764A (adjustable version) is tested and specified for these conditions with an external resistor divider (two 4.12k resistors) for an output voltage of

= 0V 4 A

OUT

●

3.1 A

= – 0.1V

OUT

●

3.1 A

= – 0.1V

OUT

= 0V

OUT

= 1.5V, VIN < 1.5V 600 1200 µA

OUT

= 1.8V, VIN < 1.8V 600 1200 µA

OUT

= 2.5V, VIN < 2.5V 600 1200 µA

OUT

= 3.3V, VIN < 3.3V 600 1200 µA

OUT

= 1.21V, VIN < 1.21V 300 600 µA

OUT

●

1mA

2.42V. The external resistor divider will add a 300µA DC load on the output. Note 6: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to: V

– V

IN

Note 7: GND pin current is tested with V

2.7V (E grade) or V

= 2.8V (MP grade), whichever is greater, and a current

IN

DROPOUT

= V

IN

OUT(NOMINAL)

.

+ 1V or VIN =

source load. The GND pin current will decrease at higher input voltages.

Note 8: ADJ pin bias current flows into the ADJ pin. Note 9: SHDN pin current flows into the SHDN pin. Note 10: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin.

Note 11. For the LT1764A, LT1764A-1.5 and LT1764A-1.8 dropout voltage will be limited by the minimum input voltage specification under some output voltage/load conditions.

Note 12. All combinations of absolute maximum input voltage and absolute maximum output voltage cannot be achieved. The absolute maximum differential from input to output is ±20V. For example, with

= 20V, V

V

IN

cannot be pulled below ground.

OUT

TYPICAL PERFOR A CE CHARACTERISTICS

Typical Dropout Voltage

600

500

400

300

200

DROPOUT VOLTAGE (mV)

100

0

4

0

TJ = 125°C

1.0 1.5 2.0

0.5 OUTPUT CURRENT (A)

TJ = 25°C

2.5 3.0

1764 G01

UW

Guaranteed Dropout Voltage

700

= TEST POINTS

600

500

400

300

200

100

GUARANTEED DROPOUT VOLTAGE (mV)

0

0.5 1.0 OUTPUT CURRENT (A)

TJ ≤ 125°C

TJ ≤ 25°C

1.5 2.5

Dropout Voltage

2.0 3.0

1764 G02

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TEMPERATURE (°C)

–50

OUTPUT VOLTAGE (V)

25

1756 G05

–25 0 50

1.84

1.83

1.82

1.81

1.80

1.79

1.78

1.77

1.76 75 100 125

IL = 1mA

TEMPERATURE (°C)

–50

ADJ PIN VOLTAGE (V)

25

1756 G08

–25 0 50

1.230

1.225

1.220

1.215

1.210

1.205

1.200

1.195

1.190 75 100 125

IL = 1mA

INPUT VOLTAGE (V)

0

QUIESCENT CURRENT (mA)

40

35

30

25

20

15

10

5

0

8

1764 G10

246 107135 9

TJ = 25°C R

L

=

∞

V

SHDN

= V

IN

TYPICAL PERFOR A CE CHARACTERISTICS

LT1764A Series

Quiescent Current LT1764A-1.8 Output Voltage

1.4

LT1764A-1.5/1.8/2.5/3.3

1.2

1.0

0.8

0.6

0.4 VIN = 6V

QUIESCENT CURRENT (mA)

0.2

0

–50

=

R

L

IL = 0 V

SHDN

–25 0

∞

= V

IN

TEMPERATURE (°C)

25 75

LT1764A

50 100 125

1764 G04

LT1764A-2.5 Output Voltage

2.58 IL = 1mA

2.56

2.54

2.52

2.50

2.48

OUTPUT VOLTAGE (V)

2.46

2.44

2.42

–25 0 50

–50

25

TEMPERATURE (°C)

75 100 125

1756 G06

LT1764A-1.5 Output Voltage

1.54 IL = 1mA

1.53

1.52

1.51

1.50

1.49

OUTPUT VOLTAGE (V)

1.48

1.47

1.46

–25 0 50

–50

25

TEMPERATURE (°C)

75 100 125

1764A G40

LT1764A-3.3 Output Voltage LT1764A ADJ Pin Voltage

3.38 IL = 1mA

3.36

3.34

3.32

3.30

3.28

OUTPUT VOLTAGE (V)

3.26

3.24

3.22

–25 0 50

–50

25

TEMPERATURE (°C)

75 100 125

1756 G07

LT1764A-1.5 Quiescent Current

40

TJ = 25°C R

35

V

30

25

20

15

10

QUIESCENT CURRENT (mA)

5

0

= ∞

L

= V

SHDN

IN

246 107135 9

INPUT VOLTAGE (V)

LT1764A-1.8 Quiescent Current

40

TJ = 25°C

=

∞

R

35

L

V

= V

SHDN

30

25

20

15

10

QUIESCENT CURRENT (mA)

5

8

1764 G41

0

IN

246 107135 9

INPUT VOLTAGE (V)

8

1764 G09

LT1764A-2.5 Quiescent Current

1764afb

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LT1764A Series

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1764A-3.3 Quiescent Current LT1764A Quiescent Current

40

35

30

25

20

15

10

QUIESCENT CURRENT (mA)

5

0

246 107135 9

0

INPUT VOLTAGE (V)

LT1764A-1.8 GND Pin Current

20.0

17.5

15.0

12.5

10.0

7.5

GND PIN CURRENT (mA)

5.0

2.5

0

RL = 3.6Ω

= 500mA*

I

L

RL = 18Ω = 100mA*

I

L

3578246 10

10

INPUT VOLTAGE (V)

TJ = 25°C R V

TJ = 25°C V

SHDN

*FOR V

RL = 6Ω I

= 300mA*

L

L SHDN

= V

OUT

=

8

∞

= V

1764 G11

IN

= 1.8V

9

1764 G13

IN

1.6 TJ = 25°C

= 4.3k

R

1.4

L

= V

V

SHDN

IN

1.2

1.0

0.8

0.6

0.4

QUIESCENT CURRENT (mA)

0.2

0

4 8 12 20142 6 10 18

0

INPUT VOLTAGE (V)

LT1764A-2.5 GND Pin Current LT1764A-3.3 GND Pin Current

40

35

30

25

20

15

GND PIN CURRENT (mA)

10

5

0

RL = 5Ω

= 500mA*

I

L

RL = 25Ω

= 100mA*

I

L

3578246 10

10

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

*FOR V

RL = 8.33Ω I

L

16

1764 G12

IN

= 2.5V

OUT

= 300mA*

9

1764 G14

LT1764A-1.5 GND Pin Current

20.0 TJ = 25°C

= V

V

SHDN

17.5

15.0

12.5

10.0

7.5

GND PIN CURRENT (mA)

5.0

2.5

0

80

70

60

50

40

30

GND PIN CURRENT (mA)

20

10

0

IN

*FOR V

= 1.5V

OUT

RL = 3Ω

= 500mA*

I

L

RL = 15Ω = 100mA*

I

L

246 107135 9

INPUT VOLTAGE (V)

RL = 6.6Ω

= 500mA*

I

L

10

3578246 10 INPUT VOLTAGE (V)

RL = 11Ω I

RL = 5Ω

= 300mA*

I

L

TJ = 25°C V

SHDN

*FOR V

= 300mA*

L

RL = 33Ω I

8

= V

IN

= 3.3V

OUT

= 100mA*

L

1764 G42

9

1764 G15

LT1764A GND Pin Current LT1764A-1.8 GND Pin Current

15

TJ = 25°C

= V

V

SHDN

IN

*FOR V

12

9

6

GND PIN CURRENT (mA)

3

0

= 1.21V

OUT

RL = 2.42Ω

= 500mA*

I

L

RL = 4.33Ω

= 300mA*

I

L

RL = 12.1Ω

= 100mA*

I

L

2

3

19

6

7

8

4

5

10

INPUT VOLTAGE (V)

1764 G16

LT1764A-1.5 GND Pin Current

150

120

90

60

GND PIN CURRENT (mA)

30

0

123

0

RL = 0.5Ω

= 3A*

I

L

RL = 1Ω

= 1.5A*

I

L

45

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

IN

*FOR V

OUT

= 1.5V

RL = 2.14Ω

= 0.7A*

I

L

67 9

8

1764A G43

150

120

RL = 0.6Ω

= 3A*

90

60

GND PIN CURRENT (mA)

30

10

0

I

L

RL = 1.2Ω

= 1.5A*

I

L

2

3

19

4

5

INPUT VOLTAGE (V)

6

TJ = 25°C V

SHDN

*FOR V

RL = 2.57Ω I

L

6

7

= V

IN

= 1.8V

OUT

= 0.7A*

8

10

1764 G17

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UW

TEMPERATURE (°C)

–50

ADJ PIN BIAS CURRENT (µA)

25

1756 G26

–25 0 50

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

75 100 125

TYPICAL PERFOR A CE CHARACTERISTICS

LT1764A Series

LT1764A-2.5 GND Pin Current

200

160

RL = 0.83Ω

= 1.5A*

L

4

I

L

5

120

80

GND PIN CURRENT (mA)

40

0

19

0

RL = 1.66Ω

2

3

INPUT VOLTAGE (V)

I

GND Pin Current vs I

160

VIN = V

140

120

100

80

60

GND PIN CURRENT (mA)

40

20

0

0.5 1.0 2.0

0

+ 1V

OUT(NOM)

1.5

OUTPUT CURRENT (A)

TJ = 25°C

= V

V

SHDN

*FOR V

= 3A*

RL = 3.57Ω

= 0.7A*

I

L

6

7

LOAD

OUT

IN

= 2.5V

8

2.5

1764 G18

1764 G21

3.0

LT1764A-3.3 GND Pin Current

200

160

120

80

GND PIN CURRENT (mA)

40

10

0

2

3

19

0

INPUT VOLTAGE (V)

RL = 1.1Ω

= 3A*

I

L

RL = 2.2Ω I

= 1.5A*

L

4

5

TJ = 25°C

= V

V

SHDN

*FOR V

6

7

IN

= 3.3V

OUT

RL = 4.71Ω I

= 0.7A*

L

8

1764 G19

10

SHDN Pin Threshold (On-to-Off)

1.0 IL = 1mA

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1

0

–50

0

–25

TEMPERATURE (°C)

50

25

75

100

125

1764 G22

LT1764A GND Pin Current

150

120

90

60

GND PIN CURRENT (mA)

30

0

19

0

RL = 0.4Ω

= 3A*

I

L

RL = 0.81Ω

= 1.5A*

I

L

2

3

4

INPUT VOLTAGE (V)

SHDN Pin Threshold (Off-to-On)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1

0

–50

–25

IL = 3A

IL = 1mA

25

0

TEMPERATURE (°C)

5

50

TJ = 25°C

= V

V

SHDN

*FOR V

RL = 1.73Ω I

6

7

75

IN

OUT

= 0.7A*

L

8

= 1.21V

1764 G20

100

1764 G23

10

125

SHDN Pin Input Current SHDN Pin Input Current ADJ Pin Bias Current

10

9

8

7

6

5

4

3

2

SHDN PIN INPUT CURRENT (µA)

1

0

4

0

218

SHDN PIN VOLTAGE (V)

6

8

12

14

16

10

20

1764 G24

10

V

= 20V

SHDN

9

8

7

6

5

4

3

2

SHDN PIN INPUT CURRENT (µA)

1

0

–50

–25

0

50

25

TEMPERATURE (°C)

75

100

125

1764 G25

1764afb

7

LT1764A Series

TEMPERATURE (°C)

–50 –25

50

RIPPLE REJECTION (dB)

60

75

0

50

75

1764 G32

55

70

65

25

100

125

IL = 1.5A V

IN

= V

OUT(NOM)

+ 1V

+ 0.5V

P-P

RIPPLE

AT f = 120Hz

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Current Limit Current Limit Reverse Output Current

6

5

4

3

2

CURRENT LIMIT (A)

1

0

TJ = 125°C

4 8 12 16

INPUT/OUTPUT DIFFERENTIAL (V)

TJ = 25°C

TJ = –50°C

1764 G27

6

5

4

3

2

CURRENT LIMIT (A)

1

2020 6 10 14 18

0

–50

–25 0

25 75

TEMPERATURE (°C)

VIN = 7V

= 0V

V

OUT

50 100 125

1764 G28

5.0 LT1764A-1.5

4.5 LT1764A-1.8

4.0

LT1764A-2.5

3.5

LT1764A-3.3

3.0

LT1764A

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5

0

2

0

19

OUTPUT VOLTAGE (V)

CURRENT FLOWS

INTO OUTPUT PIN

= V

6

(LT1764A)

ADJ

V

OUT

7

V

OUT

(LT1764A-1.5/1.8/-2.5/-3.3)

3

4

5

TJ = 25°C

= 0V

V

IN

= VFB

8

1764 G29

10

Reverse Output Current

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

REVERSE OUTPUT CURRENT (mA)

0.1

0

–50

LT1764A Minimum Input Voltage

3.0

2.5

2.0

1.5

1.0

MINIMUM INPUT VOLTAGE (V)

0.5

0

–50

V

= 1.21V (LT1764A)

OUT

= 1.5V (LT1764A-1.5)

V

OUT

= 1.8V (LT1764A-1.8)

V

OUT

= 2.5V (LT1764A-2.5)

V

OUT

= 3.3V (LT1764A-3.3)

V

OUT

LT1764A-1.5/1.8/-2.5/-3.3

0

–25

TEMPERATURE (°C)

I

= 500mA

L

–25 0

TEMPERATURE (°C)

LT1764A

50

25

50 100 125

25 75

VIN = 0V

75

100

IL = 3A

IL = 1.5A

IL = 100mA

1764 G30

1764 G33

125

Ripple Rejection

80

70

60

50

40

30

RIPPLE REJECTION (dB)

20

IL = 1.5A

10

= V

V

IN

0

10 1k 10k 1M

OUT(NOM)

+ 50mV

100

+ 1V

RIPPLE

RMS

FREQUENCY (Hz)

C

OUT

TANTALUM +

10 × 1µF CERAMIC

C

OUT

TANTALUM

= 100µF

= 10µF

100k

1764 G31

Ripple Rejection

Load Regulation Output Noise Spectral Density

10

5

0

–5

–10

–15

LOAD REGULATION (mV)

–20

∆IL = 1mA TO 3A V

IN

–25

V

IN

(LT1764A-1.8/-2.5/-3.3)

–30

–50

LT1764A-1.5

= 2.7V (LT1764A/LT1764A-1.5) = V

OUT(NOM)

–25 0 50

TEMPERATURE (°C)

LT1764A-1.8

LT1764A-2.5

LT1764A-3.3

+ 1V

25

LT1764A

75 100 125

1764 G34

1

C

= 10µF

OUT

= 3A

I

LOAD

LT1764A-3.3 LT1764A-2.5

0.1

LT1764A

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.01 10

100 1k 10k 100k

FREQUENCY (Hz)

LT1764A-1.8

LT1764A-1.5

1764 G35

1764afb

8

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1764A Series

RMS Output Noise vs Load Current (10Hz to 100kHz)

40

= 10µF

C

OUT

35

)

30

RMS

25

20

15

OUTPUT NOISE (µV

10

5

0

0.001

0.0001 0.01 0.1 10

LT1764A-3.3

LT1764A-2.5

LT1764A-1.8

LT1764A-1.5

LOAD CURRENT (A)

LT1764A

LT1764A-3.3 Transient Response

0.2

0.1

0

–0.1

DEVIATION (V)

OUTPUT VOLTAGE

–0.2

1.00

0.75

0.50

0.25

LOAD CURRENT (A)

0

462

VIN = 4.3V

= 3.3µF TANTALUM

C

IN

= 10µF TANTALUM

C

OUT

12 14 18

8

10

TIME (µs)

LT1764A-3.3 10Hz to 100kHz Output Noise

V

OUT

100µV/DIV

C

= 10µF 1ms/DIV 1764A G37

OUT

IL = 3A

1

1764 G36

LT1764A-3.3 Transient Response

0.2

0.1

0

–0.1

DEVIATION (V)

OUTPUT VOLTAGE

–0.2

3

2

1

0

LOAD CURRENT (A)

16

20

1764 G38

0

462

VIN = 4.3V

= 33µF

C

IN

= 100µF TANTALUM

C

OUT

+ 10 × 1µF CERAMIC

12 14 18

8

10

TIME (µs)

16

20

1764 G39

1764afb

9

LT1764A Series

U

PI FU CTIO S

UU

DD/TO-220/TSSOP

SHDN (Pin 1/1/10): Shutdown. The SHDN pin is used to

put the LT1764A regulators into a low power shutdown state. The output will be off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5V logic or open-collector logic with a pull-up resistor. The pull-up resistor is required to supply the pull-up current of the open-collector gate, normally several microamperes, and the SHDN pin current, typically 7µA. If unused, the SHDN pin must be connected to V

. The device will be in

IN

the low power shutdown state if the SHDN pin is not connected.

IN (Pin 2/Pin 2/Pins 12, 13, 14): Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in batterypowered circuits. A bypass capacitor in the range of 1µF to 10µF is sufficient. The LT1764A regulators are designed to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. There will be no reverse current flow into the regulator and no reverse voltage will appear at the load. The device will protect both itself and the load.

NC (Pins 2, 11, 15) TSSOP Only: No Connect.

GND (Pin 3/Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground.

OUT (Pin 4/Pin 4/Pins 3, 4, 5): Output. The output

supplies power to the load. A minimum output capacitor of 10µF is required to prevent oscillations. Larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. See the

Applications Information section for more information on output capacitance and reverse output characteristics.

SENSE (Pin 5/Pin 5/Pin 6): Sense. For fixed voltage versions of the LT1764A (LT1764A-1.5/LT1764A-1.8/ LT1764A-2.5/LT1764A-3.3), the SENSE pin is the input to the error amplifier. Optimum regulation will be obtained at the point where the SENSE pin is connected to the OUT pin of the regulator. In critical applications, small voltage drops are caused by the resistance (R

) of PC

P

traces between the regulator and the load. These may be eliminated by connecting the SENSE pin to the output at the load as shown in Figure 1 (Kelvin Sense Connection). Note that the voltage drop across the external PC traces will add to the dropout voltage of the regulator. The SENSE pin bias current is 600µA at the nominal rated output voltage. The SENSE pin can be pulled below ground (as in a dual supply system where the regulator load is returned to a negative supply) and still allow the device to start and operate.

ADJ (Pin 5/Pin 5/Pin 6): Adjust. For the adjustable LT1764A, this is the input to the error amplifier. This pin is internally clamped to ± 7V. It has a bias current of 3µA which flows into the pin. The ADJ pin voltage is 1.21V referenced to ground and the output voltage range is 1.21V to 20V.

R

P

2

IN

LT1764A

V

+

IN

1

SHDN

GND

Figure 1. Kelvin Sense Connection

OUT

SENSE

3

4

+

5

R

P

LOAD

1764 F01

10

1764afb

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APPLICATIO S I FOR ATIO

LT1764A Series

The LT1764A series are 3A low dropout regulators optimized for fast transient response. The devices are capable of supplying 3A at a dropout voltage of 340mV. The low operating quiescent current (1mA) drops to less than 1µA in shutdown. In addition to the low quiescent current, the LT1764A regulators incorporate several protection features which make them ideal for use in battery-powered systems. The devices are protected against both reverse input and reverse output voltages. In battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the LT1764A-X acts like it has a diode in series with its output and prevents reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20V and still allow the device to start and operate.

Adjustable Operation

The adjustable version of the LT1764A has an output voltage range of 1.21V to 20V. The output voltage is set by the ratio of two external resistors as shown in Figure 2. The device servos the output to maintain the voltage at the ADJ pin at 1.21V referenced to ground. The current in R1 is then equal to 1.21V/R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 3µA at 25°C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Figure 2. The value of R1 should be less than 4.17k to minimize errors in the output voltage caused by the ADJ pin bias current. Note that in shutdown the output is turned off and the divider current will be zero.

The adjustable device is tested and specified with the ADJ pin tied to the OUT pin for an output voltage of 1.21V. Specifications for output voltages greater than 1.21V will be proportional to the ratio of the desired output voltage to

1.21V: V

/1.21V. For example, load regulation for an

OUT

output current change of 1mA to 3A is –3mV typical at V

= 1.21V. At V

OUT

= 5V, load regulation is:

OUT

IN

V

IN

OUT

LT1764A

ADJ

GND

Figure 2. Adjustable Operation

R2

R1

1764 F02

V

OUT

+

R

2

⎛

VV

=+

121 1

.

OUT ADJ

VV

=

121

.

ADJ

IA

=°

3

µ AT 25 C

ADJ

OUTPUT RANGE = 1.21V TO 20V

⎞

IR

+

⎜ ⎝

()()

⎟ ⎠

R

1

2

Output Capacitors and Stability

The LT1764A regulator is a feedback circuit. Like any feedback circuit, frequency compensation is needed to make it stable. For the LT1764A, the frequency compensation is both internal and external—the output capacitor. The size of the output capacitor, the type of the output capacitor, and the ESR of the particular output capacitor all affect the stability.

In addition to stability, the output capacitor also affects the high frequency transient response. The regulator loop has a finite band width. For high frequency transient loads, recovery from a transient is a combination of the output capacitor and the bandwidth of the regulator. The LT1764A was designed to be easy to use and accept a wide variety of output capacitors. However, the frequency compensation is affected by the output capacitor and optimum frequency stability may require some ESR, especially with ceramic capacitors.

For ease of use, low ESR polytantalum capacitors (POSCAP) are a good choice for both the transient response and stability of the regulator. These capacitors have intrinsic ESR that improves the stability. Ceramic capacitors have extremely low ESR, and while they are a good choice in many cases, placing a small series resistance element will sometimes achieve optimum stability and minimize ringing. In all cases, a minimum of 10µF is required while the maximum ESR allowable is 3Ω.

(5V/1.21V)(–3mV) = –12.4mV

The place where ESR is most helpful with ceramics is low output voltage. At low output voltages, below 2.5V, some ESR helps the stability when ceramic output capacitors are used. Also, some ESR allows a smaller capacitor value to be used. When small signal ringing occurs with ceramics due to insufficient ESR, adding ESR or increas-

1764afb

11

LT1764A Series

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APPLICATIO S I FOR ATIO

ing the capacitor value improves the stability and reduces the ringing. Table 1 gives some recommended values of ESR to minimize ringing caused by fast, hard current transitions.

Table 1. Capacitor Minimum ESR

V

OUT

1.2V 10mΩ 5mΩ 3mΩ 0mΩ

1.5V 7mΩ 5mΩ 3mΩ 0mΩ

1.8V 5mΩ 5mΩ 3mΩ 0mΩ

2.5V 0mΩ 0mΩ 0mΩ 0mΩ

3.3V 0mΩ 0mΩ 0mΩ 0mΩ ≥ 5V 0mΩ 0mΩ 0mΩ 0mΩ

10µF22

µ

F47

µ

F 100µF

Figures 3 through 8 show the effect of ESR on the transient response of the regulator. These scope photos show the transient response for the LT1764A at three different output voltages with various capacitors and various values of ESR. The output load conditions are the same for all traces. In all cases there is a DC load of 1A. The load steps up to 2A at the first transition and steps back to 1A at the second transition.

At the worst case point of 1.2V

with 10µF C

OUT

(Figure 3), a minimum amount of ESR is required. While 5mΩ is enough to eliminate most of the ringing, a value closer to 20mΩ provides a more optimum response. At

2.5V output with 10µF C

(Figure 4) the output rings

OUT

at the transitions with 0Ω ESR but still settles to within 10mV in 20µs after the 1A load step. Once again a small value of ESR will provide a more optimum response.

At 5V

with 10µF C

OUT

(Figure 5) the response is well

OUT

damped with 0Ω ESR.

Capacitor types with inherently higher ESR can be combined with 0mΩ ESR ceramic capacitors to achieve both good high frequency bypassing and fast settling time. Figure 9 illustrates the improvement in transient response that can be seen when a parallel combination of ceramic and POSCAP capacitors are used. The output voltage is at the worst case value of 1.2V. Trace A, is with a 10µF ceramic output capacitor and shows significant ringing with a peak amplitude of 25mV. For Trace B, a 22µF/45mΩ POSCAP is added in parallel with the 10µF ceramic. The output is well damped and settles to within 10mV in less than 5µs.

For Trace C, a 100µF/35mΩ POSCAP is connected in parallel with the 10µF ceramic capacitor. In this case the peak output deviation is less than 20mV and the output settles in about 5µs. For improved transient response the value of the bulk capacitor (tantalum or aluminum electrolytic) should be greater than twice the value of the ceramic capacitor.

Tantalum and Polytantalum Capacitors

There is a variety of tantalum capacitor types available, with a wide range of ESR specifications. Older types have ESR specifications in the hundreds of mΩ to several Ohms. Some newer types of polytantalum with multielectrodes have maximum ESR specifications as low as 5mΩ. In general the lower the ESR specification, the larger the size and the higher the price. Polytantalum capacitors have better surge capability than older types and generally lower ESR. Some types such as the Sanyo TPE and TPB series have ESR specifications in the 20mΩ to 50mΩ range, which provide near optimum transient response.

With a C

of 100µF at 0Ω ESR and an output of 1.2V

OUT

(Figure 6), the output rings although the amplitude is only 10mV

. With C

p-p

of 100µF it takes only 5mΩ to 20mΩ

OUT

of ESR to provide good damping at 1.2V output. Performance at 2.5V and 5V output with 100µF C ilar characteristics to the 10µF case (see Figures 7-8).

2.5V At 5V

5mΩ to 20mΩ can improve transient response.

OUT

the response is well damped with 0Ω ESR.

OUT

shows sim-

OUT

At

12

Aluminum Electrolytic Capacitors

Aluminum electrolytic capacitors can also be used with the LT1764. These capacitors can also be used in conjunction with ceramic capacitors. These tend to be the cheapest and lowest performance type of capacitors. Care must be used in selecting these capacitors as some types can have ESR which can easily exceed the 3Ω maximum value.

1764afb

(mΩ)

R

(mΩ)

R

ESR

LT1764A Series

V

= 1.2V

0

5

10

OUT

I

OUT

C

OUT

50mV/DIV

= 1A WITH

1A PULSE

= 10µF CERAMIC

0

5

(mΩ)

ESR

R

10

20

50

20µs/DIV

1764A F03

Figure 3

V

= 2.5V

OUT

I

0

5

10

OUT

C

OUT

50mV/DIV

= 1A WITH

1A PULSE

= 10µF CERAMIC

20

20µs/DIV

1764A F06

Figure 6

0

5

(mΩ)

ESR

R

10

20

50

20µs/DIV

1764A F04

Figure 4

20

20µs/DIV

1764A F07

Figure 7

V

OUT

I

= 1A WITH

OUT

C

OUT

20mV/DIV

V

OUT

I

LOAD

C

OUT

20mV/DIV

= 1.2V

1A PULSE

= 100µF CERAMIC

= 2.5V

= 1A WITH

1A PULSE

= 100µF CERAMIC

V

= 5V

OUT

I

= 1A WITH

0

5

(mΩ)

ESR

R

10

20

20µs/DIV

1764A F05

Figure 5

A

B

(mΩ)

ESR

R

OUT

C

OUT

50mV/DIV

1A PULSE

= 10µF CERAMIC

(mΩ)

R

ESR

0

5

10

20

20µs/DIV

1764A F08

Figure 8

V

= 1.2V

OUT

I

= 1A WITH 1A PULSE

OUT

C

=

OUT

A = 10µF CERAMIC

20mV/DIV

B = 10µF CERAMIC IN PARALLEL WITH 22µF/

45mΩ POLY

C = 10µF CERAMIC IN PARALLEL WITH 100µF/

35mΩ POLY

V

OUT

I

LOAD

C

OUT

20mV/DIV

= 5V

= 1A WITH

1A PULSE

= 100µF CERAMIC

C

20µs/DIV

1764A F09

Figure 9

1764afb

13

LT1764A Series

U

WUU

APPLICATIONS INFORMATION

Ceramic Capacitors

Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 3 and 4. When used with a 5V regulator, a 10µF Y5V capacitor can exhibit an effective value as low as 1µF to 2µF over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values.

Table 2. PC Trace Resistors

10mΩ 20mΩ 30mΩ

0.5oz C

1.0oz C

2.0oz C

Width 0.011" (0.28mm) 0.011" (0.28mm) 0.011" (0.28mm)

U

Length 0.102" (2.6mm) 0.204" (5.2mm) 0.307" (7.8mm)

Width 0.006" (0.15mm) 0.006" (0.15mm) 0.006" (0.15mm)

U

"

Length 0.110

Width 0.006" (0.15mm) 0.006" (0.15mm) 0.006" (0.15mm)

U

Length 0.224

(2.8mm) 0.220" (5.6mm) 0.330" (8.4mm)

"

(5.7mm) 0.450" (11.4mm) 0.670" (17mm)

Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients.

“FREE” Resistance with PC Traces

The resistance values shown in Table 1 can easily be made using a small section of PC trace in series with the output capacitor. The wide range of noncritical ESR makes it easy to use PC trace. The trace width should be sized to handle the RMS ripple current associated with the load. The output capacitor only sources or sinks current for a few microseconds during fast output current transitions. There

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

–100

0

BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF

X5R

Y5V

26

4

8

DC BIAS VOLTAGE (V)

14

12

10

Figure 3. Ceramic Capacitor DC Bias Characteristics

14

16

1764 F10

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF

–100

–50

–25 0

25 75

TEMPERATURE (°C)

X5R

Y5V

50 100 125

1764 F11

Figure 4. Ceramic Capacitor Temperature Characteristics

1764afb

LT1764A Series

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APPLICATIONS INFORMATION

is no DC current in the output capacitor. Worst case ripple current will occur if the output load is a high frequency (>100kHz) square wave with a high peak value and fast edges (< 1µs). Measured RMS value for this case is 0.5 times the peak-to-peak current change. Slower edges or lower frequency will significantly reduce the RMS ripple current in the capacitor.

This resistor should be made using one of the inner layers of the PC board which are well defined. The resistivity is determined primarily by the sheet resistance of the copper laminate with no additional plating steps. Table 2 gives some sizes for 0.75A RMS current for various copper thicknesses. More detailed information regarding resistors made from PC traces can be found in Application Note 69, Appendix A.

Overload Recovery

Like many IC power regulators, the LT1764A-X has safe operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown.

When power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. During the start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein removal of an output short will not allow the output voltage to recover. Other regulators, such as the LT1085, also exhibit this phenomenon, so it is not unique to the LT1764A series.

The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are immediately after the removal of a short circuit or when the SHDN pin is pulled high after the input voltage has already been turned on. The load line for such a load may intersect the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double

intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover.

Output Voltage Noise

The LT1764A regulators have been designed to provide low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load. Output voltage noise is typically 50nV√Hz over this frequency bandwidth for the LT1764A (adjustable version). For higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. This results in RMS noise over the 10Hz to 100kHz bandwidth of 15µV the LT1764A increasing to 37µV

Higher values of output voltage noise may be measured when care is not exercised with regards to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the output of the LT1764A-X. Power supply ripple rejection must also be considered; the LT1764A regulators do not have unlimited power supply rejection and will pass a small portion of the input noise through to the output.

Thermal Considerations

The power handling capability of the device is limited by the maximum rated junction temperature (125°C). The power dissipated by the device is made up of two components:

1. Output current multiplied by the input/output voltage differential: (I

2. GND pin current multiplied by the input voltage: (I

)(VIN).

GND

The GND pin current can be found using the GND Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two components listed above.

The LT1764A series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to

)(VIN – V

OUT

for the LT1764A-3.3.

RMS

), and

OUT

RMS

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for

15

LT1764A Series

U

WUU

APPLICATIONS INFORMATION

all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered.

For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Surface mount heatsinks and plated through-holes can also be used to spread the heat generated by power devices.

The following table lists thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 1/16" FR-4 board with one ounce copper.

Table 3. Q Package, 5-Lead DD

COPPER AREA

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2500mm22500mm

1000mm22500mm

125mm22500mm

*Device is mounted on topside.

T Package, 5-Lead TO-220

Thermal Resistance (Junction-to-Case) = 2.5°C/W

2

2500mm

Calculating Junction Temperature

Example: Given an output voltage of 3.3V, an input voltage range of 4V to 6V, an output current range of 0mA to 500mA and a maximum ambient temperature of 50°C, what will the maximum junction temperature be?

The power dissipated by the device will be equal to:

I

OUT(MAX)(VIN(MAX)

– V

OUT

) + I

where,

I

OUT(MAX)

V

IN(MAX)

I

GND

at (I

= 500mA

= 6V

= 500mA, VIN = 6V) = 10mA

OUT

So,

THERMAL RESISTANCE

2

GND(VIN(MAX)

23°C/W

25°C/W

33°C/W

)

The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or:

T

= 50°C + 39.5°C = 89.5°C

JMAX

Protection Features

The LT1764A regulators incorporate several protection features which make them ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output voltages and reverse voltages from output to input.

Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.

The input of the device will withstand reverse voltages of 20V. Current flow into the device will be limited to less than 1mA and no negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries which can be plugged in backward.

The output of the LT1764A-X can be pulled below ground without damaging the device. If the input is left open circuit or grounded, the output can be pulled below ground by 20V. For fixed voltage versions, the output will act like a large resistor, typically 5k or higher, limiting current flow to typically less than 600µA. For adjustable versions, the output will act like an open circuit; no current will flow out of the pin. If the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. In this case, grounding the SHDN pin will turn off the device and stop the output from sourcing the short-circuit current.

P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W

Using a DD package, the thermal resistance will be in the range of 23°C/W to 33°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to:

1.41W(28°C/W) = 39.5°C

16

The ADJ pin of the adjustable device can be pulled above or below ground by as much as 7V without damaging the device. If the input is left open circuit or grounded, the ADJ pin will act like an open circuit when pulled below ground and like a large resistor (typically 5k) in series with a diode when pulled above ground.

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LT1764A Series

OUTPUT VOLTAGE (V)

012345678910

REVERSE OUTPUT CURRENT (mA)

1764 F12

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

LT1764A-2.5

LT1764A-3.3

LT1764A-1.8

LT1764A

T

J

= 25°C

V

IN

= OV CURRENT FLOWS INTO OUTPUT PIN V

OUT

= V

ADJ

(LT1764A)

V

OUT

= VFB (LT1764A-1.5 LT1764A-1.8, LT1764A-2.5, LT1764A-3.3)

LT1764A-1.5

U

WUU

APPLICATIONS INFORMATION

In situations where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, a resistor divider is used to provide a regulated 1.5V output from the 1.21V reference when the output is forced to 20V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 7V. The 13V difference between OUT and ADJ pins divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 2.6k.

In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. Current flow back into the output will follow the curve shown in Figure 5.

When the IN pin of the LT1764A-X is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current

will typically drop to less than 2µA. This can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN pin will have no effect on the reverse output current when the output is pulled above the input.

Figure 5. Reverse Output Current

TYPICAL APPLICATIO S

TO 140V AC

L2

90V AC

“SYNC”

TO

+

”

ALL “V

POINTS

+

L1: COILTRONICS CTX500-2-52 L2: STANCOR P-8560 *1% FILM RESISTOR

U

SCR Preregulator Provides Efficiency Over Line Variations

NTE5437

10V AC AT 115V

IN

10V AC AT 115V

IN

NTE5437

1N4002 1N4002

1N4002

2.4k

750Ω

22µF

1N4148

1k

0.033µF

L1

500µH

+

C1A

1/2 LT1018

–

+

V

750Ω

+

1/2 LT1018

10000µF

1N4148

C1B

+

–

V

34k*

12.1k*

+

200k

+

1N4148

10k

LT1764A-3.3

IN SHDN

GND

0.1µF

1µF

OUT

FB

LT1006

+

V

A1

V

OUT

3.3V 3A

22µF

+

10k

+

LT1004

1.2V

1764 TA03

V

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–

17

LT1764A Series

U

TYPICAL APPLICATIO S

+

V

> 2.7V

IN

C1 10µF

Adjustable Current Source

R1

R3 2k

40.2k

1k

R2

LT1004-1.2

ADJUST R1 FOR 0A TO 3A

CONSTANT CURRENT

R5

0.01Ω

R4

2.2k

C2

3.3µF

R6

2.2k

IN

SHDN

–

2

1/2 LT1366

+

3

LT1764A-1.8

GND

C3

1µF

8

4

1764 TA04

OUT

FB

R7 470Ω

1

R8 100k

LOAD

PACKAGE DESCRIPTION

0.256

(6.502)

0.060

(1.524)

0.300

(7.620)

BOTTOM VIEW OF DD PAK

HATCHED AREA IS SOLDER PLATED

COPPER HEAT SINK

0.060

(1.524)

0.183

(4.648)

0.075

(1.905)

U

Q Package

5-Lead Plastic DD Pak

(Reference LTC DWG # 05-08-1461)

0.060

(1.524)

TYP

0.330 – 0.370

(8.382 – 9.398)

+0.012

0.143 –0.020

+0.305

3.632

()

–0.508

0.028 – 0.038

(0.711 – 0.965)

0.390 – 0.415

(9.906 – 10.541)

° TYP

15

0.067 (1.70)

BSC

0.165 – 0.180

(4.191 – 4.572)

0.059

(1.499)

TYP

0.013 – 0.023

(0.330 – 0.584)

0.045 – 0.055

(1.143 – 1.397)

+0.008

0.004 –0.004

+0.203

0.102

()

–0.102

0.095 – 0.115

(2.413 – 2.921)

0.050 ± 0.012

(1.270 ± 0.305)

Q(DD5) 1098

18

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PACKAGE DESCRIPTION

T5 (TO-220) 0399

0.028 – 0.038

(0.711 – 0.965)

0.067 (1.70)

0.135 – 0.165

(3.429 – 4.191)

0.700 – 0.728

(17.78 – 18.491)

0.045 – 0.055

(1.143 – 1.397)

0.095 – 0.115

(2.413 – 2.921)

0.013 – 0.023

(0.330 – 0.584)

0.620

(15.75)

TYP

0.155 – 0.195* (3.937 – 4.953)

0.152 – 0.202

(3.861 – 5.131)

0.260 – 0.320 (6.60 – 8.13)

0.165 – 0.180

(4.191 – 4.572)

0.147 – 0.155

(3.734 – 3.937)

DIA

0.390 – 0.415

(9.906 – 10.541)

0.330 – 0.370

(8.382 – 9.398)

0.460 – 0.500

(11.684 – 12.700)

0.570 – 0.620

(14.478 – 15.748)

0.230 – 0.270

(5.842 – 6.858)

BSC

SEATING PLANE

* MEASURED AT THE SEATING PLANE

LT1764A Series

U

T Package

5-Lead Plastic TO-220 (Standard)

(Reference LTC DWG # 05-08-1421)

3.58

(.141)

6.60 ±0.10

4.50 ±0.10

RECOMMENDED SOLDER PAD LAYOUT

0.09 – 0.20

(.0035 – .0079)

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

SEE NOTE 4

0.65 BSC

4.30 – 4.50* (.169 – .177)

0.50 – 0.75

(.020 – .030)

MILLIMETERS

(INCHES)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

0.45 ±0.05

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663)

Exposed Pad Variation BB

4.90 – 5.10* (.193 – .201)

16 1514 13 12 11

2.94

(.116)

1.05 ±0.10

0.25 REF

4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE

0° – 8°

1345678

0.65

(.0256)

BSC

0.195 – 0.30

(.0077 – .0118)

2

TYP

3.58

(.141)

10 9

2.94

(.116)

1.10

(.0433)

MAX

0.05 – 0.15

(.002 – .006)

FE16 (BB) TSSOP 0204

6.40

(.252)

BSC

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19

LT1764A Series

TYPICAL APPLICATIO

> 3.7V

V

IN

U

Paralleling of Regulators for Higher Output Current

R1

+

SHDN

C1 100µF

R2

0.01Ω

R3

2.2k

0.01Ω

2.2k

R4

3

+

2

–

8

1/2 LT1366

4

IN

LT1764A-3.3

SHDN

GND

IN

LT1764A

SHDN

GND

1

C3

0.01µF

OUT

FB

OUT

ADJ

R5 1k

1764 TA05

R6

6.65k

R7

4.12k

3.3V

C2 22µF

6A

+

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Q

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OPTI-LOOP is a registered trademark of Linear Technology Corporation. UltraFast and ThinSOT are trademarks of Linear Technology Corporation.

Includes 2.5V Reference and Comparator

500mV Dropout Voltage

Noise, ThinSOTTM Package

RMS

Noise, MSOP Package

RMS

Noise, SO-8 Package

RMS

Noise, MSOP Package

RMS

Noise, SOT-223 Package

RMS

Noise, ThinSOT Package

RMS

20

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

●

www.linear.com

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LT 0706 REV B • PRINTED IN USA

LINEAR TECHNOLOGY LT1764A Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual